ARM: tegra: cardhu:Use PLL_C for sdmmc1
authorPavan Kunapuli <pkunapuli@nvidia.com>
Fri, 18 Feb 2011 13:01:54 +0000 (18:01 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 24 Mar 2012 02:56:52 +0000 (19:56 -0700)
commit51d08f8e21871a24de6d5c4011e7a031619c6b32
treefc0173115dd9d55de2e164bd29b83b3000316ded
parentf5d6f6238f429625b2f3f08d9ab62462163bc23f
ARM: tegra: cardhu:Use PLL_C for sdmmc1

PLL_C can generate 208 MHz clock for SDMMC1.
SD 3.0 cards can work at 208 MHz. Increase sdmmc1
frequency to 208 MHz.

Bug 661035

Original-Change-Id: I7afa110de4d77183c959a53b1fab31fdec37e193
Reviewed-on: http://git-master/r/20045
Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Original-Change-Id: I46dbac5135c5419a93d05285aa46acaf2601efc2

Rebase-Id: Rfa4a90ccccdcfb6e2c65a68c02c20390a9d3fd89
arch/arm/mach-tegra/board-cardhu-sdhci.c