drm/radeon: fix up pll selection on DCE5/6
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 17 Jul 2012 18:02:43 +0000 (14:02 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 17 Jan 2013 16:51:07 +0000 (08:51 -0800)
commit3eafd581892bca5588762bb30d797c74f0441fac
tree6fad7bc406e8485942c5b66686d33cdf3a554362
parent1478f45496fca13f42fb7f940908b5cd3bee105c
drm/radeon: fix up pll selection on DCE5/6

commit 26fe45a0a76f165425f332a5aaa298f149f9db22 upstream.

Selecting ATOM_PPLL_INVALID should be equivalent as the
DCPLL or PPLL0 are already programmed for the DISPCLK, but
the preferred method is to always specify the PLL selected.
SetPixelClock will check the parameters and skip the
programming if the PLL is already set up.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Julien Cristau <jcristau@debian.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/radeon/atombios_crtc.c