ARM: kernel: update __cpu_disable to use cache LoUIS maintenance API
authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 7 Sep 2012 05:39:15 +0000 (10:39 +0530)
committerMrutyunjay Sawant <msawant@nvidia.com>
Tue, 30 Oct 2012 12:52:14 +0000 (05:52 -0700)
commit314a0cf7eacc76c2919b2ea824b87811a4a297eb
tree4161dbe5e7e3b0dd6cd41527df27080e543ce817
parent2fb1c645cf7f5568fa5ac83703fd630444307d29
ARM: kernel: update __cpu_disable to use cache LoUIS maintenance API

When a CPU is hotplugged out caches that reside in its power domain
lose their contents and so must be cleaned to the next memory level.

Currently, __cpu_disable calls flush_cache_all() that for new generation
processor like A15/A7 ends up cleaning and invalidating all cache levels
up to Level of Coherency, which includes the unified L2.

This ends up being a waste of cycles since the L2 cache contents are not
lost on power down.

This patch updates __cpu_disable to use the new LoUIS API cache operations.

Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Change-Id: Ib95a626f00ff0ab8c1b974e57f62ebef92175510
Reviewed-on: http://git-master/r/147784
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
arch/arm/kernel/smp.c