ARM: tegra: clock: Change Tegra3 PLLP output frequency
authorAlex Frid <afrid@nvidia.com>
Sat, 28 May 2011 07:21:30 +0000 (00:21 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 24 Mar 2012 02:57:09 +0000 (19:57 -0700)
commit1f76ea16bf8ab5577a5dc42c066e8801111db17d
tree7a7a9ac923e333a00fbb3c7b8be32c55507769fc
parentaf3454129f4d53166cadb697247cf18cc7332f1c
ARM: tegra: clock: Change Tegra3 PLLP output frequency

On Tegra3 fixed PLLP output frequency has been set to 408MHz
(instead of 216MHz). Respectively changed:

- Tegra3 broads setting for UART, and audio clocks
- Tegra3 common clock setting for PLLP output dividers, SDMMC,
  and system buses
- Tegra3 CPU backup configuration to guarantee safe backup at
  any voltage

Bug 829081

Original-Change-Id: Ied0c75204ccb2e4a428f0b8a124f0f3e053aa386
Reviewed-on: http://git-master/r/34813
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Rbdf484688e71d7f83e88da550b2a0c98136ea6d6
arch/arm/mach-tegra/board-cardhu.c