arm: tegra: bypass PllP during LP1 suspend
authorBo Yan <byan@nvidia.com>
Thu, 31 Oct 2013 17:43:31 +0000 (10:43 -0700)
committerHarry Hong <hhong@nvidia.com>
Tue, 12 Nov 2013 02:20:43 +0000 (18:20 -0800)
commit1ea9bb0311a1eb6fac42b81026dccdbdfc72dc12
tree97abe781de7c58d6f1e9f40a1bf53392284a60da
parenta472e73877fd8c6d6fd730f5d4d794bf47741679
arm: tegra: bypass PllP during LP1 suspend

RAM repair requires PllP, so it shouldn't be disabled. To save
power, instead of keeping it running at 408Mhz, enable bypass
mode, so RAM repair logic can be clocked by oscillator. This
is done when LP1 entry is from fast cluster only.

In addition, change PLLP_OUT0_RATIO to 0 so the reshift clock
is not being further divided down, change it back to default
value after PllP is enabled and bypass is disabled.

bug 1373419

Change-Id: I2bbcd15eaa0b222faadcae00448bd677c8387c69
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/310133
(cherry picked from commit 5eeb5fac5efde9f99c2bf2524570f4231359af5a)
Reviewed-on: http://git-master/r/328858
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
arch/arm/mach-tegra/sleep-t3.S