ARM: tegra2: clock: Dynamic rate configuration
authorShashank Sharma <shashanks@nvidia.com>
Thu, 15 Mar 2012 15:31:02 +0000 (20:31 +0530)
committerSimone Willett <swillett@nvidia.com>
Fri, 23 Mar 2012 21:01:10 +0000 (14:01 -0700)
commit042bad603d2acf6a1159be3a713ab5dac8080427
tree814c06712eecbfc172eb0373bd83ec00a6b900b7
parent372c0433d4010424d4130788efff7e945cddf716
ARM: tegra2: clock: Dynamic rate configuration

support dynamic clock rate configuration for pll_d. Till now tegra2
used to look into a pll_d frequency table to match input and output
frequencies, resulting fixed pll_d output frequencies. Whereas
tegra3 had code to configure pll_d for any desired rate using
dynamically generated m,n,p values.

Bug: 931908

Change-Id: I15322e2e4ac0aba58502575cdc83ca4a4542d1e4
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/90361
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
arch/arm/mach-tegra/tegra2_clocks.c