ARM: tegra11: L1 cache shift is 6 for Cortex-A15
authorBo Yan <byan@nvidia.com>
Sat, 23 Jun 2012 05:14:16 +0000 (22:14 -0700)
committerBo Yan <byan@nvidia.com>
Thu, 5 Jul 2012 16:16:17 +0000 (09:16 -0700)
commit02192ea519ca01d9234cd22bb7e0546dd4b69d1e
tree7933c9311f65e2338d2cbfc0f01cd09b9ee62c58
parentfd46182385034f9ad8dd3720c83e43d5d89ca8c1
ARM: tegra11: L1 cache shift is 6 for Cortex-A15

Change-Id: I77eb1e1b23ce4fd46c0c37c59f1fdd52c620d3c2
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/110681
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
GVS: Gerrit_Virtual_Submit
(cherry picked from commit 458e4b57534dc1b53746bb1d27876733f61692b3)
arch/arm/mach-tegra/Kconfig