MIPS: AR7: Fix GPIO register size for Titan variant.
authorFlorian Fainelli <florian@openwrt.org>
Fri, 13 May 2011 15:41:21 +0000 (17:41 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 18 May 2011 13:18:27 +0000 (14:18 +0100)
commit3e9957b4866f3767f19bf0e543b322ad7906c564
treed0d7cde936ef0e211b1a452b8455cdee6f42f4b2
parent10423c91ffc8e59d4f99d401f7beb3115cdc117a
MIPS: AR7: Fix GPIO register size for Titan variant.

The 'size' variable contains the correct register size for both AR7
and Titan, but we never used it to ioremap the correct register size.
This problem only shows up on Titan.

[ralf@linux-mips.org: Fixed the fix.  The original patch as in patchwork
recognizes the problem correctly then fails to fix it ...]

Reported-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/2380/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/ar7/gpio.c