WAR: gr3d: limit 3d clock when camera is on
[linux-2.6.git] / include / linux / dma-mapping.h
index ff203c4..347fdc3 100644 (file)
@@ -1,28 +1,52 @@
-#ifndef _ASM_LINUX_DMA_MAPPING_H
-#define _ASM_LINUX_DMA_MAPPING_H
+#ifndef _LINUX_DMA_MAPPING_H
+#define _LINUX_DMA_MAPPING_H
 
 #include <linux/device.h>
 #include <linux/err.h>
+#include <linux/dma-attrs.h>
+#include <linux/dma-direction.h>
+#include <linux/scatterlist.h>
 
-/* These definitions mirror those in pci.h, so they can be used
- * interchangeably with their PCI_ counterparts */
-enum dma_data_direction {
-       DMA_BIDIRECTIONAL = 0,
-       DMA_TO_DEVICE = 1,
-       DMA_FROM_DEVICE = 2,
-       DMA_NONE = 3,
+struct dma_map_ops {
+       void* (*alloc_coherent)(struct device *dev, size_t size,
+                               dma_addr_t *dma_handle, gfp_t gfp);
+       void (*free_coherent)(struct device *dev, size_t size,
+                             void *vaddr, dma_addr_t dma_handle);
+       dma_addr_t (*map_page)(struct device *dev, struct page *page,
+                              unsigned long offset, size_t size,
+                              enum dma_data_direction dir,
+                              struct dma_attrs *attrs);
+       void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
+                          size_t size, enum dma_data_direction dir,
+                          struct dma_attrs *attrs);
+       int (*map_sg)(struct device *dev, struct scatterlist *sg,
+                     int nents, enum dma_data_direction dir,
+                     struct dma_attrs *attrs);
+       void (*unmap_sg)(struct device *dev,
+                        struct scatterlist *sg, int nents,
+                        enum dma_data_direction dir,
+                        struct dma_attrs *attrs);
+       void (*sync_single_for_cpu)(struct device *dev,
+                                   dma_addr_t dma_handle, size_t size,
+                                   enum dma_data_direction dir);
+       void (*sync_single_for_device)(struct device *dev,
+                                      dma_addr_t dma_handle, size_t size,
+                                      enum dma_data_direction dir);
+       void (*sync_sg_for_cpu)(struct device *dev,
+                               struct scatterlist *sg, int nents,
+                               enum dma_data_direction dir);
+       void (*sync_sg_for_device)(struct device *dev,
+                                  struct scatterlist *sg, int nents,
+                                  enum dma_data_direction dir);
+       int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
+       int (*dma_supported)(struct device *dev, u64 mask);
+       int (*set_dma_mask)(struct device *dev, u64 mask);
+       int is_phys;
 };
 
-#define DMA_64BIT_MASK 0xffffffffffffffffULL
-#define DMA_48BIT_MASK 0x0000ffffffffffffULL
-#define DMA_40BIT_MASK 0x000000ffffffffffULL
-#define DMA_39BIT_MASK 0x0000007fffffffffULL
-#define DMA_32BIT_MASK 0x00000000ffffffffULL
-#define DMA_31BIT_MASK 0x000000007fffffffULL
-#define DMA_30BIT_MASK 0x000000003fffffffULL
-#define DMA_29BIT_MASK 0x000000001fffffffULL
-#define DMA_28BIT_MASK 0x000000000fffffffULL
-#define DMA_24BIT_MASK 0x0000000000ffffffULL
+#define DMA_BIT_MASK(n)        (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
+
+#define DMA_MASK_NONE  0x0ULL
 
 static inline int valid_dma_direction(int dma_direction)
 {
@@ -31,14 +55,78 @@ static inline int valid_dma_direction(int dma_direction)
                (dma_direction == DMA_FROM_DEVICE));
 }
 
+static inline int is_device_dma_capable(struct device *dev)
+{
+       return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
+}
+
+#ifdef CONFIG_HAS_DMA
 #include <asm/dma-mapping.h>
+#else
+#include <asm-generic/dma-mapping-broken.h>
+#endif
 
-/* Backwards compat, remove in 2.7.x */
-#define dma_sync_single                dma_sync_single_for_cpu
-#define dma_sync_sg            dma_sync_sg_for_cpu
+static inline u64 dma_get_mask(struct device *dev)
+{
+       if (dev && dev->dma_mask && *dev->dma_mask)
+               return *dev->dma_mask;
+       return DMA_BIT_MASK(32);
+}
+
+#ifdef ARCH_HAS_DMA_SET_COHERENT_MASK
+int dma_set_coherent_mask(struct device *dev, u64 mask);
+#else
+static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
+{
+       if (!dma_supported(dev, mask))
+               return -EIO;
+       dev->coherent_dma_mask = mask;
+       return 0;
+}
+#endif
 
 extern u64 dma_get_required_mask(struct device *dev);
 
+static inline unsigned int dma_get_max_seg_size(struct device *dev)
+{
+       return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
+}
+
+static inline unsigned int dma_set_max_seg_size(struct device *dev,
+                                               unsigned int size)
+{
+       if (dev->dma_parms) {
+               dev->dma_parms->max_segment_size = size;
+               return 0;
+       } else
+               return -EIO;
+}
+
+static inline unsigned long dma_get_seg_boundary(struct device *dev)
+{
+       return dev->dma_parms ?
+               dev->dma_parms->segment_boundary_mask : 0xffffffff;
+}
+
+static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
+{
+       if (dev->dma_parms) {
+               dev->dma_parms->segment_boundary_mask = mask;
+               return 0;
+       } else
+               return -EIO;
+}
+
+#ifdef CONFIG_HAS_DMA
+static inline int dma_get_cache_alignment(void)
+{
+#ifdef ARCH_DMA_MINALIGN
+       return ARCH_DMA_MINALIGN;
+#endif
+       return 1;
+}
+#endif
+
 /* flags for the coherent memory api */
 #define        DMA_MEMORY_MAP                  0x01
 #define DMA_MEMORY_IO                  0x02
@@ -66,6 +154,66 @@ dma_mark_declared_memory_occupied(struct device *dev,
 }
 #endif
 
-#endif
+/*
+ * Managed DMA API
+ */
+extern void *dmam_alloc_coherent(struct device *dev, size_t size,
+                                dma_addr_t *dma_handle, gfp_t gfp);
+extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
+                              dma_addr_t dma_handle);
+extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
+                                   dma_addr_t *dma_handle, gfp_t gfp);
+extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
+                                 dma_addr_t dma_handle);
+#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
+extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+                                       dma_addr_t device_addr, size_t size,
+                                       int flags);
+extern void dmam_release_declared_memory(struct device *dev);
+#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
+static inline int dmam_declare_coherent_memory(struct device *dev,
+                               dma_addr_t bus_addr, dma_addr_t device_addr,
+                               size_t size, gfp_t gfp)
+{
+       return 0;
+}
 
+static inline void dmam_release_declared_memory(struct device *dev)
+{
+}
+#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
+
+#ifndef CONFIG_HAVE_DMA_ATTRS
+struct dma_attrs;
+
+#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
+       dma_map_single(dev, cpu_addr, size, dir)
+
+#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
+       dma_unmap_single(dev, dma_addr, size, dir)
+
+#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
+       dma_map_sg(dev, sgl, nents, dir)
 
+#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
+       dma_unmap_sg(dev, sgl, nents, dir)
+
+#endif /* CONFIG_HAVE_DMA_ATTRS */
+
+#ifdef CONFIG_NEED_DMA_MAP_STATE
+#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)        dma_addr_t ADDR_NAME
+#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)          __u32 LEN_NAME
+#define dma_unmap_addr(PTR, ADDR_NAME)           ((PTR)->ADDR_NAME)
+#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  (((PTR)->ADDR_NAME) = (VAL))
+#define dma_unmap_len(PTR, LEN_NAME)             ((PTR)->LEN_NAME)
+#define dma_unmap_len_set(PTR, LEN_NAME, VAL)    (((PTR)->LEN_NAME) = (VAL))
+#else
+#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
+#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
+#define dma_unmap_addr(PTR, ADDR_NAME)           (0)
+#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  do { } while (0)
+#define dma_unmap_len(PTR, LEN_NAME)             (0)
+#define dma_unmap_len_set(PTR, LEN_NAME, VAL)    do { } while (0)
+#endif
+
+#endif