Don't include linux/config.h from anywhere else in include/
[linux-2.6.git] / include / asm-mips / hazards.h
index 5250231..66943c4 100644 (file)
@@ -3,12 +3,13 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2003, 2004 Ralf Baechle <ralf@linux-mips.org>
+ * Copyright (C) MIPS Technologies, Inc.
+ *   written by Ralf Baechle <ralf@linux-mips.org>
  */
 #ifndef _ASM_HAZARDS_H
 #define _ASM_HAZARDS_H
 
-#include <linux/config.h>
 
 #ifdef __ASSEMBLY__
 
@@ -74,8 +75,7 @@
 #define irq_disable_hazard
        _ehb
 
-#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \
-      defined(CONFIG_CPU_SB1)
+#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
 
 /*
  * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
 #else /* __ASSEMBLY__ */
 
 __asm__(
-       "       .macro  _ssnop                                  \n\t"
-       "       sll     $0, $2, 1                               \n\t"
-       "       .endm                                           \n\t"
-       "                                                       \n\t"
-       "       .macro  _ehb                                    \n\t"
-       "       sll     $0, $0, 3                               \n\t"
-       "       .endm                                           \n\t");
+       "       .macro  _ssnop                                  \n"
+       "       sll     $0, $0, 1                               \n"
+       "       .endm                                           \n"
+       "                                                       \n"
+       "       .macro  _ehb                                    \n"
+       "       sll     $0, $0, 3                               \n"
+       "       .endm                                           \n");
 
 #ifdef CONFIG_CPU_RM9000
 
@@ -117,17 +117,21 @@ __asm__(
 
 #define mtc0_tlbw_hazard()                                             \
        __asm__ __volatile__(                                           \
-               ".set\tmips32\n\t"                                      \
-               "_ssnop; _ssnop; _ssnop; _ssnop\n\t"                    \
-               ".set\tmips0")
+       "       .set    mips32                                  \n"     \
+       "       _ssnop                                          \n"     \
+       "       _ssnop                                          \n"     \
+       "       _ssnop                                          \n"     \
+       "       _ssnop                                          \n"     \
+       "       .set    mips0                                   \n")
 
 #define tlbw_use_hazard()                                              \
        __asm__ __volatile__(                                           \
-               ".set\tmips32\n\t"                                      \
-               "_ssnop; _ssnop; _ssnop; _ssnop\n\t"                    \
-               ".set\tmips0")
-
-#define back_to_back_c0_hazard()       do { } while (0)
+       "       .set    mips32                                  \n"     \
+       "       _ssnop                                          \n"     \
+       "       _ssnop                                          \n"     \
+       "       _ssnop                                          \n"     \
+       "       _ssnop                                          \n"     \
+       "       .set    mips0                                   \n")
 
 #else
 
@@ -136,15 +140,25 @@ __asm__(
  */
 #define mtc0_tlbw_hazard()                                             \
        __asm__ __volatile__(                                           \
-               ".set noreorder\n\t"                                    \
-               "nop; nop; nop; nop; nop; nop;\n\t"                     \
-               ".set reorder\n\t")
+       "       .set    noreorder                               \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       .set    reorder                                 \n")
 
 #define tlbw_use_hazard()                                              \
        __asm__ __volatile__(                                           \
-               ".set noreorder\n\t"                                    \
-               "nop; nop; nop; nop; nop; nop;\n\t"                     \
-               ".set reorder\n\t")
+       "       .set    noreorder                               \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       nop                                             \n"     \
+       "       .set    reorder                                 \n")
 
 #endif
 
@@ -156,49 +170,26 @@ __asm__(
 
 #ifdef CONFIG_CPU_MIPSR2
 
-__asm__(
-       "       .macro\tirq_enable_hazard                       \n\t"
-       "       _ehb                                            \n\t"
-       "       .endm                                           \n\t"
-       "                                                       \n\t"
-       "       .macro\tirq_disable_hazard                      \n\t"
-       "       _ehb                                            \n\t"
-       "       .endm                                           \n\t"
-       "                                                       \n\t"
-       "       .macro\tback_to_back_c0_hazard                  \n\t"
-       "       _ehb                                            \n\t"
-       "       .endm");
+__asm__("      .macro  irq_enable_hazard                       \n"
+       "       _ehb                                            \n"
+       "       .endm                                           \n"
+       "                                                       \n"
+       "       .macro  irq_disable_hazard                      \n"
+       "       _ehb                                            \n"
+       "       .endm                                           \n");
 
-#define irq_enable_hazard()                                            \
-       __asm__ __volatile__(                                           \
-       "irq_enable_hazard")
-
-#define irq_disable_hazard()                                           \
-       __asm__ __volatile__(                                           \
-       "irq_disable_hazard")
-
-#define back_to_back_c0_hazard()                                       \
-       __asm__ __volatile__(                                           \
-       "back_to_back_c0_hazard")
-
-#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \
-      defined(CONFIG_CPU_SB1)
+#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
 
 /*
  * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
  */
 
 __asm__(
-       "       .macro\tirq_enable_hazard                       \n\t"
-       "       .endm                                           \n\t"
-       "                                                       \n\t"
-       "       .macro\tirq_disable_hazard                      \n\t"
-       "       .endm");
-
-#define irq_enable_hazard()    do { } while (0)
-#define irq_disable_hazard()   do { } while (0)
-
-#define back_to_back_c0_hazard()       do { } while (0)
+       "       .macro  irq_enable_hazard                       \n"
+       "       .endm                                           \n"
+       "                                                       \n"
+       "       .macro  irq_disable_hazard                      \n"
+       "       .endm                                           \n");
 
 #else
 
@@ -209,45 +200,91 @@ __asm__(
  */
 
 __asm__(
-       "       #                                               \n\t"
-       "       # There is a hazard but we do not care          \n\t"
-       "       #                                               \n\t"
-       "       .macro\tirq_enable_hazard                       \n\t"
-       "       .endm                                           \n\t"
-       "                                                       \n\t"
-       "       .macro\tirq_disable_hazard                      \n\t"
-       "       _ssnop; _ssnop; _ssnop                          \n\t"
-       "       .endm");
+       "       #                                               \n"
+       "       # There is a hazard but we do not care          \n"
+       "       #                                               \n"
+       "       .macro\tirq_enable_hazard                       \n"
+       "       .endm                                           \n"
+       "                                                       \n"
+       "       .macro\tirq_disable_hazard                      \n"
+       "       _ssnop                                          \n"
+       "       _ssnop                                          \n"
+       "       _ssnop                                          \n"
+       "       .endm                                           \n");
+
+#endif
 
-#define irq_enable_hazard()    do { } while (0)
+#define irq_enable_hazard()                                            \
+       __asm__ __volatile__("irq_enable_hazard")
 #define irq_disable_hazard()                                           \
-       __asm__ __volatile__(                                           \
-       "irq_disable_hazard")
+       __asm__ __volatile__("irq_disable_hazard")
 
-#define back_to_back_c0_hazard()                                       \
-       __asm__ __volatile__(                                           \
-       "       .set noreorder                          \n"             \
-       "       nop; nop; nop                           \n"             \
-       "       .set reorder                            \n")
+
+/*
+ * Back-to-back hazards -
+ *
+ * What is needed to separate a move to cp0 from a subsequent read from the
+ * same cp0 register?
+ */
+#ifdef CONFIG_CPU_MIPSR2
+
+__asm__("      .macro  back_to_back_c0_hazard                  \n"
+       "       _ehb                                            \n"
+       "       .endm                                           \n");
+
+#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \
+      defined(CONFIG_CPU_SB1)
+
+__asm__("      .macro  back_to_back_c0_hazard                  \n"
+       "       .endm                                           \n");
+
+#else
+
+__asm__("      .macro  back_to_back_c0_hazard                  \n"
+       "       .set    noreorder                               \n"
+       "       _ssnop                                          \n"
+       "       _ssnop                                          \n"
+       "       _ssnop                                          \n"
+       "       .set    reorder                                 \n"
+       "       .endm");
 
 #endif
 
-#if defined(CONFIG_CPU_MIPS32_R2) || defined (CONFIG_CPU_MIPS64_R2)
+#define back_to_back_c0_hazard()                                       \
+       __asm__ __volatile__("back_to_back_c0_hazard")
+
+
+/*
+ * Instruction execution hazard
+ */
+#ifdef CONFIG_CPU_MIPSR2
+/*
+ * gcc has a tradition of misscompiling the previous construct using the
+ * address of a label as argument to inline assembler.  Gas otoh has the
+ * annoying difference between la and dla which are only usable for 32-bit
+ * rsp. 64-bit code, so can't be used without conditional compilation.
+ * The alterantive is switching the assembler to 64-bit code which happens
+ * to work right even for 32-bit code ...
+ */
 #define instruction_hazard()                                           \
 do {                                                                   \
-__label__ __next;                                                      \
+       unsigned long tmp;                                              \
+                                                                       \
        __asm__ __volatile__(                                           \
+       "       .set    mips64r2                                \n"     \
+       "       dla     %0, 1f                                  \n"     \
        "       jr.hb   %0                                      \n"     \
-       :                                                               \
-       : "r" (&&__next));                                              \
-__next:                                                                        \
-       ;                                                               \
+       "       .set    mips0                                   \n"     \
+       "1:                                                     \n"     \
+       : "=r" (tmp));                                                  \
 } while (0)
 
 #else
 #define instruction_hazard() do { } while (0)
 #endif
 
+extern void mips_ihb(void);
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_HAZARDS_H */