usb: dwc3: gadget: fix ep->maxburst for ep0
[linux-2.6.git] / drivers / video / atmel_lcdfb.c
index 5a24c64..d99505b 100644 (file)
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/backlight.h>
+#include <linux/gfp.h>
+#include <linux/module.h>
 
 #include <mach/board.h>
 #include <mach/cpu.h>
-#include <mach/gpio.h>
+#include <asm/gpio.h>
 
 #include <video/atmel_lcdc.h>
 
 
 /* configurable parameters */
 #define ATMEL_LCDC_CVAL_DEFAULT                0xc8
-#define ATMEL_LCDC_DMA_BURST_LEN       8
-
-#if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
-       defined(CONFIG_ARCH_AT91SAM9RL)
-#define ATMEL_LCDC_FIFO_SIZE           2048
-#else
-#define ATMEL_LCDC_FIFO_SIZE           512
-#endif
+#define ATMEL_LCDC_DMA_BURST_LEN       8       /* words */
+#define ATMEL_LCDC_FIFO_SIZE           512     /* words */
 
 #if defined(CONFIG_ARCH_AT91)
 #define        ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
@@ -44,7 +40,8 @@
                                         | FBINFO_HWACCEL_YPAN)
 
 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
-                                       struct fb_var_screeninfo *var)
+                                       struct fb_var_screeninfo *var,
+                                       struct fb_info *info)
 {
 
 }
@@ -55,14 +52,16 @@ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
                                        | FBINFO_HWACCEL_YPAN)
 
 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
-                                    struct fb_var_screeninfo *var)
+                                    struct fb_var_screeninfo *var,
+                                    struct fb_info *info)
 {
        u32 dma2dcfg;
        u32 pixeloff;
 
-       pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
+       pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
 
-       dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
+       dma2dcfg = (info->var.xres_virtual - info->var.xres)
+                * info->var.bits_per_pixel / 8;
        dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
        lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
 
@@ -73,7 +72,7 @@ static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
 }
 #endif
 
-static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
+static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
                | ATMEL_LCDC_POL_POSITIVE
                | ATMEL_LCDC_ENA_PWMENABLE;
 
@@ -101,8 +100,11 @@ static int atmel_bl_update_status(struct backlight_device *bl)
                brightness = 0;
 
        lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
-       lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
+       if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
+               lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
                        brightness ? contrast_ctr : 0);
+       else
+               lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
 
        bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
 
@@ -116,13 +118,14 @@ static int atmel_bl_get_brightness(struct backlight_device *bl)
        return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
 }
 
-static struct backlight_ops atmel_lcdc_bl_ops = {
+static const struct backlight_ops atmel_lcdc_bl_ops = {
        .update_status = atmel_bl_update_status,
        .get_brightness = atmel_bl_get_brightness,
 };
 
 static void init_backlight(struct atmel_lcdfb_info *sinfo)
 {
+       struct backlight_properties props;
        struct backlight_device *bl;
 
        sinfo->bl_power = FB_BLANK_UNBLANK;
@@ -130,9 +133,12 @@ static void init_backlight(struct atmel_lcdfb_info *sinfo)
        if (sinfo->backlight)
                return;
 
-       bl = backlight_device_register("backlight", &sinfo->pdev->dev,
-                       sinfo, &atmel_lcdc_bl_ops);
-       if (IS_ERR(sinfo->backlight)) {
+       memset(&props, 0, sizeof(struct backlight_properties));
+       props.type = BACKLIGHT_RAW;
+       props.max_brightness = 0xff;
+       bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
+                                      &atmel_lcdc_bl_ops, &props);
+       if (IS_ERR(bl)) {
                dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
                                PTR_ERR(bl));
                return;
@@ -141,7 +147,6 @@ static void init_backlight(struct atmel_lcdfb_info *sinfo)
 
        bl->props.power = FB_BLANK_UNBLANK;
        bl->props.fb_blank = FB_BLANK_UNBLANK;
-       bl->props.max_brightness = 0xff;
        bl->props.brightness = atmel_bl_get_brightness(bl);
 }
 
@@ -166,6 +171,10 @@ static void exit_backlight(struct atmel_lcdfb_info *sinfo)
 
 static void init_contrast(struct atmel_lcdfb_info *sinfo)
 {
+       /* contrast pwm can be 'inverted' */
+       if (sinfo->lcdcon_pol_negative)
+                       contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
+
        /* have some default contrast/backlight settings */
        lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
        lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
@@ -188,7 +197,8 @@ static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
 {
        unsigned long value;
 
-       if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
+       if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
+               || cpu_is_at32ap7000()))
                return xres;
 
        value = xres;
@@ -208,6 +218,36 @@ static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
        return value;
 }
 
+static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
+{
+       /* Turn off the LCD controller and the DMA controller */
+       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
+                       sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
+
+       /* Wait for the LCDC core to become idle */
+       while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
+               msleep(10);
+
+       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
+}
+
+static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
+{
+       atmel_lcdfb_stop_nowait(sinfo);
+
+       /* Wait for DMA engine to become idle... */
+       while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
+               msleep(10);
+}
+
+static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
+{
+       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
+       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
+               (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
+               | ATMEL_LCDC_PWR);
+}
+
 static void atmel_lcdfb_update_dma(struct fb_info *info,
                               struct fb_var_screeninfo *var)
 {
@@ -216,14 +256,14 @@ static void atmel_lcdfb_update_dma(struct fb_info *info,
        unsigned long dma_addr;
 
        dma_addr = (fix->smem_start + var->yoffset * fix->line_length
-                   + var->xoffset * var->bits_per_pixel / 8);
+                   + var->xoffset * info->var.bits_per_pixel / 8);
 
        dma_addr &= ~3UL;
 
        /* Set framebuffer DMA base address and pixel offset */
        lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
 
-       atmel_lcdfb_update_dma2d(sinfo, var);
+       atmel_lcdfb_update_dma2d(sinfo, var, info);
 }
 
 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
@@ -237,6 +277,9 @@ static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
 /**
  *     atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  *     @sinfo: the frame buffer to allocate memory for
+ *     
+ *     This function is called only from the atmel_lcdfb_probe()
+ *     so no locking by fb_info->mm_lock around smem_len setting is needed.
  */
 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
 {
@@ -321,7 +364,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
        dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
        dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
 
-       if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
+       if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
                dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
                return -EINVAL;
        }
@@ -342,6 +385,13 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
        var->transp.offset = var->transp.length = 0;
        var->xoffset = var->yoffset = 0;
 
+       if (info->fix.smem_len) {
+               unsigned int smem_len = (var->xres_virtual * var->yres_virtual
+                                        * ((var->bits_per_pixel + 7) / 8));
+               if (smem_len > info->fix.smem_len)
+                       return -EINVAL;
+       }
+
        /* Saturate vertical and horizontal timings at maximum values */
        var->vsync_len = min_t(u32, var->vsync_len,
                        (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
@@ -371,20 +421,18 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
                var->red.length = var->green.length = var->blue.length
                        = var->bits_per_pixel;
                break;
-       case 15:
        case 16:
                if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
                        /* RGB:565 mode */
                        var->red.offset = 11;
                        var->blue.offset = 0;
-                       var->green.length = 6;
                } else {
-                       /* BGR:555 mode */
+                       /* BGR:565 mode */
                        var->red.offset = 0;
-                       var->blue.offset = 10;
-                       var->green.length = 5;
+                       var->blue.offset = 11;
                }
                var->green.offset = 5;
+               var->green.length = 6;
                var->red.length = var->blue.length = 5;
                break;
        case 32:
@@ -420,26 +468,8 @@ static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
 {
        might_sleep();
 
-       /* LCD power off */
-       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
-
-       /* wait for the LCDC core to become idle */
-       while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
-               msleep(10);
-
-       /* DMA disable */
-       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
-
-       /* wait for DMA engine to become idle */
-       while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
-               msleep(10);
-
-       /* LCD power on */
-       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
-               (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
-
-       /* DMA enable */
-       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
+       atmel_lcdfb_stop(sinfo);
+       atmel_lcdfb_start(sinfo);
 }
 
 /**
@@ -463,6 +493,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
        unsigned long value;
        unsigned long clk_value_khz;
        unsigned long bits_per_line;
+       unsigned long pix_factor = 2;
 
        might_sleep();
 
@@ -471,14 +502,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
                 info->var.xres, info->var.yres,
                 info->var.xres_virtual, info->var.yres_virtual);
 
-       /* Turn off the LCD controller and the DMA controller */
-       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
-
-       /* Wait for the LCDC core to become idle */
-       while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
-               msleep(10);
-
-       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
+       atmel_lcdfb_stop_nowait(sinfo);
 
        if (info->var.bits_per_pixel == 1)
                info->fix.visual = FB_VISUAL_MONO01;
@@ -502,20 +526,24 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
        /* Now, the LCDC core... */
 
        /* Set pixel clock */
+       if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
+               pix_factor = 1;
+
        clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
 
        value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
 
-       if (value < 2) {
+       if (value < pix_factor) {
                dev_notice(info->device, "Bypassing pixel clock divider\n");
                lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
        } else {
-               value = (value / 2) - 1;
+               value = (value / pix_factor) - 1;
                dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
                                value);
                lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
                                value << ATMEL_LCDC_CLKVAL_OFFSET);
-               info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
+               info->var.pixclock =
+                       KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
                dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
                                        PICOS2KHZ(info->var.pixclock));
        }
@@ -583,13 +611,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
        while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
                msleep(10);
 
-       dev_dbg(info->device, "  * re-enable DMA engine\n");
-       /* ...and enable it with updated configuration */
-       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
-
-       dev_dbg(info->device, "  * re-enable LCDC core\n");
-       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
-               (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
+       atmel_lcdfb_start(sinfo);
 
        dev_dbg(info->device, "  * DONE\n");
 
@@ -616,7 +638,7 @@ static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitf
  *     magnitude which needs to be scaled in this function for the hardware.
  *     Things to take into consideration are how many color registers, if
  *     any, are supported with the current color visual. With truecolor mode
- *     no color palettes are supported. Here a psuedo palette is created
+ *     no color palettes are supported. Here a pseudo palette is created
  *     which we store the value in pseudo_palette in struct fb_info. For
  *     pseudocolor mode we have a limited color palette. To deal with this
  *     we can program what color is displayed for a particular pixel value.
@@ -657,14 +679,30 @@ static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
 
        case FB_VISUAL_PSEUDOCOLOR:
                if (regno < 256) {
-                       val  = ((red   >> 11) & 0x001f);
-                       val |= ((green >>  6) & 0x03e0);
-                       val |= ((blue  >>  1) & 0x7c00);
-
-                       /*
-                        * TODO: intensity bit. Maybe something like
-                        *   ~(red[10] ^ green[10] ^ blue[10]) & 1
-                        */
+                       if (cpu_is_at91sam9261() || cpu_is_at91sam9263()
+                           || cpu_is_at91sam9rl()) {
+                               /* old style I+BGR:555 */
+                               val  = ((red   >> 11) & 0x001f);
+                               val |= ((green >>  6) & 0x03e0);
+                               val |= ((blue  >>  1) & 0x7c00);
+
+                               /*
+                                * TODO: intensity bit. Maybe something like
+                                *   ~(red[10] ^ green[10] ^ blue[10]) & 1
+                                */
+                       } else {
+                               /* new style BGR:565 / RGB:565 */
+                               if (sinfo->lcd_wiring_mode ==
+                                   ATMEL_LCDC_WIRING_RGB) {
+                                       val  = ((blue >> 11) & 0x001f);
+                                       val |= ((red  >>  0) & 0xf800);
+                               } else {
+                                       val  = ((red  >> 11) & 0x001f);
+                                       val |= ((blue >>  0) & 0xf800);
+                               }
+
+                               val |= ((green >>  5) & 0x07e0);
+                       }
 
                        lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
                        ret = 0;
@@ -694,11 +732,35 @@ static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
        return 0;
 }
 
+static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
+{
+       struct atmel_lcdfb_info *sinfo = info->par;
+
+       switch (blank_mode) {
+       case FB_BLANK_UNBLANK:
+       case FB_BLANK_NORMAL:
+               atmel_lcdfb_start(sinfo);
+               break;
+       case FB_BLANK_VSYNC_SUSPEND:
+       case FB_BLANK_HSYNC_SUSPEND:
+               break;
+       case FB_BLANK_POWERDOWN:
+               atmel_lcdfb_stop(sinfo);
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       /* let fbcon do a soft blank for us */
+       return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
+}
+
 static struct fb_ops atmel_lcdfb_ops = {
        .owner          = THIS_MODULE,
        .fb_check_var   = atmel_lcdfb_check_var,
        .fb_set_par     = atmel_lcdfb_set_par,
        .fb_setcolreg   = atmel_lcdfb_setcolreg,
+       .fb_blank       = atmel_lcdfb_blank,
        .fb_pan_display = atmel_lcdfb_pan_display,
        .fb_fillrect    = cfb_fillrect,
        .fb_copyarea    = cfb_copyarea,
@@ -800,6 +862,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
                sinfo->guard_time = pdata_sinfo->guard_time;
                sinfo->smem_len = pdata_sinfo->smem_len;
                sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
+               sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
                sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
        } else {
                dev_err(dev, "cannot get default configuration\n");
@@ -817,7 +880,8 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
        info->fix = atmel_lcdfb_fix;
 
        /* Enable LCDC Clocks */
-       if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
+       if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
+        || cpu_is_at32ap7000()) {
                sinfo->bus_clk = clk_get(dev, "hck1");
                if (IS_ERR(sinfo->bus_clk)) {
                        ret = PTR_ERR(sinfo->bus_clk);
@@ -859,7 +923,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
        if (map) {
                /* use a pre-allocated memory buffer */
                info->fix.smem_start = map->start;
-               info->fix.smem_len = map->end - map->start + 1;
+               info->fix.smem_len = resource_size(map);
                if (!request_mem_region(info->fix.smem_start,
                                        info->fix.smem_len, pdev->name)) {
                        ret = -EBUSY;
@@ -885,7 +949,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
 
        /* LCDC registers */
        info->fix.mmio_start = regs->start;
-       info->fix.mmio_len = regs->end - regs->start + 1;
+       info->fix.mmio_len = resource_size(regs);
 
        if (!request_mem_region(info->fix.mmio_start,
                                info->fix.mmio_len, pdev->name)) {
@@ -950,7 +1014,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
        if (sinfo->atmel_lcdfb_power_control)
                sinfo->atmel_lcdfb_power_control(1);
 
-       dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
+       dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
                       info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
 
        return 0;
@@ -1032,11 +1096,20 @@ static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
        struct fb_info *info = platform_get_drvdata(pdev);
        struct atmel_lcdfb_info *sinfo = info->par;
 
-       sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
+       /*
+        * We don't want to handle interrupts while the clock is
+        * stopped. It may take forever.
+        */
+       lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
+
+       sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
        lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
        if (sinfo->atmel_lcdfb_power_control)
                sinfo->atmel_lcdfb_power_control(0);
+
+       atmel_lcdfb_stop(sinfo);
        atmel_lcdfb_stop_clock(sinfo);
+
        return 0;
 }
 
@@ -1046,9 +1119,15 @@ static int atmel_lcdfb_resume(struct platform_device *pdev)
        struct atmel_lcdfb_info *sinfo = info->par;
 
        atmel_lcdfb_start_clock(sinfo);
+       atmel_lcdfb_start(sinfo);
        if (sinfo->atmel_lcdfb_power_control)
                sinfo->atmel_lcdfb_power_control(1);
        lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
+
+       /* Enable FIFO & DMA errors */
+       lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
+                       | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
+
        return 0;
 }