ARM: 5893/1: SPI AMBA PL022: Limit TX FIFO fills
[linux-2.6.git] / drivers / spi / spi_mpc8xxx.c
index c5cb98f..1fb2a6e 100644 (file)
@@ -1,10 +1,14 @@
 /*
- * MPC83xx SPI controller driver.
+ * MPC8xxx SPI controller driver.
  *
  * Maintainer: Kumar Gala
  *
  * Copyright (C) 2006 Polycom, Inc.
  *
+ * CPM SPI and QE buffer descriptors mode support:
+ * Copyright (c) 2009  MontaVista Software, Inc.
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
  * Free Software Foundation;  either version 2 of the  License, or (at your
@@ -27,6 +31,9 @@
 #include <linux/spi/spi_bitbang.h>
 #include <linux/platform_device.h>
 #include <linux/fsl_devices.h>
+#include <linux/dma-mapping.h>
+#include <linux/mm.h>
+#include <linux/mutex.h>
 #include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/gpio.h>
 #include <linux/of_spi.h>
 
 #include <sysdev/fsl_soc.h>
+#include <asm/cpm.h>
+#include <asm/qe.h>
 #include <asm/irq.h>
 
+/* CPM1 and CPM2 are mutually exclusive. */
+#ifdef CONFIG_CPM1
+#include <asm/cpm1.h>
+#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_CH_SPI, 0)
+#else
+#include <asm/cpm2.h>
+#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_SPI_PAGE, CPM_CR_SPI_SBLOCK, 0, 0)
+#endif
+
 /* SPI Controller registers */
-struct mpc83xx_spi_reg {
+struct mpc8xxx_spi_reg {
        u8 res1[0x20];
        __be32 mode;
        __be32 event;
@@ -47,6 +65,28 @@ struct mpc83xx_spi_reg {
        __be32 receive;
 };
 
+/* SPI Parameter RAM */
+struct spi_pram {
+       __be16  rbase;  /* Rx Buffer descriptor base address */
+       __be16  tbase;  /* Tx Buffer descriptor base address */
+       u8      rfcr;   /* Rx function code */
+       u8      tfcr;   /* Tx function code */
+       __be16  mrblr;  /* Max receive buffer length */
+       __be32  rstate; /* Internal */
+       __be32  rdp;    /* Internal */
+       __be16  rbptr;  /* Internal */
+       __be16  rbc;    /* Internal */
+       __be32  rxtmp;  /* Internal */
+       __be32  tstate; /* Internal */
+       __be32  tdp;    /* Internal */
+       __be16  tbptr;  /* Internal */
+       __be16  tbc;    /* Internal */
+       __be32  txtmp;  /* Internal */
+       __be32  res;    /* Tx temp. */
+       __be16  rpbase; /* Relocation pointer (CPM1 only) */
+       __be16  res1;   /* Reserved */
+};
+
 /* SPI Controller mode register definitions */
 #define        SPMODE_LOOP             (1 << 30)
 #define        SPMODE_CI_INACTIVEHIGH  (1 << 29)
@@ -75,17 +115,43 @@ struct mpc83xx_spi_reg {
 #define        SPIM_NE         0x00000200      /* Not empty */
 #define        SPIM_NF         0x00000100      /* Not full */
 
+#define        SPIE_TXB        0x00000200      /* Last char is written to tx fifo */
+#define        SPIE_RXB        0x00000100      /* Last char is written to rx buf */
+
+/* SPCOM register values */
+#define        SPCOM_STR       (1 << 23)       /* Start transmit */
+
+#define        SPI_PRAM_SIZE   0x100
+#define        SPI_MRBLR       ((unsigned int)PAGE_SIZE)
+
 /* SPI Controller driver's private data. */
-struct mpc83xx_spi {
-       struct mpc83xx_spi_reg __iomem *base;
+struct mpc8xxx_spi {
+       struct device *dev;
+       struct mpc8xxx_spi_reg __iomem *base;
 
        /* rx & tx bufs from the spi_transfer */
        const void *tx;
        void *rx;
 
+       int subblock;
+       struct spi_pram __iomem *pram;
+       struct cpm_buf_desc __iomem *tx_bd;
+       struct cpm_buf_desc __iomem *rx_bd;
+
+       struct spi_transfer *xfer_in_progress;
+
+       /* dma addresses for CPM transfers */
+       dma_addr_t tx_dma;
+       dma_addr_t rx_dma;
+       bool map_tx_dma;
+       bool map_rx_dma;
+
+       dma_addr_t dma_dummy_tx;
+       dma_addr_t dma_dummy_rx;
+
        /* functions to deal with different sized buffers */
-       void (*get_rx) (u32 rx_data, struct mpc83xx_spi *);
-       u32(*get_tx) (struct mpc83xx_spi *);
+       void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
+       u32(*get_tx) (struct mpc8xxx_spi *);
 
        unsigned int count;
        unsigned int irq;
@@ -96,7 +162,7 @@ struct mpc83xx_spi {
        u32 rx_shift;           /* RX data reg shift when in qe mode */
        u32 tx_shift;           /* TX data reg shift when in qe mode */
 
-       bool qe_mode;
+       unsigned int flags;
 
        struct workqueue_struct *workqueue;
        struct work_struct work;
@@ -107,44 +173,48 @@ struct mpc83xx_spi {
        struct completion done;
 };
 
-struct spi_mpc83xx_cs {
+static void *mpc8xxx_dummy_rx;
+static DEFINE_MUTEX(mpc8xxx_dummy_rx_lock);
+static int mpc8xxx_dummy_rx_refcnt;
+
+struct spi_mpc8xxx_cs {
        /* functions to deal with different sized buffers */
-       void (*get_rx) (u32 rx_data, struct mpc83xx_spi *);
-       u32 (*get_tx) (struct mpc83xx_spi *);
+       void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
+       u32 (*get_tx) (struct mpc8xxx_spi *);
        u32 rx_shift;           /* RX data reg shift when in qe mode */
        u32 tx_shift;           /* TX data reg shift when in qe mode */
        u32 hw_mode;            /* Holds HW mode register settings */
 };
 
-static inline void mpc83xx_spi_write_reg(__be32 __iomem *reg, u32 val)
+static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
 {
        out_be32(reg, val);
 }
 
-static inline u32 mpc83xx_spi_read_reg(__be32 __iomem *reg)
+static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
 {
        return in_be32(reg);
 }
 
 #define MPC83XX_SPI_RX_BUF(type)                                         \
 static                                                                   \
-void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \
+void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
 {                                                                        \
-       type *rx = mpc83xx_spi->rx;                                       \
-       *rx++ = (type)(data >> mpc83xx_spi->rx_shift);                    \
-       mpc83xx_spi->rx = rx;                                             \
+       type *rx = mpc8xxx_spi->rx;                                       \
+       *rx++ = (type)(data >> mpc8xxx_spi->rx_shift);                    \
+       mpc8xxx_spi->rx = rx;                                             \
 }
 
 #define MPC83XX_SPI_TX_BUF(type)                               \
 static                                                         \
-u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi) \
+u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
 {                                                              \
        u32 data;                                               \
-       const type *tx = mpc83xx_spi->tx;                       \
+       const type *tx = mpc8xxx_spi->tx;                       \
        if (!tx)                                                \
                return 0;                                       \
-       data = *tx++ << mpc83xx_spi->tx_shift;                  \
-       mpc83xx_spi->tx = tx;                                   \
+       data = *tx++ << mpc8xxx_spi->tx_shift;                  \
+       mpc8xxx_spi->tx = tx;                                   \
        return data;                                            \
 }
 
@@ -155,12 +225,48 @@ MPC83XX_SPI_TX_BUF(u8)
 MPC83XX_SPI_TX_BUF(u16)
 MPC83XX_SPI_TX_BUF(u32)
 
-static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
+static void mpc8xxx_spi_change_mode(struct spi_device *spi)
+{
+       struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
+       struct spi_mpc8xxx_cs *cs = spi->controller_state;
+       __be32 __iomem *mode = &mspi->base->mode;
+       unsigned long flags;
+
+       if (cs->hw_mode == mpc8xxx_spi_read_reg(mode))
+               return;
+
+       /* Turn off IRQs locally to minimize time that SPI is disabled. */
+       local_irq_save(flags);
+
+       /* Turn off SPI unit prior changing mode */
+       mpc8xxx_spi_write_reg(mode, cs->hw_mode & ~SPMODE_ENABLE);
+       mpc8xxx_spi_write_reg(mode, cs->hw_mode);
+
+       /* When in CPM mode, we need to reinit tx and rx. */
+       if (mspi->flags & SPI_CPM_MODE) {
+               if (mspi->flags & SPI_QE) {
+                       qe_issue_cmd(QE_INIT_TX_RX, mspi->subblock,
+                                    QE_CR_PROTOCOL_UNSPECIFIED, 0);
+               } else {
+                       cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX);
+                       if (mspi->flags & SPI_CPM1) {
+                               out_be16(&mspi->pram->rbptr,
+                                        in_be16(&mspi->pram->rbase));
+                               out_be16(&mspi->pram->tbptr,
+                                        in_be16(&mspi->pram->tbase));
+                       }
+               }
+       }
+
+       local_irq_restore(flags);
+}
+
+static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
 {
-       struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master);
+       struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
        struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data;
        bool pol = spi->mode & SPI_CS_HIGH;
-       struct spi_mpc83xx_cs   *cs = spi->controller_state;
+       struct spi_mpc8xxx_cs   *cs = spi->controller_state;
 
        if (value == BITBANG_CS_INACTIVE) {
                if (pdata->cs_control)
@@ -168,42 +274,27 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
        }
 
        if (value == BITBANG_CS_ACTIVE) {
-               u32 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode);
-
-               mpc83xx_spi->rx_shift = cs->rx_shift;
-               mpc83xx_spi->tx_shift = cs->tx_shift;
-               mpc83xx_spi->get_rx = cs->get_rx;
-               mpc83xx_spi->get_tx = cs->get_tx;
-
-               if (cs->hw_mode != regval) {
-                       unsigned long flags;
-                       __be32 __iomem *mode = &mpc83xx_spi->base->mode;
-
-                       regval = cs->hw_mode;
-                       /* Turn off IRQs locally to minimize time that
-                        * SPI is disabled
-                        */
-                       local_irq_save(flags);
-                       /* Turn off SPI unit prior changing mode */
-                       mpc83xx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
-                       mpc83xx_spi_write_reg(mode, regval);
-                       local_irq_restore(flags);
-               }
+               mpc8xxx_spi->rx_shift = cs->rx_shift;
+               mpc8xxx_spi->tx_shift = cs->tx_shift;
+               mpc8xxx_spi->get_rx = cs->get_rx;
+               mpc8xxx_spi->get_tx = cs->get_tx;
+
+               mpc8xxx_spi_change_mode(spi);
+
                if (pdata->cs_control)
                        pdata->cs_control(spi, pol);
        }
 }
 
 static
-int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
+int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 {
-       struct mpc83xx_spi *mpc83xx_spi;
-       u32 regval;
+       struct mpc8xxx_spi *mpc8xxx_spi;
        u8 bits_per_word, pm;
        u32 hz;
-       struct spi_mpc83xx_cs   *cs = spi->controller_state;
+       struct spi_mpc8xxx_cs   *cs = spi->controller_state;
 
-       mpc83xx_spi = spi_master_get_devdata(spi->master);
+       mpc8xxx_spi = spi_master_get_devdata(spi->master);
 
        if (t) {
                bits_per_word = t->bits_per_word;
@@ -228,26 +319,27 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
        cs->rx_shift = 0;
        cs->tx_shift = 0;
        if (bits_per_word <= 8) {
-               cs->get_rx = mpc83xx_spi_rx_buf_u8;
-               cs->get_tx = mpc83xx_spi_tx_buf_u8;
-               if (mpc83xx_spi->qe_mode) {
+               cs->get_rx = mpc8xxx_spi_rx_buf_u8;
+               cs->get_tx = mpc8xxx_spi_tx_buf_u8;
+               if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
                        cs->rx_shift = 16;
                        cs->tx_shift = 24;
                }
        } else if (bits_per_word <= 16) {
-               cs->get_rx = mpc83xx_spi_rx_buf_u16;
-               cs->get_tx = mpc83xx_spi_tx_buf_u16;
-               if (mpc83xx_spi->qe_mode) {
+               cs->get_rx = mpc8xxx_spi_rx_buf_u16;
+               cs->get_tx = mpc8xxx_spi_tx_buf_u16;
+               if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
                        cs->rx_shift = 16;
                        cs->tx_shift = 16;
                }
        } else if (bits_per_word <= 32) {
-               cs->get_rx = mpc83xx_spi_rx_buf_u32;
-               cs->get_tx = mpc83xx_spi_tx_buf_u32;
+               cs->get_rx = mpc8xxx_spi_rx_buf_u32;
+               cs->get_tx = mpc8xxx_spi_tx_buf_u32;
        } else
                return -EINVAL;
 
-       if (mpc83xx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
+       if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE &&
+                       spi->mode & SPI_LSB_FIRST) {
                cs->tx_shift = 0;
                if (bits_per_word <= 8)
                        cs->rx_shift = 8;
@@ -255,10 +347,10 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
                        cs->rx_shift = 0;
        }
 
-       mpc83xx_spi->rx_shift = cs->rx_shift;
-       mpc83xx_spi->tx_shift = cs->tx_shift;
-       mpc83xx_spi->get_rx = cs->get_rx;
-       mpc83xx_spi->get_tx = cs->get_tx;
+       mpc8xxx_spi->rx_shift = cs->rx_shift;
+       mpc8xxx_spi->tx_shift = cs->tx_shift;
+       mpc8xxx_spi->get_rx = cs->get_rx;
+       mpc8xxx_spi->get_tx = cs->get_tx;
 
        if (bits_per_word == 32)
                bits_per_word = 0;
@@ -271,52 +363,153 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 
        cs->hw_mode |= SPMODE_LEN(bits_per_word);
 
-       if ((mpc83xx_spi->spibrg / hz) > 64) {
+       if ((mpc8xxx_spi->spibrg / hz) > 64) {
                cs->hw_mode |= SPMODE_DIV16;
-               pm = mpc83xx_spi->spibrg / (hz * 64);
+               pm = mpc8xxx_spi->spibrg / (hz * 64);
 
                WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. "
                          "Will use %d Hz instead.\n", dev_name(&spi->dev),
-                         hz, mpc83xx_spi->spibrg / 1024);
+                         hz, mpc8xxx_spi->spibrg / 1024);
                if (pm > 16)
                        pm = 16;
        } else
-               pm = mpc83xx_spi->spibrg / (hz * 4);
+               pm = mpc8xxx_spi->spibrg / (hz * 4);
        if (pm)
                pm--;
 
        cs->hw_mode |= SPMODE_PM(pm);
-       regval =  mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode);
-       if (cs->hw_mode != regval) {
-               unsigned long flags;
-               __be32 __iomem *mode = &mpc83xx_spi->base->mode;
-
-               regval = cs->hw_mode;
-               /* Turn off IRQs locally to minimize time
-                * that SPI is disabled
-                */
-               local_irq_save(flags);
-               /* Turn off SPI unit prior changing mode */
-               mpc83xx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
-               mpc83xx_spi_write_reg(mode, regval);
-               local_irq_restore(flags);
+
+       mpc8xxx_spi_change_mode(spi);
+       return 0;
+}
+
+static void mpc8xxx_spi_cpm_bufs_start(struct mpc8xxx_spi *mspi)
+{
+       struct cpm_buf_desc __iomem *tx_bd = mspi->tx_bd;
+       struct cpm_buf_desc __iomem *rx_bd = mspi->rx_bd;
+       unsigned int xfer_len = min(mspi->count, SPI_MRBLR);
+       unsigned int xfer_ofs;
+
+       xfer_ofs = mspi->xfer_in_progress->len - mspi->count;
+
+       out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma + xfer_ofs);
+       out_be16(&rx_bd->cbd_datlen, 0);
+       out_be16(&rx_bd->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT | BD_SC_WRAP);
+
+       out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma + xfer_ofs);
+       out_be16(&tx_bd->cbd_datlen, xfer_len);
+       out_be16(&tx_bd->cbd_sc, BD_SC_READY | BD_SC_INTRPT | BD_SC_WRAP |
+                                BD_SC_LAST);
+
+       /* start transfer */
+       mpc8xxx_spi_write_reg(&mspi->base->command, SPCOM_STR);
+}
+
+static int mpc8xxx_spi_cpm_bufs(struct mpc8xxx_spi *mspi,
+                               struct spi_transfer *t, bool is_dma_mapped)
+{
+       struct device *dev = mspi->dev;
+
+       if (is_dma_mapped) {
+               mspi->map_tx_dma = 0;
+               mspi->map_rx_dma = 0;
+       } else {
+               mspi->map_tx_dma = 1;
+               mspi->map_rx_dma = 1;
+       }
+
+       if (!t->tx_buf) {
+               mspi->tx_dma = mspi->dma_dummy_tx;
+               mspi->map_tx_dma = 0;
        }
+
+       if (!t->rx_buf) {
+               mspi->rx_dma = mspi->dma_dummy_rx;
+               mspi->map_rx_dma = 0;
+       }
+
+       if (mspi->map_tx_dma) {
+               void *nonconst_tx = (void *)mspi->tx; /* shut up gcc */
+
+               mspi->tx_dma = dma_map_single(dev, nonconst_tx, t->len,
+                                             DMA_TO_DEVICE);
+               if (dma_mapping_error(dev, mspi->tx_dma)) {
+                       dev_err(dev, "unable to map tx dma\n");
+                       return -ENOMEM;
+               }
+       } else {
+               mspi->tx_dma = t->tx_dma;
+       }
+
+       if (mspi->map_rx_dma) {
+               mspi->rx_dma = dma_map_single(dev, mspi->rx, t->len,
+                                             DMA_FROM_DEVICE);
+               if (dma_mapping_error(dev, mspi->rx_dma)) {
+                       dev_err(dev, "unable to map rx dma\n");
+                       goto err_rx_dma;
+               }
+       } else {
+               mspi->rx_dma = t->rx_dma;
+       }
+
+       /* enable rx ints */
+       mpc8xxx_spi_write_reg(&mspi->base->mask, SPIE_RXB);
+
+       mspi->xfer_in_progress = t;
+       mspi->count = t->len;
+
+       /* start CPM transfers */
+       mpc8xxx_spi_cpm_bufs_start(mspi);
+
        return 0;
+
+err_rx_dma:
+       if (mspi->map_tx_dma)
+               dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
+       return -ENOMEM;
 }
 
-static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
+static void mpc8xxx_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi)
 {
-       struct mpc83xx_spi *mpc83xx_spi;
-       u32 word, len, bits_per_word;
+       struct device *dev = mspi->dev;
+       struct spi_transfer *t = mspi->xfer_in_progress;
+
+       if (mspi->map_tx_dma)
+               dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
+       if (mspi->map_tx_dma)
+               dma_unmap_single(dev, mspi->rx_dma, t->len, DMA_FROM_DEVICE);
+       mspi->xfer_in_progress = NULL;
+}
 
-       mpc83xx_spi = spi_master_get_devdata(spi->master);
+static int mpc8xxx_spi_cpu_bufs(struct mpc8xxx_spi *mspi,
+                               struct spi_transfer *t, unsigned int len)
+{
+       u32 word;
+
+       mspi->count = len;
+
+       /* enable rx ints */
+       mpc8xxx_spi_write_reg(&mspi->base->mask, SPIM_NE);
+
+       /* transmit word */
+       word = mspi->get_tx(mspi);
+       mpc8xxx_spi_write_reg(&mspi->base->transmit, word);
+
+       return 0;
+}
+
+static int mpc8xxx_spi_bufs(struct spi_device *spi, struct spi_transfer *t,
+                           bool is_dma_mapped)
+{
+       struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
+       unsigned int len = t->len;
+       u8 bits_per_word;
+       int ret;
 
-       mpc83xx_spi->tx = t->tx_buf;
-       mpc83xx_spi->rx = t->rx_buf;
        bits_per_word = spi->bits_per_word;
        if (t->bits_per_word)
                bits_per_word = t->bits_per_word;
-       len = t->len;
+
        if (bits_per_word > 8) {
                /* invalid length? */
                if (len & 1)
@@ -329,26 +522,31 @@ static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
                        return -EINVAL;
                len /= 2;
        }
-       mpc83xx_spi->count = len;
 
-       INIT_COMPLETION(mpc83xx_spi->done);
+       mpc8xxx_spi->tx = t->tx_buf;
+       mpc8xxx_spi->rx = t->rx_buf;
 
-       /* enable rx ints */
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, SPIM_NE);
+       INIT_COMPLETION(mpc8xxx_spi->done);
 
-       /* transmit word */
-       word = mpc83xx_spi->get_tx(mpc83xx_spi);
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word);
+       if (mpc8xxx_spi->flags & SPI_CPM_MODE)
+               ret = mpc8xxx_spi_cpm_bufs(mpc8xxx_spi, t, is_dma_mapped);
+       else
+               ret = mpc8xxx_spi_cpu_bufs(mpc8xxx_spi, t, len);
+       if (ret)
+               return ret;
 
-       wait_for_completion(&mpc83xx_spi->done);
+       wait_for_completion(&mpc8xxx_spi->done);
 
        /* disable rx ints */
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0);
+       mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
+
+       if (mpc8xxx_spi->flags & SPI_CPM_MODE)
+               mpc8xxx_spi_cpm_bufs_complete(mpc8xxx_spi);
 
-       return mpc83xx_spi->count;
+       return mpc8xxx_spi->count;
 }
 
-static void mpc83xx_spi_do_one_msg(struct spi_message *m)
+static void mpc8xxx_spi_do_one_msg(struct spi_message *m)
 {
        struct spi_device *spi = m->spi;
        struct spi_transfer *t;
@@ -364,18 +562,18 @@ static void mpc83xx_spi_do_one_msg(struct spi_message *m)
                        status = -EINVAL;
 
                        if (cs_change)
-                               status = mpc83xx_spi_setup_transfer(spi, t);
+                               status = mpc8xxx_spi_setup_transfer(spi, t);
                        if (status < 0)
                                break;
                }
 
                if (cs_change) {
-                       mpc83xx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
+                       mpc8xxx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
                        ndelay(nsecs);
                }
                cs_change = t->cs_change;
                if (t->len)
-                       status = mpc83xx_spi_bufs(spi, t);
+                       status = mpc8xxx_spi_bufs(spi, t, m->is_dma_mapped);
                if (status) {
                        status = -EMSGSIZE;
                        break;
@@ -387,7 +585,7 @@ static void mpc83xx_spi_do_one_msg(struct spi_message *m)
 
                if (cs_change) {
                        ndelay(nsecs);
-                       mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
+                       mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
                        ndelay(nsecs);
                }
        }
@@ -397,38 +595,38 @@ static void mpc83xx_spi_do_one_msg(struct spi_message *m)
 
        if (status || !cs_change) {
                ndelay(nsecs);
-               mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
+               mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
        }
 
-       mpc83xx_spi_setup_transfer(spi, NULL);
+       mpc8xxx_spi_setup_transfer(spi, NULL);
 }
 
-static void mpc83xx_spi_work(struct work_struct *work)
+static void mpc8xxx_spi_work(struct work_struct *work)
 {
-       struct mpc83xx_spi *mpc83xx_spi = container_of(work, struct mpc83xx_spi,
+       struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
                                                       work);
 
-       spin_lock_irq(&mpc83xx_spi->lock);
-       while (!list_empty(&mpc83xx_spi->queue)) {
-               struct spi_message *m = container_of(mpc83xx_spi->queue.next,
+       spin_lock_irq(&mpc8xxx_spi->lock);
+       while (!list_empty(&mpc8xxx_spi->queue)) {
+               struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
                                                   struct spi_message, queue);
 
                list_del_init(&m->queue);
-               spin_unlock_irq(&mpc83xx_spi->lock);
+               spin_unlock_irq(&mpc8xxx_spi->lock);
 
-               mpc83xx_spi_do_one_msg(m);
+               mpc8xxx_spi_do_one_msg(m);
 
-               spin_lock_irq(&mpc83xx_spi->lock);
+               spin_lock_irq(&mpc8xxx_spi->lock);
        }
-       spin_unlock_irq(&mpc83xx_spi->lock);
+       spin_unlock_irq(&mpc8xxx_spi->lock);
 }
 
-static int mpc83xx_spi_setup(struct spi_device *spi)
+static int mpc8xxx_spi_setup(struct spi_device *spi)
 {
-       struct mpc83xx_spi *mpc83xx_spi;
+       struct mpc8xxx_spi *mpc8xxx_spi;
        int retval;
        u32 hw_mode;
-       struct spi_mpc83xx_cs   *cs = spi->controller_state;
+       struct spi_mpc8xxx_cs   *cs = spi->controller_state;
 
        if (!spi->max_speed_hz)
                return -EINVAL;
@@ -439,10 +637,10 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
                        return -ENOMEM;
                spi->controller_state = cs;
        }
-       mpc83xx_spi = spi_master_get_devdata(spi->master);
+       mpc8xxx_spi = spi_master_get_devdata(spi->master);
 
        hw_mode = cs->hw_mode; /* Save orginal settings */
-       cs->hw_mode = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode);
+       cs->hw_mode = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
        /* mask out bits we are going to set */
        cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH
                         | SPMODE_REV | SPMODE_LOOP);
@@ -456,7 +654,7 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
        if (spi->mode & SPI_LOOP)
                cs->hw_mode |= SPMODE_LOOP;
 
-       retval = mpc83xx_spi_setup_transfer(spi, NULL);
+       retval = mpc8xxx_spi_setup_transfer(spi, NULL);
        if (retval < 0) {
                cs->hw_mode = hw_mode; /* Restore settings */
                return retval;
@@ -464,78 +662,322 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
        return 0;
 }
 
-static irqreturn_t mpc83xx_spi_irq(s32 irq, void *context_data)
+static void mpc8xxx_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events)
 {
-       struct mpc83xx_spi *mpc83xx_spi = context_data;
-       u32 event;
-       irqreturn_t ret = IRQ_NONE;
+       u16 len;
 
-       /* Get interrupt events(tx/rx) */
-       event = mpc83xx_spi_read_reg(&mpc83xx_spi->base->event);
+       dev_dbg(mspi->dev, "%s: bd datlen %d, count %d\n", __func__,
+               in_be16(&mspi->rx_bd->cbd_datlen), mspi->count);
 
-       /* We need handle RX first */
-       if (event & SPIE_NE) {
-               u32 rx_data = mpc83xx_spi_read_reg(&mpc83xx_spi->base->receive);
+       len = in_be16(&mspi->rx_bd->cbd_datlen);
+       if (len > mspi->count) {
+               WARN_ON(1);
+               len = mspi->count;
+       }
 
-               if (mpc83xx_spi->rx)
-                       mpc83xx_spi->get_rx(rx_data, mpc83xx_spi);
+       /* Clear the events */
+       mpc8xxx_spi_write_reg(&mspi->base->event, events);
 
-               ret = IRQ_HANDLED;
+       mspi->count -= len;
+       if (mspi->count)
+               mpc8xxx_spi_cpm_bufs_start(mspi);
+       else
+               complete(&mspi->done);
+}
+
+static void mpc8xxx_spi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)
+{
+       /* We need handle RX first */
+       if (events & SPIE_NE) {
+               u32 rx_data = mpc8xxx_spi_read_reg(&mspi->base->receive);
+
+               if (mspi->rx)
+                       mspi->get_rx(rx_data, mspi);
        }
 
-       if ((event & SPIE_NF) == 0)
+       if ((events & SPIE_NF) == 0)
                /* spin until TX is done */
-               while (((event =
-                        mpc83xx_spi_read_reg(&mpc83xx_spi->base->event)) &
+               while (((events =
+                       mpc8xxx_spi_read_reg(&mspi->base->event)) &
                                                SPIE_NF) == 0)
                        cpu_relax();
 
-       mpc83xx_spi->count -= 1;
-       if (mpc83xx_spi->count) {
-               u32 word = mpc83xx_spi->get_tx(mpc83xx_spi);
-               mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word);
+       /* Clear the events */
+       mpc8xxx_spi_write_reg(&mspi->base->event, events);
+
+       mspi->count -= 1;
+       if (mspi->count) {
+               u32 word = mspi->get_tx(mspi);
+
+               mpc8xxx_spi_write_reg(&mspi->base->transmit, word);
        } else {
-               complete(&mpc83xx_spi->done);
+               complete(&mspi->done);
        }
+}
 
-       /* Clear the events */
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->event, event);
+static irqreturn_t mpc8xxx_spi_irq(s32 irq, void *context_data)
+{
+       struct mpc8xxx_spi *mspi = context_data;
+       irqreturn_t ret = IRQ_NONE;
+       u32 events;
+
+       /* Get interrupt events(tx/rx) */
+       events = mpc8xxx_spi_read_reg(&mspi->base->event);
+       if (events)
+               ret = IRQ_HANDLED;
+
+       dev_dbg(mspi->dev, "%s: events %x\n", __func__, events);
+
+       if (mspi->flags & SPI_CPM_MODE)
+               mpc8xxx_spi_cpm_irq(mspi, events);
+       else
+               mpc8xxx_spi_cpu_irq(mspi, events);
 
        return ret;
 }
-static int mpc83xx_spi_transfer(struct spi_device *spi,
+
+static int mpc8xxx_spi_transfer(struct spi_device *spi,
                                struct spi_message *m)
 {
-       struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master);
+       struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
        unsigned long flags;
 
        m->actual_length = 0;
        m->status = -EINPROGRESS;
 
-       spin_lock_irqsave(&mpc83xx_spi->lock, flags);
-       list_add_tail(&m->queue, &mpc83xx_spi->queue);
-       queue_work(mpc83xx_spi->workqueue, &mpc83xx_spi->work);
-       spin_unlock_irqrestore(&mpc83xx_spi->lock, flags);
+       spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
+       list_add_tail(&m->queue, &mpc8xxx_spi->queue);
+       queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
+       spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
 
        return 0;
 }
 
 
-static void mpc83xx_spi_cleanup(struct spi_device *spi)
+static void mpc8xxx_spi_cleanup(struct spi_device *spi)
 {
        kfree(spi->controller_state);
 }
 
+static void *mpc8xxx_spi_alloc_dummy_rx(void)
+{
+       mutex_lock(&mpc8xxx_dummy_rx_lock);
+
+       if (!mpc8xxx_dummy_rx)
+               mpc8xxx_dummy_rx = kmalloc(SPI_MRBLR, GFP_KERNEL);
+       if (mpc8xxx_dummy_rx)
+               mpc8xxx_dummy_rx_refcnt++;
+
+       mutex_unlock(&mpc8xxx_dummy_rx_lock);
+
+       return mpc8xxx_dummy_rx;
+}
+
+static void mpc8xxx_spi_free_dummy_rx(void)
+{
+       mutex_lock(&mpc8xxx_dummy_rx_lock);
+
+       switch (mpc8xxx_dummy_rx_refcnt) {
+       case 0:
+               WARN_ON(1);
+               break;
+       case 1:
+               kfree(mpc8xxx_dummy_rx);
+               mpc8xxx_dummy_rx = NULL;
+               /* fall through */
+       default:
+               mpc8xxx_dummy_rx_refcnt--;
+               break;
+       }
+
+       mutex_unlock(&mpc8xxx_dummy_rx_lock);
+}
+
+static unsigned long mpc8xxx_spi_cpm_get_pram(struct mpc8xxx_spi *mspi)
+{
+       struct device *dev = mspi->dev;
+       struct device_node *np = dev_archdata_get_node(&dev->archdata);
+       const u32 *iprop;
+       int size;
+       unsigned long spi_base_ofs;
+       unsigned long pram_ofs = -ENOMEM;
+
+       /* Can't use of_address_to_resource(), QE muram isn't at 0. */
+       iprop = of_get_property(np, "reg", &size);
+
+       /* QE with a fixed pram location? */
+       if (mspi->flags & SPI_QE && iprop && size == sizeof(*iprop) * 4)
+               return cpm_muram_alloc_fixed(iprop[2], SPI_PRAM_SIZE);
+
+       /* QE but with a dynamic pram location? */
+       if (mspi->flags & SPI_QE) {
+               pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
+               qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, mspi->subblock,
+                               QE_CR_PROTOCOL_UNSPECIFIED, pram_ofs);
+               return pram_ofs;
+       }
+
+       /* CPM1 and CPM2 pram must be at a fixed addr. */
+       if (!iprop || size != sizeof(*iprop) * 4)
+               return -ENOMEM;
+
+       spi_base_ofs = cpm_muram_alloc_fixed(iprop[2], 2);
+       if (IS_ERR_VALUE(spi_base_ofs))
+               return -ENOMEM;
+
+       if (mspi->flags & SPI_CPM2) {
+               pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
+               if (!IS_ERR_VALUE(pram_ofs)) {
+                       u16 __iomem *spi_base = cpm_muram_addr(spi_base_ofs);
+
+                       out_be16(spi_base, pram_ofs);
+               }
+       } else {
+               struct spi_pram __iomem *pram = cpm_muram_addr(spi_base_ofs);
+               u16 rpbase = in_be16(&pram->rpbase);
+
+               /* Microcode relocation patch applied? */
+               if (rpbase)
+                       pram_ofs = rpbase;
+               else
+                       return spi_base_ofs;
+       }
+
+       cpm_muram_free(spi_base_ofs);
+       return pram_ofs;
+}
+
+static int mpc8xxx_spi_cpm_init(struct mpc8xxx_spi *mspi)
+{
+       struct device *dev = mspi->dev;
+       struct device_node *np = dev_archdata_get_node(&dev->archdata);
+       const u32 *iprop;
+       int size;
+       unsigned long pram_ofs;
+       unsigned long bds_ofs;
+
+       if (!(mspi->flags & SPI_CPM_MODE))
+               return 0;
+
+       if (!mpc8xxx_spi_alloc_dummy_rx())
+               return -ENOMEM;
+
+       if (mspi->flags & SPI_QE) {
+               iprop = of_get_property(np, "cell-index", &size);
+               if (iprop && size == sizeof(*iprop))
+                       mspi->subblock = *iprop;
+
+               switch (mspi->subblock) {
+               default:
+                       dev_warn(dev, "cell-index unspecified, assuming SPI1");
+                       /* fall through */
+               case 0:
+                       mspi->subblock = QE_CR_SUBBLOCK_SPI1;
+                       break;
+               case 1:
+                       mspi->subblock = QE_CR_SUBBLOCK_SPI2;
+                       break;
+               }
+       }
+
+       pram_ofs = mpc8xxx_spi_cpm_get_pram(mspi);
+       if (IS_ERR_VALUE(pram_ofs)) {
+               dev_err(dev, "can't allocate spi parameter ram\n");
+               goto err_pram;
+       }
+
+       bds_ofs = cpm_muram_alloc(sizeof(*mspi->tx_bd) +
+                                 sizeof(*mspi->rx_bd), 8);
+       if (IS_ERR_VALUE(bds_ofs)) {
+               dev_err(dev, "can't allocate bds\n");
+               goto err_bds;
+       }
+
+       mspi->dma_dummy_tx = dma_map_single(dev, empty_zero_page, PAGE_SIZE,
+                                           DMA_TO_DEVICE);
+       if (dma_mapping_error(dev, mspi->dma_dummy_tx)) {
+               dev_err(dev, "unable to map dummy tx buffer\n");
+               goto err_dummy_tx;
+       }
+
+       mspi->dma_dummy_rx = dma_map_single(dev, mpc8xxx_dummy_rx, SPI_MRBLR,
+                                           DMA_FROM_DEVICE);
+       if (dma_mapping_error(dev, mspi->dma_dummy_rx)) {
+               dev_err(dev, "unable to map dummy rx buffer\n");
+               goto err_dummy_rx;
+       }
+
+       mspi->pram = cpm_muram_addr(pram_ofs);
+
+       mspi->tx_bd = cpm_muram_addr(bds_ofs);
+       mspi->rx_bd = cpm_muram_addr(bds_ofs + sizeof(*mspi->tx_bd));
+
+       /* Initialize parameter ram. */
+       out_be16(&mspi->pram->tbase, cpm_muram_offset(mspi->tx_bd));
+       out_be16(&mspi->pram->rbase, cpm_muram_offset(mspi->rx_bd));
+       out_8(&mspi->pram->tfcr, CPMFCR_EB | CPMFCR_GBL);
+       out_8(&mspi->pram->rfcr, CPMFCR_EB | CPMFCR_GBL);
+       out_be16(&mspi->pram->mrblr, SPI_MRBLR);
+       out_be32(&mspi->pram->rstate, 0);
+       out_be32(&mspi->pram->rdp, 0);
+       out_be16(&mspi->pram->rbptr, 0);
+       out_be16(&mspi->pram->rbc, 0);
+       out_be32(&mspi->pram->rxtmp, 0);
+       out_be32(&mspi->pram->tstate, 0);
+       out_be32(&mspi->pram->tdp, 0);
+       out_be16(&mspi->pram->tbptr, 0);
+       out_be16(&mspi->pram->tbc, 0);
+       out_be32(&mspi->pram->txtmp, 0);
+
+       return 0;
+
+err_dummy_rx:
+       dma_unmap_single(dev, mspi->dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
+err_dummy_tx:
+       cpm_muram_free(bds_ofs);
+err_bds:
+       cpm_muram_free(pram_ofs);
+err_pram:
+       mpc8xxx_spi_free_dummy_rx();
+       return -ENOMEM;
+}
+
+static void mpc8xxx_spi_cpm_free(struct mpc8xxx_spi *mspi)
+{
+       struct device *dev = mspi->dev;
+
+       dma_unmap_single(dev, mspi->dma_dummy_rx, SPI_MRBLR, DMA_FROM_DEVICE);
+       dma_unmap_single(dev, mspi->dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
+       cpm_muram_free(cpm_muram_offset(mspi->tx_bd));
+       cpm_muram_free(cpm_muram_offset(mspi->pram));
+       mpc8xxx_spi_free_dummy_rx();
+}
+
+static const char *mpc8xxx_spi_strmode(unsigned int flags)
+{
+       if (flags & SPI_QE_CPU_MODE) {
+               return "QE CPU";
+       } else if (flags & SPI_CPM_MODE) {
+               if (flags & SPI_QE)
+                       return "QE";
+               else if (flags & SPI_CPM2)
+                       return "CPM2";
+               else
+                       return "CPM1";
+       }
+       return "CPU";
+}
+
 static struct spi_master * __devinit
-mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
+mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
 {
        struct fsl_spi_platform_data *pdata = dev->platform_data;
        struct spi_master *master;
-       struct mpc83xx_spi *mpc83xx_spi;
+       struct mpc8xxx_spi *mpc8xxx_spi;
        u32 regval;
        int ret = 0;
 
-       master = spi_alloc_master(dev, sizeof(struct mpc83xx_spi));
+       master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
        if (master == NULL) {
                ret = -ENOMEM;
                goto err;
@@ -547,36 +989,41 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
                        | SPI_LSB_FIRST | SPI_LOOP;
 
-       master->setup = mpc83xx_spi_setup;
-       master->transfer = mpc83xx_spi_transfer;
-       master->cleanup = mpc83xx_spi_cleanup;
+       master->setup = mpc8xxx_spi_setup;
+       master->transfer = mpc8xxx_spi_transfer;
+       master->cleanup = mpc8xxx_spi_cleanup;
 
-       mpc83xx_spi = spi_master_get_devdata(master);
-       mpc83xx_spi->qe_mode = pdata->qe_mode;
-       mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8;
-       mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8;
-       mpc83xx_spi->spibrg = pdata->sysclk;
+       mpc8xxx_spi = spi_master_get_devdata(master);
+       mpc8xxx_spi->dev = dev;
+       mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
+       mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
+       mpc8xxx_spi->flags = pdata->flags;
+       mpc8xxx_spi->spibrg = pdata->sysclk;
 
-       mpc83xx_spi->rx_shift = 0;
-       mpc83xx_spi->tx_shift = 0;
-       if (mpc83xx_spi->qe_mode) {
-               mpc83xx_spi->rx_shift = 16;
-               mpc83xx_spi->tx_shift = 24;
+       ret = mpc8xxx_spi_cpm_init(mpc8xxx_spi);
+       if (ret)
+               goto err_cpm_init;
+
+       mpc8xxx_spi->rx_shift = 0;
+       mpc8xxx_spi->tx_shift = 0;
+       if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
+               mpc8xxx_spi->rx_shift = 16;
+               mpc8xxx_spi->tx_shift = 24;
        }
 
-       init_completion(&mpc83xx_spi->done);
+       init_completion(&mpc8xxx_spi->done);
 
-       mpc83xx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
-       if (mpc83xx_spi->base == NULL) {
+       mpc8xxx_spi->base = ioremap(mem->start, resource_size(mem));
+       if (mpc8xxx_spi->base == NULL) {
                ret = -ENOMEM;
-               goto put_master;
+               goto err_ioremap;
        }
 
-       mpc83xx_spi->irq = irq;
+       mpc8xxx_spi->irq = irq;
 
        /* Register for SPI Interrupt */
-       ret = request_irq(mpc83xx_spi->irq, mpc83xx_spi_irq,
-                         0, "mpc83xx_spi", mpc83xx_spi);
+       ret = request_irq(mpc8xxx_spi->irq, mpc8xxx_spi_irq,
+                         0, "mpc8xxx_spi", mpc8xxx_spi);
 
        if (ret != 0)
                goto unmap_io;
@@ -585,25 +1032,25 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
        master->num_chipselect = pdata->max_chipselect;
 
        /* SPI controller initializations */
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0);
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0);
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->command, 0);
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->event, 0xffffffff);
+       mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, 0);
+       mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
+       mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->command, 0);
+       mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, 0xffffffff);
 
        /* Enable SPI interface */
        regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
-       if (pdata->qe_mode)
+       if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE)
                regval |= SPMODE_OP;
 
-       mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval);
-       spin_lock_init(&mpc83xx_spi->lock);
-       init_completion(&mpc83xx_spi->done);
-       INIT_WORK(&mpc83xx_spi->work, mpc83xx_spi_work);
-       INIT_LIST_HEAD(&mpc83xx_spi->queue);
+       mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, regval);
+       spin_lock_init(&mpc8xxx_spi->lock);
+       init_completion(&mpc8xxx_spi->done);
+       INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
+       INIT_LIST_HEAD(&mpc8xxx_spi->queue);
 
-       mpc83xx_spi->workqueue = create_singlethread_workqueue(
+       mpc8xxx_spi->workqueue = create_singlethread_workqueue(
                dev_name(master->dev.parent));
-       if (mpc83xx_spi->workqueue == NULL) {
+       if (mpc8xxx_spi->workqueue == NULL) {
                ret = -EBUSY;
                goto free_irq;
        }
@@ -612,58 +1059,60 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
        if (ret < 0)
                goto unreg_master;
 
-       printk(KERN_INFO
-              "%s: MPC83xx SPI Controller driver at 0x%p (irq = %d)\n",
-              dev_name(dev), mpc83xx_spi->base, mpc83xx_spi->irq);
+       dev_info(dev, "at 0x%p (irq = %d), %s mode\n", mpc8xxx_spi->base,
+                mpc8xxx_spi->irq, mpc8xxx_spi_strmode(mpc8xxx_spi->flags));
 
        return master;
 
 unreg_master:
-       destroy_workqueue(mpc83xx_spi->workqueue);
+       destroy_workqueue(mpc8xxx_spi->workqueue);
 free_irq:
-       free_irq(mpc83xx_spi->irq, mpc83xx_spi);
+       free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
 unmap_io:
-       iounmap(mpc83xx_spi->base);
-put_master:
+       iounmap(mpc8xxx_spi->base);
+err_ioremap:
+       mpc8xxx_spi_cpm_free(mpc8xxx_spi);
+err_cpm_init:
        spi_master_put(master);
 err:
        return ERR_PTR(ret);
 }
 
-static int __devexit mpc83xx_spi_remove(struct device *dev)
+static int __devexit mpc8xxx_spi_remove(struct device *dev)
 {
-       struct mpc83xx_spi *mpc83xx_spi;
+       struct mpc8xxx_spi *mpc8xxx_spi;
        struct spi_master *master;
 
        master = dev_get_drvdata(dev);
-       mpc83xx_spi = spi_master_get_devdata(master);
+       mpc8xxx_spi = spi_master_get_devdata(master);
 
-       flush_workqueue(mpc83xx_spi->workqueue);
-       destroy_workqueue(mpc83xx_spi->workqueue);
+       flush_workqueue(mpc8xxx_spi->workqueue);
+       destroy_workqueue(mpc8xxx_spi->workqueue);
        spi_unregister_master(master);
 
-       free_irq(mpc83xx_spi->irq, mpc83xx_spi);
-       iounmap(mpc83xx_spi->base);
+       free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
+       iounmap(mpc8xxx_spi->base);
+       mpc8xxx_spi_cpm_free(mpc8xxx_spi);
 
        return 0;
 }
 
-struct mpc83xx_spi_probe_info {
+struct mpc8xxx_spi_probe_info {
        struct fsl_spi_platform_data pdata;
        int *gpios;
        bool *alow_flags;
 };
 
-static struct mpc83xx_spi_probe_info *
+static struct mpc8xxx_spi_probe_info *
 to_of_pinfo(struct fsl_spi_platform_data *pdata)
 {
-       return container_of(pdata, struct mpc83xx_spi_probe_info, pdata);
+       return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
 }
 
-static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
+static void mpc8xxx_spi_cs_control(struct spi_device *spi, bool on)
 {
        struct device *dev = spi->dev.parent;
-       struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data);
+       struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data);
        u16 cs = spi->chip_select;
        int gpio = pinfo->gpios[cs];
        bool alow = pinfo->alow_flags[cs];
@@ -671,11 +1120,11 @@ static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
        gpio_set_value(gpio, on ^ alow);
 }
 
-static int of_mpc83xx_spi_get_chipselects(struct device *dev)
+static int of_mpc8xxx_spi_get_chipselects(struct device *dev)
 {
        struct device_node *np = dev_archdata_get_node(&dev->archdata);
        struct fsl_spi_platform_data *pdata = dev->platform_data;
-       struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(pdata);
+       struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
        unsigned int ngpios;
        int i = 0;
        int ret;
@@ -709,6 +1158,7 @@ static int of_mpc83xx_spi_get_chipselects(struct device *dev)
                gpio = of_get_gpio_flags(np, i, &flags);
                if (!gpio_is_valid(gpio)) {
                        dev_err(dev, "invalid gpio #%d: %d\n", i, gpio);
+                       ret = gpio;
                        goto err_loop;
                }
 
@@ -731,7 +1181,7 @@ static int of_mpc83xx_spi_get_chipselects(struct device *dev)
        }
 
        pdata->max_chipselect = ngpios;
-       pdata->cs_control = mpc83xx_spi_cs_control;
+       pdata->cs_control = mpc8xxx_spi_cs_control;
 
        return 0;
 
@@ -750,10 +1200,10 @@ err_alloc_flags:
        return ret;
 }
 
-static int of_mpc83xx_spi_free_chipselects(struct device *dev)
+static int of_mpc8xxx_spi_free_chipselects(struct device *dev)
 {
        struct fsl_spi_platform_data *pdata = dev->platform_data;
-       struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(pdata);
+       struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
        int i;
 
        if (!pinfo->gpios)
@@ -769,12 +1219,12 @@ static int of_mpc83xx_spi_free_chipselects(struct device *dev)
        return 0;
 }
 
-static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
+static int __devinit of_mpc8xxx_spi_probe(struct of_device *ofdev,
                                          const struct of_device_id *ofid)
 {
        struct device *dev = &ofdev->dev;
        struct device_node *np = ofdev->node;
-       struct mpc83xx_spi_probe_info *pinfo;
+       struct mpc8xxx_spi_probe_info *pinfo;
        struct fsl_spi_platform_data *pdata;
        struct spi_master *master;
        struct resource mem;
@@ -804,9 +1254,15 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
 
        prop = of_get_property(np, "mode", NULL);
        if (prop && !strcmp(prop, "cpu-qe"))
-               pdata->qe_mode = 1;
-
-       ret = of_mpc83xx_spi_get_chipselects(dev);
+               pdata->flags = SPI_QE_CPU_MODE;
+       else if (prop && !strcmp(prop, "qe"))
+               pdata->flags = SPI_CPM_MODE | SPI_QE;
+       else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
+               pdata->flags = SPI_CPM_MODE | SPI_CPM2;
+       else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
+               pdata->flags = SPI_CPM_MODE | SPI_CPM1;
+
+       ret = of_mpc8xxx_spi_get_chipselects(dev);
        if (ret)
                goto err;
 
@@ -820,7 +1276,7 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
                goto err;
        }
 
-       master = mpc83xx_spi_probe(dev, &mem, irq.start);
+       master = mpc8xxx_spi_probe(dev, &mem, irq.start);
        if (IS_ERR(master)) {
                ret = PTR_ERR(master);
                goto err;
@@ -831,34 +1287,34 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
        return 0;
 
 err:
-       of_mpc83xx_spi_free_chipselects(dev);
+       of_mpc8xxx_spi_free_chipselects(dev);
 err_clk:
        kfree(pinfo);
        return ret;
 }
 
-static int __devexit of_mpc83xx_spi_remove(struct of_device *ofdev)
+static int __devexit of_mpc8xxx_spi_remove(struct of_device *ofdev)
 {
        int ret;
 
-       ret = mpc83xx_spi_remove(&ofdev->dev);
+       ret = mpc8xxx_spi_remove(&ofdev->dev);
        if (ret)
                return ret;
-       of_mpc83xx_spi_free_chipselects(&ofdev->dev);
+       of_mpc8xxx_spi_free_chipselects(&ofdev->dev);
        return 0;
 }
 
-static const struct of_device_id of_mpc83xx_spi_match[] = {
+static const struct of_device_id of_mpc8xxx_spi_match[] = {
        { .compatible = "fsl,spi" },
        {},
 };
-MODULE_DEVICE_TABLE(of, of_mpc83xx_spi_match);
+MODULE_DEVICE_TABLE(of, of_mpc8xxx_spi_match);
 
-static struct of_platform_driver of_mpc83xx_spi_driver = {
-       .name           = "mpc83xx_spi",
-       .match_table    = of_mpc83xx_spi_match,
-       .probe          = of_mpc83xx_spi_probe,
-       .remove         = __devexit_p(of_mpc83xx_spi_remove),
+static struct of_platform_driver of_mpc8xxx_spi_driver = {
+       .name           = "mpc8xxx_spi",
+       .match_table    = of_mpc8xxx_spi_match,
+       .probe          = of_mpc8xxx_spi_probe,
+       .remove         = __devexit_p(of_mpc8xxx_spi_remove),
 };
 
 #ifdef CONFIG_MPC832x_RDB
@@ -869,7 +1325,7 @@ static struct of_platform_driver of_mpc83xx_spi_driver = {
  * tree can work with OpenFirmware driver. But for now we support old trees
  * as well.
  */
-static int __devinit plat_mpc83xx_spi_probe(struct platform_device *pdev)
+static int __devinit plat_mpc8xxx_spi_probe(struct platform_device *pdev)
 {
        struct resource *mem;
        unsigned int irq;
@@ -886,23 +1342,23 @@ static int __devinit plat_mpc83xx_spi_probe(struct platform_device *pdev)
        if (!irq)
                return -EINVAL;
 
-       master = mpc83xx_spi_probe(&pdev->dev, mem, irq);
+       master = mpc8xxx_spi_probe(&pdev->dev, mem, irq);
        if (IS_ERR(master))
                return PTR_ERR(master);
        return 0;
 }
 
-static int __devexit plat_mpc83xx_spi_remove(struct platform_device *pdev)
+static int __devexit plat_mpc8xxx_spi_remove(struct platform_device *pdev)
 {
-       return mpc83xx_spi_remove(&pdev->dev);
+       return mpc8xxx_spi_remove(&pdev->dev);
 }
 
-MODULE_ALIAS("platform:mpc83xx_spi");
-static struct platform_driver mpc83xx_spi_driver = {
-       .probe = plat_mpc83xx_spi_probe,
-       .remove = __exit_p(plat_mpc83xx_spi_remove),
+MODULE_ALIAS("platform:mpc8xxx_spi");
+static struct platform_driver mpc8xxx_spi_driver = {
+       .probe = plat_mpc8xxx_spi_probe,
+       .remove = __devexit_p(plat_mpc8xxx_spi_remove),
        .driver = {
-               .name = "mpc83xx_spi",
+               .name = "mpc8xxx_spi",
                .owner = THIS_MODULE,
        },
 };
@@ -911,35 +1367,35 @@ static bool legacy_driver_failed;
 
 static void __init legacy_driver_register(void)
 {
-       legacy_driver_failed = platform_driver_register(&mpc83xx_spi_driver);
+       legacy_driver_failed = platform_driver_register(&mpc8xxx_spi_driver);
 }
 
 static void __exit legacy_driver_unregister(void)
 {
        if (legacy_driver_failed)
                return;
-       platform_driver_unregister(&mpc83xx_spi_driver);
+       platform_driver_unregister(&mpc8xxx_spi_driver);
 }
 #else
 static void __init legacy_driver_register(void) {}
 static void __exit legacy_driver_unregister(void) {}
 #endif /* CONFIG_MPC832x_RDB */
 
-static int __init mpc83xx_spi_init(void)
+static int __init mpc8xxx_spi_init(void)
 {
        legacy_driver_register();
-       return of_register_platform_driver(&of_mpc83xx_spi_driver);
+       return of_register_platform_driver(&of_mpc8xxx_spi_driver);
 }
 
-static void __exit mpc83xx_spi_exit(void)
+static void __exit mpc8xxx_spi_exit(void)
 {
-       of_unregister_platform_driver(&of_mpc83xx_spi_driver);
+       of_unregister_platform_driver(&of_mpc8xxx_spi_driver);
        legacy_driver_unregister();
 }
 
-module_init(mpc83xx_spi_init);
-module_exit(mpc83xx_spi_exit);
+module_init(mpc8xxx_spi_init);
+module_exit(mpc8xxx_spi_exit);
 
 MODULE_AUTHOR("Kumar Gala");
-MODULE_DESCRIPTION("Simple MPC83xx SPI Driver");
+MODULE_DESCRIPTION("Simple MPC8xxx SPI Driver");
 MODULE_LICENSE("GPL");