ds2760_battery: add rated_capacity module parameter
[linux-2.6.git] / drivers / parisc / lba_pci.c
index 7fdd80b..59fbbf1 100644 (file)
@@ -38,7 +38,6 @@
 #include <linux/pci.h>
 #include <linux/ioport.h>
 #include <linux/slab.h>
-#include <linux/smp_lock.h>
 
 #include <asm/byteorder.h>
 #include <asm/pdc.h>
@@ -46,9 +45,9 @@
 #include <asm/page.h>
 #include <asm/system.h>
 
+#include <asm/ropes.h>
 #include <asm/hardware.h>      /* for register_parisc_driver() stuff */
 #include <asm/parisc-device.h>
-#include <asm/iosapic.h>       /* for iosapic_register() */
 #include <asm/io.h>            /* read/write stuff */
 
 #undef DEBUG_LBA       /* general stuff */
 
 #define MODULE_NAME "LBA"
 
-#define LBA_FUNC_ID    0x0000  /* function id */
-#define LBA_FCLASS     0x0008  /* function class, bist, header, rev... */
-#define LBA_CAPABLE    0x0030  /* capabilities register */
-
-#define LBA_PCI_CFG_ADDR       0x0040  /* poke CFG address here */
-#define LBA_PCI_CFG_DATA       0x0048  /* read or write data here */
-
-#define LBA_PMC_MTLT   0x0050  /* Firmware sets this - read only. */
-#define LBA_FW_SCRATCH 0x0058  /* Firmware writes the PCI bus number here. */
-#define LBA_ERROR_ADDR 0x0070  /* On error, address gets logged here */
-
-#define LBA_ARB_MASK   0x0080  /* bit 0 enable arbitration. PAT/PDC enables */
-#define LBA_ARB_PRI    0x0088  /* firmware sets this. */
-#define LBA_ARB_MODE   0x0090  /* firmware sets this. */
-#define LBA_ARB_MTLT   0x0098  /* firmware sets this. */
-
-#define LBA_MOD_ID     0x0100  /* Module ID. PDC_PAT_CELL reports 4 */
-
-#define LBA_STAT_CTL   0x0108  /* Status & Control */
-#define   LBA_BUS_RESET                0x01    /*  Deassert PCI Bus Reset Signal */
-#define   CLEAR_ERRLOG         0x10    /*  "Clear Error Log" cmd */
-#define   CLEAR_ERRLOG_ENABLE  0x20    /*  "Clear Error Log" Enable */
-#define   HF_ENABLE    0x40    /*    enable HF mode (default is -1 mode) */
-
-#define LBA_LMMIO_BASE 0x0200  /* < 4GB I/O address range */
-#define LBA_LMMIO_MASK 0x0208
-
-#define LBA_GMMIO_BASE 0x0210  /* > 4GB I/O address range */
-#define LBA_GMMIO_MASK 0x0218
-
-#define LBA_WLMMIO_BASE        0x0220  /* All < 4GB ranges under the same *SBA* */
-#define LBA_WLMMIO_MASK        0x0228
-
-#define LBA_WGMMIO_BASE        0x0230  /* All > 4GB ranges under the same *SBA* */
-#define LBA_WGMMIO_MASK        0x0238
-
-#define LBA_IOS_BASE   0x0240  /* I/O port space for this LBA */
-#define LBA_IOS_MASK   0x0248
-
-#define LBA_ELMMIO_BASE        0x0250  /* Extra LMMIO range */
-#define LBA_ELMMIO_MASK        0x0258
-
-#define LBA_EIOS_BASE  0x0260  /* Extra I/O port space */
-#define LBA_EIOS_MASK  0x0268
-
-#define LBA_GLOBAL_MASK        0x0270  /* Mercury only: Global Address Mask */
-#define LBA_DMA_CTL    0x0278  /* firmware sets this */
-
-#define LBA_IBASE      0x0300  /* SBA DMA support */
-#define LBA_IMASK      0x0308
-
-/* FIXME: ignore DMA Hint stuff until we can measure performance */
-#define LBA_HINT_CFG   0x0310
-#define LBA_HINT_BASE  0x0380  /* 14 registers at every 8 bytes. */
-
-#define LBA_BUS_MODE   0x0620
-
-/* ERROR regs are needed for config cycle kluges */
-#define LBA_ERROR_CONFIG 0x0680
-#define     LBA_SMART_MODE 0x20
-#define LBA_ERROR_STATUS 0x0688
-#define LBA_ROPE_CTL     0x06A0
-
-#define LBA_IOSAPIC_BASE       0x800 /* Offset of IRQ logic */
-
 /* non-postable I/O port space, densely packed */
 #define LBA_PORT_BASE  (PCI_F_EXTEND | 0xfee00000UL)
-static void __iomem *astro_iop_base;
-
-#define ELROY_HVERS    0x782
-#define MERCURY_HVERS  0x783
-#define QUICKSILVER_HVERS      0x784
-
-static inline int IS_ELROY(struct parisc_device *d)
-{
-       return (d->id.hversion == ELROY_HVERS);
-}
-
-static inline int IS_MERCURY(struct parisc_device *d)
-{
-       return (d->id.hversion == MERCURY_HVERS);
-}
-
-static inline int IS_QUICKSILVER(struct parisc_device *d)
-{
-       return (d->id.hversion == QUICKSILVER_HVERS);
-}
-
-
-/*
-** lba_device: Per instance Elroy data structure
-*/
-struct lba_device {
-       struct pci_hba_data hba;
-
-       spinlock_t      lba_lock;
-       void            *iosapic_obj;
-
-#ifdef CONFIG_64BIT
-       void __iomem *  iop_base;    /* PA_VIEW - for IO port accessor funcs */
-#endif
-
-       int             flags;       /* state/functionality enabled */
-       int             hw_rev;      /* HW revision of chip */
-};
-
+static void __iomem *astro_iop_base __read_mostly;
 
 static u32 lba_t32;
 
@@ -271,7 +167,8 @@ lba_dump_res(struct resource *r, int d)
 
        printk(KERN_DEBUG "(%p)", r->parent);
        for (i = d; i ; --i) printk(" ");
-       printk(KERN_DEBUG "%p [%lx,%lx]/%lx\n", r, r->start, r->end, r->flags);
+       printk(KERN_DEBUG "%p [%lx,%lx]/%lx\n", r,
+               (long)r->start, (long)r->end, r->flags);
        lba_dump_res(r->child, d+2);
        lba_dump_res(r->sibling, d);
 }
@@ -480,12 +377,12 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
                /* original - Generate config cycle on broken elroy
                  with risk we will miss PCI bus errors. */
                *data = lba_rd_cfg(d, tok, pos, size);
-               DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __FUNCTION__, tok, pos, *data);
+               DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __func__, tok, pos, *data);
                return 0;
        }
 
        if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->secondary, devfn, d)) {
-               DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __FUNCTION__, tok, pos);
+               DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __func__, tok, pos);
                /* either don't want to look or know device isn't present. */
                *data = ~0U;
                return(0);
@@ -501,7 +398,7 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
        case 2: *data = READ_REG16(data_reg + (pos & 2)); break;
        case 4: *data = READ_REG32(data_reg); break;
        }
-       DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __FUNCTION__, tok, pos, *data);
+       DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __func__, tok, pos, *data);
        return 0;
 }
 
@@ -544,16 +441,16 @@ static int elroy_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, int
        if (!LBA_SKIP_PROBE(d)) {
                /* Original Workaround */
                lba_wr_cfg(d, tok, pos, (u32) data, size);
-               DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __FUNCTION__, tok, pos,data);
+               DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __func__, tok, pos,data);
                return 0;
        }
 
        if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->secondary, devfn, d))) {
-               DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __FUNCTION__, tok, pos,data);
+               DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __func__, tok, pos,data);
                return 1; /* New Workaround */
        }
 
-       DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __FUNCTION__, tok, pos, data);
+       DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __func__, tok, pos, data);
 
        /* Basic Algorithm */
        LBA_CFG_ADDR_SETUP(d, tok | pos);
@@ -624,7 +521,7 @@ static int mercury_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, i
        if ((pos > 255) || (devfn > 255))
                return -EINVAL;
 
-       DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __FUNCTION__, tok, pos, data);
+       DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __func__, tok, pos, data);
 
        LBA_CFG_TR4_ADDR_SETUP(d, tok | pos);
        switch(size) {
@@ -660,46 +557,67 @@ lba_bios_init(void)
 #ifdef CONFIG_64BIT
 
 /*
-** Determine if a device is already configured.
-** If so, reserve it resources.
-**
-** Read PCI cfg command register and see if I/O or MMIO is enabled.
-** PAT has to enable the devices it's using.
-**
-** Note: resources are fixed up before we try to claim them.
-*/
-static void
-lba_claim_dev_resources(struct pci_dev *dev)
+ * truncate_pat_collision:  Deal with overlaps or outright collisions
+ *                     between PAT PDC reported ranges.
+ *
+ *   Broken PA8800 firmware will report lmmio range that
+ *   overlaps with CPU HPA. Just truncate the lmmio range.
+ *
+ *   BEWARE: conflicts with this lmmio range may be an
+ *   elmmio range which is pointing down another rope.
+ *
+ *  FIXME: only deals with one collision per range...theoretically we
+ *  could have several. Supporting more than one collision will get messy.
+ */
+static unsigned long
+truncate_pat_collision(struct resource *root, struct resource *new)
 {
-       u16 cmd;
-       int i, srch_flags;
+       unsigned long start = new->start;
+       unsigned long end = new->end;
+       struct resource *tmp = root->child;
 
-       (void) pci_read_config_word(dev, PCI_COMMAND, &cmd);
+       if (end <= start || start < root->start || !tmp)
+               return 0;
 
-       srch_flags  = (cmd & PCI_COMMAND_IO) ? IORESOURCE_IO : 0;
-       if (cmd & PCI_COMMAND_MEMORY)
-               srch_flags |= IORESOURCE_MEM;
+       /* find first overlap */
+       while (tmp && tmp->end < start)
+               tmp = tmp->sibling;
 
-       if (!srch_flags)
-               return;
+       /* no entries overlap */
+       if (!tmp)  return 0;
 
-       for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
-               if (dev->resource[i].flags & srch_flags) {
-                       pci_claim_resource(dev, i);
-                       DBG("   claimed %s %d [%lx,%lx]/%lx\n",
-                               pci_name(dev), i,
-                               dev->resource[i].start,
-                               dev->resource[i].end,
-                               dev->resource[i].flags
-                               );
+       /* found one that starts behind the new one
+       ** Don't need to do anything.
+       */
+       if (tmp->start >= end) return 0;
+
+       if (tmp->start <= start) {
+               /* "front" of new one overlaps */
+               new->start = tmp->end + 1;
+
+               if (tmp->end >= end) {
+                       /* AACCKK! totally overlaps! drop this range. */
+                       return 1;
                }
+       } 
+
+       if (tmp->end < end ) {
+               /* "end" of new one overlaps */
+               new->end = tmp->start - 1;
        }
+
+       printk(KERN_WARNING "LBA: Truncating lmmio_space [%lx/%lx] "
+                                       "to [%lx,%lx]\n",
+                       start, end,
+                       (long)new->start, (long)new->end );
+
+       return 0;       /* truncation successful */
 }
+
 #else
-#define lba_claim_dev_resources(dev)
+#define truncate_pat_collision(r,n)  (0)
 #endif
 
-
 /*
 ** The algorithm is generic code.
 ** But it needs to access local data structures to get the IRQ base.
@@ -726,9 +644,13 @@ lba_fixup_bus(struct pci_bus *bus)
        ** Properly Setup MMIO resources for this bus.
        ** pci_alloc_primary_bus() mangles this.
        */
-       if (bus->self) {
+       if (bus->parent) {
+               int i;
                /* PCI-PCI Bridge */
                pci_read_bridge_bases(bus);
+               for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
+                       pci_claim_resource(bus->self, i);
+               }
        } else {
                /* Host-PCI Bridge */
                int err, i;
@@ -747,6 +669,9 @@ lba_fixup_bus(struct pci_bus *bus)
                        lba_dump_res(&ioport_resource, 2);
                        BUG();
                }
+               /* advertize Host bridge resources to PCI bus */
+               bus->resource[0] = &(ldev->hba.io_space);
+               i = 1;
 
                if (ldev->hba.elmmio_space.start) {
                        err = request_resource(&iomem_resource,
@@ -755,28 +680,40 @@ lba_fixup_bus(struct pci_bus *bus)
 
                                printk("FAILED: lba_fixup_bus() request for "
                                                "elmmio_space [%lx/%lx]\n",
-                                               ldev->hba.elmmio_space.start,
-                                               ldev->hba.elmmio_space.end);
+                                               (long)ldev->hba.elmmio_space.start,
+                                               (long)ldev->hba.elmmio_space.end);
 
                                /* lba_dump_res(&iomem_resource, 2); */
                                /* BUG(); */
-                       }
+                       } else
+                               bus->resource[i++] = &(ldev->hba.elmmio_space);
                }
 
-               err = request_resource(&iomem_resource, &(ldev->hba.lmmio_space));
-               if (err < 0) {
-                       /*   FIXME  overlaps with elmmio will fail here.
-                        *   Need to prune (or disable) the distributed range.
-                        *
-                        *   BEWARE: conflicts with this lmmio range may be
-                        *   elmmio range which is pointing down another rope.
-                        */
-
-                       printk("FAILED: lba_fixup_bus() request for "
+
+               /*   Overlaps with elmmio can (and should) fail here.
+                *   We will prune (or ignore) the distributed range.
+                *
+                *   FIXME: SBA code should register all elmmio ranges first.
+                *      that would take care of elmmio ranges routed
+                *      to a different rope (already discovered) from
+                *      getting registered *after* LBA code has already
+                *      registered it's distributed lmmio range.
+                */
+               if (truncate_pat_collision(&iomem_resource,
+                                       &(ldev->hba.lmmio_space))) {
+
+                       printk(KERN_WARNING "LBA: lmmio_space [%lx/%lx] duplicate!\n",
+                                       (long)ldev->hba.lmmio_space.start,
+                                       (long)ldev->hba.lmmio_space.end);
+               } else {
+                       err = request_resource(&iomem_resource, &(ldev->hba.lmmio_space));
+                       if (err < 0) {
+                               printk(KERN_ERR "FAILED: lba_fixup_bus() request for "
                                        "lmmio_space [%lx/%lx]\n",
-                                       ldev->hba.lmmio_space.start,
-                                       ldev->hba.lmmio_space.end);
-                       /* lba_dump_res(&iomem_resource, 2); */
+                                       (long)ldev->hba.lmmio_space.start,
+                                       (long)ldev->hba.lmmio_space.end);
+                       } else
+                               bus->resource[i++] = &(ldev->hba.lmmio_space);
                }
 
 #ifdef CONFIG_64BIT
@@ -786,23 +723,15 @@ lba_fixup_bus(struct pci_bus *bus)
                        if (err < 0) {
                                printk("FAILED: lba_fixup_bus() request for "
                                        "gmmio_space [%lx/%lx]\n",
-                                       ldev->hba.gmmio_space.start,
-                                       ldev->hba.gmmio_space.end);
+                                       (long)ldev->hba.gmmio_space.start,
+                                       (long)ldev->hba.gmmio_space.end);
                                lba_dump_res(&iomem_resource, 2);
                                BUG();
                        }
+                       bus->resource[i++] = &(ldev->hba.gmmio_space);
                }
 #endif
 
-               /* advertize Host bridge resources to PCI bus */
-               bus->resource[0] = &(ldev->hba.io_space);
-               bus->resource[1] = &(ldev->hba.lmmio_space);
-               i=2;
-               if (ldev->hba.elmmio_space.start)
-                       bus->resource[i++] = &(ldev->hba.elmmio_space);
-               if (ldev->hba.gmmio_space.start)
-                       bus->resource[i++] = &(ldev->hba.gmmio_space);
-                       
        }
 
        list_for_each(ln, &bus->devices) {
@@ -839,6 +768,13 @@ lba_fixup_bus(struct pci_bus *bus)
                                DBG("lba_fixup_bus() WTF? 0x%lx [%lx/%lx] XXX",
                                        res->flags, res->start, res->end);
                        }
+
+                       /*
+                       ** FIXME: this will result in whinging for devices
+                       ** that share expansion ROMs (think quad tulip), but
+                       ** isn't harmful.
+                       */
+                       pci_claim_resource(dev, i);
                }
 
 #ifdef FBB_SUPPORT
@@ -850,11 +786,6 @@ lba_fixup_bus(struct pci_bus *bus)
                bus->bridge_ctl &= ~(status & PCI_STATUS_FAST_BACK);
 #endif
 
-               if (is_pdc_pat()) {
-                       /* Claim resources for PDC's devices */
-                       lba_claim_dev_resources(dev);
-               }
-
                 /*
                ** P2PB's have no IRQs. ignore them.
                */
@@ -871,7 +802,7 @@ lba_fixup_bus(struct pci_bus *bus)
 ** Can't fixup here anyway....garr...
 */
        if (fbb_enable) {
-               if (bus->self) {
+               if (bus->parent) {
                        u8 control;
                        /* enable on PPB */
                        (void) pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &control);
@@ -893,7 +824,7 @@ lba_fixup_bus(struct pci_bus *bus)
 }
 
 
-struct pci_bios_ops lba_bios_ops = {
+static struct pci_bios_ops lba_bios_ops = {
        .init =         lba_bios_init,
        .fixup_bus =    lba_fixup_bus,
 };
@@ -959,7 +890,7 @@ LBA_PORT_IN(32, 0)
 #define LBA_PORT_OUT(size, mask) \
 static void lba_astro_out##size (struct pci_hba_data *d, u16 addr, u##size val) \
 { \
-       DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __FUNCTION__, d, addr, val); \
+       DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, d, addr, val); \
        WRITE_REG##size(val, astro_iop_base + addr); \
        if (LBA_DEV(d)->hw_rev < 3) \
                lba_t32 = READ_U32(d->base_addr + LBA_FUNC_ID); \
@@ -1001,7 +932,7 @@ static struct pci_port_ops lba_astro_port_ops = {
 static u##size lba_pat_in##size (struct pci_hba_data *l, u16 addr) \
 { \
        u##size t; \
-       DBG_PORT("%s(0x%p, 0x%x) ->", __FUNCTION__, l, addr); \
+       DBG_PORT("%s(0x%p, 0x%x) ->", __func__, l, addr); \
        t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \
        DBG_PORT(" 0x%x\n", t); \
        return (t); \
@@ -1016,8 +947,8 @@ LBA_PORT_IN(32, 0)
 #define LBA_PORT_OUT(size, mask) \
 static void lba_pat_out##size (struct pci_hba_data *l, u16 addr, u##size val) \
 { \
-       void *where = (void *) PIOP_TO_GMMIO(LBA_DEV(l), addr); \
-       DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __FUNCTION__, l, addr, val); \
+       void __iomem *where = PIOP_TO_GMMIO(LBA_DEV(l), addr); \
+       DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, l, addr, val); \
        WRITE_REG##size(val, where); \
        /* flush the I/O down to the elroy at least */ \
        lba_t32 = READ_U32(l->base_addr + LBA_FUNC_ID); \
@@ -1099,16 +1030,16 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
                        /* used to fix up pre-initialized MEM BARs */
                        if (!lba_dev->hba.lmmio_space.start) {
                                sprintf(lba_dev->hba.lmmio_name,
-                                               "PCI%02lx LMMIO",
-                                               lba_dev->hba.bus_num.start);
+                                               "PCI%02x LMMIO",
+                                               (int)lba_dev->hba.bus_num.start);
                                lba_dev->hba.lmmio_space_offset = p->start -
                                        io->start;
                                r = &lba_dev->hba.lmmio_space;
                                r->name = lba_dev->hba.lmmio_name;
                        } else if (!lba_dev->hba.elmmio_space.start) {
                                sprintf(lba_dev->hba.elmmio_name,
-                                               "PCI%02lx ELMMIO",
-                                               lba_dev->hba.bus_num.start);
+                                               "PCI%02x ELMMIO",
+                                               (int)lba_dev->hba.bus_num.start);
                                r = &lba_dev->hba.elmmio_space;
                                r->name = lba_dev->hba.elmmio_name;
                        } else {
@@ -1125,8 +1056,8 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
 
                case PAT_GMMIO:
                        /* MMIO space > 4GB phys addr; for 64-bit BAR */
-                       sprintf(lba_dev->hba.gmmio_name, "PCI%02lx GMMIO",
-                                       lba_dev->hba.bus_num.start);
+                       sprintf(lba_dev->hba.gmmio_name, "PCI%02x GMMIO",
+                                       (int)lba_dev->hba.bus_num.start);
                        r = &lba_dev->hba.gmmio_space;
                        r->name  = lba_dev->hba.gmmio_name;
                        r->start  = p->start;
@@ -1146,10 +1077,10 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
                        ** Postable I/O port space is per PCI host adapter.
                        ** base of 64MB PIOP region
                        */
-                       lba_dev->iop_base = ioremap(p->start, 64 * 1024 * 1024);
+                       lba_dev->iop_base = ioremap_nocache(p->start, 64 * 1024 * 1024);
 
-                       sprintf(lba_dev->hba.io_name, "PCI%02lx Ports",
-                                       lba_dev->hba.bus_num.start);
+                       sprintf(lba_dev->hba.io_name, "PCI%02x Ports",
+                                       (int)lba_dev->hba.bus_num.start);
                        r = &lba_dev->hba.io_space;
                        r->name  = lba_dev->hba.io_name;
                        r->start  = HBA_PORT_BASE(lba_dev->hba.hba_num);
@@ -1202,8 +1133,8 @@ lba_legacy_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
        ** Legacy boxes but it's nice to see in /proc/iomem.
        */
        r = &(lba_dev->hba.lmmio_space);
-       sprintf(lba_dev->hba.lmmio_name, "PCI%02lx LMMIO",
-                                       lba_dev->hba.bus_num.start);
+       sprintf(lba_dev->hba.lmmio_name, "PCI%02x LMMIO",
+                                       (int)lba_dev->hba.bus_num.start);
        r->name  = lba_dev->hba.lmmio_name;
 
 #if 1
@@ -1288,7 +1219,7 @@ lba_legacy_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
                ** Adjust "window" for this rope.
                */
                rsize /= ROPES_PER_IOC;
-               r->start += (rsize + 1) * LBA_NUM(pa_dev->hpa);
+               r->start += (rsize + 1) * LBA_NUM(pa_dev->hpa.start);
                r->end = r->start + rsize;
        } else {
                r->end = r->start = 0;  /* Not enabled. */
@@ -1311,8 +1242,8 @@ lba_legacy_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
        ** an existing (but unused portion of) distributed range.
        */
        r = &(lba_dev->hba.elmmio_space);
-       sprintf(lba_dev->hba.elmmio_name, "PCI%02lx ELMMIO",
-                                       lba_dev->hba.bus_num.start);
+       sprintf(lba_dev->hba.elmmio_name, "PCI%02x ELMMIO",
+                                       (int)lba_dev->hba.bus_num.start);
        r->name  = lba_dev->hba.elmmio_name;
 
 #if 1
@@ -1333,8 +1264,8 @@ lba_legacy_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
 #endif
 
        r = &(lba_dev->hba.io_space);
-       sprintf(lba_dev->hba.io_name, "PCI%02lx Ports",
-                                       lba_dev->hba.bus_num.start);
+       sprintf(lba_dev->hba.io_name, "PCI%02x Ports",
+                                       (int)lba_dev->hba.bus_num.start);
        r->name  = lba_dev->hba.io_name;
        r->flags = IORESOURCE_IO;
        r->start = READ_REG32(lba_dev->hba.base_addr + LBA_IOS_BASE) & ~1L;
@@ -1442,13 +1373,20 @@ lba_hw_init(struct lba_device *d)
        return 0;
 }
 
-
+/*
+ * Unfortunately, when firmware numbers busses, it doesn't take into account
+ * Cardbus bridges.  So we have to renumber the busses to suit ourselves.
+ * Elroy/Mercury don't actually know what bus number they're attached to;
+ * we use bus 0 to indicate the directly attached bus and any other bus
+ * number will be taken care of by the PCI-PCI bridge.
+ */
+static unsigned int lba_next_bus = 0;
 
 /*
-** Determine if lba should claim this chip (return 0) or not (return 1).
-** If so, initialize the chip and tell other partners in crime they
-** have work to do.
-*/
+ * Determine if lba should claim this chip (return 0) or not (return 1).
+ * If so, initialize the chip and tell other partners in crime they
+ * have work to do.
+ */
 static int __init
 lba_driver_probe(struct parisc_device *dev)
 {
@@ -1458,7 +1396,7 @@ lba_driver_probe(struct parisc_device *dev)
        u32 func_class;
        void *tmp_obj;
        char *version;
-       void __iomem *addr = ioremap(dev->hpa, 4096);
+       void __iomem *addr = ioremap_nocache(dev->hpa.start, 4096);
 
        /* Read HW Rev First */
        func_class = READ_REG32(addr + LBA_FCLASS);
@@ -1475,8 +1413,8 @@ lba_driver_probe(struct parisc_device *dev)
                default: version = "TR4+";
                }
 
-               printk(KERN_INFO "%s version %s (0x%x) found at 0x%lx\n",
-                       MODULE_NAME, version, func_class & 0xf, dev->hpa);
+               printk(KERN_INFO "Elroy version %s (0x%x) found at 0x%lx\n",
+                      version, func_class & 0xf, (long)dev->hpa.start);
 
                if (func_class < 2) {
                        printk(KERN_WARNING "Can't support LBA older than "
@@ -1496,37 +1434,38 @@ lba_driver_probe(struct parisc_device *dev)
                }
 
        } else if (IS_MERCURY(dev) || IS_QUICKSILVER(dev)) {
+               int major, minor;
+
                func_class &= 0xff;
-               version = kmalloc(6, GFP_KERNEL);
-               sprintf(version,"TR%d.%d",(func_class >> 4),(func_class & 0xf));
+               major = func_class >> 4, minor = func_class & 0xf;
+
                /* We could use one printk for both Elroy and Mercury,
                  * but for the mask for func_class.
                  */ 
-               printk(KERN_INFO "%s version %s (0x%x) found at 0x%lx\n",
-                       MODULE_NAME, version, func_class & 0xff, dev->hpa);
+               printk(KERN_INFO "%s version TR%d.%d (0x%x) found at 0x%lx\n",
+                      IS_MERCURY(dev) ? "Mercury" : "Quicksilver", major,
+                      minor, func_class, (long)dev->hpa.start);
+
                cfg_ops = &mercury_cfg_ops;
        } else {
-               printk(KERN_ERR "Unknown LBA found at 0x%lx\n", dev->hpa);
+               printk(KERN_ERR "Unknown LBA found at 0x%lx\n",
+                       (long)dev->hpa.start);
                return -ENODEV;
        }
 
-       /*
-       ** Tell I/O SAPIC driver we have a IRQ handler/region.
-       */
-       tmp_obj = iosapic_register(dev->hpa + LBA_IOSAPIC_BASE);
+       /* Tell I/O SAPIC driver we have a IRQ handler/region. */
+       tmp_obj = iosapic_register(dev->hpa.start + LBA_IOSAPIC_BASE);
 
        /* NOTE: PCI devices (e.g. 103c:1005 graphics card) which don't
        **      have an IRT entry will get NULL back from iosapic code.
        */
        
-       lba_dev = kmalloc(sizeof(struct lba_device), GFP_KERNEL);
+       lba_dev = kzalloc(sizeof(struct lba_device), GFP_KERNEL);
        if (!lba_dev) {
                printk(KERN_ERR "lba_init_chip - couldn't alloc lba_device\n");
                return(1);
        }
 
-       memset(lba_dev, 0, sizeof(struct lba_device));
-
 
        /* ---------- First : initialize data we already have --------- */
 
@@ -1535,6 +1474,7 @@ lba_driver_probe(struct parisc_device *dev)
        lba_dev->hba.dev = dev;
        lba_dev->iosapic_obj = tmp_obj;  /* save interrupt handle */
        lba_dev->hba.iommu = sba_get_iommu(dev);  /* get iommu data */
+       parisc_set_drvdata(dev, lba_dev);
 
        /* ------------ Second : initialize common stuff ---------- */
        pci_bios = &lba_bios_ops;
@@ -1554,7 +1494,7 @@ lba_driver_probe(struct parisc_device *dev)
        } else {
                if (!astro_iop_base) {
                        /* Sprockets PDC uses NPIOP region */
-                       astro_iop_base = ioremap(LBA_PORT_BASE, 64 * 1024);
+                       astro_iop_base = ioremap_nocache(LBA_PORT_BASE, 64 * 1024);
                        pci_port = &lba_astro_port_ops;
                }
 
@@ -1562,16 +1502,17 @@ lba_driver_probe(struct parisc_device *dev)
                lba_legacy_resources(dev, lba_dev);
        }
 
-       /* 
-       ** Tell PCI support another PCI bus was found.
-       ** Walks PCI bus for us too.
-       */
+       if (lba_dev->hba.bus_num.start < lba_next_bus)
+               lba_dev->hba.bus_num.start = lba_next_bus;
+
        dev->dev.platform_data = lba_dev;
        lba_bus = lba_dev->hba.hba_bus =
                pci_scan_bus_parented(&dev->dev, lba_dev->hba.bus_num.start,
                                cfg_ops, NULL);
-       if (lba_bus)
+       if (lba_bus) {
+               lba_next_bus = lba_bus->subordinate + 1;
                pci_bus_add_devices(lba_bus);
+       }
 
        /* This is in lieu of calling pci_assign_unassigned_resources() */
        if (is_pdc_pat()) {
@@ -1635,7 +1576,7 @@ void __init lba_init(void)
 */
 void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask)
 {
-       void __iomem * base_addr = ioremap(lba->hpa, 4096);
+       void __iomem * base_addr = ioremap_nocache(lba->hpa.start, 4096);
 
        imask <<= 2;    /* adjust for hints - 2 more bits */
 
@@ -1643,7 +1584,7 @@ void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask)
        WARN_ON((ibase & 0x001fffff) != 0);
        WARN_ON((imask & 0x001fffff) != 0);
        
-       DBG("%s() ibase 0x%x imask 0x%x\n", __FUNCTION__, ibase, imask);
+       DBG("%s() ibase 0x%x imask 0x%x\n", __func__, ibase, imask);
        WRITE_REG32( imask, base_addr + LBA_IMASK);
        WRITE_REG32( ibase, base_addr + LBA_IBASE);
        iounmap(base_addr);