Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[linux-2.6.git] / drivers / net / wireless / ath / ath5k / base.c
index d77ce99..95072db 100644 (file)
@@ -70,11 +70,6 @@ static int modparam_all_channels;
 module_param_named(all_channels, modparam_all_channels, bool, S_IRUGO);
 MODULE_PARM_DESC(all_channels, "Expose all channels the device can use.");
 
-
-/******************\
-* Internal defines *
-\******************/
-
 /* Module info */
 MODULE_AUTHOR("Jiri Slaby");
 MODULE_AUTHOR("Nick Kossifidis");
@@ -83,6 +78,10 @@ MODULE_SUPPORTED_DEVICE("Atheros 5xxx WLAN cards");
 MODULE_LICENSE("Dual BSD/GPL");
 MODULE_VERSION("0.6.0 (EXPERIMENTAL)");
 
+static int ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan);
+static int ath5k_beacon_update(struct ieee80211_hw *hw,
+               struct ieee80211_vif *vif);
+static void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf);
 
 /* Known PCI ids */
 static DEFINE_PCI_DEVICE_TABLE(ath5k_pci_id_table) = {
@@ -190,129 +189,6 @@ static const struct ieee80211_rate ath5k_rates[] = {
        /* XR missing */
 };
 
-/*
- * Prototypes - PCI stack related functions
- */
-static int __devinit   ath5k_pci_probe(struct pci_dev *pdev,
-                               const struct pci_device_id *id);
-static void __devexit  ath5k_pci_remove(struct pci_dev *pdev);
-#ifdef CONFIG_PM_SLEEP
-static int             ath5k_pci_suspend(struct device *dev);
-static int             ath5k_pci_resume(struct device *dev);
-
-static SIMPLE_DEV_PM_OPS(ath5k_pm_ops, ath5k_pci_suspend, ath5k_pci_resume);
-#define ATH5K_PM_OPS   (&ath5k_pm_ops)
-#else
-#define ATH5K_PM_OPS   NULL
-#endif /* CONFIG_PM_SLEEP */
-
-static struct pci_driver ath5k_pci_driver = {
-       .name           = KBUILD_MODNAME,
-       .id_table       = ath5k_pci_id_table,
-       .probe          = ath5k_pci_probe,
-       .remove         = __devexit_p(ath5k_pci_remove),
-       .driver.pm      = ATH5K_PM_OPS,
-};
-
-
-
-/*
- * Prototypes - MAC 802.11 stack related functions
- */
-static int ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb);
-static int ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
-               struct ath5k_txq *txq);
-static int ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan);
-static int ath5k_start(struct ieee80211_hw *hw);
-static void ath5k_stop(struct ieee80211_hw *hw);
-static int ath5k_add_interface(struct ieee80211_hw *hw,
-               struct ieee80211_vif *vif);
-static void ath5k_remove_interface(struct ieee80211_hw *hw,
-               struct ieee80211_vif *vif);
-static int ath5k_config(struct ieee80211_hw *hw, u32 changed);
-static u64 ath5k_prepare_multicast(struct ieee80211_hw *hw,
-                                  struct netdev_hw_addr_list *mc_list);
-static void ath5k_configure_filter(struct ieee80211_hw *hw,
-               unsigned int changed_flags,
-               unsigned int *new_flags,
-               u64 multicast);
-static int ath5k_set_key(struct ieee80211_hw *hw,
-               enum set_key_cmd cmd,
-               struct ieee80211_vif *vif, struct ieee80211_sta *sta,
-               struct ieee80211_key_conf *key);
-static int ath5k_get_stats(struct ieee80211_hw *hw,
-               struct ieee80211_low_level_stats *stats);
-static int ath5k_get_survey(struct ieee80211_hw *hw,
-               int idx, struct survey_info *survey);
-static u64 ath5k_get_tsf(struct ieee80211_hw *hw);
-static void ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf);
-static void ath5k_reset_tsf(struct ieee80211_hw *hw);
-static int ath5k_beacon_update(struct ieee80211_hw *hw,
-               struct ieee80211_vif *vif);
-static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
-               struct ieee80211_vif *vif,
-               struct ieee80211_bss_conf *bss_conf,
-               u32 changes);
-static void ath5k_sw_scan_start(struct ieee80211_hw *hw);
-static void ath5k_sw_scan_complete(struct ieee80211_hw *hw);
-static void ath5k_set_coverage_class(struct ieee80211_hw *hw,
-               u8 coverage_class);
-
-static const struct ieee80211_ops ath5k_hw_ops = {
-       .tx             = ath5k_tx,
-       .start          = ath5k_start,
-       .stop           = ath5k_stop,
-       .add_interface  = ath5k_add_interface,
-       .remove_interface = ath5k_remove_interface,
-       .config         = ath5k_config,
-       .prepare_multicast = ath5k_prepare_multicast,
-       .configure_filter = ath5k_configure_filter,
-       .set_key        = ath5k_set_key,
-       .get_stats      = ath5k_get_stats,
-       .get_survey     = ath5k_get_survey,
-       .conf_tx        = NULL,
-       .get_tsf        = ath5k_get_tsf,
-       .set_tsf        = ath5k_set_tsf,
-       .reset_tsf      = ath5k_reset_tsf,
-       .bss_info_changed = ath5k_bss_info_changed,
-       .sw_scan_start  = ath5k_sw_scan_start,
-       .sw_scan_complete = ath5k_sw_scan_complete,
-       .set_coverage_class = ath5k_set_coverage_class,
-};
-
-/*
- * Prototypes - Internal functions
- */
-/* Attach detach */
-static int     ath5k_attach(struct pci_dev *pdev,
-                       struct ieee80211_hw *hw);
-static void    ath5k_detach(struct pci_dev *pdev,
-                       struct ieee80211_hw *hw);
-/* Channel/mode setup */
-static inline short ath5k_ieee2mhz(short chan);
-static unsigned int ath5k_copy_channels(struct ath5k_hw *ah,
-                               struct ieee80211_channel *channels,
-                               unsigned int mode,
-                               unsigned int max);
-static int     ath5k_setup_bands(struct ieee80211_hw *hw);
-static int     ath5k_chan_set(struct ath5k_softc *sc,
-                               struct ieee80211_channel *chan);
-static void    ath5k_setcurmode(struct ath5k_softc *sc,
-                               unsigned int mode);
-static void    ath5k_mode_setup(struct ath5k_softc *sc);
-
-/* Descriptor setup */
-static int     ath5k_desc_alloc(struct ath5k_softc *sc,
-                               struct pci_dev *pdev);
-static void    ath5k_desc_free(struct ath5k_softc *sc,
-                               struct pci_dev *pdev);
-/* Buffers setup */
-static int     ath5k_rxbuf_setup(struct ath5k_softc *sc,
-                               struct ath5k_buf *bf);
-static int     ath5k_txbuf_setup(struct ath5k_softc *sc,
-                               struct ath5k_buf *bf,
-                               struct ath5k_txq *txq, int padsize);
-
 static inline void ath5k_txbuf_free_skb(struct ath5k_softc *sc,
                                struct ath5k_buf *bf)
 {
@@ -345,35 +221,6 @@ static inline void ath5k_rxbuf_free_skb(struct ath5k_softc *sc,
 }
 
 
-/* Queues setup */
-static struct  ath5k_txq *ath5k_txq_setup(struct ath5k_softc *sc,
-                               int qtype, int subtype);
-static int     ath5k_beaconq_setup(struct ath5k_hw *ah);
-static int     ath5k_beaconq_config(struct ath5k_softc *sc);
-static void    ath5k_txq_drainq(struct ath5k_softc *sc,
-                               struct ath5k_txq *txq);
-static void    ath5k_txq_cleanup(struct ath5k_softc *sc);
-static void    ath5k_txq_release(struct ath5k_softc *sc);
-/* Rx handling */
-static int     ath5k_rx_start(struct ath5k_softc *sc);
-static void    ath5k_rx_stop(struct ath5k_softc *sc);
-static unsigned int ath5k_rx_decrypted(struct ath5k_softc *sc,
-                                       struct sk_buff *skb,
-                                       struct ath5k_rx_status *rs);
-static void    ath5k_tasklet_rx(unsigned long data);
-/* Tx handling */
-static void    ath5k_tx_processq(struct ath5k_softc *sc,
-                               struct ath5k_txq *txq);
-static void    ath5k_tasklet_tx(unsigned long data);
-/* Beacon handling */
-static int     ath5k_beacon_setup(struct ath5k_softc *sc,
-                                       struct ath5k_buf *bf);
-static void    ath5k_beacon_send(struct ath5k_softc *sc);
-static void    ath5k_beacon_config(struct ath5k_softc *sc);
-static void    ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf);
-static void    ath5k_tasklet_beacon(unsigned long data);
-static void    ath5k_tasklet_ani(unsigned long data);
-
 static inline u64 ath5k_extend_tsf(struct ath5k_hw *ah, u32 rstamp)
 {
        u64 tsf = ath5k_hw_get_tsf64(ah);
@@ -384,50 +231,6 @@ static inline u64 ath5k_extend_tsf(struct ath5k_hw *ah, u32 rstamp)
        return (tsf & ~0x7fff) | rstamp;
 }
 
-/* Interrupt handling */
-static int     ath5k_init(struct ath5k_softc *sc);
-static int     ath5k_stop_locked(struct ath5k_softc *sc);
-static int     ath5k_stop_hw(struct ath5k_softc *sc);
-static irqreturn_t ath5k_intr(int irq, void *dev_id);
-static void ath5k_reset_work(struct work_struct *work);
-
-static void    ath5k_tasklet_calibrate(unsigned long data);
-
-/*
- * Module init/exit functions
- */
-static int __init
-init_ath5k_pci(void)
-{
-       int ret;
-
-       ath5k_debug_init();
-
-       ret = pci_register_driver(&ath5k_pci_driver);
-       if (ret) {
-               printk(KERN_ERR "ath5k_pci: can't register pci driver\n");
-               return ret;
-       }
-
-       return 0;
-}
-
-static void __exit
-exit_ath5k_pci(void)
-{
-       pci_unregister_driver(&ath5k_pci_driver);
-
-       ath5k_debug_finish();
-}
-
-module_init(init_ath5k_pci);
-module_exit(exit_ath5k_pci);
-
-
-/********************\
-* PCI Initialization *
-\********************/
-
 static const char *
 ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val)
 {
@@ -466,299 +269,6 @@ static const struct ath_ops ath5k_common_ops = {
        .write = ath5k_iowrite32,
 };
 
-static int __devinit
-ath5k_pci_probe(struct pci_dev *pdev,
-               const struct pci_device_id *id)
-{
-       void __iomem *mem;
-       struct ath5k_softc *sc;
-       struct ath_common *common;
-       struct ieee80211_hw *hw;
-       int ret;
-       u8 csz;
-
-       /*
-        * L0s needs to be disabled on all ath5k cards.
-        *
-        * For distributions shipping with CONFIG_PCIEASPM (this will be enabled
-        * by default in the future in 2.6.36) this will also mean both L1 and
-        * L0s will be disabled when a pre 1.1 PCIe device is detected. We do
-        * know L1 works correctly even for all ath5k pre 1.1 PCIe devices
-        * though but cannot currently undue the effect of a blacklist, for
-        * details you can read pcie_aspm_sanity_check() and see how it adjusts
-        * the device link capability.
-        *
-        * It may be possible in the future to implement some PCI API to allow
-        * drivers to override blacklists for pre 1.1 PCIe but for now it is
-        * best to accept that both L0s and L1 will be disabled completely for
-        * distributions shipping with CONFIG_PCIEASPM rather than having this
-        * issue present. Motivation for adding this new API will be to help
-        * with power consumption for some of these devices.
-        */
-       pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
-
-       ret = pci_enable_device(pdev);
-       if (ret) {
-               dev_err(&pdev->dev, "can't enable device\n");
-               goto err;
-       }
-
-       /* XXX 32-bit addressing only */
-       ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
-       if (ret) {
-               dev_err(&pdev->dev, "32-bit DMA not available\n");
-               goto err_dis;
-       }
-
-       /*
-        * Cache line size is used to size and align various
-        * structures used to communicate with the hardware.
-        */
-       pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
-       if (csz == 0) {
-               /*
-                * Linux 2.4.18 (at least) writes the cache line size
-                * register as a 16-bit wide register which is wrong.
-                * We must have this setup properly for rx buffer
-                * DMA to work so force a reasonable value here if it
-                * comes up zero.
-                */
-               csz = L1_CACHE_BYTES >> 2;
-               pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
-       }
-       /*
-        * The default setting of latency timer yields poor results,
-        * set it to the value used by other systems.  It may be worth
-        * tweaking this setting more.
-        */
-       pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
-
-       /* Enable bus mastering */
-       pci_set_master(pdev);
-
-       /*
-        * Disable the RETRY_TIMEOUT register (0x41) to keep
-        * PCI Tx retries from interfering with C3 CPU state.
-        */
-       pci_write_config_byte(pdev, 0x41, 0);
-
-       ret = pci_request_region(pdev, 0, "ath5k");
-       if (ret) {
-               dev_err(&pdev->dev, "cannot reserve PCI memory region\n");
-               goto err_dis;
-       }
-
-       mem = pci_iomap(pdev, 0, 0);
-       if (!mem) {
-               dev_err(&pdev->dev, "cannot remap PCI memory region\n") ;
-               ret = -EIO;
-               goto err_reg;
-       }
-
-       /*
-        * Allocate hw (mac80211 main struct)
-        * and hw->priv (driver private data)
-        */
-       hw = ieee80211_alloc_hw(sizeof(*sc), &ath5k_hw_ops);
-       if (hw == NULL) {
-               dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n");
-               ret = -ENOMEM;
-               goto err_map;
-       }
-
-       dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy));
-
-       /* Initialize driver private data */
-       SET_IEEE80211_DEV(hw, &pdev->dev);
-       hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
-                   IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
-                   IEEE80211_HW_SIGNAL_DBM;
-
-       hw->wiphy->interface_modes =
-               BIT(NL80211_IFTYPE_AP) |
-               BIT(NL80211_IFTYPE_STATION) |
-               BIT(NL80211_IFTYPE_ADHOC) |
-               BIT(NL80211_IFTYPE_MESH_POINT);
-
-       hw->extra_tx_headroom = 2;
-       hw->channel_change_time = 5000;
-       sc = hw->priv;
-       sc->hw = hw;
-       sc->pdev = pdev;
-
-       ath5k_debug_init_device(sc);
-
-       /*
-        * Mark the device as detached to avoid processing
-        * interrupts until setup is complete.
-        */
-       __set_bit(ATH_STAT_INVALID, sc->status);
-
-       sc->iobase = mem; /* So we can unmap it on detach */
-       sc->opmode = NL80211_IFTYPE_STATION;
-       sc->bintval = 1000;
-       mutex_init(&sc->lock);
-       spin_lock_init(&sc->rxbuflock);
-       spin_lock_init(&sc->txbuflock);
-       spin_lock_init(&sc->block);
-
-       /* Set private data */
-       pci_set_drvdata(pdev, sc);
-
-       /* Setup interrupt handler */
-       ret = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc);
-       if (ret) {
-               ATH5K_ERR(sc, "request_irq failed\n");
-               goto err_free;
-       }
-
-       /*If we passed the test malloc a ath5k_hw struct*/
-       sc->ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
-       if (!sc->ah) {
-               ret = -ENOMEM;
-               ATH5K_ERR(sc, "out of memory\n");
-               goto err_irq;
-       }
-
-       sc->ah->ah_sc = sc;
-       sc->ah->ah_iobase = sc->iobase;
-       common = ath5k_hw_common(sc->ah);
-       common->ops = &ath5k_common_ops;
-       common->ah = sc->ah;
-       common->hw = hw;
-       common->cachelsz = csz << 2; /* convert to bytes */
-
-       /* Initialize device */
-       ret = ath5k_hw_attach(sc);
-       if (ret) {
-               goto err_free_ah;
-       }
-
-       /* set up multi-rate retry capabilities */
-       if (sc->ah->ah_version == AR5K_AR5212) {
-               hw->max_rates = 4;
-               hw->max_rate_tries = 11;
-       }
-
-       /* Finish private driver data initialization */
-       ret = ath5k_attach(pdev, hw);
-       if (ret)
-               goto err_ah;
-
-       ATH5K_INFO(sc, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n",
-                       ath5k_chip_name(AR5K_VERSION_MAC, sc->ah->ah_mac_srev),
-                                       sc->ah->ah_mac_srev,
-                                       sc->ah->ah_phy_revision);
-
-       if (!sc->ah->ah_single_chip) {
-               /* Single chip radio (!RF5111) */
-               if (sc->ah->ah_radio_5ghz_revision &&
-                       !sc->ah->ah_radio_2ghz_revision) {
-                       /* No 5GHz support -> report 2GHz radio */
-                       if (!test_bit(AR5K_MODE_11A,
-                               sc->ah->ah_capabilities.cap_mode)) {
-                               ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n",
-                                       ath5k_chip_name(AR5K_VERSION_RAD,
-                                               sc->ah->ah_radio_5ghz_revision),
-                                               sc->ah->ah_radio_5ghz_revision);
-                       /* No 2GHz support (5110 and some
-                        * 5Ghz only cards) -> report 5Ghz radio */
-                       } else if (!test_bit(AR5K_MODE_11B,
-                               sc->ah->ah_capabilities.cap_mode)) {
-                               ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n",
-                                       ath5k_chip_name(AR5K_VERSION_RAD,
-                                               sc->ah->ah_radio_5ghz_revision),
-                                               sc->ah->ah_radio_5ghz_revision);
-                       /* Multiband radio */
-                       } else {
-                               ATH5K_INFO(sc, "RF%s multiband radio found"
-                                       " (0x%x)\n",
-                                       ath5k_chip_name(AR5K_VERSION_RAD,
-                                               sc->ah->ah_radio_5ghz_revision),
-                                               sc->ah->ah_radio_5ghz_revision);
-                       }
-               }
-               /* Multi chip radio (RF5111 - RF2111) ->
-                * report both 2GHz/5GHz radios */
-               else if (sc->ah->ah_radio_5ghz_revision &&
-                               sc->ah->ah_radio_2ghz_revision){
-                       ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n",
-                               ath5k_chip_name(AR5K_VERSION_RAD,
-                                       sc->ah->ah_radio_5ghz_revision),
-                                       sc->ah->ah_radio_5ghz_revision);
-                       ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n",
-                               ath5k_chip_name(AR5K_VERSION_RAD,
-                                       sc->ah->ah_radio_2ghz_revision),
-                                       sc->ah->ah_radio_2ghz_revision);
-               }
-       }
-
-
-       /* ready to process interrupts */
-       __clear_bit(ATH_STAT_INVALID, sc->status);
-
-       return 0;
-err_ah:
-       ath5k_hw_detach(sc->ah);
-err_irq:
-       free_irq(pdev->irq, sc);
-err_free_ah:
-       kfree(sc->ah);
-err_free:
-       ieee80211_free_hw(hw);
-err_map:
-       pci_iounmap(pdev, mem);
-err_reg:
-       pci_release_region(pdev, 0);
-err_dis:
-       pci_disable_device(pdev);
-err:
-       return ret;
-}
-
-static void __devexit
-ath5k_pci_remove(struct pci_dev *pdev)
-{
-       struct ath5k_softc *sc = pci_get_drvdata(pdev);
-
-       ath5k_debug_finish_device(sc);
-       ath5k_detach(pdev, sc->hw);
-       ath5k_hw_detach(sc->ah);
-       kfree(sc->ah);
-       free_irq(pdev->irq, sc);
-       pci_iounmap(pdev, sc->iobase);
-       pci_release_region(pdev, 0);
-       pci_disable_device(pdev);
-       ieee80211_free_hw(sc->hw);
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int ath5k_pci_suspend(struct device *dev)
-{
-       struct ath5k_softc *sc = pci_get_drvdata(to_pci_dev(dev));
-
-       ath5k_led_off(sc);
-       return 0;
-}
-
-static int ath5k_pci_resume(struct device *dev)
-{
-       struct pci_dev *pdev = to_pci_dev(dev);
-       struct ath5k_softc *sc = pci_get_drvdata(pdev);
-
-       /*
-        * Suspend/Resume resets the PCI configuration space, so we have to
-        * re-disable the RETRY_TIMEOUT register (0x41) to keep
-        * PCI Tx retries from interfering with C3 CPU state
-        */
-       pci_write_config_byte(pdev, 0x41, 0);
-
-       ath5k_led_enable(sc);
-       return 0;
-}
-#endif /* CONFIG_PM_SLEEP */
-
-
 /***********************\
 * Driver Initialization *
 \***********************/
@@ -772,170 +282,6 @@ static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *re
        return ath_reg_notifier_apply(wiphy, request, regulatory);
 }
 
-static int
-ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
-{
-       struct ath5k_softc *sc = hw->priv;
-       struct ath5k_hw *ah = sc->ah;
-       struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
-       u8 mac[ETH_ALEN] = {};
-       int ret;
-
-       ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "devid 0x%x\n", pdev->device);
-
-       /*
-        * Check if the MAC has multi-rate retry support.
-        * We do this by trying to setup a fake extended
-        * descriptor.  MAC's that don't have support will
-        * return false w/o doing anything.  MAC's that do
-        * support it will return true w/o doing anything.
-        */
-       ret = ath5k_hw_setup_mrr_tx_desc(ah, NULL, 0, 0, 0, 0, 0, 0);
-
-       if (ret < 0)
-               goto err;
-       if (ret > 0)
-               __set_bit(ATH_STAT_MRRETRY, sc->status);
-
-       /*
-        * Collect the channel list.  The 802.11 layer
-        * is resposible for filtering this list based
-        * on settings like the phy mode and regulatory
-        * domain restrictions.
-        */
-       ret = ath5k_setup_bands(hw);
-       if (ret) {
-               ATH5K_ERR(sc, "can't get channels\n");
-               goto err;
-       }
-
-       /* NB: setup here so ath5k_rate_update is happy */
-       if (test_bit(AR5K_MODE_11A, ah->ah_modes))
-               ath5k_setcurmode(sc, AR5K_MODE_11A);
-       else
-               ath5k_setcurmode(sc, AR5K_MODE_11B);
-
-       /*
-        * Allocate tx+rx descriptors and populate the lists.
-        */
-       ret = ath5k_desc_alloc(sc, pdev);
-       if (ret) {
-               ATH5K_ERR(sc, "can't allocate descriptors\n");
-               goto err;
-       }
-
-       /*
-        * Allocate hardware transmit queues: one queue for
-        * beacon frames and one data queue for each QoS
-        * priority.  Note that hw functions handle reseting
-        * these queues at the needed time.
-        */
-       ret = ath5k_beaconq_setup(ah);
-       if (ret < 0) {
-               ATH5K_ERR(sc, "can't setup a beacon xmit queue\n");
-               goto err_desc;
-       }
-       sc->bhalq = ret;
-       sc->cabq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_CAB, 0);
-       if (IS_ERR(sc->cabq)) {
-               ATH5K_ERR(sc, "can't setup cab queue\n");
-               ret = PTR_ERR(sc->cabq);
-               goto err_bhal;
-       }
-
-       sc->txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK);
-       if (IS_ERR(sc->txq)) {
-               ATH5K_ERR(sc, "can't setup xmit queue\n");
-               ret = PTR_ERR(sc->txq);
-               goto err_queues;
-       }
-
-       tasklet_init(&sc->rxtq, ath5k_tasklet_rx, (unsigned long)sc);
-       tasklet_init(&sc->txtq, ath5k_tasklet_tx, (unsigned long)sc);
-       tasklet_init(&sc->calib, ath5k_tasklet_calibrate, (unsigned long)sc);
-       tasklet_init(&sc->beacontq, ath5k_tasklet_beacon, (unsigned long)sc);
-       tasklet_init(&sc->ani_tasklet, ath5k_tasklet_ani, (unsigned long)sc);
-
-       INIT_WORK(&sc->reset_work, ath5k_reset_work);
-
-       ret = ath5k_eeprom_read_mac(ah, mac);
-       if (ret) {
-               ATH5K_ERR(sc, "unable to read address from EEPROM: 0x%04x\n",
-                       sc->pdev->device);
-               goto err_queues;
-       }
-
-       SET_IEEE80211_PERM_ADDR(hw, mac);
-       /* All MAC address bits matter for ACKs */
-       memcpy(sc->bssidmask, ath_bcast_mac, ETH_ALEN);
-       ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask);
-
-       regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain;
-       ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier);
-       if (ret) {
-               ATH5K_ERR(sc, "can't initialize regulatory system\n");
-               goto err_queues;
-       }
-
-       ret = ieee80211_register_hw(hw);
-       if (ret) {
-               ATH5K_ERR(sc, "can't register ieee80211 hw\n");
-               goto err_queues;
-       }
-
-       if (!ath_is_world_regd(regulatory))
-               regulatory_hint(hw->wiphy, regulatory->alpha2);
-
-       ath5k_init_leds(sc);
-
-       ath5k_sysfs_register(sc);
-
-       return 0;
-err_queues:
-       ath5k_txq_release(sc);
-err_bhal:
-       ath5k_hw_release_tx_queue(ah, sc->bhalq);
-err_desc:
-       ath5k_desc_free(sc, pdev);
-err:
-       return ret;
-}
-
-static void
-ath5k_detach(struct pci_dev *pdev, struct ieee80211_hw *hw)
-{
-       struct ath5k_softc *sc = hw->priv;
-
-       /*
-        * NB: the order of these is important:
-        * o call the 802.11 layer before detaching ath5k_hw to
-        *   insure callbacks into the driver to delete global
-        *   key cache entries can be handled
-        * o reclaim the tx queue data structures after calling
-        *   the 802.11 layer as we'll get called back to reclaim
-        *   node state and potentially want to use them
-        * o to cleanup the tx queues the hal is called, so detach
-        *   it last
-        * XXX: ??? detach ath5k_hw ???
-        * Other than that, it's straightforward...
-        */
-       ieee80211_unregister_hw(hw);
-       ath5k_desc_free(sc, pdev);
-       ath5k_txq_release(sc);
-       ath5k_hw_release_tx_queue(sc->ah, sc->bhalq);
-       ath5k_unregister_leds(sc);
-
-       ath5k_sysfs_unregister(sc);
-       /*
-        * NB: can't reclaim these until after ieee80211_ifdetach
-        * returns because we'll get called back to reclaim node
-        * state and potentially want to use them.
-        */
-}
-
-
-
-
 /********************\
 * Channel/mode setup *
 \********************/
@@ -1391,6 +737,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
 
        spin_lock_bh(&txq->lock);
        list_add_tail(&bf->list, &txq->q);
+       txq->txq_len++;
        if (txq->link == NULL) /* is this first packet? */
                ath5k_hw_set_txdp(ah, txq->qnum, bf->daddr);
        else /* no, so only link it */
@@ -1494,9 +841,6 @@ ath5k_desc_free(struct ath5k_softc *sc, struct pci_dev *pdev)
 }
 
 
-
-
-
 /**************\
 * Queues setup *
 \**************/
@@ -1509,16 +853,18 @@ ath5k_txq_setup(struct ath5k_softc *sc,
        struct ath5k_txq *txq;
        struct ath5k_txq_info qi = {
                .tqi_subtype = subtype,
-               .tqi_aifs = AR5K_TXQ_USEDEFAULT,
-               .tqi_cw_min = AR5K_TXQ_USEDEFAULT,
-               .tqi_cw_max = AR5K_TXQ_USEDEFAULT
+               /* XXX: default values not correct for B and XR channels,
+                * but who cares? */
+               .tqi_aifs = AR5K_TUNE_AIFS,
+               .tqi_cw_min = AR5K_TUNE_CWMIN,
+               .tqi_cw_max = AR5K_TUNE_CWMAX
        };
        int qnum;
 
        /*
         * Enable interrupts only for EOL and DESC conditions.
         * We mark tx descriptors to receive a DESC interrupt
-        * when a tx queue gets deep; otherwise waiting for the
+        * when a tx queue gets deep; otherwise we wait for the
         * EOL to reap descriptors.  Note that this is done to
         * reduce interrupt load and this only defers reaping
         * descriptors, never transmitting frames.  Aside from
@@ -1550,6 +896,9 @@ ath5k_txq_setup(struct ath5k_softc *sc,
                INIT_LIST_HEAD(&txq->q);
                spin_lock_init(&txq->lock);
                txq->setup = true;
+               txq->txq_len = 0;
+               txq->txq_poll_mark = false;
+               txq->txq_stuck = 0;
        }
        return &sc->txqs[qnum];
 }
@@ -1558,9 +907,11 @@ static int
 ath5k_beaconq_setup(struct ath5k_hw *ah)
 {
        struct ath5k_txq_info qi = {
-               .tqi_aifs = AR5K_TXQ_USEDEFAULT,
-               .tqi_cw_min = AR5K_TXQ_USEDEFAULT,
-               .tqi_cw_max = AR5K_TXQ_USEDEFAULT,
+               /* XXX: default values not correct for B and XR channels,
+                * but who cares? */
+               .tqi_aifs = AR5K_TUNE_AIFS,
+               .tqi_cw_min = AR5K_TUNE_CWMIN,
+               .tqi_cw_max = AR5K_TUNE_CWMAX,
                /* NB: for dynamic turbo, don't enable any other interrupts */
                .tqi_flags = AR5K_TXQ_FLAG_TXDESCINT_ENABLE
        };
@@ -1594,7 +945,7 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
                 */
                qi.tqi_aifs = 0;
                qi.tqi_cw_min = 0;
-               qi.tqi_cw_max = 2 * ah->ah_cw_min;
+               qi.tqi_cw_max = 2 * AR5K_TUNE_CWMIN;
        }
 
        ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
@@ -1644,9 +995,11 @@ ath5k_txq_drainq(struct ath5k_softc *sc, struct ath5k_txq *txq)
                spin_lock_bh(&sc->txbuflock);
                list_move_tail(&bf->list, &sc->txbuf);
                sc->txbuf_len++;
+               txq->txq_len--;
                spin_unlock_bh(&sc->txbuflock);
        }
        txq->link = NULL;
+       txq->txq_poll_mark = false;
        spin_unlock_bh(&txq->lock);
 }
 
@@ -1696,8 +1049,6 @@ ath5k_txq_release(struct ath5k_softc *sc)
 }
 
 
-
-
 /*************\
 * RX Handling *
 \*************/
@@ -1713,7 +1064,7 @@ ath5k_rx_start(struct ath5k_softc *sc)
        struct ath5k_buf *bf;
        int ret;
 
-       common->rx_bufsize = roundup(IEEE80211_MAX_LEN, common->cachelsz);
+       common->rx_bufsize = roundup(IEEE80211_MAX_FRAME_LEN, common->cachelsz);
 
        ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n",
                  common->cachelsz, common->rx_bufsize);
@@ -1863,7 +1214,7 @@ ath5k_update_beacon_rssi(struct ath5k_softc *sc, struct sk_buff *skb, int rssi)
 }
 
 /*
- * Compute padding position. skb must contains an IEEE 802.11 frame
+ * Compute padding position. skb must contain an IEEE 802.11 frame
  */
 static int ath5k_common_padpos(struct sk_buff *skb)
 {
@@ -1882,10 +1233,9 @@ static int ath5k_common_padpos(struct sk_buff *skb)
 }
 
 /*
- * This function expects a 802.11 frame and returns the number of
- * bytes added, or -1 if we don't have enought header room.
+ * This function expects an 802.11 frame and returns the number of
+ * bytes added, or -1 if we don't have enough header room.
  */
-
 static int ath5k_add_padding(struct sk_buff *skb)
 {
        int padpos = ath5k_common_padpos(skb);
@@ -1905,10 +1255,18 @@ static int ath5k_add_padding(struct sk_buff *skb)
 }
 
 /*
- * This function expects a 802.11 frame and returns the number of
- * bytes removed
+ * The MAC header is padded to have 32-bit boundary if the
+ * packet payload is non-zero. The general calculation for
+ * padsize would take into account odd header lengths:
+ * padsize = 4 - (hdrlen & 3); however, since only
+ * even-length headers are used, padding can only be 0 or 2
+ * bytes and we can optimize this a bit.  We must not try to
+ * remove padding from short control frames that do not have a
+ * payload.
+ *
+ * This function expects an 802.11 frame and returns the number of
+ * bytes removed.
  */
-
 static int ath5k_remove_padding(struct sk_buff *skb)
 {
        int padpos = ath5k_common_padpos(skb);
@@ -1929,14 +1287,6 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
 {
        struct ieee80211_rx_status *rxs;
 
-       /* The MAC header is padded to have 32-bit boundary if the
-        * packet payload is non-zero. The general calculation for
-        * padsize would take into account odd header lengths:
-        * padsize = (4 - hdrlen % 4) % 4; However, since only
-        * even-length headers are used, padding can only be 0 or 2
-        * bytes and we can optimize this a bit. In addition, we must
-        * not try to remove padding from short control frames that do
-        * not have payload. */
        ath5k_remove_padding(skb);
 
        rxs = IEEE80211_SKB_RXCB(skb);
@@ -2040,9 +1390,8 @@ ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs)
                        return true;
                }
 
-               /* let crypto-error packets fall through in MNTR */
-               if ((rs->rs_status & ~(AR5K_RXERR_DECRYPT|AR5K_RXERR_MIC)) ||
-                   sc->opmode != NL80211_IFTYPE_MONITOR)
+               /* reject any frames with non-crypto errors */
+               if (rs->rs_status & ~(AR5K_RXERR_DECRYPT))
                        return false;
        }
 
@@ -2123,6 +1472,117 @@ unlock:
 * TX Handling *
 \*************/
 
+static int ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
+                         struct ath5k_txq *txq)
+{
+       struct ath5k_softc *sc = hw->priv;
+       struct ath5k_buf *bf;
+       unsigned long flags;
+       int padsize;
+
+       ath5k_debug_dump_skb(sc, skb, "TX  ", 1);
+
+       /*
+        * The hardware expects the header padded to 4 byte boundaries.
+        * If this is not the case, we add the padding after the header.
+        */
+       padsize = ath5k_add_padding(skb);
+       if (padsize < 0) {
+               ATH5K_ERR(sc, "tx hdrlen not %%4: not enough"
+                         " headroom to pad");
+               goto drop_packet;
+       }
+
+       if (txq->txq_len >= ATH5K_TXQ_LEN_MAX)
+               ieee80211_stop_queue(hw, txq->qnum);
+
+       spin_lock_irqsave(&sc->txbuflock, flags);
+       if (list_empty(&sc->txbuf)) {
+               ATH5K_ERR(sc, "no further txbuf available, dropping packet\n");
+               spin_unlock_irqrestore(&sc->txbuflock, flags);
+               ieee80211_stop_queues(hw);
+               goto drop_packet;
+       }
+       bf = list_first_entry(&sc->txbuf, struct ath5k_buf, list);
+       list_del(&bf->list);
+       sc->txbuf_len--;
+       if (list_empty(&sc->txbuf))
+               ieee80211_stop_queues(hw);
+       spin_unlock_irqrestore(&sc->txbuflock, flags);
+
+       bf->skb = skb;
+
+       if (ath5k_txbuf_setup(sc, bf, txq, padsize)) {
+               bf->skb = NULL;
+               spin_lock_irqsave(&sc->txbuflock, flags);
+               list_add_tail(&bf->list, &sc->txbuf);
+               sc->txbuf_len++;
+               spin_unlock_irqrestore(&sc->txbuflock, flags);
+               goto drop_packet;
+       }
+       return NETDEV_TX_OK;
+
+drop_packet:
+       dev_kfree_skb_any(skb);
+       return NETDEV_TX_OK;
+}
+
+static void
+ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb,
+                        struct ath5k_tx_status *ts)
+{
+       struct ieee80211_tx_info *info;
+       int i;
+
+       sc->stats.tx_all_count++;
+       info = IEEE80211_SKB_CB(skb);
+
+       ieee80211_tx_info_clear_status(info);
+       for (i = 0; i < 4; i++) {
+               struct ieee80211_tx_rate *r =
+                       &info->status.rates[i];
+
+               if (ts->ts_rate[i]) {
+                       r->idx = ath5k_hw_to_driver_rix(sc, ts->ts_rate[i]);
+                       r->count = ts->ts_retry[i];
+               } else {
+                       r->idx = -1;
+                       r->count = 0;
+               }
+       }
+
+       /* count the successful attempt as well */
+       info->status.rates[ts->ts_final_idx].count++;
+
+       if (unlikely(ts->ts_status)) {
+               sc->stats.ack_fail++;
+               if (ts->ts_status & AR5K_TXERR_FILT) {
+                       info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
+                       sc->stats.txerr_filt++;
+               }
+               if (ts->ts_status & AR5K_TXERR_XRETRY)
+                       sc->stats.txerr_retry++;
+               if (ts->ts_status & AR5K_TXERR_FIFO)
+                       sc->stats.txerr_fifo++;
+       } else {
+               info->flags |= IEEE80211_TX_STAT_ACK;
+               info->status.ack_signal = ts->ts_rssi;
+       }
+
+       /*
+       * Remove MAC header padding before giving the frame
+       * back to mac80211.
+       */
+       ath5k_remove_padding(skb);
+
+       if (ts->ts_antenna > 0 && ts->ts_antenna < 5)
+               sc->stats.antenna_tx[ts->ts_antenna]++;
+       else
+               sc->stats.antenna_tx[0]++; /* invalid */
+
+       ieee80211_tx_status(sc->hw, skb);
+}
+
 static void
 ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
 {
@@ -2130,96 +1590,51 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
        struct ath5k_buf *bf, *bf0;
        struct ath5k_desc *ds;
        struct sk_buff *skb;
-       struct ieee80211_tx_info *info;
-       int i, ret;
+       int ret;
 
        spin_lock(&txq->lock);
        list_for_each_entry_safe(bf, bf0, &txq->q, list) {
-               ds = bf->desc;
-
-               /*
-                * It's possible that the hardware can say the buffer is
-                * completed when it hasn't yet loaded the ds_link from
-                * host memory and moved on.  If there are more TX
-                * descriptors in the queue, wait for TXDP to change
-                * before processing this one.
-                */
-               if (ath5k_hw_get_txdp(sc->ah, txq->qnum) == bf->daddr &&
-                   !list_is_last(&bf->list, &txq->q))
-                       break;
-
-               ret = sc->ah->ah_proc_tx_desc(sc->ah, ds, &ts);
-               if (unlikely(ret == -EINPROGRESS))
-                       break;
-               else if (unlikely(ret)) {
-                       ATH5K_ERR(sc, "error %d while processing queue %u\n",
-                               ret, txq->qnum);
-                       break;
-               }
 
-               sc->stats.tx_all_count++;
-               skb = bf->skb;
-               info = IEEE80211_SKB_CB(skb);
-               bf->skb = NULL;
+               txq->txq_poll_mark = false;
 
-               pci_unmap_single(sc->pdev, bf->skbaddr, skb->len,
-                               PCI_DMA_TODEVICE);
+               /* skb might already have been processed last time. */
+               if (bf->skb != NULL) {
+                       ds = bf->desc;
 
-               ieee80211_tx_info_clear_status(info);
-               for (i = 0; i < 4; i++) {
-                       struct ieee80211_tx_rate *r =
-                               &info->status.rates[i];
-
-                       if (ts.ts_rate[i]) {
-                               r->idx = ath5k_hw_to_driver_rix(sc, ts.ts_rate[i]);
-                               r->count = ts.ts_retry[i];
-                       } else {
-                               r->idx = -1;
-                               r->count = 0;
+                       ret = sc->ah->ah_proc_tx_desc(sc->ah, ds, &ts);
+                       if (unlikely(ret == -EINPROGRESS))
+                               break;
+                       else if (unlikely(ret)) {
+                               ATH5K_ERR(sc,
+                                       "error %d while processing "
+                                       "queue %u\n", ret, txq->qnum);
+                               break;
                        }
-               }
 
-               /* count the successful attempt as well */
-               info->status.rates[ts.ts_final_idx].count++;
-
-               if (unlikely(ts.ts_status)) {
-                       sc->stats.ack_fail++;
-                       if (ts.ts_status & AR5K_TXERR_FILT) {
-                               info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
-                               sc->stats.txerr_filt++;
-                       }
-                       if (ts.ts_status & AR5K_TXERR_XRETRY)
-                               sc->stats.txerr_retry++;
-                       if (ts.ts_status & AR5K_TXERR_FIFO)
-                               sc->stats.txerr_fifo++;
-               } else {
-                       info->flags |= IEEE80211_TX_STAT_ACK;
-                       info->status.ack_signal = ts.ts_rssi;
+                       skb = bf->skb;
+                       bf->skb = NULL;
+                       pci_unmap_single(sc->pdev, bf->skbaddr, skb->len,
+                                       PCI_DMA_TODEVICE);
+                       ath5k_tx_frame_completed(sc, skb, &ts);
                }
 
                /*
-                * Remove MAC header padding before giving the frame
-                * back to mac80211.
+                * It's possible that the hardware can say the buffer is
+                * completed when it hasn't yet loaded the ds_link from
+                * host memory and moved on.
+                * Always keep the last descriptor to avoid HW races...
                 */
-               ath5k_remove_padding(skb);
-
-               if (ts.ts_antenna > 0 && ts.ts_antenna < 5)
-                       sc->stats.antenna_tx[ts.ts_antenna]++;
-               else
-                       sc->stats.antenna_tx[0]++; /* invalid */
-
-               ieee80211_tx_status(sc->hw, skb);
-
-               spin_lock(&sc->txbuflock);
-               list_move_tail(&bf->list, &sc->txbuf);
-               sc->txbuf_len++;
-               spin_unlock(&sc->txbuflock);
+               if (ath5k_hw_get_txdp(sc->ah, txq->qnum) != bf->daddr) {
+                       spin_lock(&sc->txbuflock);
+                       list_move_tail(&bf->list, &sc->txbuf);
+                       sc->txbuf_len++;
+                       txq->txq_len--;
+                       spin_unlock(&sc->txbuflock);
+               }
        }
-       if (likely(list_empty(&txq->q)))
-               txq->link = NULL;
        spin_unlock(&txq->lock);
-       if (sc->txbuf_len > ATH_TXBUF / 5)
-               ieee80211_wake_queues(sc->hw);
+       if (txq->txq_len < ATH5K_TXQ_LEN_LOW)
+               ieee80211_wake_queue(sc->hw, txq->qnum);
 }
 
 static void
@@ -2285,10 +1700,11 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
         * default antenna which is supposed to be an omni.
         *
         * Note2: On sectored scenarios it's possible to have
-        * multiple antennas (1omni -the default- and 14 sectors)
-        * so if we choose to actually support this mode we need
-        * to allow user to set how many antennas we have and tweak
-        * the code below to send beacons on all of them.
+        * multiple antennas (1 omni -- the default -- and 14
+        * sectors), so if we choose to actually support this
+        * mode, we need to allow the user to set how many antennas
+        * we have and tweak the code below to send beacons
+        * on all of them.
         */
        if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP)
                antenna = sc->bsent & 4 ? 2 : 1;
@@ -2314,6 +1730,43 @@ err_unmap:
 }
 
 /*
+ * Updates the beacon that is sent by ath5k_beacon_send.  For adhoc,
+ * this is called only once at config_bss time, for AP we do it every
+ * SWBA interrupt so that the TIM will reflect buffered frames.
+ *
+ * Called with the beacon lock.
+ */
+static int
+ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
+{
+       int ret;
+       struct ath5k_softc *sc = hw->priv;
+       struct sk_buff *skb;
+
+       if (WARN_ON(!vif)) {
+               ret = -EINVAL;
+               goto out;
+       }
+
+       skb = ieee80211_beacon_get(hw, vif);
+
+       if (!skb) {
+               ret = -ENOMEM;
+               goto out;
+       }
+
+       ath5k_debug_dump_skb(sc, skb, "BC  ", 1);
+
+       ath5k_txbuf_free_skb(sc, sc->bbuf);
+       sc->bbuf->skb = skb;
+       ret = ath5k_beacon_setup(sc, sc->bbuf);
+       if (ret)
+               sc->bbuf->skb = NULL;
+out:
+       return ret;
+}
+
+/*
  * Transmit a beacon frame at SWBA.  Dynamic updates to the
  * frame contents are done as needed and the slot time is
  * also adjusted based on current state.
@@ -2330,14 +1783,13 @@ ath5k_beacon_send(struct ath5k_softc *sc)
 
        ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, "in beacon_send\n");
 
-       if (unlikely(bf->skb == NULL || sc->opmode == NL80211_IFTYPE_STATION ||
-                       sc->opmode == NL80211_IFTYPE_MONITOR)) {
+       if (unlikely(bf->skb == NULL || sc->opmode == NL80211_IFTYPE_STATION)) {
                ATH5K_WARN(sc, "bf=%p bf_skb=%p\n", bf, bf ? bf->skb : NULL);
                return;
        }
        /*
         * Check if the previous beacon has gone out.  If
-        * not don't don't try to post another, skip this
+        * not, don't don't try to post another: skip this
         * period and wait for the next.  Missed beacons
         * indicate a problem and should not occur.  If we
         * miss too many consecutive beacons reset the device.
@@ -2391,7 +1843,6 @@ ath5k_beacon_send(struct ath5k_softc *sc)
        sc->bsent++;
 }
 
-
 /**
  * ath5k_beacon_update_timers - update beacon timers
  *
@@ -2493,7 +1944,6 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
                intval & AR5K_BEACON_RESET_TSF ? "AR5K_BEACON_RESET_TSF" : "");
 }
 
-
 /**
  * ath5k_beacon_config - Configure the beacon queues and interrupts
  *
@@ -2572,155 +2022,6 @@ static void ath5k_tasklet_beacon(unsigned long data)
 * Interrupt handling *
 \********************/
 
-static int
-ath5k_init(struct ath5k_softc *sc)
-{
-       struct ath5k_hw *ah = sc->ah;
-       int ret, i;
-
-       mutex_lock(&sc->lock);
-
-       ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "mode %d\n", sc->opmode);
-
-       /*
-        * Stop anything previously setup.  This is safe
-        * no matter this is the first time through or not.
-        */
-       ath5k_stop_locked(sc);
-
-       /*
-        * The basic interface to setting the hardware in a good
-        * state is ``reset''.  On return the hardware is known to
-        * be powered up and with interrupts disabled.  This must
-        * be followed by initialization of the appropriate bits
-        * and then setup of the interrupt mask.
-        */
-       sc->curchan = sc->hw->conf.channel;
-       sc->curband = &sc->sbands[sc->curchan->band];
-       sc->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL |
-               AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL |
-               AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB;
-
-       ret = ath5k_reset(sc, NULL);
-       if (ret)
-               goto done;
-
-       ath5k_rfkill_hw_start(ah);
-
-       /*
-        * Reset the key cache since some parts do not reset the
-        * contents on initial power up or resume from suspend.
-        */
-       for (i = 0; i < AR5K_KEYTABLE_SIZE; i++)
-               ath5k_hw_reset_key(ah, i);
-
-       ath5k_hw_set_ack_bitrate_high(ah, true);
-       ret = 0;
-done:
-       mmiowb();
-       mutex_unlock(&sc->lock);
-       return ret;
-}
-
-static int
-ath5k_stop_locked(struct ath5k_softc *sc)
-{
-       struct ath5k_hw *ah = sc->ah;
-
-       ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "invalid %u\n",
-                       test_bit(ATH_STAT_INVALID, sc->status));
-
-       /*
-        * Shutdown the hardware and driver:
-        *    stop output from above
-        *    disable interrupts
-        *    turn off timers
-        *    turn off the radio
-        *    clear transmit machinery
-        *    clear receive machinery
-        *    drain and release tx queues
-        *    reclaim beacon resources
-        *    power down hardware
-        *
-        * Note that some of this work is not possible if the
-        * hardware is gone (invalid).
-        */
-       ieee80211_stop_queues(sc->hw);
-
-       if (!test_bit(ATH_STAT_INVALID, sc->status)) {
-               ath5k_led_off(sc);
-               ath5k_hw_set_imr(ah, 0);
-               synchronize_irq(sc->pdev->irq);
-       }
-       ath5k_txq_cleanup(sc);
-       if (!test_bit(ATH_STAT_INVALID, sc->status)) {
-               ath5k_rx_stop(sc);
-               ath5k_hw_phy_disable(ah);
-       }
-
-       return 0;
-}
-
-static void stop_tasklets(struct ath5k_softc *sc)
-{
-       tasklet_kill(&sc->rxtq);
-       tasklet_kill(&sc->txtq);
-       tasklet_kill(&sc->calib);
-       tasklet_kill(&sc->beacontq);
-       tasklet_kill(&sc->ani_tasklet);
-}
-
-/*
- * Stop the device, grabbing the top-level lock to protect
- * against concurrent entry through ath5k_init (which can happen
- * if another thread does a system call and the thread doing the
- * stop is preempted).
- */
-static int
-ath5k_stop_hw(struct ath5k_softc *sc)
-{
-       int ret;
-
-       mutex_lock(&sc->lock);
-       ret = ath5k_stop_locked(sc);
-       if (ret == 0 && !test_bit(ATH_STAT_INVALID, sc->status)) {
-               /*
-                * Don't set the card in full sleep mode!
-                *
-                * a) When the device is in this state it must be carefully
-                * woken up or references to registers in the PCI clock
-                * domain may freeze the bus (and system).  This varies
-                * by chip and is mostly an issue with newer parts
-                * (madwifi sources mentioned srev >= 0x78) that go to
-                * sleep more quickly.
-                *
-                * b) On older chips full sleep results a weird behaviour
-                * during wakeup. I tested various cards with srev < 0x78
-                * and they don't wake up after module reload, a second
-                * module reload is needed to bring the card up again.
-                *
-                * Until we figure out what's going on don't enable
-                * full chip reset on any chip (this is what Legacy HAL
-                * and Sam's HAL do anyway). Instead Perform a full reset
-                * on the device (same as initial state after attach) and
-                * leave it idle (keep MAC/BB on warm reset) */
-               ret = ath5k_hw_on_hold(sc->ah);
-
-               ATH5K_DBG(sc, ATH5K_DEBUG_RESET,
-                               "putting device to sleep\n");
-       }
-       ath5k_txbuf_free_skb(sc, sc->bbuf);
-
-       mmiowb();
-       mutex_unlock(&sc->lock);
-
-       stop_tasklets(sc);
-
-       ath5k_rfkill_hw_stop(sc->ah);
-
-       return ret;
-}
-
 static void
 ath5k_intr_calibration_poll(struct ath5k_hw *ah)
 {
@@ -2857,14 +2158,13 @@ ath5k_tasklet_calibrate(unsigned long data)
                                sc->curchan->center_freq));
 
        /* Noise floor calibration interrupts rx/tx path while I/Q calibration
-        * doesn't. We stop the queues so that calibration doesn't interfere
-        * with TX and don't run it as often */
+        * doesn't.
+        * TODO: We should stop TX here, so that it doesn't interfere.
+        * Note that stopping the queues is not enough to stop TX! */
        if (time_is_before_eq_jiffies(ah->ah_cal_next_nf)) {
                ah->ah_cal_next_nf = jiffies +
                        msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_NF);
-               ieee80211_stop_queues(sc->hw);
                ath5k_hw_update_noise_floor(ah);
-               ieee80211_wake_queues(sc->hw);
        }
 
        ah->ah_cal_mask &= ~AR5K_CALIBRATION_FULL;
@@ -2883,71 +2183,205 @@ ath5k_tasklet_ani(unsigned long data)
 }
 
 
-/********************\
-* Mac80211 functions *
-\********************/
+static void
+ath5k_tx_complete_poll_work(struct work_struct *work)
+{
+       struct ath5k_softc *sc = container_of(work, struct ath5k_softc,
+                       tx_complete_work.work);
+       struct ath5k_txq *txq;
+       int i;
+       bool needreset = false;
+
+       for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) {
+               if (sc->txqs[i].setup) {
+                       txq = &sc->txqs[i];
+                       spin_lock_bh(&txq->lock);
+                       if (txq->txq_len > 1) {
+                               if (txq->txq_poll_mark) {
+                                       ATH5K_DBG(sc, ATH5K_DEBUG_XMIT,
+                                                 "TX queue stuck %d\n",
+                                                 txq->qnum);
+                                       needreset = true;
+                                       txq->txq_stuck++;
+                                       spin_unlock_bh(&txq->lock);
+                                       break;
+                               } else {
+                                       txq->txq_poll_mark = true;
+                               }
+                       }
+                       spin_unlock_bh(&txq->lock);
+               }
+       }
+
+       if (needreset) {
+               ATH5K_DBG(sc, ATH5K_DEBUG_RESET,
+                         "TX queues stuck, resetting\n");
+               ath5k_reset(sc, sc->curchan);
+       }
+
+       ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
+               msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
+}
+
+
+/*************************\
+* Initialization routines *
+\*************************/
 
 static int
-ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+ath5k_stop_locked(struct ath5k_softc *sc)
 {
-       struct ath5k_softc *sc = hw->priv;
+       struct ath5k_hw *ah = sc->ah;
 
-       return ath5k_tx_queue(hw, skb, sc->txq);
+       ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "invalid %u\n",
+                       test_bit(ATH_STAT_INVALID, sc->status));
+
+       /*
+        * Shutdown the hardware and driver:
+        *    stop output from above
+        *    disable interrupts
+        *    turn off timers
+        *    turn off the radio
+        *    clear transmit machinery
+        *    clear receive machinery
+        *    drain and release tx queues
+        *    reclaim beacon resources
+        *    power down hardware
+        *
+        * Note that some of this work is not possible if the
+        * hardware is gone (invalid).
+        */
+       ieee80211_stop_queues(sc->hw);
+
+       if (!test_bit(ATH_STAT_INVALID, sc->status)) {
+               ath5k_led_off(sc);
+               ath5k_hw_set_imr(ah, 0);
+               synchronize_irq(sc->pdev->irq);
+       }
+       ath5k_txq_cleanup(sc);
+       if (!test_bit(ATH_STAT_INVALID, sc->status)) {
+               ath5k_rx_stop(sc);
+               ath5k_hw_phy_disable(ah);
+       }
+
+       return 0;
 }
 
-static int ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
-                         struct ath5k_txq *txq)
+static int
+ath5k_init(struct ath5k_softc *sc)
 {
-       struct ath5k_softc *sc = hw->priv;
-       struct ath5k_buf *bf;
-       unsigned long flags;
-       int padsize;
+       struct ath5k_hw *ah = sc->ah;
+       struct ath_common *common = ath5k_hw_common(ah);
+       int ret, i;
 
-       ath5k_debug_dump_skb(sc, skb, "TX  ", 1);
+       mutex_lock(&sc->lock);
 
-       if (sc->opmode == NL80211_IFTYPE_MONITOR)
-               ATH5K_DBG(sc, ATH5K_DEBUG_XMIT, "tx in monitor (scan?)\n");
+       ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "mode %d\n", sc->opmode);
 
        /*
-        * the hardware expects the header padded to 4 byte boundaries
-        * if this is not the case we add the padding after the header
+        * Stop anything previously setup.  This is safe
+        * no matter this is the first time through or not.
         */
-       padsize = ath5k_add_padding(skb);
-       if (padsize < 0) {
-               ATH5K_ERR(sc, "tx hdrlen not %%4: not enough"
-                         " headroom to pad");
-               goto drop_packet;
-       }
+       ath5k_stop_locked(sc);
 
-       spin_lock_irqsave(&sc->txbuflock, flags);
-       if (list_empty(&sc->txbuf)) {
-               ATH5K_ERR(sc, "no further txbuf available, dropping packet\n");
-               spin_unlock_irqrestore(&sc->txbuflock, flags);
-               ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
-               goto drop_packet;
-       }
-       bf = list_first_entry(&sc->txbuf, struct ath5k_buf, list);
-       list_del(&bf->list);
-       sc->txbuf_len--;
-       if (list_empty(&sc->txbuf))
-               ieee80211_stop_queues(hw);
-       spin_unlock_irqrestore(&sc->txbuflock, flags);
+       /*
+        * The basic interface to setting the hardware in a good
+        * state is ``reset''.  On return the hardware is known to
+        * be powered up and with interrupts disabled.  This must
+        * be followed by initialization of the appropriate bits
+        * and then setup of the interrupt mask.
+        */
+       sc->curchan = sc->hw->conf.channel;
+       sc->curband = &sc->sbands[sc->curchan->band];
+       sc->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL |
+               AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL |
+               AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB;
 
-       bf->skb = skb;
+       ret = ath5k_reset(sc, NULL);
+       if (ret)
+               goto done;
 
-       if (ath5k_txbuf_setup(sc, bf, txq, padsize)) {
-               bf->skb = NULL;
-               spin_lock_irqsave(&sc->txbuflock, flags);
-               list_add_tail(&bf->list, &sc->txbuf);
-               sc->txbuf_len++;
-               spin_unlock_irqrestore(&sc->txbuflock, flags);
-               goto drop_packet;
+       ath5k_rfkill_hw_start(ah);
+
+       /*
+        * Reset the key cache since some parts do not reset the
+        * contents on initial power up or resume from suspend.
+        */
+       for (i = 0; i < common->keymax; i++)
+               ath_hw_keyreset(common, (u16) i);
+
+       ath5k_hw_set_ack_bitrate_high(ah, true);
+       ret = 0;
+done:
+       mmiowb();
+       mutex_unlock(&sc->lock);
+
+       ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
+                       msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
+
+       return ret;
+}
+
+static void stop_tasklets(struct ath5k_softc *sc)
+{
+       tasklet_kill(&sc->rxtq);
+       tasklet_kill(&sc->txtq);
+       tasklet_kill(&sc->calib);
+       tasklet_kill(&sc->beacontq);
+       tasklet_kill(&sc->ani_tasklet);
+}
+
+/*
+ * Stop the device, grabbing the top-level lock to protect
+ * against concurrent entry through ath5k_init (which can happen
+ * if another thread does a system call and the thread doing the
+ * stop is preempted).
+ */
+static int
+ath5k_stop_hw(struct ath5k_softc *sc)
+{
+       int ret;
+
+       mutex_lock(&sc->lock);
+       ret = ath5k_stop_locked(sc);
+       if (ret == 0 && !test_bit(ATH_STAT_INVALID, sc->status)) {
+               /*
+                * Don't set the card in full sleep mode!
+                *
+                * a) When the device is in this state it must be carefully
+                * woken up or references to registers in the PCI clock
+                * domain may freeze the bus (and system).  This varies
+                * by chip and is mostly an issue with newer parts
+                * (madwifi sources mentioned srev >= 0x78) that go to
+                * sleep more quickly.
+                *
+                * b) On older chips full sleep results a weird behaviour
+                * during wakeup. I tested various cards with srev < 0x78
+                * and they don't wake up after module reload, a second
+                * module reload is needed to bring the card up again.
+                *
+                * Until we figure out what's going on don't enable
+                * full chip reset on any chip (this is what Legacy HAL
+                * and Sam's HAL do anyway). Instead Perform a full reset
+                * on the device (same as initial state after attach) and
+                * leave it idle (keep MAC/BB on warm reset) */
+               ret = ath5k_hw_on_hold(sc->ah);
+
+               ATH5K_DBG(sc, ATH5K_DEBUG_RESET,
+                               "putting device to sleep\n");
        }
-       return NETDEV_TX_OK;
+       ath5k_txbuf_free_skb(sc, sc->bbuf);
 
-drop_packet:
-       dev_kfree_skb_any(skb);
-       return NETDEV_TX_OK;
+       mmiowb();
+       mutex_unlock(&sc->lock);
+
+       stop_tasklets(sc);
+
+       cancel_delayed_work_sync(&sc->tx_complete_work);
+
+       ath5k_rfkill_hw_stop(sc->ah);
+
+       return ret;
 }
 
 /*
@@ -3024,6 +2458,208 @@ static void ath5k_reset_work(struct work_struct *work)
        mutex_unlock(&sc->lock);
 }
 
+static int
+ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
+{
+       struct ath5k_softc *sc = hw->priv;
+       struct ath5k_hw *ah = sc->ah;
+       struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
+       struct ath5k_txq *txq;
+       u8 mac[ETH_ALEN] = {};
+       int ret;
+
+       ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "devid 0x%x\n", pdev->device);
+
+       /*
+        * Check if the MAC has multi-rate retry support.
+        * We do this by trying to setup a fake extended
+        * descriptor.  MACs that don't have support will
+        * return false w/o doing anything.  MACs that do
+        * support it will return true w/o doing anything.
+        */
+       ret = ath5k_hw_setup_mrr_tx_desc(ah, NULL, 0, 0, 0, 0, 0, 0);
+
+       if (ret < 0)
+               goto err;
+       if (ret > 0)
+               __set_bit(ATH_STAT_MRRETRY, sc->status);
+
+       /*
+        * Collect the channel list.  The 802.11 layer
+        * is resposible for filtering this list based
+        * on settings like the phy mode and regulatory
+        * domain restrictions.
+        */
+       ret = ath5k_setup_bands(hw);
+       if (ret) {
+               ATH5K_ERR(sc, "can't get channels\n");
+               goto err;
+       }
+
+       /* NB: setup here so ath5k_rate_update is happy */
+       if (test_bit(AR5K_MODE_11A, ah->ah_modes))
+               ath5k_setcurmode(sc, AR5K_MODE_11A);
+       else
+               ath5k_setcurmode(sc, AR5K_MODE_11B);
+
+       /*
+        * Allocate tx+rx descriptors and populate the lists.
+        */
+       ret = ath5k_desc_alloc(sc, pdev);
+       if (ret) {
+               ATH5K_ERR(sc, "can't allocate descriptors\n");
+               goto err;
+       }
+
+       /*
+        * Allocate hardware transmit queues: one queue for
+        * beacon frames and one data queue for each QoS
+        * priority.  Note that hw functions handle resetting
+        * these queues at the needed time.
+        */
+       ret = ath5k_beaconq_setup(ah);
+       if (ret < 0) {
+               ATH5K_ERR(sc, "can't setup a beacon xmit queue\n");
+               goto err_desc;
+       }
+       sc->bhalq = ret;
+       sc->cabq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_CAB, 0);
+       if (IS_ERR(sc->cabq)) {
+               ATH5K_ERR(sc, "can't setup cab queue\n");
+               ret = PTR_ERR(sc->cabq);
+               goto err_bhal;
+       }
+
+       /* This order matches mac80211's queue priority, so we can
+        * directly use the mac80211 queue number without any mapping */
+       txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VO);
+       if (IS_ERR(txq)) {
+               ATH5K_ERR(sc, "can't setup xmit queue\n");
+               ret = PTR_ERR(txq);
+               goto err_queues;
+       }
+       txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VI);
+       if (IS_ERR(txq)) {
+               ATH5K_ERR(sc, "can't setup xmit queue\n");
+               ret = PTR_ERR(txq);
+               goto err_queues;
+       }
+       txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE);
+       if (IS_ERR(txq)) {
+               ATH5K_ERR(sc, "can't setup xmit queue\n");
+               ret = PTR_ERR(txq);
+               goto err_queues;
+       }
+       txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK);
+       if (IS_ERR(txq)) {
+               ATH5K_ERR(sc, "can't setup xmit queue\n");
+               ret = PTR_ERR(txq);
+               goto err_queues;
+       }
+       hw->queues = 4;
+
+       tasklet_init(&sc->rxtq, ath5k_tasklet_rx, (unsigned long)sc);
+       tasklet_init(&sc->txtq, ath5k_tasklet_tx, (unsigned long)sc);
+       tasklet_init(&sc->calib, ath5k_tasklet_calibrate, (unsigned long)sc);
+       tasklet_init(&sc->beacontq, ath5k_tasklet_beacon, (unsigned long)sc);
+       tasklet_init(&sc->ani_tasklet, ath5k_tasklet_ani, (unsigned long)sc);
+
+       INIT_WORK(&sc->reset_work, ath5k_reset_work);
+       INIT_DELAYED_WORK(&sc->tx_complete_work, ath5k_tx_complete_poll_work);
+
+       ret = ath5k_eeprom_read_mac(ah, mac);
+       if (ret) {
+               ATH5K_ERR(sc, "unable to read address from EEPROM: 0x%04x\n",
+                       sc->pdev->device);
+               goto err_queues;
+       }
+
+       SET_IEEE80211_PERM_ADDR(hw, mac);
+       /* All MAC address bits matter for ACKs */
+       memcpy(sc->bssidmask, ath_bcast_mac, ETH_ALEN);
+       ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask);
+
+       regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain;
+       ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier);
+       if (ret) {
+               ATH5K_ERR(sc, "can't initialize regulatory system\n");
+               goto err_queues;
+       }
+
+       ret = ieee80211_register_hw(hw);
+       if (ret) {
+               ATH5K_ERR(sc, "can't register ieee80211 hw\n");
+               goto err_queues;
+       }
+
+       if (!ath_is_world_regd(regulatory))
+               regulatory_hint(hw->wiphy, regulatory->alpha2);
+
+       ath5k_init_leds(sc);
+
+       ath5k_sysfs_register(sc);
+
+       return 0;
+err_queues:
+       ath5k_txq_release(sc);
+err_bhal:
+       ath5k_hw_release_tx_queue(ah, sc->bhalq);
+err_desc:
+       ath5k_desc_free(sc, pdev);
+err:
+       return ret;
+}
+
+static void
+ath5k_detach(struct pci_dev *pdev, struct ieee80211_hw *hw)
+{
+       struct ath5k_softc *sc = hw->priv;
+
+       /*
+        * NB: the order of these is important:
+        * o call the 802.11 layer before detaching ath5k_hw to
+        *   ensure callbacks into the driver to delete global
+        *   key cache entries can be handled
+        * o reclaim the tx queue data structures after calling
+        *   the 802.11 layer as we'll get called back to reclaim
+        *   node state and potentially want to use them
+        * o to cleanup the tx queues the hal is called, so detach
+        *   it last
+        * XXX: ??? detach ath5k_hw ???
+        * Other than that, it's straightforward...
+        */
+       ieee80211_unregister_hw(hw);
+       ath5k_desc_free(sc, pdev);
+       ath5k_txq_release(sc);
+       ath5k_hw_release_tx_queue(sc->ah, sc->bhalq);
+       ath5k_unregister_leds(sc);
+
+       ath5k_sysfs_unregister(sc);
+       /*
+        * NB: can't reclaim these until after ieee80211_ifdetach
+        * returns because we'll get called back to reclaim node
+        * state and potentially want to use them.
+        */
+}
+
+/********************\
+* Mac80211 functions *
+\********************/
+
+static int
+ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+       struct ath5k_softc *sc = hw->priv;
+       u16 qnum = skb_get_queue_mapping(skb);
+
+       if (WARN_ON(qnum >= sc->ah->ah_capabilities.cap_queues.q_tx_num)) {
+               dev_kfree_skb_any(skb);
+               return 0;
+       }
+
+       return ath5k_tx_queue(hw, skb, &sc->txqs[qnum]);
+}
+
 static int ath5k_start(struct ieee80211_hw *hw)
 {
        return ath5k_init(hw->priv);
@@ -3053,7 +2689,6 @@ static int ath5k_add_interface(struct ieee80211_hw *hw,
        case NL80211_IFTYPE_STATION:
        case NL80211_IFTYPE_ADHOC:
        case NL80211_IFTYPE_MESH_POINT:
-       case NL80211_IFTYPE_MONITOR:
                sc->opmode = vif->type;
                break;
        default:
@@ -3237,9 +2872,9 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw,
                rfilt |= AR5K_RX_FILTER_PHYERR;
 
        /* FIF_BCN_PRBRESP_PROMISC really means to enable beacons
-       * and probes for any BSSID, this needs testing */
+       * and probes for any BSSID */
        if (*new_flags & FIF_BCN_PRBRESP_PROMISC)
-               rfilt |= AR5K_RX_FILTER_BEACON | AR5K_RX_FILTER_PROBEREQ;
+               rfilt |= AR5K_RX_FILTER_BEACON;
 
        /* FIF_CONTROL doc says that if FIF_PROMISC_IN_BSS is not
         * set we should only pass on control frames for this
@@ -3255,7 +2890,6 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw,
 
        switch (sc->opmode) {
        case NL80211_IFTYPE_MESH_POINT:
-       case NL80211_IFTYPE_MONITOR:
                rfilt |= AR5K_RX_FILTER_CONTROL |
                         AR5K_RX_FILTER_BEACON |
                         AR5K_RX_FILTER_PROBEREQ |
@@ -3278,7 +2912,7 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw,
 
        /* Set multicast bits */
        ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]);
-       /* Set the cached hw filter flags, this will alter actually
+       /* Set the cached hw filter flags, this will later actually
         * be set in HW */
        sc->filter_flags = rfilt;
 
@@ -3298,17 +2932,14 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
        if (modparam_nohwcrypt)
                return -EOPNOTSUPP;
 
-       if (sc->opmode == NL80211_IFTYPE_AP)
-               return -EOPNOTSUPP;
-
-       switch (key->alg) {
-       case ALG_WEP:
-       case ALG_TKIP:
+       switch (key->cipher) {
+       case WLAN_CIPHER_SUITE_WEP40:
+       case WLAN_CIPHER_SUITE_WEP104:
+       case WLAN_CIPHER_SUITE_TKIP:
                break;
-       case ALG_CCMP:
-               if (sc->ah->ah_aes_support)
+       case WLAN_CIPHER_SUITE_CCMP:
+               if (common->crypt_caps & ATH_CRYPT_CAP_CIPHER_AESCCM)
                        break;
-
                return -EOPNOTSUPP;
        default:
                WARN_ON(1);
@@ -3319,27 +2950,25 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
 
        switch (cmd) {
        case SET_KEY:
-               ret = ath5k_hw_set_key(sc->ah, key->keyidx, key,
-                                      sta ? sta->addr : NULL);
-               if (ret) {
-                       ATH5K_ERR(sc, "can't set the key\n");
-                       goto unlock;
+               ret = ath_key_config(common, vif, sta, key);
+               if (ret >= 0) {
+                       key->hw_key_idx = ret;
+                       /* push IV and Michael MIC generation to stack */
+                       key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
+                       if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
+                               key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
+                       if (key->cipher == WLAN_CIPHER_SUITE_CCMP)
+                               key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
+                       ret = 0;
                }
-               __set_bit(key->keyidx, common->keymap);
-               key->hw_key_idx = key->keyidx;
-               key->flags |= (IEEE80211_KEY_FLAG_GENERATE_IV |
-                              IEEE80211_KEY_FLAG_GENERATE_MMIC);
                break;
        case DISABLE_KEY:
-               ath5k_hw_reset_key(sc->ah, key->keyidx);
-               __clear_bit(key->keyidx, common->keymap);
+               ath_key_delete(common, key);
                break;
        default:
                ret = -EINVAL;
-               goto unlock;
        }
 
-unlock:
        mmiowb();
        mutex_unlock(&sc->lock);
        return ret;
@@ -3409,43 +3038,6 @@ ath5k_reset_tsf(struct ieee80211_hw *hw)
                ath5k_hw_reset_tsf(sc->ah);
 }
 
-/*
- * Updates the beacon that is sent by ath5k_beacon_send.  For adhoc,
- * this is called only once at config_bss time, for AP we do it every
- * SWBA interrupt so that the TIM will reflect buffered frames.
- *
- * Called with the beacon lock.
- */
-static int
-ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
-{
-       int ret;
-       struct ath5k_softc *sc = hw->priv;
-       struct sk_buff *skb;
-
-       if (WARN_ON(!vif)) {
-               ret = -EINVAL;
-               goto out;
-       }
-
-       skb = ieee80211_beacon_get(hw, vif);
-
-       if (!skb) {
-               ret = -ENOMEM;
-               goto out;
-       }
-
-       ath5k_debug_dump_skb(sc, skb, "BC  ", 1);
-
-       ath5k_txbuf_free_skb(sc, sc->bbuf);
-       sc->bbuf->skb = skb;
-       ret = ath5k_beacon_setup(sc, sc->bbuf);
-       if (ret)
-               sc->bbuf->skb = NULL;
-out:
-       return ret;
-}
-
 static void
 set_beacon_filter(struct ieee80211_hw *hw, bool enable)
 {
@@ -3479,7 +3071,7 @@ static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
                /* Cache for later use during resets */
                memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
                common->curaid = 0;
-               ath5k_hw_set_associd(ah);
+               ath5k_hw_set_bssid(ah);
                mmiowb();
        }
 
@@ -3497,7 +3089,7 @@ static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
                                  "Bss Info ASSOC %d, bssid: %pM\n",
                                  bss_conf->aid, common->curbssid);
                        common->curaid = bss_conf->aid;
-                       ath5k_hw_set_associd(ah);
+                       ath5k_hw_set_bssid(ah);
                        /* Once ANI is available you would start it here */
                }
        }
@@ -3551,3 +3143,402 @@ static void ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
        ath5k_hw_set_coverage_class(sc->ah, coverage_class);
        mutex_unlock(&sc->lock);
 }
+
+static int ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
+                        const struct ieee80211_tx_queue_params *params)
+{
+       struct ath5k_softc *sc = hw->priv;
+       struct ath5k_hw *ah = sc->ah;
+       struct ath5k_txq_info qi;
+       int ret = 0;
+
+       if (queue >= ah->ah_capabilities.cap_queues.q_tx_num)
+               return 0;
+
+       mutex_lock(&sc->lock);
+
+       ath5k_hw_get_tx_queueprops(ah, queue, &qi);
+
+       qi.tqi_aifs = params->aifs;
+       qi.tqi_cw_min = params->cw_min;
+       qi.tqi_cw_max = params->cw_max;
+       qi.tqi_burst_time = params->txop;
+
+       ATH5K_DBG(sc, ATH5K_DEBUG_ANY,
+                 "Configure tx [queue %d],  "
+                 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
+                 queue, params->aifs, params->cw_min,
+                 params->cw_max, params->txop);
+
+       if (ath5k_hw_set_tx_queueprops(ah, queue, &qi)) {
+               ATH5K_ERR(sc,
+                         "Unable to update hardware queue %u!\n", queue);
+               ret = -EIO;
+       } else
+               ath5k_hw_reset_tx_queue(ah, queue);
+
+       mutex_unlock(&sc->lock);
+
+       return ret;
+}
+
+static const struct ieee80211_ops ath5k_hw_ops = {
+       .tx             = ath5k_tx,
+       .start          = ath5k_start,
+       .stop           = ath5k_stop,
+       .add_interface  = ath5k_add_interface,
+       .remove_interface = ath5k_remove_interface,
+       .config         = ath5k_config,
+       .prepare_multicast = ath5k_prepare_multicast,
+       .configure_filter = ath5k_configure_filter,
+       .set_key        = ath5k_set_key,
+       .get_stats      = ath5k_get_stats,
+       .get_survey     = ath5k_get_survey,
+       .conf_tx        = ath5k_conf_tx,
+       .get_tsf        = ath5k_get_tsf,
+       .set_tsf        = ath5k_set_tsf,
+       .reset_tsf      = ath5k_reset_tsf,
+       .bss_info_changed = ath5k_bss_info_changed,
+       .sw_scan_start  = ath5k_sw_scan_start,
+       .sw_scan_complete = ath5k_sw_scan_complete,
+       .set_coverage_class = ath5k_set_coverage_class,
+};
+
+/********************\
+* PCI Initialization *
+\********************/
+
+static int __devinit
+ath5k_pci_probe(struct pci_dev *pdev,
+               const struct pci_device_id *id)
+{
+       void __iomem *mem;
+       struct ath5k_softc *sc;
+       struct ath_common *common;
+       struct ieee80211_hw *hw;
+       int ret;
+       u8 csz;
+
+       /*
+        * L0s needs to be disabled on all ath5k cards.
+        *
+        * For distributions shipping with CONFIG_PCIEASPM (this will be enabled
+        * by default in the future in 2.6.36) this will also mean both L1 and
+        * L0s will be disabled when a pre 1.1 PCIe device is detected. We do
+        * know L1 works correctly even for all ath5k pre 1.1 PCIe devices
+        * though but cannot currently undue the effect of a blacklist, for
+        * details you can read pcie_aspm_sanity_check() and see how it adjusts
+        * the device link capability.
+        *
+        * It may be possible in the future to implement some PCI API to allow
+        * drivers to override blacklists for pre 1.1 PCIe but for now it is
+        * best to accept that both L0s and L1 will be disabled completely for
+        * distributions shipping with CONFIG_PCIEASPM rather than having this
+        * issue present. Motivation for adding this new API will be to help
+        * with power consumption for some of these devices.
+        */
+       pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
+
+       ret = pci_enable_device(pdev);
+       if (ret) {
+               dev_err(&pdev->dev, "can't enable device\n");
+               goto err;
+       }
+
+       /* XXX 32-bit addressing only */
+       ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+       if (ret) {
+               dev_err(&pdev->dev, "32-bit DMA not available\n");
+               goto err_dis;
+       }
+
+       /*
+        * Cache line size is used to size and align various
+        * structures used to communicate with the hardware.
+        */
+       pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
+       if (csz == 0) {
+               /*
+                * Linux 2.4.18 (at least) writes the cache line size
+                * register as a 16-bit wide register which is wrong.
+                * We must have this setup properly for rx buffer
+                * DMA to work so force a reasonable value here if it
+                * comes up zero.
+                */
+               csz = L1_CACHE_BYTES >> 2;
+               pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
+       }
+       /*
+        * The default setting of latency timer yields poor results,
+        * set it to the value used by other systems.  It may be worth
+        * tweaking this setting more.
+        */
+       pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
+
+       /* Enable bus mastering */
+       pci_set_master(pdev);
+
+       /*
+        * Disable the RETRY_TIMEOUT register (0x41) to keep
+        * PCI Tx retries from interfering with C3 CPU state.
+        */
+       pci_write_config_byte(pdev, 0x41, 0);
+
+       ret = pci_request_region(pdev, 0, "ath5k");
+       if (ret) {
+               dev_err(&pdev->dev, "cannot reserve PCI memory region\n");
+               goto err_dis;
+       }
+
+       mem = pci_iomap(pdev, 0, 0);
+       if (!mem) {
+               dev_err(&pdev->dev, "cannot remap PCI memory region\n") ;
+               ret = -EIO;
+               goto err_reg;
+       }
+
+       /*
+        * Allocate hw (mac80211 main struct)
+        * and hw->priv (driver private data)
+        */
+       hw = ieee80211_alloc_hw(sizeof(*sc), &ath5k_hw_ops);
+       if (hw == NULL) {
+               dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n");
+               ret = -ENOMEM;
+               goto err_map;
+       }
+
+       dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy));
+
+       /* Initialize driver private data */
+       SET_IEEE80211_DEV(hw, &pdev->dev);
+       hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
+                   IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
+                   IEEE80211_HW_SIGNAL_DBM;
+
+       hw->wiphy->interface_modes =
+               BIT(NL80211_IFTYPE_AP) |
+               BIT(NL80211_IFTYPE_STATION) |
+               BIT(NL80211_IFTYPE_ADHOC) |
+               BIT(NL80211_IFTYPE_MESH_POINT);
+
+       hw->extra_tx_headroom = 2;
+       hw->channel_change_time = 5000;
+       sc = hw->priv;
+       sc->hw = hw;
+       sc->pdev = pdev;
+
+       ath5k_debug_init_device(sc);
+
+       /*
+        * Mark the device as detached to avoid processing
+        * interrupts until setup is complete.
+        */
+       __set_bit(ATH_STAT_INVALID, sc->status);
+
+       sc->iobase = mem; /* So we can unmap it on detach */
+       sc->opmode = NL80211_IFTYPE_STATION;
+       sc->bintval = 1000;
+       mutex_init(&sc->lock);
+       spin_lock_init(&sc->rxbuflock);
+       spin_lock_init(&sc->txbuflock);
+       spin_lock_init(&sc->block);
+
+       /* Set private data */
+       pci_set_drvdata(pdev, sc);
+
+       /* Setup interrupt handler */
+       ret = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc);
+       if (ret) {
+               ATH5K_ERR(sc, "request_irq failed\n");
+               goto err_free;
+       }
+
+       /* If we passed the test, malloc an ath5k_hw struct */
+       sc->ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
+       if (!sc->ah) {
+               ret = -ENOMEM;
+               ATH5K_ERR(sc, "out of memory\n");
+               goto err_irq;
+       }
+
+       sc->ah->ah_sc = sc;
+       sc->ah->ah_iobase = sc->iobase;
+       common = ath5k_hw_common(sc->ah);
+       common->ops = &ath5k_common_ops;
+       common->ah = sc->ah;
+       common->hw = hw;
+       common->cachelsz = csz << 2; /* convert to bytes */
+
+       /* Initialize device */
+       ret = ath5k_hw_attach(sc);
+       if (ret) {
+               goto err_free_ah;
+       }
+
+       /* set up multi-rate retry capabilities */
+       if (sc->ah->ah_version == AR5K_AR5212) {
+               hw->max_rates = 4;
+               hw->max_rate_tries = 11;
+       }
+
+       /* Finish private driver data initialization */
+       ret = ath5k_attach(pdev, hw);
+       if (ret)
+               goto err_ah;
+
+       ATH5K_INFO(sc, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n",
+                       ath5k_chip_name(AR5K_VERSION_MAC, sc->ah->ah_mac_srev),
+                                       sc->ah->ah_mac_srev,
+                                       sc->ah->ah_phy_revision);
+
+       if (!sc->ah->ah_single_chip) {
+               /* Single chip radio (!RF5111) */
+               if (sc->ah->ah_radio_5ghz_revision &&
+                       !sc->ah->ah_radio_2ghz_revision) {
+                       /* No 5GHz support -> report 2GHz radio */
+                       if (!test_bit(AR5K_MODE_11A,
+                               sc->ah->ah_capabilities.cap_mode)) {
+                               ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n",
+                                       ath5k_chip_name(AR5K_VERSION_RAD,
+                                               sc->ah->ah_radio_5ghz_revision),
+                                               sc->ah->ah_radio_5ghz_revision);
+                       /* No 2GHz support (5110 and some
+                        * 5Ghz only cards) -> report 5Ghz radio */
+                       } else if (!test_bit(AR5K_MODE_11B,
+                               sc->ah->ah_capabilities.cap_mode)) {
+                               ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n",
+                                       ath5k_chip_name(AR5K_VERSION_RAD,
+                                               sc->ah->ah_radio_5ghz_revision),
+                                               sc->ah->ah_radio_5ghz_revision);
+                       /* Multiband radio */
+                       } else {
+                               ATH5K_INFO(sc, "RF%s multiband radio found"
+                                       " (0x%x)\n",
+                                       ath5k_chip_name(AR5K_VERSION_RAD,
+                                               sc->ah->ah_radio_5ghz_revision),
+                                               sc->ah->ah_radio_5ghz_revision);
+                       }
+               }
+               /* Multi chip radio (RF5111 - RF2111) ->
+                * report both 2GHz/5GHz radios */
+               else if (sc->ah->ah_radio_5ghz_revision &&
+                               sc->ah->ah_radio_2ghz_revision){
+                       ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n",
+                               ath5k_chip_name(AR5K_VERSION_RAD,
+                                       sc->ah->ah_radio_5ghz_revision),
+                                       sc->ah->ah_radio_5ghz_revision);
+                       ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n",
+                               ath5k_chip_name(AR5K_VERSION_RAD,
+                                       sc->ah->ah_radio_2ghz_revision),
+                                       sc->ah->ah_radio_2ghz_revision);
+               }
+       }
+
+
+       /* ready to process interrupts */
+       __clear_bit(ATH_STAT_INVALID, sc->status);
+
+       return 0;
+err_ah:
+       ath5k_hw_detach(sc->ah);
+err_free_ah:
+       kfree(sc->ah);
+err_irq:
+       free_irq(pdev->irq, sc);
+err_free:
+       ieee80211_free_hw(hw);
+err_map:
+       pci_iounmap(pdev, mem);
+err_reg:
+       pci_release_region(pdev, 0);
+err_dis:
+       pci_disable_device(pdev);
+err:
+       return ret;
+}
+
+static void __devexit
+ath5k_pci_remove(struct pci_dev *pdev)
+{
+       struct ath5k_softc *sc = pci_get_drvdata(pdev);
+
+       ath5k_debug_finish_device(sc);
+       ath5k_detach(pdev, sc->hw);
+       ath5k_hw_detach(sc->ah);
+       kfree(sc->ah);
+       free_irq(pdev->irq, sc);
+       pci_iounmap(pdev, sc->iobase);
+       pci_release_region(pdev, 0);
+       pci_disable_device(pdev);
+       ieee80211_free_hw(sc->hw);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int ath5k_pci_suspend(struct device *dev)
+{
+       struct ath5k_softc *sc = pci_get_drvdata(to_pci_dev(dev));
+
+       ath5k_led_off(sc);
+       return 0;
+}
+
+static int ath5k_pci_resume(struct device *dev)
+{
+       struct pci_dev *pdev = to_pci_dev(dev);
+       struct ath5k_softc *sc = pci_get_drvdata(pdev);
+
+       /*
+        * Suspend/Resume resets the PCI configuration space, so we have to
+        * re-disable the RETRY_TIMEOUT register (0x41) to keep
+        * PCI Tx retries from interfering with C3 CPU state
+        */
+       pci_write_config_byte(pdev, 0x41, 0);
+
+       ath5k_led_enable(sc);
+       return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(ath5k_pm_ops, ath5k_pci_suspend, ath5k_pci_resume);
+#define ATH5K_PM_OPS   (&ath5k_pm_ops)
+#else
+#define ATH5K_PM_OPS   NULL
+#endif /* CONFIG_PM_SLEEP */
+
+static struct pci_driver ath5k_pci_driver = {
+       .name           = KBUILD_MODNAME,
+       .id_table       = ath5k_pci_id_table,
+       .probe          = ath5k_pci_probe,
+       .remove         = __devexit_p(ath5k_pci_remove),
+       .driver.pm      = ATH5K_PM_OPS,
+};
+
+/*
+ * Module init/exit functions
+ */
+static int __init
+init_ath5k_pci(void)
+{
+       int ret;
+
+       ath5k_debug_init();
+
+       ret = pci_register_driver(&ath5k_pci_driver);
+       if (ret) {
+               printk(KERN_ERR "ath5k_pci: can't register pci driver\n");
+               return ret;
+       }
+
+       return 0;
+}
+
+static void __exit
+exit_ath5k_pci(void)
+{
+       pci_unregister_driver(&ath5k_pci_driver);
+
+       ath5k_debug_finish();
+}
+
+module_init(init_ath5k_pci);
+module_exit(exit_ath5k_pci);