Fix common misspellings
[linux-2.6.git] / drivers / net / chelsio / pm3393.c
index 76a7ca9..40c7b93 100644 (file)
@@ -44,8 +44,9 @@
 #include "suni1x10gexp_regs.h"
 
 #include <linux/crc32.h>
+#include <linux/slab.h>
 
-#define OFFSET(REG_ADDR)    (REG_ADDR << 2)
+#define OFFSET(REG_ADDR)    ((REG_ADDR) << 2)
 
 /* Max frame size PM3393 can handle. Includes Ethernet header and CRC. */
 #define MAX_FRAME_SIZE  9600
@@ -251,8 +252,9 @@ static int pm3393_interrupt_handler(struct cmac *cmac)
        /* Read the master interrupt status register. */
        pmread(cmac, SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS,
               &master_intr_status);
-       CH_DBG(cmac->adapter, INTR, "PM3393 intr cause 0x%x\n",
-              master_intr_status);
+       if (netif_msg_intr(cmac->adapter))
+               dev_dbg(&cmac->adapter->pdev->dev, "PM3393 intr cause 0x%x\n",
+                       master_intr_status);
 
        /* TBD XXX Lets just clear everything for now */
        pm3393_interrupt_clear(cmac);
@@ -291,7 +293,7 @@ static int pm3393_enable_port(struct cmac *cmac, int which)
        pm3393_enable(cmac, which);
 
        /*
-        * XXX This should be done by the PHY and preferrably not at all.
+        * XXX This should be done by the PHY and preferably not at all.
         * The PHY doesn't give us link status indication on its own so have
         * the link management code query it instead.
         */
@@ -375,12 +377,13 @@ static int pm3393_set_rx_mode(struct cmac *cmac, struct t1_rx_mode *rm)
                rx_mode |= SUNI1x10GEXP_BITMSK_RXXG_MHASH_EN;
        } else if (t1_rx_mode_mc_cnt(rm)) {
                /* Accept one or more multicast(s). */
-               u8 *addr;
+               struct netdev_hw_addr *ha;
                int bit;
                u16 mc_filter[4] = { 0, };
 
-               while ((addr = t1_get_next_mcaddr(rm))) {
-                       bit = (ether_crc(ETH_ALEN, addr) >> 23) & 0x3f; /* bit[23:28] */
+               netdev_for_each_mc_addr(ha, t1_get_netdev(rm)) {
+                       /* bit[23:28] */
+                       bit = (ether_crc(ETH_ALEN, ha->addr) >> 23) & 0x3f;
                        mc_filter[bit >> 4] |= 1 << (bit & 0xf);
                }
                pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW, mc_filter[0]);
@@ -428,35 +431,26 @@ static int pm3393_set_speed_duplex_fc(struct cmac *cmac, int speed, int duplex,
        return 0;
 }
 
-static void pm3393_rmon_update(struct adapter *adapter, u32 offs, u64 *val,
-                              int over)
-{
-       u32 val0, val1, val2;
-
-       t1_tpi_read(adapter, offs, &val0);
-       t1_tpi_read(adapter, offs + 4, &val1);
-       t1_tpi_read(adapter, offs + 8, &val2);
-
-       *val &= ~0ull << 40;
-       *val |= val0 & 0xffff;
-       *val |= (val1 & 0xffff) << 16;
-       *val |= (u64)(val2 & 0xff) << 32;
-
-       if (over)
-               *val += 1ull << 40;
-}
-
 #define RMON_UPDATE(mac, name, stat_name) \
-       pm3393_rmon_update((mac)->adapter, OFFSET(name),                \
-                          &(mac)->stats.stat_name,                     \
-                  (ro &((name - SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW) >> 2)))
-
+{ \
+       t1_tpi_read((mac)->adapter, OFFSET(name), &val0);     \
+       t1_tpi_read((mac)->adapter, OFFSET((name)+1), &val1); \
+       t1_tpi_read((mac)->adapter, OFFSET((name)+2), &val2); \
+       (mac)->stats.stat_name = (u64)(val0 & 0xffff) | \
+                                ((u64)(val1 & 0xffff) << 16) | \
+                                ((u64)(val2 & 0xff) << 32) | \
+                                ((mac)->stats.stat_name & \
+                                       0xffffff0000000000ULL); \
+       if (ro & \
+           (1ULL << ((name - SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW) >> 2))) \
+               (mac)->stats.stat_name += 1ULL << 40; \
+}
 
 static const struct cmac_statistics *pm3393_update_statistics(struct cmac *mac,
                                                              int flag)
 {
-       u64 ro;
-       u32 val0, val1, val2, val3;
+       u64     ro;
+       u32     val0, val1, val2, val3;
 
        /* Snap the counters */
        pmwrite(mac, SUNI1x10GEXP_REG_MSTAT_CONTROL,
@@ -785,17 +779,18 @@ static int pm3393_mac_reset(adapter_t * adapter)
                successful_reset = (is_pl4_reset_finished && !is_pl4_outof_lock
                                    && is_xaui_mabc_pll_locked);
 
-               CH_DBG(adapter, HW,
-                      "PM3393 HW reset %d: pl4_reset 0x%x, val 0x%x, "
-                      "is_pl4_outof_lock 0x%x, xaui_locked 0x%x\n",
-                      i, is_pl4_reset_finished, val, is_pl4_outof_lock,
-                      is_xaui_mabc_pll_locked);
+               if (netif_msg_hw(adapter))
+                       dev_dbg(&adapter->pdev->dev,
+                               "PM3393 HW reset %d: pl4_reset 0x%x, val 0x%x, "
+                               "is_pl4_outof_lock 0x%x, xaui_locked 0x%x\n",
+                               i, is_pl4_reset_finished, val,
+                               is_pl4_outof_lock, is_xaui_mabc_pll_locked);
        }
        return successful_reset ? 0 : 1;
 }
 
-struct gmac t1_pm3393_ops = {
-       STATS_TICK_SECS,
-       pm3393_mac_create,
-       pm3393_mac_reset
+const struct gmac t1_pm3393_ops = {
+       .stats_update_period = STATS_TICK_SECS,
+       .create              = pm3393_mac_create,
+       .reset               = pm3393_mac_reset,
 };