Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[linux-2.6.git] / arch / mips / vr41xx / common / irq.c
index 397ba94..0975eb7 100644 (file)
@@ -1,7 +1,7 @@
 /*
  *  Interrupt handing routines for NEC VR4100 series.
  *
- *  Copyright (C) 2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2005-2007  Yoichi Yuasa <yuasa@linux-mips.org>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -19,6 +19,7 @@
  */
 #include <linux/interrupt.h>
 #include <linux/module.h>
+#include <linux/irq.h>
 
 #include <asm/irq_cpu.h>
 #include <asm/system.h>
@@ -32,7 +33,6 @@ static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned;
 
 static struct irqaction cascade_irqaction = {
        .handler        = no_action,
-       .mask           = CPU_MASK_NONE,
        .name           = "cascade",
 };
 
@@ -72,14 +72,22 @@ static void irq_dispatch(unsigned int irq)
        cascade = irq_cascade + irq;
        if (cascade->get_irq != NULL) {
                unsigned int source_irq = irq;
+               int ret;
                desc = irq_desc + source_irq;
-               desc->chip->ack(source_irq);
-               irq = cascade->get_irq(irq);
-               if (irq < 0)
+               if (desc->chip->mask_ack)
+                       desc->chip->mask_ack(source_irq);
+               else {
+                       desc->chip->mask(source_irq);
+                       desc->chip->ack(source_irq);
+               }
+               ret = cascade->get_irq(irq);
+               irq = ret;
+               if (ret < 0)
                        atomic_inc(&irq_err_count);
                else
                        irq_dispatch(irq);
-               desc->chip->end(source_irq);
+               if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
+                       desc->chip->unmask(source_irq);
        } else
                do_IRQ(irq);
 }
@@ -89,27 +97,27 @@ asmlinkage void plat_irq_dispatch(void)
        unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
 
        if (pending & CAUSEF_IP7)
-               do_IRQ(7);
+               do_IRQ(TIMER_IRQ);
        else if (pending & 0x7800) {
                if (pending & CAUSEF_IP3)
-                       irq_dispatch(3);
+                       irq_dispatch(INT1_IRQ);
                else if (pending & CAUSEF_IP4)
-                       irq_dispatch(4);
+                       irq_dispatch(INT2_IRQ);
                else if (pending & CAUSEF_IP5)
-                       irq_dispatch(5);
+                       irq_dispatch(INT3_IRQ);
                else if (pending & CAUSEF_IP6)
-                       irq_dispatch(6);
+                       irq_dispatch(INT4_IRQ);
        } else if (pending & CAUSEF_IP2)
-               irq_dispatch(2);
+               irq_dispatch(INT0_IRQ);
        else if (pending & CAUSEF_IP0)
-               do_IRQ(0);
+               do_IRQ(MIPS_SOFTINT0_IRQ);
        else if (pending & CAUSEF_IP1)
-               do_IRQ(1);
+               do_IRQ(MIPS_SOFTINT1_IRQ);
        else
                spurious_interrupt();
 }
 
 void __init arch_init_irq(void)
 {
-       mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
+       mips_cpu_irq_init();
 }