Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/kaber/nf-next-2.6

[linux-2.6.git] / arch / mips / kernel / cpu-probe.c

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c9207b5fd923bc033aa55485f2c2b5a2b7fde884..7a51866068a4796631cfd4132dc07d7918dc105f 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/ptrace.h>
+#include <linux/smp.h>
 #include <linux/stddef.h>
 
 #include <asm/bugs.h>
@@ -22,7 +23,7 @@
 #include <asm/mipsregs.h>
 #include <asm/system.h>
 #include <asm/watch.h>
-
+#include <asm/spram.h>
 /*
  * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
  * the implementation of the "wait" feature differs between CPU families. This
@@ -30,7 +31,7 @@
  * The wait instruction stops the pipeline and reduces the power consumption of
  * the CPU very much.
  */
-void (*cpu_wait)(void) = NULL;
+void (*cpu_wait)(void);
 
 static void r3081_wait(void)
 {
@@ -90,13 +91,13 @@ static void rm7k_wait_irqoff(void)
        local_irq_enable();
 }
 
-/* The Au1xxx wait is available only if using 32khz counter or
- * external timer source, but specifically not CP0 Counter. */
-int allow_au1k_wait;
-
+/*
+ * The Au1xxx wait is available only if using 32khz counter or
+ * external timer source, but specifically not CP0 Counter.
+ * alchemy/common/time.c may override cpu_wait!
+ */
 static void au1k_wait(void)
 {
-       /* using the wait instruction makes CP0 counter unusable */
        __asm__("       .set    mips3                   \n"
                "       cache   0x14, 0(%0)             \n"
                "       cache   0x14, 32(%0)            \n"
@@ -111,7 +112,7 @@ static void au1k_wait(void)
                : : "r" (au1k_wait));
 }
 
-static int __initdata nowait = 0;
+static int __initdata nowait;
 
 static int __init wait_disable(char *s)
 {
@@ -146,6 +147,7 @@ void __init check_wait(void)
        case CPU_R4650:
        case CPU_R4700:
        case CPU_R5000:
+       case CPU_R5500:
        case CPU_NEVADA:
        case CPU_4KC:
        case CPU_4KEC:
@@ -154,6 +156,10 @@ void __init check_wait(void)
        case CPU_25KF:
        case CPU_PR4450:
        case CPU_BCM3302:
+       case CPU_BCM6338:
+       case CPU_BCM6348:
+       case CPU_BCM6358:
+       case CPU_CAVIUM_OCTEON:
                cpu_wait = r4k_wait;
                break;
 
@@ -178,15 +184,8 @@ void __init check_wait(void)
        case CPU_TX49XX:
                cpu_wait = r4k_wait_irqoff;
                break;
-       case CPU_AU1000:
-       case CPU_AU1100:
-       case CPU_AU1500:
-       case CPU_AU1550:
-       case CPU_AU1200:
-       case CPU_AU1210:
-       case CPU_AU1250:
-               if (allow_au1k_wait)
-                       cpu_wait = au1k_wait;
+       case CPU_ALCHEMY:
+               cpu_wait = au1k_wait;
                break;
        case CPU_20KC:
                /*
@@ -712,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
        mips_probe_watch_registers(c);
 }
 
-#ifdef CONFIG_CPU_MIPSR2
-extern void spram_config(void);
-#else
-static inline void spram_config(void) {}
-#endif
-
 static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
 {
        decode_configs(c);
@@ -779,37 +772,30 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu)
        switch (c->processor_id & 0xff00) {
        case PRID_IMP_AU1_REV1:
        case PRID_IMP_AU1_REV2:
+               c->cputype = CPU_ALCHEMY;
                switch ((c->processor_id >> 24) & 0xff) {
                case 0:
-                       c->cputype = CPU_AU1000;
                        __cpu_name[cpu] = "Au1000";
                        break;
                case 1:
-                       c->cputype = CPU_AU1500;
                        __cpu_name[cpu] = "Au1500";
                        break;
                case 2:
-                       c->cputype = CPU_AU1100;
                        __cpu_name[cpu] = "Au1100";
                        break;
                case 3:
-                       c->cputype = CPU_AU1550;
                        __cpu_name[cpu] = "Au1550";
                        break;
                case 4:
-                       c->cputype = CPU_AU1200;
                        __cpu_name[cpu] = "Au1200";
-                       if ((c->processor_id & 0xff) == 2) {
-                               c->cputype = CPU_AU1250;
+                       if ((c->processor_id & 0xff) == 2)
                                __cpu_name[cpu] = "Au1250";
-                       }
                        break;
                case 5:
-                       c->cputype = CPU_AU1210;
                        __cpu_name[cpu] = "Au1210";
                        break;
                default:
-                       panic("Unknown Au Core!");
+                       __cpu_name[cpu] = "Au1xxx";
                        break;
                }
                break;
@@ -865,6 +851,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
        decode_configs(c);
        switch (c->processor_id & 0xff00) {
        case PRID_IMP_BCM3302:
+        /* same as PRID_IMP_BCM6338 */
                c->cputype = CPU_BCM3302;
                __cpu_name[cpu] = "Broadcom BCM3302";
                break;
@@ -872,6 +859,46 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
                c->cputype = CPU_BCM4710;
                __cpu_name[cpu] = "Broadcom BCM4710";
                break;
+       case PRID_IMP_BCM6345:
+               c->cputype = CPU_BCM6345;
+               __cpu_name[cpu] = "Broadcom BCM6345";
+               break;
+       case PRID_IMP_BCM6348:
+               c->cputype = CPU_BCM6348;
+               __cpu_name[cpu] = "Broadcom BCM6348";
+               break;
+       case PRID_IMP_BCM4350:
+               switch (c->processor_id & 0xf0) {
+               case PRID_REV_BCM6358:
+                       c->cputype = CPU_BCM6358;
+                       __cpu_name[cpu] = "Broadcom BCM6358";
+                       break;
+               default:
+                       c->cputype = CPU_UNKNOWN;
+                       break;
+               }
+               break;
+       }
+}
+
+static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
+{
+       decode_configs(c);
+       switch (c->processor_id & 0xff00) {
+       case PRID_IMP_CAVIUM_CN38XX:
+       case PRID_IMP_CAVIUM_CN31XX:
+       case PRID_IMP_CAVIUM_CN30XX:
+       case PRID_IMP_CAVIUM_CN58XX:
+       case PRID_IMP_CAVIUM_CN56XX:
+       case PRID_IMP_CAVIUM_CN50XX:
+       case PRID_IMP_CAVIUM_CN52XX:
+               c->cputype = CPU_CAVIUM_OCTEON;
+               __cpu_name[cpu] = "Cavium Octeon";
+               break;
+       default:
+               printk(KERN_INFO "Unknown Octeon chip!\n");
+               c->cputype = CPU_UNKNOWN;
+               break;
        }
 }
 
@@ -909,6 +936,9 @@ __cpuinit void cpu_probe(void)
        case PRID_COMP_NXP:
                cpu_probe_nxp(c, cpu);
                break;
+       case PRID_COMP_CAVIUM:
+               cpu_probe_cavium(c, cpu);
+               break;
        }
 
        BUG_ON(!__cpu_name[cpu]);