serial: tegra_hsuart: Use resources instead of platform data.
[linux-2.6.git] / arch / arm / mach-tegra / devices.c
index 1528f9d..7e16ef4 100644 (file)
 #include <linux/dma-mapping.h>
 #include <linux/fsl_devices.h>
 #include <linux/serial_8250.h>
+#include <linux/i2c-tegra.h>
+#include <linux/platform_data/tegra_usb.h>
 #include <asm/pmu.h>
 #include <mach/irqs.h>
 #include <mach/iomap.h>
 #include <mach/dma.h>
+#include <mach/usb_phy.h>
+
+#include "gpio-names.h"
+#include "devices.h"
+
+static struct resource gpio_resource[] = {
+       [0] = {
+               .start  = TEGRA_GPIO_BASE,
+               .end    = TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_GPIO1,
+               .end    = INT_GPIO1,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               .start  = INT_GPIO2,
+               .end    = INT_GPIO2,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [3] = {
+               .start  = INT_GPIO3,
+               .end    = INT_GPIO3,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [4] = {
+               .start  = INT_GPIO4,
+               .end    = INT_GPIO4,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [5] = {
+               .start  = INT_GPIO5,
+               .end    = INT_GPIO5,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [6] = {
+               .start  = INT_GPIO6,
+               .end    = INT_GPIO6,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [7] = {
+               .start  = INT_GPIO7,
+               .end    = INT_GPIO7,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+struct platform_device tegra_gpio_device = {
+       .name           = "tegra-gpio",
+       .id             = -1,
+       .resource       = gpio_resource,
+       .num_resources  = ARRAY_SIZE(gpio_resource),
+};
+
+static struct resource pinmux_resource[] = {
+       [0] = {
+               /* Tri-state registers */
+               .start  = TEGRA_APB_MISC_BASE + 0x14,
+               .end    = TEGRA_APB_MISC_BASE + 0x20 + 3,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               /* Mux registers */
+               .start  = TEGRA_APB_MISC_BASE + 0x80,
+               .end    = TEGRA_APB_MISC_BASE + 0x9c + 3,
+               .flags  = IORESOURCE_MEM,
+       },
+       [2] = {
+               /* Pull-up/down registers */
+               .start  = TEGRA_APB_MISC_BASE + 0xa0,
+               .end    = TEGRA_APB_MISC_BASE + 0xb0 + 3,
+               .flags  = IORESOURCE_MEM,
+       },
+       [3] = {
+               /* Pad control registers */
+               .start  = TEGRA_APB_MISC_BASE + 0x868,
+               .end    = TEGRA_APB_MISC_BASE + 0x90c + 3,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+struct platform_device tegra_pinmux_device = {
+       .name           = "tegra-pinmux",
+       .id             = -1,
+       .resource       = pinmux_resource,
+       .num_resources  = ARRAY_SIZE(pinmux_resource),
+};
 
 static struct resource i2c_resource1[] = {
        [0] = {
@@ -79,13 +169,29 @@ static struct resource i2c_resource4[] = {
        },
 };
 
+static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
+       .bus_clk_rate   = 400000,
+};
+
+static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
+       .bus_clk_rate   = 400000,
+};
+
+static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
+       .bus_clk_rate   = 400000,
+};
+
+static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
+       .bus_clk_rate   = 400000,
+};
+
 struct platform_device tegra_i2c_device1 = {
        .name           = "tegra-i2c",
        .id             = 0,
        .resource       = i2c_resource1,
        .num_resources  = ARRAY_SIZE(i2c_resource1),
        .dev = {
-               .platform_data = 0,
+               .platform_data = &tegra_i2c1_platform_data,
        },
 };
 
@@ -95,7 +201,7 @@ struct platform_device tegra_i2c_device2 = {
        .resource       = i2c_resource2,
        .num_resources  = ARRAY_SIZE(i2c_resource2),
        .dev = {
-               .platform_data = 0,
+               .platform_data = &tegra_i2c2_platform_data,
        },
 };
 
@@ -105,7 +211,7 @@ struct platform_device tegra_i2c_device3 = {
        .resource       = i2c_resource3,
        .num_resources  = ARRAY_SIZE(i2c_resource3),
        .dev = {
-               .platform_data = 0,
+               .platform_data = &tegra_i2c3_platform_data,
        },
 };
 
@@ -115,7 +221,7 @@ struct platform_device tegra_i2c_device4 = {
        .resource       = i2c_resource4,
        .num_resources  = ARRAY_SIZE(i2c_resource4),
        .dev = {
-               .platform_data = 0,
+               .platform_data = &tegra_dvc_platform_data,
        },
 };
 
@@ -334,6 +440,28 @@ static struct resource tegra_usb3_resources[] = {
        },
 };
 
+static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
+       /* All existing boards use GPIO PV0 for phy reset */
+       .reset_gpio = TEGRA_GPIO_PV0,
+       .clk = "cdev2",
+};
+
+static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
+       .operating_mode = TEGRA_USB_OTG,
+       .power_down_on_bus_suspend = 1,
+};
+
+static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
+       .phy_config = &tegra_ehci2_ulpi_phy_config,
+       .operating_mode = TEGRA_USB_HOST,
+       .power_down_on_bus_suspend = 1,
+};
+
+static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
+       .operating_mode = TEGRA_USB_HOST,
+       .power_down_on_bus_suspend = 1,
+};
+
 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
 
 struct platform_device tegra_ehci1_device = {
@@ -342,6 +470,7 @@ struct platform_device tegra_ehci1_device = {
        .dev    = {
                .dma_mask       = &tegra_ehci_dmamask,
                .coherent_dma_mask = DMA_BIT_MASK(32),
+               .platform_data = &tegra_ehci1_pdata,
        },
        .resource = tegra_usb1_resources,
        .num_resources = ARRAY_SIZE(tegra_usb1_resources),
@@ -353,6 +482,7 @@ struct platform_device tegra_ehci2_device = {
        .dev    = {
                .dma_mask       = &tegra_ehci_dmamask,
                .coherent_dma_mask = DMA_BIT_MASK(32),
+               .platform_data = &tegra_ehci2_pdata,
        },
        .resource = tegra_usb2_resources,
        .num_resources = ARRAY_SIZE(tegra_usb2_resources),
@@ -364,6 +494,7 @@ struct platform_device tegra_ehci3_device = {
        .dev    = {
                .dma_mask       = &tegra_ehci_dmamask,
                .coherent_dma_mask = DMA_BIT_MASK(32),
+               .platform_data = &tegra_ehci3_pdata,
        },
        .resource = tegra_usb3_resources,
        .num_resources = ARRAY_SIZE(tegra_usb3_resources),
@@ -573,3 +704,507 @@ struct platform_device tegra_pcm_device = {
        .name = "tegra-pcm-audio",
        .id = -1,
 };
+
+static struct resource w1_resources[] = {
+       [0] = {
+               .start = INT_OWR,
+               .end   = INT_OWR,
+               .flags = IORESOURCE_IRQ
+       },
+       [1] = {
+               .start = TEGRA_OWR_BASE,
+               .end = TEGRA_OWR_BASE + TEGRA_OWR_SIZE - 1,
+               .flags = IORESOURCE_MEM
+       }
+};
+
+struct platform_device tegra_w1_device = {
+       .name          = "tegra_w1",
+       .id            = -1,
+       .resource      = w1_resources,
+       .num_resources = ARRAY_SIZE(w1_resources),
+};
+
+static struct resource tegra_udc_resources[] = {
+       [0] = {
+               .start  = TEGRA_USB_BASE,
+               .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_USB,
+               .end    = INT_USB,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct resource tegra_usb1_resources[] = {
+       [0] = {
+               .start  = TEGRA_USB_BASE,
+               .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_USB,
+               .end    = INT_USB,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct resource tegra_usb2_resources[] = {
+       [0] = {
+               .start  = TEGRA_USB2_BASE,
+               .end    = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_USB2,
+               .end    = INT_USB2,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct resource tegra_usb3_resources[] = {
+       [0] = {
+               .start  = TEGRA_USB3_BASE,
+               .end    = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_USB3,
+               .end    = INT_USB3,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static u64 tegra_udc_dmamask = DMA_BIT_MASK(32);
+
+static struct fsl_usb2_platform_data tegra_udc_pdata = {
+       .operating_mode = FSL_USB2_DR_DEVICE,
+       .phy_mode       = FSL_USB2_PHY_UTMI,
+};
+
+struct platform_device tegra_udc_device = {
+       .name   = "fsl-tegra-udc",
+       .id     = -1,
+       .dev    = {
+               .dma_mask       = &tegra_udc_dmamask,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
+               .platform_data  = &tegra_udc_pdata,
+       },
+       .resource = tegra_udc_resources,
+       .num_resources = ARRAY_SIZE(tegra_udc_resources),
+};
+
+static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device tegra_ehci1_device = {
+       .name   = "tegra-ehci",
+       .id     = 0,
+       .dev    = {
+               .dma_mask       = &tegra_ehci_dmamask,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
+       },
+       .resource = tegra_usb1_resources,
+       .num_resources = ARRAY_SIZE(tegra_usb1_resources),
+};
+
+struct platform_device tegra_ehci2_device = {
+       .name   = "tegra-ehci",
+       .id     = 1,
+       .dev    = {
+               .dma_mask       = &tegra_ehci_dmamask,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
+       },
+       .resource = tegra_usb2_resources,
+       .num_resources = ARRAY_SIZE(tegra_usb2_resources),
+};
+
+struct platform_device tegra_ehci3_device = {
+       .name   = "tegra-ehci",
+       .id     = 2,
+       .dev    = {
+               .dma_mask       = &tegra_ehci_dmamask,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
+       },
+       .resource = tegra_usb3_resources,
+       .num_resources = ARRAY_SIZE(tegra_usb3_resources),
+};
+
+static struct resource tegra_otg_resources[] = {
+       [0] = {
+               .start  = TEGRA_USB_BASE,
+               .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_USB,
+               .end    = INT_USB,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+struct platform_device tegra_otg_device = {
+       .name           = "tegra-otg",
+       .id             = -1,
+       .resource       = tegra_otg_resources,
+       .num_resources  = ARRAY_SIZE(tegra_otg_resources),
+};
+
+static struct resource i2s_resource1[] = {
+       [0] = {
+               .start  = INT_I2S1,
+               .end    = INT_I2S1,
+               .flags  = IORESOURCE_IRQ
+       },
+       [1] = {
+               .start  = TEGRA_DMA_REQ_SEL_I2S_1,
+               .end    = TEGRA_DMA_REQ_SEL_I2S_1,
+               .flags  = IORESOURCE_DMA
+       },
+       [2] = {
+               .start  = TEGRA_I2S1_BASE,
+               .end    = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
+               .flags  = IORESOURCE_MEM
+       }
+};
+
+static struct resource i2s_resource2[] = {
+       [0] = {
+               .start  = INT_I2S2,
+               .end    = INT_I2S2,
+               .flags  = IORESOURCE_IRQ
+       },
+       [1] = {
+               .start  = TEGRA_DMA_REQ_SEL_I2S2_1,
+               .end    = TEGRA_DMA_REQ_SEL_I2S2_1,
+               .flags  = IORESOURCE_DMA
+       },
+       [2] = {
+               .start  = TEGRA_I2S2_BASE,
+               .end    = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
+               .flags  = IORESOURCE_MEM
+       }
+};
+
+static struct resource spdif_resource[] = {
+       [0] = {
+               .start  = INT_SPDIF,
+               .end    = INT_SPDIF,
+               .flags  = IORESOURCE_IRQ
+       },
+       [1] = {
+               .start  = TEGRA_DMA_REQ_SEL_SPD_I,
+               .end    = TEGRA_DMA_REQ_SEL_SPD_I,
+               .flags  = IORESOURCE_DMA
+       },
+       [2] = {
+               .start  = TEGRA_SPDIF_BASE,
+               .end    = TEGRA_SPDIF_BASE + TEGRA_SPDIF_SIZE - 1,
+               .flags  = IORESOURCE_MEM
+       }
+};
+
+struct platform_device tegra_i2s_device1 = {
+       .name           = "i2s",
+       .id             = 0,
+       .resource       = i2s_resource1,
+       .num_resources  = ARRAY_SIZE(i2s_resource1),
+};
+
+struct platform_device tegra_i2s_device2 = {
+       .name           = "i2s",
+       .id             = 1,
+       .resource       = i2s_resource2,
+       .num_resources  = ARRAY_SIZE(i2s_resource2),
+};
+
+struct platform_device tegra_spdif_device = {
+       .name           = "spdif_out",
+       .id             = -1,
+       .resource       = spdif_resource,
+       .num_resources  = ARRAY_SIZE(spdif_resource),
+};
+
+static struct resource tegra_gart_resources[] = {
+       [0] = {
+               .name   = "mc",
+               .flags  = IORESOURCE_MEM,
+               .start  = TEGRA_MC_BASE,
+               .end    = TEGRA_MC_BASE + TEGRA_MC_SIZE - 1,
+       },
+       [1] = {
+               .name   = "gart",
+               .flags  = IORESOURCE_MEM,
+               .start  = TEGRA_GART_BASE,
+               .end    = TEGRA_GART_BASE + TEGRA_GART_SIZE - 1,
+       }
+};
+
+struct platform_device tegra_gart_device = {
+       .name           = "tegra_gart",
+       .id             = -1,
+       .num_resources  = ARRAY_SIZE(tegra_gart_resources),
+       .resource       = tegra_gart_resources
+};
+
+static struct resource tegra_wdt_resources[] = {
+       [0] = {
+               .start  = TEGRA_CLK_RESET_BASE,
+               .end    = TEGRA_CLK_RESET_BASE + 4 - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = TEGRA_TMR1_BASE,
+               .end    = TEGRA_TMR1_BASE + TEGRA_TMR1_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [2] = {
+               .start  = INT_TMR1,
+               .end    = INT_TMR1,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+struct platform_device tegra_wdt_device = {
+       .name           = "tegra_wdt",
+       .id             = -1,
+       .num_resources  = ARRAY_SIZE(tegra_wdt_resources),
+       .resource       = tegra_wdt_resources,
+};
+
+static struct resource tegra_pwfm0_resource = {
+       .start  = TEGRA_PWFM0_BASE,
+       .end    = TEGRA_PWFM0_BASE + TEGRA_PWFM0_SIZE - 1,
+       .flags  = IORESOURCE_MEM,
+};
+
+static struct resource tegra_pwfm1_resource = {
+       .start  = TEGRA_PWFM1_BASE,
+       .end    = TEGRA_PWFM1_BASE + TEGRA_PWFM1_SIZE - 1,
+       .flags  = IORESOURCE_MEM,
+};
+
+static struct resource tegra_pwfm2_resource = {
+       .start  = TEGRA_PWFM2_BASE,
+       .end    = TEGRA_PWFM2_BASE + TEGRA_PWFM2_SIZE - 1,
+       .flags  = IORESOURCE_MEM,
+};
+
+static struct resource tegra_pwfm3_resource = {
+       .start  = TEGRA_PWFM3_BASE,
+       .end    = TEGRA_PWFM3_BASE + TEGRA_PWFM3_SIZE - 1,
+       .flags  = IORESOURCE_MEM,
+};
+
+struct platform_device tegra_pwfm0_device = {
+       .name           = "tegra_pwm",
+       .id             = 0,
+       .num_resources  = 1,
+       .resource       = &tegra_pwfm0_resource,
+};
+
+struct platform_device tegra_pwfm1_device = {
+       .name           = "tegra_pwm",
+       .id             = 1,
+       .num_resources  = 1,
+       .resource       = &tegra_pwfm1_resource,
+};
+
+struct platform_device tegra_pwfm2_device = {
+       .name           = "tegra_pwm",
+       .id             = 2,
+       .num_resources  = 1,
+       .resource       = &tegra_pwfm2_resource,
+};
+
+struct platform_device tegra_pwfm3_device = {
+       .name           = "tegra_pwm",
+       .id             = 3,
+       .num_resources  = 1,
+       .resource       = &tegra_pwfm3_resource,
+};
+
+static struct resource tegra_uarta_resources[] = {
+       [0] = {
+               .start  = TEGRA_UARTA_BASE,
+               .end    = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_UARTA,
+               .end    = INT_UARTA,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct resource tegra_uartb_resources[]= {
+       [0] = {
+               .start  = TEGRA_UARTB_BASE,
+               .end    = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_UARTB,
+               .end    = INT_UARTB,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct resource tegra_uartc_resources[] = {
+       [0] = {
+               .start  = TEGRA_UARTC_BASE,
+               .end    = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_UARTC,
+               .end    = INT_UARTC,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct resource tegra_uartd_resources[] = {
+       [0] = {
+               .start  = TEGRA_UARTD_BASE,
+               .end    = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_UARTD,
+               .end    = INT_UARTD,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct resource tegra_uarte_resources[] = {
+       [0] = {
+               .start  = TEGRA_UARTE_BASE,
+               .end    = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = INT_UARTE,
+               .end    = INT_UARTE,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+struct platform_device tegra_uarta_device = {
+       .name   = "tegra_uart",
+       .id     = 0,
+       .num_resources  = ARRAY_SIZE(tegra_uarta_resources),
+       .resource       = tegra_uarta_resources,
+       .dev    = {
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+};
+
+struct platform_device tegra_uartb_device = {
+       .name   = "tegra_uart",
+       .id     = 1,
+       .num_resources  = ARRAY_SIZE(tegra_uartb_resources),
+       .resource       = tegra_uartb_resources,
+       .dev    = {
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+};
+
+struct platform_device tegra_uartc_device = {
+       .name   = "tegra_uart",
+       .id     = 2,
+       .num_resources  = ARRAY_SIZE(tegra_uartc_resources),
+       .resource       = tegra_uartc_resources,
+       .dev    = {
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+};
+
+struct platform_device tegra_uartd_device = {
+       .name   = "tegra_uart",
+       .id     = 3,
+       .num_resources  = ARRAY_SIZE(tegra_uartd_resources),
+       .resource       = tegra_uartd_resources,
+       .dev    = {
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+};
+
+struct platform_device tegra_uarte_device = {
+       .name   = "tegra_uart",
+       .id     = 4,
+       .num_resources  = ARRAY_SIZE(tegra_uarte_resources),
+       .resource       = tegra_uarte_resources,
+       .dev    = {
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+};
+
+static struct resource tegra_grhost_resources[] = {
+       {
+               .start = TEGRA_HOST1X_BASE,
+               .end = TEGRA_HOST1X_BASE + TEGRA_HOST1X_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = TEGRA_DISPLAY_BASE,
+               .end = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = TEGRA_DISPLAY2_BASE,
+               .end = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = TEGRA_VI_BASE,
+               .end = TEGRA_VI_BASE + TEGRA_VI_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = TEGRA_ISP_BASE,
+               .end = TEGRA_ISP_BASE + TEGRA_ISP_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = TEGRA_MPE_BASE,
+               .end = TEGRA_MPE_BASE + TEGRA_MPE_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = INT_SYNCPT_THRESH_BASE,
+               .end = INT_SYNCPT_THRESH_BASE + INT_SYNCPT_THRESH_NR - 1,
+               .flags = IORESOURCE_IRQ,
+       },
+       {
+               .start = INT_HOST1X_MPCORE_GENERAL,
+               .end = INT_HOST1X_MPCORE_GENERAL,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+struct platform_device tegra_grhost_device = {
+       .name = "tegra_grhost",
+       .id = -1,
+       .resource = tegra_grhost_resources,
+       .num_resources = ARRAY_SIZE(tegra_grhost_resources),
+};
+
+static struct resource tegra_avp_resources[] = {
+       [0] = {
+               .start  = INT_SHR_SEM_INBOX_IBF,
+               .end    = INT_SHR_SEM_INBOX_IBF,
+               .flags  = IORESOURCE_IRQ,
+               .name   = "mbox_from_avp_pending",
+       },
+};
+
+struct platform_device tegra_avp_device = {
+       .name           = "tegra-avp",
+       .id             = -1,
+       .num_resources  = ARRAY_SIZE(tegra_avp_resources),
+       .resource       = tegra_avp_resources,
+       .dev  = {
+               .coherent_dma_mask      = 0xffffffffULL,
+       },
+};