/*
* arch/arm/mach-tegra/board-enterprise.c
*
- * Copyright (c) 2011-2012, NVIDIA Corporation.
+ * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <linux/i2c/atmel_mxt_ts.h>
#include <linux/memblock.h>
#include <linux/rfkill-gpio.h>
+#include <linux/mfd/tlv320aic3262-registers.h>
+#include <linux/mfd/tlv320aic3262-core.h>
#include <linux/nfc/pn544.h>
#include <sound/max98088.h>
#include <mach/pinmux.h>
#include <mach/iomap.h>
#include <mach/io.h>
+#include <mach/io_dpd.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/usb_phy.h>
#include <mach/tegra_asoc_pdata.h>
#include <mach/thermal.h>
#include <mach/tegra-bb-power.h>
+#include <mach/tegra_fiq_debugger.h>
#include "board.h"
#include "clock.h"
#include "board-enterprise.h"
{ "blink", "clk_32k", 32768, true},
{ "i2s0", "pll_a_out0", 0, false},
{ "i2s1", "pll_a_out0", 0, false},
- { "i2s2", "pll_a_out0", 0, false},
{ "i2s3", "pll_a_out0", 0, false},
{ "spdif_out", "pll_a_out0", 0, false},
{ "d_audio", "clk_m", 12000000, false},
{ "audio3", "i2s3_sync", 0, false},
{ "vi", "pll_p", 0, false},
{ "vi_sensor", "pll_p", 0, false},
+ { "i2c5", "pll_p", 3200000, false},
{ NULL, NULL, 0, 0},
};
+static __initdata struct tegra_clk_init_table enterprise_clk_i2s2_table[] = {
+ /* name parent rate enabled */
+ { "i2s2", "pll_a_out0", 0, false},
+ { NULL, NULL, 0, 0},
+};
+
+static __initdata struct tegra_clk_init_table enterprise_clk_i2s4_table[] = {
+ /* name parent rate enabled */
+ { "i2s4", "pll_a_out0", 0, false},
+ { NULL, NULL, 0, 0},
+};
+
+static struct aic3262_gpio_setup aic3262_gpio[] = {
+ /* GPIO 1*/
+ {
+ .used = 1,
+ .in = 0,
+ .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
+ },
+ /* GPIO 2*/
+ {
+ .used = 1,
+ .in = 0,
+ .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
+ },
+ /* GPIO 1 */
+ {
+ .used = 0,
+ },
+ {// GPI2
+ .used = 1,
+ .in = 1,
+ .in_reg = AIC3262_DMIC_INPUT_CNTL,
+ .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
+ .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
+ .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
+ },
+ {// GPO1
+ .used = 0,
+ .value = AIC3262_GPO1_FUNC_DISABLED,
+ },
+};
+
+static struct aic3262_pdata aic3262_codec_pdata = {
+ .gpio_irq = 1,
+ .gpio = aic3262_gpio,
+ .naudint_irq = TEGRA_GPIO_HP_DET,
+ .irq_base = AIC3262_CODEC_IRQ_BASE,
+};
+
static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
.adapter_nr = 0,
.bus_count = 1,
static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
.adapter_nr = 4,
.bus_count = 1,
- .bus_clk_rate = { 400000, 0 },
+ .bus_clk_rate = { 390000, 0 },
.scl_gpio = {TEGRA_GPIO_PZ6, 0},
.sda_gpio = {TEGRA_GPIO_PZ7, 0},
.arb_recovery = arb_lost_recovery,
};
static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
- I2C_BOARD_INFO("aic3262-codec", 0x18),
- .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
+ I2C_BOARD_INFO("tlv320aic3262", 0x18),
+ .platform_data = &aic3262_codec_pdata,
+ .irq = TEGRA_GPIO_HP_DET,
};
static struct i2c_board_info __initdata nfc_board_info = {
ARRAY_SIZE(enterprise_uart_devices));
}
-
-
static struct resource tegra_rtc_resources[] = {
[0] = {
.start = TEGRA_RTC_BASE,
.gpio_hp_mute = -1,
.gpio_int_mic_en = -1,
.gpio_ext_mic_en = -1,
- .debounce_time_hp = -1,
+ .debounce_time_hp = -1,
/*defaults for Enterprise board*/
- .audio_port_id = {
- [HIFI_CODEC] = 0,
- [BASEBAND] = 2,
- [BT_SCO] = 3,
+ .i2s_param[HIFI_CODEC] = {
+ .audio_port_id = 0,
+ .is_i2s_master = 0,
+ .i2s_mode = TEGRA_DAIFMT_I2S,
+ .sample_size = 16,
+ },
+ .i2s_param[BASEBAND] = {
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_DSP_A,
+ .sample_size = 16,
+ .rate = 8000,
+ .channels = 1,
},
- .baseband_param = {
- .rate = 8000,
- .channels = 1,
+ .i2s_param[BT_SCO] = {
+ .audio_port_id = 3,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_DSP_A,
+ .sample_size = 16,
},
};
.gpio_int_mic_en = -1,
.gpio_ext_mic_en = -1,
/*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
- .audio_port_id = {
- [HIFI_CODEC] = 0,
- [BASEBAND] = 2,
- [BT_SCO] = 3,
+ .i2s_param[HIFI_CODEC] = {
+ .audio_port_id = 0,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_I2S,
+ .sample_size = 16,
+ },
+ .i2s_param[BASEBAND] = {
+ .audio_port_id = 2,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_DSP_A,
+ .sample_size = 16,
+ .rate = 8000,
+ .channels = 1,
},
- .baseband_param = {
- .rate = 8000,
- .channels = 1,
- .bit_format = TEGRA_DAIFMT_DSP_A,
+ .i2s_param[BT_SCO] = {
+ .sample_size = 16,
+ .audio_port_id = 3,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_DSP_A,
},
};
.post_suspend = enterprise_usb_hsic_postsupend,
.pre_resume = enterprise_usb_hsic_preresume,
.port_power = enterprise_usb_hsic_phy_power,
+ .post_phy_on = enterprise_usb_hsic_phy_power,
.post_phy_off = enterprise_usb_hsic_post_phy_off,
};
.remote_wakeup_supported = false,
.power_off_on_suspend = false,
},
- .u_cfg.hsic = {
- .sync_start_delay = 9,
- .idle_wait_delay = 17,
- .term_range_adj = 0,
- .elastic_underrun_limit = 16,
- .elastic_overrun_limit = 16,
- },
.ops = &hsic_xmm_plat_ops,
};
-
-
static struct tegra_usb_platform_data tegra_udc_pdata = {
.port_otg = true,
.has_hostpc = true,
+ .builtin_host_disabled = true,
.phy_intf = TEGRA_USB_PHY_INTF_UTMI,
.op_mode = TEGRA_USB_OPMODE_DEVICE,
.u_data.dev = {
return NULL;
}
-void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
+void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
{
- platform_device_unregister(pdev);
+ struct platform_device *pdev = *platdev;
+
+ if (pdev && &pdev->dev) {
+ platform_device_unregister(pdev);
+ *platdev = NULL;
+ } else
+ pr_err("%s: no platform device\n", __func__);
}
static void enterprise_usb_init(void)
&tegra_dam_device2,
&tegra_i2s_device0,
&tegra_i2s_device1,
- &tegra_i2s_device2,
&tegra_i2s_device3,
&tegra_spdif_device,
&spdif_dit_device,
tegra_get_board_info(&board_info);
- if (board_info.board_id == BOARD_E1197)
- enterprise_audio_pdata.audio_port_id[HIFI_CODEC] = 1;
+ if (board_info.board_id == BOARD_E1239) {
+ enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
+ audio_port_id = 4;
+ enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
+ i2s_mode = TEGRA_DAIFMT_I2S;
+ enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
+ channels = 2;
+ platform_device_register(&tegra_i2s_device4);
+ } else {
+ if (board_info.board_id == BOARD_E1197)
+ enterprise_audio_pdata.i2s_param[HIFI_CODEC].
+ audio_port_id = 1;
+ else if (board_info.fab == BOARD_FAB_A04) {
+ enterprise_audio_pdata.i2s_param[BASEBAND].
+ audio_port_id = 4;
+ platform_device_register(&tegra_i2s_device4);
+ } else {
+ enterprise_audio_pdata.i2s_param[BASEBAND].
+ audio_port_id = 2;
+ platform_device_register(&tegra_i2s_device2);
+ }
+ }
platform_add_devices(enterprise_audio_devices,
- ARRAY_SIZE(enterprise_audio_devices));
+ ARRAY_SIZE(enterprise_audio_devices));
}
static void enterprise_baseband_init(void)
{
+ struct board_info board_info;
+
int modem_id = tegra_get_modem_id();
+ tegra_get_board_info(&board_info);
+
switch (modem_id) {
case TEGRA_BB_PH450: /* PH450 ULPI */
enterprise_modem_init();
&tegra_usb_hsic_host_register;
tegra_baseband_power_data.hsic_unregister =
&tegra_usb_hsic_host_unregister;
-
+ if ((board_info.board_id == BOARD_E1239) &&
+ (board_info.fab <= BOARD_FAB_A02)) {
+ tegra_baseband_power_data.modem.
+ xmm.ipc_hsic_active = BB_GPIO_LCD_PWR2;
+ tegra_baseband_power_data.modem.
+ xmm.ipc_hsic_sus_req = BB_GPIO_LCD_PWR1;
+ }
platform_device_register(&tegra_baseband_power_device);
platform_device_register(&tegra_baseband_power2_device);
break;
tegra_get_board_info(&bi);
if (bi.board_id == BOARD_E1205 && bi.fab >= BOARD_FAB_A03) {
nfc_pdata.firm_gpio = TEGRA_GPIO_PX7;
+ } else if (bi.board_id == BOARD_E1239) {
+ nfc_pdata.firm_gpio = TEGRA_GPIO_PN6;
}
}
static void __init tegra_enterprise_init(void)
{
+ struct board_info board_info;
+ tegra_get_board_info(&board_info);
+ if (board_info.fab == BOARD_FAB_A04)
+ tegra_clk_init_from_table(enterprise_clk_i2s4_table);
+ else
+ tegra_clk_init_from_table(enterprise_clk_i2s2_table);
+
tegra_thermal_init(&thermal_data,
throttle_list,
ARRAY_SIZE(throttle_list));
enterprise_i2c_init();
enterprise_uart_init();
enterprise_usb_init();
+ if (board_info.board_id == BOARD_E1239)
+ enterprise_bt_rfkill_pdata[0].shutdown_gpio = TEGRA_GPIO_PF4;
+
platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
tegra_ram_console_debug_init();
enterprise_regulator_init();
+ tegra_io_dpd_init();
enterprise_sdhci_init();
#ifdef CONFIG_TEGRA_EDP_LIMITS
enterprise_edp_init();
enterprise_suspend_init();
enterprise_bpc_mgmt_init();
tegra_release_bootloader_fb();
+ tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
}
static void __init tegra_enterprise_reserve(void)
tegra_ram_console_debug_reserve(SZ_1M);
}
+static const char *enterprise_dt_board_compat[] = {
+ "nvidia,enterprise",
+ NULL
+};
+
MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
.boot_params = 0x80000100,
.map_io = tegra_map_common_io,
.init_irq = tegra_init_irq,
.timer = &tegra_timer,
.init_machine = tegra_enterprise_init,
+ .dt_compat = enterprise_dt_board_compat,
MACHINE_END