/*
* arch/arm/mach-tegra/board-cardhu.c
*
- * Copyright (c) 2011-2012, NVIDIA Corporation.
+ * Copyright (c) 2011-2013, NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2011-2013, NVIDIA Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <sound/wm8903.h>
#include <sound/max98095.h>
#include <media/tegra_dtv.h>
+#include <media/tegra_camera.h>
#include <mach/clk.h>
#include <mach/iomap.h>
#include <mach/irqs.h>
#include <mach/pinmux.h>
#include <mach/iomap.h>
+#include <mach/io_dpd.h>
#include <mach/io.h>
#include <mach/i2s.h>
#include <mach/tegra_asoc_pdata.h>
+#include <mach/tegra_rt5640_pdata.h>
#include <mach/tegra_wm8903_pdata.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/usb_phy.h>
#include <mach/thermal.h>
#include <mach/pci.h>
+#include <mach/tegra_fiq_debugger.h>
#include "board.h"
#include "clock.h"
{ "i2c3", "pll_p", 3200000, false},
{ "i2c4", "pll_p", 3200000, false},
{ "i2c5", "pll_p", 3200000, false},
+ { "vi", "pll_p", 0, false},
{ NULL, NULL, 0, 0},
};
.platform_data = &cardhu_max98095_pdata,
};
+static struct i2c_board_info __initdata rt5640_board_info = {
+ I2C_BOARD_INFO("rt5640", 0x1c),
+};
+
+
static void cardhu_i2c_init(void)
{
+ struct board_info board_info;
+
+ tegra_get_board_info(&board_info);
tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
platform_device_register(&tegra_i2c_device2);
platform_device_register(&tegra_i2c_device1);
- i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
+ if (board_info.board_id == BOARD_PM315)
+ i2c_register_board_info(4, &rt5640_board_info, 1);
+ else
+ i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
debug_port_id = 1;
}
+#ifdef CONFIG_TEGRA_IRDA
+ if ((board_info.board_id == BOARD_E1186) ||
+ (board_info.board_id == BOARD_E1198)) {
+ if (debug_port_id == 1) {
+ cardhu_irda_pdata.is_irda = false;
+ pr_err("UARTB is not available for IrDA\n");
+ }
+ }
+#endif
+
switch (debug_port_id) {
case 0:
/* UARTA is the debug port. */
{
struct clk *c;
int i;
+ struct board_info board_info;
+
+ tegra_get_board_info(&board_info);
for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
c = tegra_get_clock_by_name(uart_parent_clk[i].name);
}
}
+#ifdef CONFIG_TEGRA_IRDA
+ if (((board_info.board_id == BOARD_E1186) ||
+ (board_info.board_id == BOARD_E1198)) &&
+ cardhu_irda_pdata.is_irda) {
+ cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
+ cardhu_irda_pdata.parent_clk_count =
+ ARRAY_SIZE(uart_parent_clk);
+
+ tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
+ }
+#endif
+
platform_add_devices(cardhu_uart_devices,
ARRAY_SIZE(cardhu_uart_devices));
}
+static struct tegra_camera_platform_data tegra_camera_pdata = {
+ .limit_3d_emc_clk = false,
+};
+
static struct platform_device tegra_camera = {
.name = "tegra_camera",
+ .dev = {
+ .platform_data = &tegra_camera_pdata,
+ },
.id = -1,
};
+static void tegra_camera_init(void)
+{
+ /* For AP37 platform, limit 3d and emc freq when camera is ON */
+ if (TEGRA_REVISION_A03 == tegra_get_revision() &&
+ 0xA0 == tegra_sku_id())
+ tegra_camera_pdata.limit_3d_emc_clk = true;
+ else
+ tegra_camera_pdata.limit_3d_emc_clk = false;
+}
+
static struct platform_device *cardhu_spi_devices[] __initdata = {
&tegra_spi_device4,
};
.num_resources = ARRAY_SIZE(tegra_rtc_resources),
};
-static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
+static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
.gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
.gpio_hp_det = TEGRA_GPIO_HP_DET,
.gpio_hp_mute = -1,
.gpio_int_mic_en = -1,
.gpio_ext_mic_en = -1,
+ .i2s_param[HIFI_CODEC] = {
+ .audio_port_id = 0,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_I2S,
+ },
+ .i2s_param[BASEBAND] = {
+ .audio_port_id = -1,
+ },
+ .i2s_param[BT_SCO] = {
+ .audio_port_id = 3,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_DSP_A,
+ },
};
static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
.gpio_hp_mute = -1,
.gpio_int_mic_en = -1,
.gpio_ext_mic_en = -1,
+ .i2s_param[HIFI_CODEC] = {
+ .audio_port_id = 0,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_I2S,
+ },
+ .i2s_param[BASEBAND] = {
+ .audio_port_id = -1,
+ },
+ .i2s_param[BT_SCO] = {
+ .audio_port_id = 3,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_DSP_A,
+ },
};
static struct platform_device cardhu_audio_wm8903_device = {
.gpio_int_mic_en = -1,
.gpio_ext_mic_en = -1,
/*defaults for Verbier-Cardhu board with TI AIC326X codec*/
- .audio_port_id = {
- [HIFI_CODEC] = 0,
- [BASEBAND] = -1,
- [BT_SCO] = 3,
+ .i2s_param[HIFI_CODEC] = {
+ .audio_port_id = 0,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_I2S,
+ .sample_size = 16,
},
- .baseband_param = {
- .rate = -1,
- .channels = -1,
+ .i2s_param[BT_SCO] = {
+ .sample_size = 16,
+ .audio_port_id = 3,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_DSP_A,
},
};
},
};
+static struct tegra_asoc_platform_data beaver_audio_rt5640_pdata = {
+ .codec_name = "rt5640.4-001c",
+ .codec_dai_name = "rt5640-aif1",
+ .gpio_spkr_en = TEGRA_GPIO_RTL_SPKR_EN,
+ .gpio_hp_det = TEGRA_GPIO_RTL_HP_DET,
+ .gpio_hp_mute = -1,
+ .gpio_int_mic_en = TEGRA_GPIO_RTL_INT_MIC_EN,
+ .gpio_ext_mic_en = -1, /* TEGRA_GPIO_EXT_MIC_EN,*/
+ .i2s_param[HIFI_CODEC] = {
+ .audio_port_id = 0,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_I2S,
+ },
+ .i2s_param[BASEBAND] = {
+ .audio_port_id = -1,
+ },
+ .i2s_param[BT_SCO] = {
+ .audio_port_id = 3,
+ .is_i2s_master = 1,
+ .i2s_mode = TEGRA_DAIFMT_DSP_A,
+ },
+};
+
+static struct platform_device beaver_audio_rt5640_device = {
+ .name = "tegra-snd-rt5640",
+ .id = 0,
+ .dev = {
+ .platform_data = &beaver_audio_rt5640_pdata,
+ },
+};
+
+
static struct platform_device *cardhu_devices[] __initdata = {
&tegra_pmu_device,
&tegra_rtc_device,
#if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
&tegra_smmu_device,
#endif
- &tegra_wdt_device,
+ &tegra_wdt0_device,
+ &tegra_wdt1_device,
+ &tegra_wdt2_device,
#if defined(CONFIG_TEGRA_AVP)
&tegra_avp_device,
#endif
&baseband_dit_device,
&cardhu_bt_rfkill_device,
&tegra_pcm_device,
- &cardhu_audio_wm8903_device,
&cardhu_audio_max98095_device,
&cardhu_audio_aic326x_device,
&tegra_hda_device,
+ &tegra_cec_device,
#if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
&tegra_aes_device,
#endif
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
+static struct platform_device *cardhu_audio_devices[] __initdata = {
+ &cardhu_audio_wm8903_device,
+
+};
+
+static struct platform_device *beaver_audio_devices[] __initdata = {
+ &beaver_audio_rt5640_device,
+
+};
static struct mxt_platform_data atmel_mxt_info = {
.x_line = 27,
struct board_info BoardInfo, DisplayBoardInfo;
tegra_get_board_info(&BoardInfo);
+
+ /* Beaver board does not have any touch hardware*/
+ if (BoardInfo.board_id == BOARD_PM315)
+ return 0;
+
tegra_get_display_board_info(&DisplayBoardInfo);
if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
tegra_clk_init_from_table(spi_clk_init_table);
.remote_wakeup_supported = false,
.power_off_on_suspend = false,
},
- .u_cfg.hsic = {
- .sync_start_delay = 9,
- .idle_wait_delay = 17,
- .term_range_adj = 0,
- .elastic_underrun_limit = 16,
- .elastic_overrun_limit = 16,
- },
.ops = &hsic_xmm_plat_ops,
};
#endif
gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
if (!reset_gpio)
gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
- if (!enable_gpio)
- tegra_gpio_enable(hsic_enable_gpio);
- if (!reset_gpio)
- tegra_gpio_enable(hsic_reset_gpio);
/* keep hsic reset asserted for 1 ms */
udelay(1000);
/* enable (power on) hsic */
.remote_wakeup_supported = false,
.power_off_on_suspend = false,
},
- .u_cfg.hsic = {
- .sync_start_delay = 9,
- .idle_wait_delay = 17,
- .term_range_adj = 0,
- .elastic_underrun_limit = 16,
- .elastic_overrun_limit = 16,
- },
.ops = &hsic_plat_ops,
};
cardhu_pci_platform_data.port_status[2] = 1;
cardhu_pci_platform_data.use_dock_detect = 1;
cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
+ } else if (board_info.board_id == BOARD_PM315) {
+ cardhu_pci_platform_data.port_status[0] = 1;
+ cardhu_pci_platform_data.port_status[1] = 0;
+ cardhu_pci_platform_data.port_status[2] = 1;
+ cardhu_pci_platform_data.use_dock_detect = 0;
+ cardhu_pci_platform_data.gpio = 0;
}
if ((board_info.board_id == BOARD_E1186) ||
- (board_info.board_id == BOARD_E1187) ||
- (board_info.board_id == BOARD_E1291)) {
+ (board_info.board_id == BOARD_E1187) ||
+ (board_info.board_id == BOARD_E1291) ||
+ (board_info.board_id == BOARD_PM315)) {
tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
platform_device_register(&tegra_pci_device);
}
static void __init tegra_cardhu_init(void)
{
+ struct board_info board_info;
+
+ tegra_get_board_info(&board_info);
tegra_thermal_init(&thermal_data,
throttle_list,
ARRAY_SIZE(throttle_list));
cardhu_edp_init();
#endif
cardhu_uart_init();
+ tegra_camera_init();
platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
+ switch (board_info.board_id) {
+ case BOARD_PM315:
+ platform_add_devices(beaver_audio_devices,
+ ARRAY_SIZE(beaver_audio_devices));
+ break;
+ default:
+ platform_add_devices(cardhu_audio_devices,
+ ARRAY_SIZE(cardhu_audio_devices));
+
+ break;
+ }
tegra_ram_console_debug_init();
+ tegra_io_dpd_init();
cardhu_sdhci_init();
cardhu_regulator_init();
cardhu_dtv_init();
cardhu_pmon_init();
cardhu_sensors_init();
cardhu_setup_bluesleep();
- cardhu_sata_init();
+ /*
+ * if you want to add support for SATA in your board
+ * then add your board check here like
+ * board_info.board_id == BOARD_E1186
+ */
+ if (board_info.board_id == BOARD_PM315)
+ cardhu_sata_init();
//audio_wired_jack_init();
cardhu_pins_state_init();
cardhu_emc_init();
#ifdef CONFIG_TEGRA_WDT_RECOVERY
tegra_wdt_recovery_init();
#endif
+ tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
}
static void __init tegra_cardhu_reserve(void)
{
#if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
- /* support 1920X1200 with 24bpp */
- tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
+ /* Support 1920X1080 32bpp,double buffered on HDMI*/
+ tegra_reserve(0, SZ_8M + SZ_1M, SZ_16M);
#else
tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
#endif
tegra_ram_console_debug_reserve(SZ_1M);
}
+static const char *cardhu_dt_board_compat[] = {
+ "nvidia,cardhu",
+ NULL
+};
+
MACHINE_START(CARDHU, "cardhu")
.boot_params = 0x80000100,
.map_io = tegra_map_common_io,
.init_irq = tegra_init_irq,
.timer = &tegra_timer,
.init_machine = tegra_cardhu_init,
+ .dt_compat = cardhu_dt_board_compat,
MACHINE_END