/*
* arch/arm/mach-tegra/board-cardhu.c
*
- * Copyright (c) 2011-2012, NVIDIA Corporation.
+ * Copyright (c) 2011-2012, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <linux/memblock.h>
#include <linux/spi-tegra.h>
#include <linux/nfc/pn544.h>
+#include <linux/rfkill-gpio.h>
#include <sound/wm8903.h>
#include <sound/max98095.h>
#include <mach/irqs.h>
#include <mach/pinmux.h>
#include <mach/iomap.h>
+#include <mach/io_dpd.h>
#include <mach/io.h>
#include <mach/i2s.h>
#include <mach/tegra_asoc_pdata.h>
#include <mach/thermal.h>
#include <mach/pci.h>
#include <mach/gpio-tegra.h>
+#include <mach/tegra_fiq_debugger.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include "pm.h"
#include "baseband-xmm-power.h"
#include "wdt-recovery.h"
+#include "common.h"
+
+static struct balanced_throttle throttle_list[] = {
+#ifdef CONFIG_TEGRA_THERMAL_THROTTLE
+ {
+ .id = BALANCED_THROTTLE_ID_TJ,
+ .throt_tab_size = 10,
+ .throt_tab = {
+ { 0, 1000 },
+ { 640000, 1000 },
+ { 640000, 1000 },
+ { 640000, 1000 },
+ { 640000, 1000 },
+ { 640000, 1000 },
+ { 760000, 1000 },
+ { 760000, 1050 },
+ {1000000, 1050 },
+ {1000000, 1100 },
+ },
+ },
+#endif
+#ifdef CONFIG_TEGRA_SKIN_THROTTLE
+ {
+ .id = BALANCED_THROTTLE_ID_SKIN,
+ .throt_tab_size = 6,
+ .throt_tab = {
+ { 640000, 1200 },
+ { 640000, 1200 },
+ { 760000, 1200 },
+ { 760000, 1200 },
+ {1000000, 1200 },
+ {1000000, 1200 },
+ },
+ },
+#endif
+};
/* All units are in millicelsius */
static struct tegra_thermal_data thermal_data = {
+ .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
.temp_shutdown = 90000,
- .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
+
+#if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
+ .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
+#endif
#ifdef CONFIG_TEGRA_EDP_LIMITS
.edp_offset = TDIODE_OFFSET, /* edp based on tdiode */
.hysteresis_edp = 3000,
.tc2 = 1,
.passive_delay = 2000,
#endif
+#ifdef CONFIG_TEGRA_SKIN_THROTTLE
+ .skin_device_id = THERMAL_DEVICE_ID_SKIN,
+ .temp_throttle_skin = 43000,
+ .tc1_skin = 0,
+ .tc2_skin = 1,
+ .passive_delay_skin = 5000,
+
+ .skin_temp_offset = 9793,
+ .skin_period = 1100,
+ .skin_devs_size = 2,
+ .skin_devs = {
+ {
+ THERMAL_DEVICE_ID_NCT_EXT,
+ {
+ 2, 1, 1, 1,
+ 1, 1, 1, 1,
+ 1, 1, 1, 0,
+ 1, 1, 0, 0,
+ 0, 0, -1, -7
+ }
+ },
+ {
+ THERMAL_DEVICE_ID_NCT_INT,
+ {
+ -11, -7, -5, -3,
+ -3, -2, -1, 0,
+ 0, 0, 1, 1,
+ 1, 2, 2, 3,
+ 4, 6, 11, 18
+ }
+ },
+ },
+#endif
};
-static struct resource cardhu_bcm4329_rfkill_resources[] = {
+static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
{
- .name = "bcm4329_nshutdown_gpio",
- .start = TEGRA_GPIO_PU0,
- .end = TEGRA_GPIO_PU0,
- .flags = IORESOURCE_IO,
+ .name = "bt_rfkill",
+ .shutdown_gpio = TEGRA_GPIO_PU0,
+ .reset_gpio = TEGRA_GPIO_INVALID,
+ .type = RFKILL_TYPE_BLUETOOTH,
},
};
-static struct platform_device cardhu_bcm4329_rfkill_device = {
- .name = "bcm4329_rfkill",
+static struct platform_device cardhu_bt_rfkill_device = {
+ .name = "rfkill_gpio",
.id = -1,
- .num_resources = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
- .resource = cardhu_bcm4329_rfkill_resources,
+ .dev = {
+ .platform_data = &cardhu_bt_rfkill_pdata,
+ },
};
static struct resource cardhu_bluesleep_resources[] = {
{ "i2c3", "pll_p", 3200000, false},
{ "i2c4", "pll_p", 3200000, false},
{ "i2c5", "pll_p", 3200000, false},
+ { "vi", "pll_p", 0, false},
{ NULL, NULL, 0, 0},
};
debug_port_id = 1;
}
+#ifdef CONFIG_TEGRA_IRDA
+ if ((board_info.board_id == BOARD_E1186) ||
+ (board_info.board_id == BOARD_E1198)) {
+ if (debug_port_id == 1) {
+ cardhu_irda_pdata.is_irda = false;
+ pr_err("UARTB is not available for IrDA\n");
+ }
+ }
+#endif
+
switch (debug_port_id) {
case 0:
/* UARTA is the debug port. */
{
struct clk *c;
int i;
+ struct board_info board_info;
+
+ tegra_get_board_info(&board_info);
for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
c = tegra_get_clock_by_name(uart_parent_clk[i].name);
}
}
+#ifdef CONFIG_TEGRA_IRDA
+ if (((board_info.board_id == BOARD_E1186) ||
+ (board_info.board_id == BOARD_E1198)) &&
+ cardhu_irda_pdata.is_irda) {
+ cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
+ cardhu_irda_pdata.parent_clk_count =
+ ARRAY_SIZE(uart_parent_clk);
+
+ tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
+ }
+#endif
+
platform_add_devices(cardhu_uart_devices,
ARRAY_SIZE(cardhu_uart_devices));
}
#if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
&tegra_smmu_device,
#endif
- &tegra_wdt_device,
+ &tegra_wdt0_device,
+ &tegra_wdt1_device,
+ &tegra_wdt2_device,
#if defined(CONFIG_TEGRA_AVP)
&tegra_avp_device,
#endif
&spdif_dit_device,
&bluetooth_dit_device,
&baseband_dit_device,
- &cardhu_bcm4329_rfkill_device,
+ &cardhu_bt_rfkill_device,
&tegra_pcm_device,
&cardhu_audio_wm8903_device,
&cardhu_audio_max98095_device,
&cardhu_audio_aic326x_device,
&tegra_hda_device,
+ &tegra_cec_device,
#if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
&tegra_aes_device,
#endif
return 0;
}
+#if defined(CONFIG_USB_SUPPORT)
+
static void cardu_usb_hsic_postsupend(void)
{
#ifdef CONFIG_TEGRA_BB_XMM_POWER
.remote_wakeup_supported = false,
.power_off_on_suspend = false,
},
- .u_cfg.hsic = {
- .sync_start_delay = 9,
- .idle_wait_delay = 17,
- .term_range_adj = 0,
- .elastic_underrun_limit = 16,
- .elastic_overrun_limit = 16,
- },
.ops = &hsic_xmm_plat_ops,
};
-
+#endif
static int hsic_enable_gpio = -1;
static int hsic_reset_gpio = -1;
}
}
+#if defined(CONFIG_USB_SUPPORT)
static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
.open = hsic_platform_open,
.close = hsic_platform_close,
.remote_wakeup_supported = false,
.power_off_on_suspend = false,
},
- .u_cfg.hsic = {
- .sync_start_delay = 9,
- .idle_wait_delay = 17,
- .term_range_adj = 0,
- .elastic_underrun_limit = 16,
- .elastic_overrun_limit = 16,
- },
.ops = &hsic_plat_ops,
};
},
};
-static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
- .port_otg = true,
+static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
+ .port_otg = false,
.has_hostpc = true,
.phy_intf = TEGRA_USB_PHY_INTF_UTMI,
- .op_mode = TEGRA_USB_OPMODE_HOST,
+ .op_mode = TEGRA_USB_OPMODE_HOST,
.u_data.host = {
.vbus_gpio = -1,
- .vbus_reg = "vdd_vbus_micro_usb",
- .hot_plug = true,
+ .hot_plug = false,
.remote_wakeup_supported = true,
.power_off_on_suspend = true,
},
},
};
-static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
+static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
.port_otg = false,
.has_hostpc = true,
.phy_intf = TEGRA_USB_PHY_INTF_UTMI,
- .op_mode = TEGRA_USB_OPMODE_HOST,
+ .op_mode = TEGRA_USB_OPMODE_HOST,
.u_data.host = {
.vbus_gpio = -1,
- .hot_plug = false,
+ .vbus_reg = "vdd_vbus_typea_usb",
+ .hot_plug = true,
.remote_wakeup_supported = true,
.power_off_on_suspend = true,
},
.elastic_limit = 16,
.idle_wait_delay = 17,
.term_range_adj = 6,
- .xcvr_setup = 15,
+ .xcvr_setup = 8,
.xcvr_lsfslew = 2,
.xcvr_lsrslew = 2,
.xcvr_setup_offset = 0,
},
};
-static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
- .port_otg = false,
+static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
+ .port_otg = true,
.has_hostpc = true,
.phy_intf = TEGRA_USB_PHY_INTF_UTMI,
- .op_mode = TEGRA_USB_OPMODE_HOST,
+ .op_mode = TEGRA_USB_OPMODE_HOST,
.u_data.host = {
.vbus_gpio = -1,
- .vbus_reg = "vdd_vbus_typea_usb",
+ .vbus_reg = "vdd_vbus_micro_usb",
.hot_plug = true,
.remote_wakeup_supported = true,
.power_off_on_suspend = true,
.elastic_limit = 16,
.idle_wait_delay = 17,
.term_range_adj = 6,
- .xcvr_setup = 8,
+ .xcvr_setup = 15,
.xcvr_lsfslew = 2,
.xcvr_lsrslew = 2,
.xcvr_setup_offset = 0,
.ehci_device = &tegra_ehci1_device,
.ehci_pdata = &tegra_ehci1_utmi_pdata,
};
+#endif
-#if CONFIG_USB_SUPPORT
+#if defined(CONFIG_USB_SUPPORT)
static void cardhu_usb_init(void)
{
struct board_info bi;
static void __init tegra_cardhu_init(void)
{
- tegra_thermal_init(&thermal_data);
+ tegra_thermal_init(&thermal_data,
+ throttle_list,
+ ARRAY_SIZE(throttle_list));
tegra_clk_init_from_table(cardhu_clk_init_table);
tegra_enable_pinmux();
cardhu_pinmux_init();
cardhu_uart_init();
platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
tegra_ram_console_debug_init();
+ tegra_io_dpd_init();
cardhu_sdhci_init();
cardhu_regulator_init();
cardhu_dtv_init();
#ifdef CONFIG_TEGRA_WDT_RECOVERY
tegra_wdt_recovery_init();
#endif
+ tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
}
static void __init tegra_cardhu_reserve(void)
MACHINE_START(CARDHU, "cardhu")
.atag_offset = 0x100,
+ .soc = &tegra_soc_desc,
.map_io = tegra_map_common_io,
.reserve = tegra_cardhu_reserve,
.init_early = tegra30_init_early,