#include <linux/spi/spi.h>
#include <linux/i2c/atmel_mxt_ts.h>
#include <linux/tegra_uart.h>
+#include <linux/spi-tegra.h>
#include <sound/wm8903.h>
#include "gpio-names.h"
#include "fuse.h"
#include "pm.h"
+#include "baseband-xmm-power.h"
/* !!!TODO: Change for cardhu (Taken from Ventana) */
[2] = {.name = "clk_m"},
};
-static struct clk *debug_uart_clk;
static struct tegra_uart_platform_data cardhu_uart_pdata;
static void __init uart_debug_init(void)
.id = -1,
};
+static struct platform_device *cardhu_spi_devices[] __initdata = {
+ &tegra_spi_device4,
+};
+
+struct spi_clk_parent spi_parent_clk[] = {
+ [0] = {.name = "pll_p"},
+ [1] = {.name = "pll_m"},
+ [2] = {.name = "clk_m"},
+};
+
+static struct tegra_spi_platform_data cardhu_spi_pdata = {
+ .is_dma_based = true,
+ .max_dma_buffer = (16 * 1024),
+ .is_clkon_always = false,
+ .max_rate = 100000000,
+};
+
+static void __init cardhu_spi_init(void)
+{
+ int i;
+ struct clk *c;
+
+ for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
+ c = tegra_get_clock_by_name(spi_parent_clk[i].name);
+ if (IS_ERR_OR_NULL(c)) {
+ pr_err("Not able to get the clock for %s\n",
+ spi_parent_clk[i].name);
+ continue;
+ }
+ spi_parent_clk[i].parent_clk = c;
+ spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
+ }
+ cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
+ cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
+ tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
+ platform_add_devices(cardhu_spi_devices,
+ ARRAY_SIZE(cardhu_spi_devices));
+}
+
static struct tegra_wm8903_platform_data cardhu_audio_pdata = {
.gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
.gpio_hp_det = TEGRA_GPIO_HP_DET,
&tegra_smmu_device,
#endif
&tegra_wdt_device,
+#if defined(CONFIG_TEGRA_AVP)
&tegra_avp_device,
+#endif
&tegra_camera,
- &tegra_spi_device4,
#if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
&tegra_se_device,
#endif
return 0;
}
+static struct tegra_uhsic_config uhsic_phy_config = {
+ .enable_gpio = EN_HSIC_GPIO,
+ .reset_gpio = -1,
+ .sync_start_delay = 9,
+ .idle_wait_delay = 17,
+ .term_range_adj = 0,
+ .elastic_underrun_limit = 16,
+ .elastic_overrun_limit = 16,
+};
+
+static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
+ .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
+ .phy_config = &uhsic_phy_config,
+ .operating_mode = TEGRA_USB_HOST,
+ .power_down_on_bus_suspend = 1,
+};
static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
[0] = {
},
};
-static struct tegra_ulpi_config uhsic_phy_config = {
- .enable_gpio = EN_HSIC_GPIO,
- .reset_gpio = -1,
-};
-
-static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
- .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
- .phy_config = &uhsic_phy_config,
- .operating_mode = TEGRA_USB_HOST,
- .power_down_on_bus_suspend = 1,
-};
-
static struct tegra_otg_platform_data tegra_otg_pdata = {
.host_register = &tegra_usb_otg_host_register,
.host_unregister = &tegra_usb_otg_host_unregister,
tegra_get_board_info(&bi);
- tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
+ tegra_usb_phy_init(tegra_usb_phy_pdata,
+ ARRAY_SIZE(tegra_usb_phy_pdata));
tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
platform_device_register(&tegra_otg_device);
-
if (bi.board_id == BOARD_PM267) {
uhsic_phy_config.reset_gpio =
PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
+ platform_device_register(&tegra_ehci2_device);
} else if ((bi.board_id == BOARD_PM269) ||
- (bi.board_id == BOARD_E1186) || (bi.board_id == BOARD_E1256)) {
+ (bi.board_id == BOARD_E1256)) {
+ tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
+ platform_device_register(&tegra_ehci2_device);
+ } else if (bi.board_id == BOARD_E1186) {
tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
+ /* baseband registartion happens in baseband-xmm-power */
} else {
tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
+ platform_device_register(&tegra_ehci2_device);
}
- platform_device_register(&tegra_ehci2_device);
tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
platform_device_register(&tegra_ehci3_device);
tegra_gpio_enable(TEGRA_GPIO_PU3);
}
+static struct baseband_power_platform_data tegra_baseband_power_data = {
+ .baseband_type = BASEBAND_XMM,
+ .modem = {
+ .xmm = {
+ .bb_rst = XMM_GPIO_BB_RST,
+ .bb_on = XMM_GPIO_BB_ON,
+ .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
+ .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
+ .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
+ .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
+ .hsic_device = &tegra_ehci2_device,
+ },
+ },
+};
+
+static struct platform_device tegra_baseband_power_device = {
+ .name = "baseband_xmm_power",
+ .id = -1,
+ .dev = {
+ .platform_data = &tegra_baseband_power_data,
+ },
+};
+
static void cardhu_modem_init(void)
{
struct board_info board_info;
else
gpio_direction_input(w_disable_gpio);
break;
+ case BOARD_E1186:
+ tegra_gpio_enable(
+ tegra_baseband_power_data.modem.xmm.bb_rst);
+ tegra_gpio_enable(
+ tegra_baseband_power_data.modem.xmm.bb_on);
+ tegra_gpio_enable(
+ tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
+ tegra_gpio_enable(
+ tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
+ tegra_gpio_enable(
+ tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
+ tegra_gpio_enable(
+ tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
+ platform_device_register(&tegra_baseband_power_device);
+ break;
default:
break;
}
+
}
#ifdef CONFIG_SATA_AHCI_TEGRA
tegra_clk_init_from_table(cardhu_clk_init_table);
cardhu_pinmux_init();
cardhu_i2c_init();
+ cardhu_spi_init();
cardhu_usb_init();
#ifdef CONFIG_TEGRA_EDP_LIMITS
cardhu_edp_init();