/*
* arch/arm/mach-tegra/board-aruba.c
*
- * Copyright (c) 2010, NVIDIA Corporation.
+ * Copyright (c) 2010-2012, NVIDIA Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
-#include <linux/tegra_usb.h>
+#include <linux/platform_data/tegra_usb.h>
+
#include <mach/clk.h>
#include <mach/iomap.h>
#include <mach/irqs.h>
#include <mach/io.h>
#include <mach/i2s.h>
#include <mach/audio.h>
+#include <mach/tegra_das.h>
+
+#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/usb_phy.h>
+#include <mach/nand.h>
+#include <mach/tegra_fiq_debugger.h>
#include "board.h"
#include "clock.h"
#include "gpio-names.h"
#include "fuse.h"
+#define ENABLE_OTG 0
+
static struct plat_serial8250_port debug_uart_platform_data[] = {
{
.membase = IO_ADDRESS(TEGRA_UARTA_BASE),
/* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
static struct tegra_ulpi_config ulpi_phy_config = {
- .reset_gpio = TEGRA_GPIO_PG2, // !!!FIXME!!! CABLE DETECT? if so GPIO_PC7 on aruba
- .clk = "clk_dev2",
+ .clk = "cdev2",
};
#ifdef CONFIG_BCM4329_RFKILL
{ "pll_p_out4", "pll_p", 24000000, true },
{ "pwm", "clk_32k", 32768, false},
{ "blink", "clk_32k", 32768, false},
- { "pll_a", NULL, 11289600, true},
+ { "pll_a", NULL, 56448000, true},
{ "pll_a_out0", NULL, 11289600, true},
{ "i2s1", "pll_a_out0", 11289600, true},
{ "i2s2", "pll_a_out0", 11289600, true},
- { "audio", "pll_a_out0", 11289600, true},
+ { "d_audio", "pll_a_out0", 11289600, false},
{ "audio_2x", "audio", 22579200, true},
{ NULL, NULL, 0, 0},
};
-#if 0 // !!!CHECKME !!!
+struct tegra_das_platform_data tegra_das_pdata = {
+ .tegra_dap_port_info_table = {
+ /* I2S0 <--> NULL */
+ [0] = {
+ .dac_port = tegra_das_port_none,
+ .codec_type = tegra_audio_codec_type_none,
+ .device_property = {
+ .num_channels = 0,
+ .bits_per_sample = 0,
+ .rate = 0,
+ .master = 0,
+ .lrck_high_left = false,
+ .dac_dap_data_comm_format = 0,
+ },
+ },
+ /* I2S1 <--> Hifi Codec */
+ [1] = {
+ .dac_port = tegra_das_port_i2s1,
+ .codec_type = tegra_audio_codec_type_hifi,
+ .device_property = {
+ .num_channels = 2,
+ .bits_per_sample = 16,
+ .rate = 48000,
+ .master = 0,
+ .lrck_high_left = false,
+ .dac_dap_data_comm_format =
+ dac_dap_data_format_i2s,
+ },
+ },
+ /* I2s2 <--> BB */
+ [2] = {
+ .dac_port = tegra_das_port_i2s2,
+ .codec_type = tegra_audio_codec_type_baseband,
+ .device_property = {
+ .num_channels = 1,
+ .bits_per_sample = 16,
+ .rate = 16000,
+ .master = 0,
+ .lrck_high_left = true,
+ .dac_dap_data_comm_format =
+ dac_dap_data_format_dsp,
+ },
+ },
+ /* I2s3 <--> BT */
+ [3] = {
+ .dac_port = tegra_das_port_i2s3,
+ .codec_type = tegra_audio_codec_type_bluetooth,
+ .device_property = {
+ .num_channels = 1,
+ .bits_per_sample = 16,
+ .rate = 8000,
+ .master = 0,
+ .lrck_high_left = false,
+ .dac_dap_data_comm_format =
+ dac_dap_data_format_dsp,
+ },
+ },
+ [4] = {
+ .dac_port = tegra_das_port_none,
+ .codec_type = tegra_audio_codec_type_none,
+ .device_property = {
+ .num_channels = 0,
+ .bits_per_sample = 0,
+ .rate = 0,
+ .master = 0,
+ .lrck_high_left = false,
+ .dac_dap_data_comm_format = 0,
+ },
+ },
+ },
+};
+
static struct i2c_board_info __initdata aruba_i2c_bus1_board_info[] = {
{
I2C_BOARD_INFO("wm8903", 0x1a),
},
};
-#endif
-
-static struct tegra_ulpi_config aruba_ehci2_ulpi_phy_config = {
- .reset_gpio = TEGRA_GPIO_PV1,
- .clk = "clk_dev2",
-};
-
-static struct tegra_ehci_platform_data aruba_ehci2_ulpi_platform_data = {
- .operating_mode = TEGRA_USB_HOST,
- .power_down_on_bus_suspend = 0,
- .phy_config = &aruba_ehci2_ulpi_phy_config,
-};
static struct tegra_i2c_platform_data aruba_i2c1_platform_data = {
.adapter_nr = 0,
.bus_count = 1,
- .bus_clk_rate = { 400000, 0 },
+ .bus_clk_rate = { 100000, 0 },
};
#if 0 /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
static struct tegra_i2c_platform_data aruba_i2c2_platform_data = {
.adapter_nr = 1,
.bus_count = 2,
- .bus_clk_rate = { 400000, 100000 },
+ .bus_clk_rate = { 100000, 100000 },
#if 0 /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
.bus_mux = { &i2c2_ddc, &i2c2_gen2 },
.bus_mux_len = { 1, 1 },
static struct tegra_i2c_platform_data aruba_i2c3_platform_data = {
.adapter_nr = 3,
.bus_count = 1,
- .bus_clk_rate = { 400000, 0 },
+ .bus_clk_rate = { 100000, 0 },
};
static struct tegra_i2c_platform_data aruba_i2c4_platform_data = {
.adapter_nr = 4,
.bus_count = 1,
- .bus_clk_rate = { 400000, 0 },
- .is_dvc = true,
+ .bus_clk_rate = { 100000, 0 },
};
static struct tegra_i2c_platform_data aruba_i2c5_platform_data = {
.adapter_nr = 5,
.bus_count = 1,
- .bus_clk_rate = { 400000, 0 },
+ .bus_clk_rate = { 100000, 0 },
};
-
static void aruba_i2c_init(void)
{
tegra_i2c_device1.dev.platform_data = &aruba_i2c1_platform_data;
tegra_i2c_device4.dev.platform_data = &aruba_i2c4_platform_data;
tegra_i2c_device5.dev.platform_data = &aruba_i2c5_platform_data;
+ i2c_register_board_info(0, aruba_i2c_bus1_board_info, 1);
+
platform_device_register(&tegra_i2c_device5);
platform_device_register(&tegra_i2c_device4);
platform_device_register(&tegra_i2c_device3);
.num_resources = ARRAY_SIZE(tegra_rtc_resources),
};
+#if defined(CONFIG_MTD_NAND_TEGRA)
+static struct resource nand_resources[] = {
+ [0] = {
+ .start = INT_NANDFLASH,
+ .end = INT_NANDFLASH,
+ .flags = IORESOURCE_IRQ
+ },
+ [1] = {
+ .start = TEGRA_NAND_BASE,
+ .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
+ .flags = IORESOURCE_MEM
+ }
+};
+
+static struct tegra_nand_chip_parms nand_chip_parms[] = {
+ /* Samsung K5E2G1GACM */
+ [0] = {
+ .vendor_id = 0xEC,
+ .device_id = 0xAA,
+ .capacity = 256,
+ .timing = {
+ .trp = 21,
+ .trh = 15,
+ .twp = 21,
+ .twh = 15,
+ .tcs = 31,
+ .twhr = 60,
+ .tcr_tar_trr = 20,
+ .twb = 100,
+ .trp_resp = 30,
+ .tadl = 100,
+ },
+ },
+ /* Hynix H5PS1GB3EFR */
+ [1] = {
+ .vendor_id = 0xAD,
+ .device_id = 0xDC,
+ .capacity = 512,
+ .timing = {
+ .trp = 12,
+ .trh = 10,
+ .twp = 12,
+ .twh = 10,
+ .tcs = 20,
+ .twhr = 80,
+ .tcr_tar_trr = 20,
+ .twb = 100,
+ .trp_resp = 20,
+ .tadl = 70,
+ },
+ },
+};
+
+struct tegra_nand_platform nand_data = {
+ .max_chips = 8,
+ .chip_parms = nand_chip_parms,
+ .nr_chip_parms = ARRAY_SIZE(nand_chip_parms),
+};
+
+struct platform_device tegra_nand_device = {
+ .name = "tegra_nand",
+ .id = -1,
+ .resource = nand_resources,
+ .num_resources = ARRAY_SIZE(nand_resources),
+ .dev = {
+ .platform_data = &nand_data,
+ },
+};
+#endif
+
static struct platform_device *aruba_devices[] __initdata = {
+#if ENABLE_OTG
&tegra_otg_device,
+#endif
&debug_uart,
- &tegra_uart1_device,
- &tegra_uart2_device,
- &tegra_uart3_device,
- &tegra_uart4_device,
- &pmu_device,
+ &tegra_uartb_device,
+ &tegra_uartc_device,
+ &tegra_uartd_device,
+ &tegra_uarte_device,
+ &tegra_pmu_device,
&tegra_rtc_device,
&tegra_udc_device,
- &tegra_ehci2_device,
-#if defined(CONFIG_TEGRA_IOVMM_SMMU)
+#if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
&tegra_smmu_device,
#endif
&aruba_keys_device,
- &tegra_wdt_device,
+ &tegra_wdt0_device,
+ &tegra_wdt1_device,
+ &tegra_wdt2_device,
+#if defined(CONFIG_SND_HDA_TEGRA)
+ &tegra_hda_device,
+#endif
&tegra_avp_device,
+#if defined(CONFIG_MTD_NAND_TEGRA)
+ &tegra_nand_device,
+#endif
};
-static void aruba_keys_init(void)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(aruba_keys); i++)
- tegra_gpio_enable(aruba_keys[i].gpio);
-}
-
static int __init aruba_touch_init(void)
{
return 0;
},
};
-static void aruba_usb_init(void)
-{
- tegra_ehci3_device.dev.platform_data=&tegra_ehci_pdata[2];
- platform_device_register(&tegra_ehci3_device);
-}
-struct platform_device *tegra_usb_otg_host_register(void)
+static void aruba_usb_init(void)
{
- struct platform_device *pdev;
- void *platform_data;
- int val;
-
- pdev = platform_device_alloc(tegra_ehci1_device.name, tegra_ehci1_device.id);
- if (!pdev)
- return NULL;
-
- val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
- tegra_ehci1_device.num_resources);
- if (val)
- goto error;
-
- pdev->dev.dma_mask = tegra_ehci1_device.dev.dma_mask;
- pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
-
- platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data), GFP_KERNEL);
- if (!platform_data)
- goto error;
-
- memcpy(platform_data, &tegra_ehci_pdata[0],
- sizeof(struct tegra_ehci_platform_data));
- pdev->dev.platform_data = platform_data;
-
- val = platform_device_add(pdev);
- if (val)
- goto error_add;
-
- return pdev;
-
-error_add:
- kfree(platform_data);
-error:
- pr_err("%s: failed to add the host contoller device\n", __func__);
- platform_device_put(pdev);
- return NULL;
+ tegra_ehci2_device.dev.platform_data=&tegra_ehci_pdata[1];
+ platform_device_register(&tegra_ehci2_device);
}
-void tegra_usb_otg_host_unregister(struct platform_device *pdev)
+#ifdef CONFIG_SATA_AHCI_TEGRA
+static void aruba_sata_init(void)
{
- platform_device_unregister(pdev);
+ platform_device_register(&tegra_sata_device);
}
+#else
+static void aruba_sata_init(void) { }
+#endif
static void __init tegra_aruba_init(void)
{
- tegra_common_init();
tegra_clk_init_from_table(aruba_clk_init_table);
+ tegra_enable_pinmux();
aruba_pinmux_init();
- tegra_ehci2_device.dev.platform_data
- = &aruba_ehci2_ulpi_platform_data;
platform_add_devices(aruba_devices, ARRAY_SIZE(aruba_devices));
aruba_sdhci_init();
aruba_i2c_init();
aruba_regulator_init();
aruba_touch_init();
- aruba_keys_init();
aruba_usb_init();
aruba_panel_init();
aruba_sensors_init();
aruba_bt_rfkill();
+ aruba_sata_init();
+ tegra_release_bootloader_fb();
+ tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
+}
+
+static void __init tegra_aruba_reserve(void)
+{
+#if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
+ tegra_reserve(0, SZ_4M, 0);
+#else
+ tegra_reserve(SZ_32M, SZ_4M, 0);
+#endif
}
MACHINE_START(ARUBA, "aruba")
.boot_params = 0x80000100,
- .phys_io = IO_APB_PHYS,
- .io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc,
- .init_irq = tegra_init_irq,
- .init_machine = tegra_aruba_init,
.map_io = tegra_map_common_io,
+ .reserve = tegra_aruba_reserve,
+ .init_early = tegra_init_early,
+ .init_irq = tegra_init_irq,
+ .handle_irq = gic_handle_irq,
.timer = &tegra_timer,
+ .init_machine = tegra_aruba_init,
MACHINE_END