config ARCH_TEGRA_2x_SOC
bool "Enable support for Tegra20 family"
depends on !ARCH_TEGRA_3x_SOC
+ select ARM_CPU_SUSPEND if PM
select ARCH_TEGRA_HAS_PCIE
select CPU_V7
select ARM_GIC
- select ARM_SAVE_DEBUG_CONTEXT
+ select ARM_SAVE_DEBUG_CONTEXT if PM_SLEEP
select ARCH_REQUIRE_GPIOLIB
+ select PINCTRL
+ select PINCTRL_TEGRA20
select USB_ARCH_HAS_EHCI if USB_SUPPORT
- select USB_ULPI if USB_SUPPORT
+ select USB_ULPI if USB
select USB_ULPI_VIEWPORT if USB_SUPPORT
+ select ARM_ERRATA_720789
+ select ARM_ERRATA_751472
+ select ARM_ERRATA_754327
+ select ARM_ERRATA_764369
select ARM_ERRATA_742230 if SMP
+ select PL310_ERRATA_727915 if CACHE_L2X0
+ select PL310_ERRATA_769419 if CACHE_L2X0
+ select CPU_FREQ_TABLE if CPU_FREQ
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
select ARCH_SUPPORTS_MSI if TEGRA_PCI
select PCI_MSI if TEGRA_PCI
+ select CPA
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
config ARCH_TEGRA_3x_SOC
bool "Enable support for Tegra30 family"
+ select ARM_CPU_SUSPEND if PM
select ARCH_TEGRA_HAS_PCIE
select ARCH_TEGRA_HAS_SATA
select ARCH_TEGRA_HAS_DUAL_3D
select ARCH_TEGRA_HAS_DUAL_CPU_CLUSTERS
select CPU_V7
select ARM_GIC
- select ARM_SAVE_DEBUG_CONTEXT
+ select ARM_SAVE_DEBUG_CONTEXT if PM_SLEEP
select GIC_SET_MULTIPLE_CPUS if SMP
select ARCH_REQUIRE_GPIOLIB
+ select PINCTRL
+ select PINCTRL_TEGRA30
select USB_ARCH_HAS_EHCI if USB_SUPPORT
- select USB_ULPI if USB_SUPPORT
+ select USB_ULPI if USB
select USB_ULPI_VIEWPORT if USB_SUPPORT
select USE_OF
select REPORT_PRESENT_CPUS if TEGRA_AUTO_HOTPLUG
select ARCH_SUPPORTS_MSI if TEGRA_PCI
select PCI_MSI if TEGRA_PCI
+ select ARM_ERRATA_743622
+ select ARM_ERRATA_751472
select ARM_ERRATA_754322
+ select ARM_ERRATA_764369
+ select PL310_ERRATA_769419 if CACHE_L2X0
+ select CPU_FREQ_TABLE if CPU_FREQ
select TEGRA_LP2_ARM_TWD if HAVE_ARM_TWD && !TEGRA_RAIL_OFF_MULTIPLE_CPUS
+ select CPA
help
Support for NVIDIA Tegra T30 processor family, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
config MACH_VENTANA
bool "Ventana board"
depends on ARCH_TEGRA_2x_SOC
+ select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
help
Support for NVIDIA Ventana development platform
help
Support for the nVidia Ventana development platform
-# Whistler
+config MACH_WHISTLER
+ bool "Whistler board"
+ depends on ARCH_TEGRA_2x_SOC
+ select MACH_HAS_SND_SOC_TEGRA_WM8753 if SND_SOC
+ select MACH_HAS_SND_SOC_TEGRA_TLV320AIC326X if SND_SOC
+ help
+ Support for NVIDIA Whistler development platform
+
+config MACH_ARUBA
+ bool "Aruba board"
+ depends on ARCH_TEGRA_3x_SOC
+ select TEGRA_FPGA_PLATFORM
+ help
+ Support for NVIDIA Aruba2 FPGA development platform
-# Aruba
+config MACH_CARDHU
+ bool "Cardhu board"
+ depends on ARCH_TEGRA_3x_SOC
+ select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
+ select MACH_HAS_SND_SOC_TEGRA_TLV320AIC326X if SND_SOC
+ select MACH_HAS_SND_SOC_TEGRA_MAX98095 if SND_SOC
+ help
+ Support for NVIDIA Cardhu development platform
-# Cardhu
+config MACH_P1852
+ bool "P1852 board"
+ depends on ARCH_TEGRA_3x_SOC
+ help
+ Support for NVIDIA P1852 development platform
+
+config MACH_TEGRA_ENTERPRISE
+ bool "Enterprise board"
+ depends on ARCH_TEGRA_3x_SOC
+ select MACH_HAS_SND_SOC_TEGRA_MAX98088 if SND_SOC
+ select MACH_HAS_SND_SOC_TEGRA_TLV320AIC326X if SND_SOC
+ select TEGRA_SLOW_CSITE
+ help
+ Support for NVIDIA Enterprise development platform
-# Enterprise
+config MACH_KAI
+ bool "Kai board"
+ depends on ARCH_TEGRA_3x_SOC
+ select MACH_HAS_SND_SOC_TEGRA_RT5639 if SND_SOC
+ select MACH_HAS_SND_SOC_TEGRA_RT5640 if SND_SOC
+ help
+ Support for NVIDIA KAI development platform
choice
prompt "Tegra platform type"
on a FPGA platform.
endchoice
+source "arch/arm/mach-tegra/p852/Kconfig"
+
choice
prompt "Low-level debug console UART"
default TEGRA_DEBUG_UART_NONE
help
Enable support for the Tegra PWM controller(s).
+config TEGRA_FIQ_DEBUGGER
+ bool "Enable the FIQ serial debugger on Tegra"
+ default n
+ select FIQ_DEBUGGER
+ help
+ Enables the FIQ serial debugger on Tegra
+
+config TEGRA_CARDHU_DSI
+ bool "Support DSI panel on Cardhu"
+ depends on MACH_CARDHU
+ select TEGRA_DSI
+ help
+ Support for DSI Panel on Nvidia Cardhu
+
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
depends on TEGRA_SILICON_PLATFORM
space through the SMMU (System Memory Management Unit)
hardware included on Tegra SoCs.
-config TEGRA_SMMU_BASE_AT_E0000000
- bool "Force SMMU IOVA base to 0xe0000000"
- depends on TEGRA_IOVMM_SMMU
- default n
- help
- Forces SMMU IOVA base address to 0xe0000000 for debug purposes
- only. Select n for production systems.
-
config TEGRA_IOVMM_SMMU_SYSFS
bool "Enable SMMU register access for debugging"
depends on TEGRA_IOVMM_SMMU
high/low power CPU clusters automatically, corresponding to
CPU frequency scaling.
+config TEGRA_MC_EARLY_ACK
+ bool "Enable early acknowledgement from mermory controller"
+ depends on ARCH_TEGRA_3x_SOC
+ default y
+ help
+ This option enables early acknowledgement from memory
+ controller. This feature is used to improve CPU memory
+ write performance.
+
config TEGRA_MC_PROFILE
tristate "Enable profiling memory controller utilization"
default y
default "2" if ARCH_TEGRA_2x_SOC
default "1"
-config TEGRA_LEGACY_AUDIO
- bool "Enable Tegra Legacy Audio APIs"
+config TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND
+ bool "Use conservative cpu frequency governor when device enters early suspend"
+ depends on HAS_EARLYSUSPEND && CPU_FREQ
default n
help
- Say Y if you want to add support legacy (non-ALSA) audio APIs on
- Tegra. This will disable ALSA (ASoC) support.
+ Also will restore to original cpu frequency governor when device is resumed
config TEGRA_STAT_MON
bool "Enable H/W statistics monitor"
help
Enables support for hardware statistics monitor for AVP.
+config USB_HOTPLUG
+ bool "Enabling the USB hotplug"
+ default n
+
config TEGRA_DYNAMIC_PWRDET
bool "Enable dynamic activation of IO level auto-detection"
depends on TEGRA_SILICON_PLATFORM
This option enables support for out-of_band remote wakeup, selective
suspend and system suspend/resume.
+config TEGRA_BB_XMM_POWER
+ bool "Enable power driver for XMM modem"
+ default n
+ help
+ Enables power driver which controls gpio signals to XMM modem.
+
+config TEGRA_BB_XMM_POWER2
+ tristate "Enable power driver for XMM modem (flashless)"
+ default n
+ help
+ Enables power driver which controls gpio signals to XMM modem
+ (in flashless configuration). User-mode application must
+ insert this LKM to initiate 2nd USB enumeration power sequence
+ - after modem software has been downloaded to flashless device.
+
config TEGRA_THERMAL_SYSFS
bool "Enable Thermal driver to use Thermal Sysfs infrastructure"
depends on THERMAL
config TEGRA_RAIL_OFF_MULTIPLE_CPUS
bool
-endif
config TEGRA_SLOW_CSITE
bool "lower csite clock to 1 Mhz to reduce its power consumption"
help
When enabled, csite will be running at 1 Mhz and the performance of
jtag, lauterbach and other debugger will be extremely slow.
+
+config TEGRA_PREINIT_CLOCKS
+ bool "Preinitialize Tegra clocks to known states"
+ default n
+ help
+ Preinitialize Tegra clocks to known states before actual full-
+ scale clock initialization starts.
+endif