Merge tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm...
[linux-2.6.git] / arch / arm / mach-omap2 / pm24xx.c
index 730bb00..95442b6 100644 (file)
@@ -26,7 +26,6 @@
 #include <linux/module.h>
 #include <linux/delay.h>
 #include <linux/clk.h>
-#include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/time.h>
 #include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/system_misc.h>
 
-#include <mach/irqs.h>
 #include <plat/clock.h>
 #include <plat/sram.h>
 #include <plat/dma.h>
 #include <plat/board.h>
 
+#include <mach/irqs.h>
+
 #include "common.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-24xx.h"
 #include "sdrc.h"
 #include "pm.h"
 #include "control.h"
-
 #include "powerdomain.h"
 #include "clockdomain.h"
 
-#ifdef CONFIG_SUSPEND
-static suspend_state_t suspend_state = PM_SUSPEND_ON;
-static inline bool is_suspending(void)
-{
-       return (suspend_state != PM_SUSPEND_ON);
-}
-#else
-static inline bool is_suspending(void)
-{
-       return false;
-}
-#endif
-
 static void (*omap2_sram_idle)(void);
 static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
                                  void __iomem *sdrc_power);
@@ -86,7 +72,7 @@ static int omap2_fclks_active(void)
        return (f1 | f2) ? 1 : 0;
 }
 
-static void omap2_enter_full_retention(void)
+static int omap2_enter_full_retention(void)
 {
        u32 l;
 
@@ -149,6 +135,8 @@ no_sleep:
 
        /* Mask future PRCM-to-MPU interrupts */
        omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
+
+       return 0;
 }
 
 static int omap2_i2c_active(void)
@@ -227,7 +215,6 @@ static int omap2_can_sleep(void)
 
 static void omap2_pm_idle(void)
 {
-       local_irq_disable();
        local_fiq_disable();
 
        if (!omap2_can_sleep()) {
@@ -244,78 +231,6 @@ static void omap2_pm_idle(void)
 
 out:
        local_fiq_enable();
-       local_irq_enable();
-}
-
-#ifdef CONFIG_SUSPEND
-static int omap2_pm_begin(suspend_state_t state)
-{
-       disable_hlt();
-       suspend_state = state;
-       return 0;
-}
-
-static int omap2_pm_suspend(void)
-{
-       u32 wken_wkup, mir1;
-
-       wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
-       wken_wkup &= ~OMAP24XX_EN_GPT1_MASK;
-       omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
-
-       /* Mask GPT1 */
-       mir1 = omap_readl(0x480fe0a4);
-       omap_writel(1 << 5, 0x480fe0ac);
-
-       omap2_enter_full_retention();
-
-       omap_writel(mir1, 0x480fe0a4);
-       omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
-
-       return 0;
-}
-
-static int omap2_pm_enter(suspend_state_t state)
-{
-       int ret = 0;
-
-       switch (state) {
-       case PM_SUSPEND_STANDBY:
-       case PM_SUSPEND_MEM:
-               ret = omap2_pm_suspend();
-               break;
-       default:
-               ret = -EINVAL;
-       }
-
-       return ret;
-}
-
-static void omap2_pm_end(void)
-{
-       suspend_state = PM_SUSPEND_ON;
-       enable_hlt();
-}
-
-static const struct platform_suspend_ops omap_pm_ops = {
-       .begin          = omap2_pm_begin,
-       .enter          = omap2_pm_enter,
-       .end            = omap2_pm_end,
-       .valid          = suspend_valid_only_mem,
-};
-#else
-static const struct platform_suspend_ops __initdata omap_pm_ops;
-#endif /* CONFIG_SUSPEND */
-
-/* XXX This function should be shareable between OMAP2xxx and OMAP3 */
-static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
-{
-       if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
-               clkdm_allow_idle(clkdm);
-       else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
-                atomic_read(&clkdm->usecount) == 0)
-               clkdm_sleep(clkdm);
-       return 0;
 }
 
 static void __init prcm_setup_regs(void)
@@ -359,9 +274,13 @@ static void __init prcm_setup_regs(void)
        clkdm_sleep(gfx_clkdm);
 
        /* Enable hardware-supervised idle for all clkdms */
-       clkdm_for_each(clkdms_setup, NULL);
+       clkdm_for_each(omap_pm_clkdms_setup, NULL);
        clkdm_add_wkdep(mpu_clkdm, wkup_clkdm);
 
+#ifdef CONFIG_SUSPEND
+       omap_pm_suspend = omap2_enter_full_retention;
+#endif
+
        /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk
         * stabilisation */
        omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
@@ -462,8 +381,7 @@ static int __init omap2_pm_init(void)
                                                    omap24xx_cpu_suspend_sz);
        }
 
-       suspend_set_ops(&omap_pm_ops);
-       pm_idle = omap2_pm_idle;
+       arm_pm_idle = omap2_pm_idle;
 
        return 0;
 }