Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6.git] / arch / arm / kernel / head.S
index 7898cbc..38ccbe1 100644 (file)
@@ -29,9 +29,6 @@
 #define KERNEL_RAM_VADDR       (PAGE_OFFSET + TEXT_OFFSET)
 #define KERNEL_RAM_PADDR       (PHYS_OFFSET + TEXT_OFFSET)
 
-#define ATAG_CORE 0x54410001
-#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
-
 
 /*
  * swapper_pg_dir is the virtual address of the initial page table.
@@ -78,9 +75,8 @@
  * circumstances, zImage) is for.
  */
        .section ".text.head", "ax"
-       .type   stext, %function
 ENTRY(stext)
-       msr     cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
+       setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
                                                @ and irqs disabled
        mrc     p15, 0, r9, c0, c0              @ get processor id
        bl      __lookup_processor_type         @ r5=procinfo r9=cpuid
@@ -101,11 +97,13 @@ ENTRY(stext)
         */
        ldr     r13, __switch_data              @ address to jump to after
                                                @ mmu has been enabled
-       adr     lr, __enable_mmu                @ return (PIC) address
-       add     pc, r10, #PROCINFO_INITFUNC
+       adr     lr, BSYM(__enable_mmu)          @ return (PIC) address
+ ARM(  add     pc, r10, #PROCINFO_INITFUNC     )
+ THUMB(        add     r12, r10, #PROCINFO_INITFUNC    )
+ THUMB(        mov     pc, r12                         )
+ENDPROC(stext)
 
 #if defined(CONFIG_SMP)
-       .type   secondary_startup, #function
 ENTRY(secondary_startup)
        /*
         * Common entry point for secondary CPUs.
@@ -114,7 +112,7 @@ ENTRY(secondary_startup)
         * the processor type - there is no need to check the machine type
         * as it has already been validated by the primary processor.
         */
-       msr     cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
+       setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
        mrc     p15, 0, r9, c0, c0              @ get processor id
        bl      __lookup_processor_type
        movs    r10, r5                         @ invalid processor?
@@ -125,12 +123,16 @@ ENTRY(secondary_startup)
         * Use the page tables supplied from  __cpu_up.
         */
        adr     r4, __secondary_data
-       ldmia   r4, {r5, r7, r13}               @ address to jump to after
+       ldmia   r4, {r5, r7, r12}               @ address to jump to after
        sub     r4, r4, r5                      @ mmu has been enabled
        ldr     r4, [r7, r4]                    @ get secondary_data.pgdir
-       adr     lr, __enable_mmu                @ return address
-       add     pc, r10, #PROCINFO_INITFUNC     @ initialise processor
-                                               @ (return control reg)
+       adr     lr, BSYM(__enable_mmu)          @ return address
+       mov     r13, r12                        @ __secondary_switched address
+ ARM(  add     pc, r10, #PROCINFO_INITFUNC     ) @ initialise processor
+                                                 @ (return control reg)
+ THUMB(        add     r12, r10, #PROCINFO_INITFUNC    )
+ THUMB(        mov     pc, r12                         )
+ENDPROC(secondary_startup)
 
        /*
         * r6  = &secondary_data
@@ -139,6 +141,7 @@ ENTRY(__secondary_switched)
        ldr     sp, [r7, #4]                    @ get secondary_data.stack
        mov     fp, #0
        b       secondary_start_kernel
+ENDPROC(__secondary_switched)
 
        .type   __secondary_data, %object
 __secondary_data:
@@ -154,7 +157,6 @@ __secondary_data:
  * this is just loading the page table pointer and domain access
  * registers.
  */
-       .type   __enable_mmu, %function
 __enable_mmu:
 #ifdef CONFIG_ALIGNMENT_TRAP
        orr     r0, r0, #CR_A
@@ -177,6 +179,7 @@ __enable_mmu:
        mcr     p15, 0, r5, c3, c0, 0           @ load domain access register
        mcr     p15, 0, r4, c2, c0, 0           @ load page table pointer
        b       __turn_mmu_on
+ENDPROC(__enable_mmu)
 
 /*
  * Enable the MMU.  This completely changes the structure of the visible
@@ -190,15 +193,14 @@ __enable_mmu:
  * other registers depend on the function called upon completion
  */
        .align  5
-       .type   __turn_mmu_on, %function
 __turn_mmu_on:
        mov     r0, r0
        mcr     p15, 0, r0, c1, c0, 0           @ write control reg
        mrc     p15, 0, r3, c0, c0, 0           @ read id reg
        mov     r3, r3
-       mov     r3, r3
-       mov     pc, r13
-
+       mov     r3, r13
+       mov     pc, r3
+ENDPROC(__turn_mmu_on)
 
 
 /*
@@ -214,7 +216,6 @@ __turn_mmu_on:
  *  r0, r3, r6, r7 corrupted
  *  r4 = physical page table address
  */
-       .type   __create_page_tables, %function
 __create_page_tables:
        pgtbl   r4                              @ page table address
 
@@ -239,7 +240,8 @@ __create_page_tables:
         * will be removed by paging_init().  We use our current program
         * counter to determine corresponding section base address.
         */
-       mov     r6, pc, lsr #20                 @ start of kernel section
+       mov     r6, pc
+       mov     r6, r6, lsr #20                 @ start of kernel section
        orr     r3, r7, r6, lsl #20             @ flags + kernel base
        str     r3, [r4, r6, lsl #2]            @ identity mapping
 
@@ -328,6 +330,7 @@ __create_page_tables:
 #endif
 #endif
        mov     pc, lr
+ENDPROC(__create_page_tables)
        .ltorg
 
 #include "head-common.S"