2 * tegra_pcm.c - Tegra PCM driver
4 * Author: Stephen Warren <swarren@nvidia.com>
5 * Copyright (C) 2010 - NVIDIA, Inc.
7 * Based on code copyright/by:
9 * Copyright (c) 2009-2010, NVIDIA Corporation.
10 * Scott Peterson <speterson@nvidia.com>
11 * Vijay Mali <vmali@nvidia.com>
13 * Copyright (C) 2010 Google, Inc.
14 * Iliyan Malchev <malchev@google.com>
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License
18 * version 2 as published by the Free Software Foundation.
20 * This program is distributed in the hope that it will be useful, but
21 * WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
23 * General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
32 #include <linux/module.h>
33 #include <linux/dma-mapping.h>
34 #include <linux/slab.h>
35 #include <sound/core.h>
36 #include <sound/pcm.h>
37 #include <sound/pcm_params.h>
38 #include <sound/soc.h>
40 #include "tegra_pcm.h"
42 #define DRV_NAME "tegra-pcm-audio"
44 static const struct snd_pcm_hardware tegra_pcm_hardware = {
45 .info = SNDRV_PCM_INFO_MMAP |
46 SNDRV_PCM_INFO_MMAP_VALID |
47 SNDRV_PCM_INFO_PAUSE |
48 SNDRV_PCM_INFO_RESUME |
49 SNDRV_PCM_INFO_INTERLEAVED,
50 .formats = SNDRV_PCM_FMTBIT_S16_LE,
53 .period_bytes_min = 128,
54 .period_bytes_max = PAGE_SIZE,
57 .buffer_bytes_max = PAGE_SIZE * 8,
61 static void tegra_pcm_queue_dma(struct tegra_runtime_data *prtd)
63 struct snd_pcm_substream *substream = prtd->substream;
64 struct snd_dma_buffer *buf = &substream->dma_buffer;
65 struct tegra_dma_req *dma_req;
68 dma_req = &prtd->dma_req[prtd->dma_req_idx];
69 prtd->dma_req_idx = 1 - prtd->dma_req_idx;
71 addr = buf->addr + prtd->dma_pos;
72 prtd->dma_pos += dma_req->size;
73 if (prtd->dma_pos >= prtd->dma_pos_end)
76 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
77 dma_req->source_addr = addr;
79 dma_req->dest_addr = addr;
81 tegra_dma_enqueue_req(prtd->dma_chan, dma_req);
84 static void dma_complete_callback(struct tegra_dma_req *req)
86 struct tegra_runtime_data *prtd = (struct tegra_runtime_data *)req->dev;
87 struct snd_pcm_substream *substream = prtd->substream;
88 struct snd_pcm_runtime *runtime = substream->runtime;
90 spin_lock(&prtd->lock);
93 spin_unlock(&prtd->lock);
97 if (++prtd->period_index >= runtime->periods)
98 prtd->period_index = 0;
100 tegra_pcm_queue_dma(prtd);
102 spin_unlock(&prtd->lock);
104 snd_pcm_period_elapsed(substream);
107 static void setup_dma_tx_request(struct tegra_dma_req *req,
108 struct tegra_pcm_dma_params * dmap)
110 req->complete = dma_complete_callback;
111 req->to_memory = false;
112 req->dest_addr = dmap->addr;
113 req->dest_wrap = dmap->wrap;
114 req->source_bus_width = 32;
115 req->source_wrap = 0;
116 req->dest_bus_width = dmap->width;
117 req->req_sel = dmap->req_sel;
120 static void setup_dma_rx_request(struct tegra_dma_req *req,
121 struct tegra_pcm_dma_params * dmap)
123 req->complete = dma_complete_callback;
124 req->to_memory = true;
125 req->source_addr = dmap->addr;
127 req->source_bus_width = dmap->width;
128 req->source_wrap = dmap->wrap;
129 req->dest_bus_width = 32;
130 req->req_sel = dmap->req_sel;
133 static int tegra_pcm_open(struct snd_pcm_substream *substream)
135 struct snd_pcm_runtime *runtime = substream->runtime;
136 struct tegra_runtime_data *prtd;
137 struct snd_soc_pcm_runtime *rtd = substream->private_data;
138 struct tegra_pcm_dma_params * dmap;
141 prtd = kzalloc(sizeof(struct tegra_runtime_data), GFP_KERNEL);
145 runtime->private_data = prtd;
146 prtd->substream = substream;
148 spin_lock_init(&prtd->lock);
150 dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
153 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
154 setup_dma_tx_request(&prtd->dma_req[0], dmap);
155 setup_dma_tx_request(&prtd->dma_req[1], dmap);
157 setup_dma_rx_request(&prtd->dma_req[0], dmap);
158 setup_dma_rx_request(&prtd->dma_req[1], dmap);
161 prtd->dma_req[0].dev = prtd;
162 prtd->dma_req[1].dev = prtd;
164 prtd->dma_chan = tegra_dma_allocate_channel(
165 TEGRA_DMA_MODE_CONTINUOUS_SINGLE,
167 if (prtd->dma_chan == NULL) {
173 /* Set HW params now that initialization is complete */
174 snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
176 /* Ensure period size is multiple of 8 */
177 ret = snd_pcm_hw_constraint_step(runtime, 0,
178 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 0x8);
182 /* Ensure that buffer size is a multiple of period size */
183 ret = snd_pcm_hw_constraint_integer(runtime,
184 SNDRV_PCM_HW_PARAM_PERIODS);
191 if (prtd->dma_chan) {
192 tegra_dma_free_channel(prtd->dma_chan);
200 static int tegra_pcm_close(struct snd_pcm_substream *substream)
202 struct snd_pcm_runtime *runtime = substream->runtime;
203 struct tegra_runtime_data *prtd = runtime->private_data;
206 tegra_dma_free_channel(prtd->dma_chan);
213 static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
214 struct snd_pcm_hw_params *params)
216 struct snd_pcm_runtime *runtime = substream->runtime;
217 struct tegra_runtime_data *prtd = runtime->private_data;
219 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
221 prtd->dma_req[0].size = params_period_bytes(params);
222 prtd->dma_req[1].size = prtd->dma_req[0].size;
227 static int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
229 snd_pcm_set_runtime_buffer(substream, NULL);
234 static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
236 struct snd_pcm_runtime *runtime = substream->runtime;
237 struct tegra_runtime_data *prtd = runtime->private_data;
241 case SNDRV_PCM_TRIGGER_START:
243 prtd->dma_pos_end = frames_to_bytes(runtime, runtime->periods * runtime->period_size);
244 prtd->period_index = 0;
245 prtd->dma_req_idx = 0;
247 case SNDRV_PCM_TRIGGER_RESUME:
248 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
249 spin_lock_irqsave(&prtd->lock, flags);
251 spin_unlock_irqrestore(&prtd->lock, flags);
252 tegra_pcm_queue_dma(prtd);
253 tegra_pcm_queue_dma(prtd);
255 case SNDRV_PCM_TRIGGER_STOP:
256 case SNDRV_PCM_TRIGGER_SUSPEND:
257 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
258 spin_lock_irqsave(&prtd->lock, flags);
260 spin_unlock_irqrestore(&prtd->lock, flags);
261 tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[0]);
262 tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[1]);
271 static snd_pcm_uframes_t tegra_pcm_pointer(struct snd_pcm_substream *substream)
273 struct snd_pcm_runtime *runtime = substream->runtime;
274 struct tegra_runtime_data *prtd = runtime->private_data;
276 return prtd->period_index * runtime->period_size;
280 static int tegra_pcm_mmap(struct snd_pcm_substream *substream,
281 struct vm_area_struct *vma)
283 struct snd_pcm_runtime *runtime = substream->runtime;
285 return dma_mmap_writecombine(substream->pcm->card->dev, vma,
291 static struct snd_pcm_ops tegra_pcm_ops = {
292 .open = tegra_pcm_open,
293 .close = tegra_pcm_close,
294 .ioctl = snd_pcm_lib_ioctl,
295 .hw_params = tegra_pcm_hw_params,
296 .hw_free = tegra_pcm_hw_free,
297 .trigger = tegra_pcm_trigger,
298 .pointer = tegra_pcm_pointer,
299 .mmap = tegra_pcm_mmap,
302 static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
304 struct snd_pcm_substream *substream = pcm->streams[stream].substream;
305 struct snd_dma_buffer *buf = &substream->dma_buffer;
306 size_t size = tegra_pcm_hardware.buffer_bytes_max;
308 buf->area = dma_alloc_writecombine(pcm->card->dev, size,
309 &buf->addr, GFP_KERNEL);
313 buf->dev.type = SNDRV_DMA_TYPE_DEV;
314 buf->dev.dev = pcm->card->dev;
315 buf->private_data = NULL;
321 static void tegra_pcm_deallocate_dma_buffer(struct snd_pcm *pcm, int stream)
323 struct snd_pcm_substream *substream;
324 struct snd_dma_buffer *buf;
326 substream = pcm->streams[stream].substream;
330 buf = &substream->dma_buffer;
334 dma_free_writecombine(pcm->card->dev, buf->bytes,
335 buf->area, buf->addr);
339 static u64 tegra_dma_mask = DMA_BIT_MASK(32);
341 static int tegra_pcm_new(struct snd_soc_pcm_runtime *rtd)
343 struct snd_card *card = rtd->card->snd_card;
344 struct snd_pcm *pcm = rtd->pcm;
347 if (!card->dev->dma_mask)
348 card->dev->dma_mask = &tegra_dma_mask;
349 if (!card->dev->coherent_dma_mask)
350 card->dev->coherent_dma_mask = 0xffffffff;
352 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
353 ret = tegra_pcm_preallocate_dma_buffer(pcm,
354 SNDRV_PCM_STREAM_PLAYBACK);
359 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
360 ret = tegra_pcm_preallocate_dma_buffer(pcm,
361 SNDRV_PCM_STREAM_CAPTURE);
369 tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
374 static void tegra_pcm_free(struct snd_pcm *pcm)
376 tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE);
377 tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
380 static struct snd_soc_platform_driver tegra_pcm_platform = {
381 .ops = &tegra_pcm_ops,
382 .pcm_new = tegra_pcm_new,
383 .pcm_free = tegra_pcm_free,
386 static int __devinit tegra_pcm_platform_probe(struct platform_device *pdev)
388 return snd_soc_register_platform(&pdev->dev, &tegra_pcm_platform);
391 static int __devexit tegra_pcm_platform_remove(struct platform_device *pdev)
393 snd_soc_unregister_platform(&pdev->dev);
397 static struct platform_driver tegra_pcm_driver = {
400 .owner = THIS_MODULE,
402 .probe = tegra_pcm_platform_probe,
403 .remove = __devexit_p(tegra_pcm_platform_remove),
405 module_platform_driver(tegra_pcm_driver);
407 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
408 MODULE_DESCRIPTION("Tegra PCM ASoC driver");
409 MODULE_LICENSE("GPL");
410 MODULE_ALIAS("platform:" DRV_NAME);