9beb921565d0f5b4cf400299758c7f6c36773358
[linux-2.6.git] / sound / soc / tegra / tegra_pcm.c
1 /*
2  * tegra_pcm.c - Tegra PCM driver
3  *
4  * Author: Stephen Warren <swarren@nvidia.com>
5  * Copyright (C) 2010 - NVIDIA, Inc.
6  *
7  * Based on code copyright/by:
8  *
9  * Copyright (c) 2009-2010, NVIDIA Corporation.
10  * Scott Peterson <speterson@nvidia.com>
11  * Vijay Mali <vmali@nvidia.com>
12  *
13  * Copyright (C) 2010 Google, Inc.
14  * Iliyan Malchev <malchev@google.com>
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License
18  * version 2 as published by the Free Software Foundation.
19  *
20  * This program is distributed in the hope that it will be useful, but
21  * WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
23  * General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, write to the Free Software
27  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
28  * 02110-1301 USA
29  *
30  */
31
32 #include <linux/module.h>
33 #include <linux/dma-mapping.h>
34 #include <linux/slab.h>
35 #include <sound/core.h>
36 #include <sound/pcm.h>
37 #include <sound/pcm_params.h>
38 #include <sound/soc.h>
39
40 #include "tegra_pcm.h"
41
42 #define DRV_NAME "tegra-pcm-audio"
43
44 static const struct snd_pcm_hardware tegra_pcm_hardware = {
45         .info                   = SNDRV_PCM_INFO_MMAP |
46                                   SNDRV_PCM_INFO_MMAP_VALID |
47                                   SNDRV_PCM_INFO_PAUSE |
48                                   SNDRV_PCM_INFO_RESUME |
49                                   SNDRV_PCM_INFO_INTERLEAVED,
50         .formats                = SNDRV_PCM_FMTBIT_S16_LE,
51         .channels_min           = 1,
52         .channels_max           = 2,
53         .period_bytes_min       = 128,
54         .period_bytes_max       = PAGE_SIZE,
55         .periods_min            = 2,
56         .periods_max            = 8,
57         .buffer_bytes_max       = PAGE_SIZE * 8,
58         .fifo_size              = 4,
59 };
60
61 static void tegra_pcm_queue_dma(struct tegra_runtime_data *prtd)
62 {
63         struct snd_pcm_substream *substream = prtd->substream;
64         struct snd_dma_buffer *buf = &substream->dma_buffer;
65         struct tegra_dma_req *dma_req;
66         unsigned long addr;
67
68         dma_req = &prtd->dma_req[prtd->dma_req_idx];
69         if (++prtd->dma_req_idx >= prtd->dma_req_count)
70                 prtd->dma_req_idx -= prtd->dma_req_count;
71
72         addr = buf->addr + prtd->dma_pos;
73         prtd->dma_pos += dma_req->size;
74         if (prtd->dma_pos >= prtd->dma_pos_end)
75                 prtd->dma_pos = 0;
76
77         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
78                 dma_req->source_addr = addr;
79         else
80                 dma_req->dest_addr = addr;
81
82         tegra_dma_enqueue_req(prtd->dma_chan, dma_req);
83 }
84
85 static void dma_complete_callback(struct tegra_dma_req *req)
86 {
87         struct tegra_runtime_data *prtd = (struct tegra_runtime_data *)req->dev;
88         struct snd_pcm_substream *substream = prtd->substream;
89         struct snd_pcm_runtime *runtime = substream->runtime;
90
91         spin_lock(&prtd->lock);
92
93         if (!prtd->running) {
94                 spin_unlock(&prtd->lock);
95                 return;
96         }
97
98         if (++prtd->period_index >= runtime->periods)
99                 prtd->period_index = 0;
100
101         tegra_pcm_queue_dma(prtd);
102
103         spin_unlock(&prtd->lock);
104
105         snd_pcm_period_elapsed(substream);
106 }
107
108 static void setup_dma_tx_request(struct tegra_dma_req *req,
109                                         struct tegra_pcm_dma_params * dmap)
110 {
111         req->complete = dma_complete_callback;
112         req->to_memory = false;
113         req->dest_addr = dmap->addr;
114         req->dest_wrap = dmap->wrap;
115         req->source_bus_width = 32;
116         req->source_wrap = 0;
117         req->dest_bus_width = dmap->width;
118         req->req_sel = dmap->req_sel;
119 }
120
121 static void setup_dma_rx_request(struct tegra_dma_req *req,
122                                         struct tegra_pcm_dma_params * dmap)
123 {
124         req->complete = dma_complete_callback;
125         req->to_memory = true;
126         req->source_addr = dmap->addr;
127         req->dest_wrap = 0;
128         req->source_bus_width = dmap->width;
129         req->source_wrap = dmap->wrap;
130         req->dest_bus_width = 32;
131         req->req_sel = dmap->req_sel;
132 }
133
134 int tegra_pcm_allocate(struct snd_pcm_substream *substream,
135                                         int dma_mode,
136                                         const struct snd_pcm_hardware *pcm_hardware)
137 {
138         struct snd_pcm_runtime *runtime = substream->runtime;
139         struct tegra_runtime_data *prtd;
140         struct snd_soc_pcm_runtime *rtd = substream->private_data;
141         struct tegra_pcm_dma_params * dmap;
142         int ret = 0;
143         int i = 0;
144
145         prtd = kzalloc(sizeof(struct tegra_runtime_data), GFP_KERNEL);
146         if (prtd == NULL)
147                 return -ENOMEM;
148
149         runtime->private_data = prtd;
150         prtd->substream = substream;
151
152         spin_lock_init(&prtd->lock);
153
154         dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
155         prtd->dma_req_count = MAX_DMA_REQ_COUNT;
156
157         if (dmap) {
158                 for (i = 0; i < prtd->dma_req_count; i++)
159                         prtd->dma_req[i].dev = prtd;
160
161                 prtd->dma_chan = tegra_dma_allocate_channel(
162                                         dma_mode,
163                                         "pcm");
164                 if (prtd->dma_chan == NULL) {
165                         ret = -ENOMEM;
166                         goto err;
167                 }
168         }
169
170         /* Set HW params now that initialization is complete */
171         snd_soc_set_runtime_hwparams(substream, pcm_hardware);
172
173         /* Ensure period size is multiple of 8 */
174         ret = snd_pcm_hw_constraint_step(runtime, 0,
175                 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 0x8);
176         if (ret < 0)
177                 goto err;
178
179         /* Ensure that buffer size is a multiple of period size */
180         ret = snd_pcm_hw_constraint_integer(runtime,
181                                                 SNDRV_PCM_HW_PARAM_PERIODS);
182         if (ret < 0)
183                 goto err;
184
185         return 0;
186
187 err:
188         if (prtd->dma_chan) {
189                 tegra_dma_free_channel(prtd->dma_chan);
190         }
191
192         kfree(prtd);
193
194         return ret;
195 }
196
197 static int tegra_pcm_open(struct snd_pcm_substream *substream)
198 {
199         return tegra_pcm_allocate(substream,
200                                         TEGRA_DMA_MODE_CONTINUOUS_SINGLE,
201                                         &tegra_pcm_hardware);
202
203 }
204
205 int tegra_pcm_close(struct snd_pcm_substream *substream)
206 {
207         struct snd_pcm_runtime *runtime = substream->runtime;
208         struct tegra_runtime_data *prtd = runtime->private_data;
209
210         if (prtd->dma_chan)
211                 tegra_dma_free_channel(prtd->dma_chan);
212
213         kfree(prtd);
214
215         return 0;
216 }
217
218 int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
219                                 struct snd_pcm_hw_params *params)
220 {
221         struct snd_pcm_runtime *runtime = substream->runtime;
222         struct tegra_runtime_data *prtd = runtime->private_data;
223         struct snd_soc_pcm_runtime *rtd = substream->private_data;
224         struct tegra_pcm_dma_params * dmap;
225         int i;
226
227         snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
228
229         /* Limit dma_req_count to period count */
230         if (prtd->dma_req_count > params_periods(params))
231                 prtd->dma_req_count = params_periods(params);
232         dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
233         if (dmap) {
234                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
235                         for (i = 0; i < prtd->dma_req_count; i++)
236                                 setup_dma_tx_request(&prtd->dma_req[i], dmap);
237                 } else {
238                         for (i = 0; i < prtd->dma_req_count; i++)
239                                 setup_dma_rx_request(&prtd->dma_req[i], dmap);
240                 }
241         }
242         for (i = 0; i < prtd->dma_req_count; i++)
243                 prtd->dma_req[i].size = params_period_bytes(params);
244
245         return 0;
246 }
247
248 int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
249 {
250         snd_pcm_set_runtime_buffer(substream, NULL);
251
252         return 0;
253 }
254
255 int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
256 {
257         struct snd_pcm_runtime *runtime = substream->runtime;
258         struct tegra_runtime_data *prtd = runtime->private_data;
259         unsigned long flags;
260         int i;
261
262         switch (cmd) {
263         case SNDRV_PCM_TRIGGER_START:
264                 prtd->dma_pos = 0;
265                 prtd->dma_pos_end = frames_to_bytes(runtime, runtime->periods * runtime->period_size);
266                 prtd->period_index = 0;
267                 prtd->dma_req_idx = 0;
268                 /* Fall-through */
269         case SNDRV_PCM_TRIGGER_RESUME:
270         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
271                 spin_lock_irqsave(&prtd->lock, flags);
272                 prtd->running = 1;
273                 spin_unlock_irqrestore(&prtd->lock, flags);
274                 for (i = 0; i < prtd->dma_req_count; i++)
275                         tegra_pcm_queue_dma(prtd);
276                 break;
277         case SNDRV_PCM_TRIGGER_STOP:
278         case SNDRV_PCM_TRIGGER_SUSPEND:
279         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
280                 spin_lock_irqsave(&prtd->lock, flags);
281                 prtd->running = 0;
282                 spin_unlock_irqrestore(&prtd->lock, flags);
283                 tegra_dma_cancel(prtd->dma_chan);
284                 for (i = 0; i < prtd->dma_req_count; i++) {
285                         if (prtd->dma_req[i].status ==
286                                 -TEGRA_DMA_REQ_ERROR_ABORTED)
287                                 prtd->dma_req[i].complete(&prtd->dma_req[i]);
288                 }
289                 break;
290         default:
291                 return -EINVAL;
292         }
293
294         return 0;
295 }
296
297 snd_pcm_uframes_t tegra_pcm_pointer(struct snd_pcm_substream *substream)
298 {
299         struct snd_pcm_runtime *runtime = substream->runtime;
300         struct tegra_runtime_data *prtd = runtime->private_data;
301         int dma_transfer_count;
302
303         dma_transfer_count = tegra_dma_get_transfer_count(prtd->dma_chan,
304                                         &prtd->dma_req[prtd->dma_req_idx]);
305
306         return prtd->period_index * runtime->period_size +
307                 bytes_to_frames(runtime, dma_transfer_count);
308 }
309
310 int tegra_pcm_mmap(struct snd_pcm_substream *substream,
311                                 struct vm_area_struct *vma)
312 {
313         struct snd_pcm_runtime *runtime = substream->runtime;
314
315         return dma_mmap_writecombine(substream->pcm->card->dev, vma,
316                                         runtime->dma_area,
317                                         runtime->dma_addr,
318                                         runtime->dma_bytes);
319 }
320
321 static struct snd_pcm_ops tegra_pcm_ops = {
322         .open           = tegra_pcm_open,
323         .close          = tegra_pcm_close,
324         .ioctl          = snd_pcm_lib_ioctl,
325         .hw_params      = tegra_pcm_hw_params,
326         .hw_free        = tegra_pcm_hw_free,
327         .trigger        = tegra_pcm_trigger,
328         .pointer        = tegra_pcm_pointer,
329         .mmap           = tegra_pcm_mmap,
330 };
331
332 static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
333                                 int stream , size_t size)
334 {
335         struct snd_pcm_substream *substream = pcm->streams[stream].substream;
336         struct snd_dma_buffer *buf = &substream->dma_buffer;
337
338         buf->area = dma_alloc_writecombine(pcm->card->dev, size,
339                                                 &buf->addr, GFP_KERNEL);
340         if (!buf->area)
341                 return -ENOMEM;
342
343         buf->dev.type = SNDRV_DMA_TYPE_DEV;
344         buf->dev.dev = pcm->card->dev;
345         buf->private_data = NULL;
346         buf->bytes = size;
347
348         return 0;
349 }
350
351 void tegra_pcm_deallocate_dma_buffer(struct snd_pcm *pcm, int stream)
352 {
353         struct snd_pcm_substream *substream;
354         struct snd_dma_buffer *buf;
355
356         substream = pcm->streams[stream].substream;
357         if (!substream)
358                 return;
359
360         buf = &substream->dma_buffer;
361         if (!buf->area)
362                 return;
363
364         dma_free_writecombine(pcm->card->dev, buf->bytes,
365                                 buf->area, buf->addr);
366         buf->area = NULL;
367 }
368
369 static u64 tegra_dma_mask = DMA_BIT_MASK(32);
370
371 int tegra_pcm_dma_allocate(struct snd_soc_pcm_runtime *rtd, size_t size)
372 {
373         struct snd_card *card = rtd->card->snd_card;
374         struct snd_pcm *pcm = rtd->pcm;
375         int ret = 0;
376
377         if (!card->dev->dma_mask)
378                 card->dev->dma_mask = &tegra_dma_mask;
379         if (!card->dev->coherent_dma_mask)
380                 card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
381
382         if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
383                 ret = tegra_pcm_preallocate_dma_buffer(pcm,
384                                                 SNDRV_PCM_STREAM_PLAYBACK,
385                                                 size);
386                 if (ret)
387                         goto err;
388         }
389
390         if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
391                 ret = tegra_pcm_preallocate_dma_buffer(pcm,
392                                                 SNDRV_PCM_STREAM_CAPTURE,
393                                                 size);
394                 if (ret)
395                         goto err_free_play;
396         }
397
398         return 0;
399
400 err_free_play:
401         tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
402 err:
403         return ret;
404 }
405
406 int tegra_pcm_new(struct snd_soc_pcm_runtime *rtd)
407 {
408         return tegra_pcm_dma_allocate(rtd ,
409                                         tegra_pcm_hardware.buffer_bytes_max);
410 }
411
412 void tegra_pcm_free(struct snd_pcm *pcm)
413 {
414         tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE);
415         tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
416 }
417
418 static struct snd_soc_platform_driver tegra_pcm_platform = {
419         .ops            = &tegra_pcm_ops,
420         .pcm_new        = tegra_pcm_new,
421         .pcm_free       = tegra_pcm_free,
422 };
423
424 static int __devinit tegra_pcm_platform_probe(struct platform_device *pdev)
425 {
426         return snd_soc_register_platform(&pdev->dev, &tegra_pcm_platform);
427 }
428
429 static int __devexit tegra_pcm_platform_remove(struct platform_device *pdev)
430 {
431         snd_soc_unregister_platform(&pdev->dev);
432         return 0;
433 }
434
435 static struct platform_driver tegra_pcm_driver = {
436         .driver = {
437                 .name = DRV_NAME,
438                 .owner = THIS_MODULE,
439         },
440         .probe = tegra_pcm_platform_probe,
441         .remove = __devexit_p(tegra_pcm_platform_remove),
442 };
443 module_platform_driver(tegra_pcm_driver);
444
445 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
446 MODULE_DESCRIPTION("Tegra PCM ASoC driver");
447 MODULE_LICENSE("GPL");
448 MODULE_ALIAS("platform:" DRV_NAME);