Revert "ASoC: Tegra: Acquire wake_lock during playback capture"
[linux-2.6.git] / sound / soc / tegra / tegra_pcm.c
1 /*
2  * tegra_pcm.c - Tegra PCM driver
3  *
4  * Author: Stephen Warren <swarren@nvidia.com>
5  * Copyright (C) 2010 - NVIDIA, Inc.
6  *
7  * Based on code copyright/by:
8  *
9  * Copyright (c) 2009-2010, NVIDIA Corporation.
10  * Scott Peterson <speterson@nvidia.com>
11  * Vijay Mali <vmali@nvidia.com>
12  *
13  * Copyright (C) 2010 Google, Inc.
14  * Iliyan Malchev <malchev@google.com>
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License
18  * version 2 as published by the Free Software Foundation.
19  *
20  * This program is distributed in the hope that it will be useful, but
21  * WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
23  * General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, write to the Free Software
27  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
28  * 02110-1301 USA
29  *
30  */
31
32 #include <linux/module.h>
33 #include <linux/dma-mapping.h>
34 #include <linux/slab.h>
35 #include <sound/core.h>
36 #include <sound/pcm.h>
37 #include <sound/pcm_params.h>
38 #include <sound/soc.h>
39
40 #include "tegra_pcm.h"
41
42 #define DRV_NAME "tegra-pcm-audio"
43
44 static const struct snd_pcm_hardware tegra_pcm_hardware = {
45         .info                   = SNDRV_PCM_INFO_MMAP |
46                                   SNDRV_PCM_INFO_MMAP_VALID |
47                                   SNDRV_PCM_INFO_PAUSE |
48                                   SNDRV_PCM_INFO_RESUME |
49                                   SNDRV_PCM_INFO_INTERLEAVED,
50         .formats                = SNDRV_PCM_FMTBIT_S16_LE,
51         .channels_min           = 1,
52         .channels_max           = 2,
53         .period_bytes_min       = 128,
54         .period_bytes_max       = PAGE_SIZE,
55         .periods_min            = 2,
56         .periods_max            = 8,
57         .buffer_bytes_max       = PAGE_SIZE * 8,
58         .fifo_size              = 4,
59 };
60
61 static void tegra_pcm_queue_dma(struct tegra_runtime_data *prtd)
62 {
63         struct snd_pcm_substream *substream = prtd->substream;
64         struct snd_dma_buffer *buf = &substream->dma_buffer;
65         struct tegra_dma_req *dma_req;
66         unsigned long addr;
67
68         dma_req = &prtd->dma_req[prtd->dma_req_idx];
69         prtd->dma_req_idx = 1 - prtd->dma_req_idx;
70
71         addr = buf->addr + prtd->dma_pos;
72         prtd->dma_pos += dma_req->size;
73         if (prtd->dma_pos >= prtd->dma_pos_end)
74                 prtd->dma_pos = 0;
75
76         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
77                 dma_req->source_addr = addr;
78         else
79                 dma_req->dest_addr = addr;
80
81         tegra_dma_enqueue_req(prtd->dma_chan, dma_req);
82 }
83
84 static void dma_complete_callback(struct tegra_dma_req *req)
85 {
86         struct tegra_runtime_data *prtd = (struct tegra_runtime_data *)req->dev;
87         struct snd_pcm_substream *substream = prtd->substream;
88         struct snd_pcm_runtime *runtime = substream->runtime;
89
90         spin_lock(&prtd->lock);
91
92         if (!prtd->running) {
93                 spin_unlock(&prtd->lock);
94                 return;
95         }
96
97         if (++prtd->period_index >= runtime->periods)
98                 prtd->period_index = 0;
99
100         tegra_pcm_queue_dma(prtd);
101
102         spin_unlock(&prtd->lock);
103
104         snd_pcm_period_elapsed(substream);
105 }
106
107 static void setup_dma_tx_request(struct tegra_dma_req *req,
108                                         struct tegra_pcm_dma_params * dmap)
109 {
110         req->complete = dma_complete_callback;
111         req->to_memory = false;
112         req->dest_addr = dmap->addr;
113         req->dest_wrap = dmap->wrap;
114         req->source_bus_width = 32;
115         req->source_wrap = 0;
116         req->dest_bus_width = dmap->width;
117         req->req_sel = dmap->req_sel;
118 }
119
120 static void setup_dma_rx_request(struct tegra_dma_req *req,
121                                         struct tegra_pcm_dma_params * dmap)
122 {
123         req->complete = dma_complete_callback;
124         req->to_memory = true;
125         req->source_addr = dmap->addr;
126         req->dest_wrap = 0;
127         req->source_bus_width = dmap->width;
128         req->source_wrap = dmap->wrap;
129         req->dest_bus_width = 32;
130         req->req_sel = dmap->req_sel;
131 }
132
133 static int tegra_pcm_open(struct snd_pcm_substream *substream)
134 {
135         struct snd_pcm_runtime *runtime = substream->runtime;
136         struct tegra_runtime_data *prtd;
137         struct snd_soc_pcm_runtime *rtd = substream->private_data;
138         struct tegra_pcm_dma_params * dmap;
139         int ret = 0;
140
141         prtd = kzalloc(sizeof(struct tegra_runtime_data), GFP_KERNEL);
142         if (prtd == NULL)
143                 return -ENOMEM;
144
145         runtime->private_data = prtd;
146         prtd->substream = substream;
147
148         spin_lock_init(&prtd->lock);
149
150         dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
151
152         if (dmap) {
153                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
154                         setup_dma_tx_request(&prtd->dma_req[0], dmap);
155                         setup_dma_tx_request(&prtd->dma_req[1], dmap);
156                 } else {
157                         setup_dma_rx_request(&prtd->dma_req[0], dmap);
158                         setup_dma_rx_request(&prtd->dma_req[1], dmap);
159                 }
160
161                 prtd->dma_req[0].dev = prtd;
162                 prtd->dma_req[1].dev = prtd;
163
164                 prtd->dma_chan = tegra_dma_allocate_channel(
165                                         TEGRA_DMA_MODE_CONTINUOUS_SINGLE,
166                                         "pcm");
167                 if (prtd->dma_chan == NULL) {
168                         ret = -ENOMEM;
169                         goto err;
170                 }
171         }
172
173         /* Set HW params now that initialization is complete */
174         snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
175
176         /* Ensure period size is multiple of 8 */
177         ret = snd_pcm_hw_constraint_step(runtime, 0,
178                 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 0x8);
179         if (ret < 0)
180                 goto err;
181
182         /* Ensure that buffer size is a multiple of period size */
183         ret = snd_pcm_hw_constraint_integer(runtime,
184                                                 SNDRV_PCM_HW_PARAM_PERIODS);
185         if (ret < 0)
186                 goto err;
187
188         return 0;
189
190 err:
191         if (prtd->dma_chan) {
192                 tegra_dma_free_channel(prtd->dma_chan);
193         }
194
195         kfree(prtd);
196
197         return ret;
198 }
199
200 static int tegra_pcm_close(struct snd_pcm_substream *substream)
201 {
202         struct snd_pcm_runtime *runtime = substream->runtime;
203         struct tegra_runtime_data *prtd = runtime->private_data;
204
205         if (prtd->dma_chan)
206                 tegra_dma_free_channel(prtd->dma_chan);
207
208         kfree(prtd);
209
210         return 0;
211 }
212
213 static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
214                                 struct snd_pcm_hw_params *params)
215 {
216         struct snd_pcm_runtime *runtime = substream->runtime;
217         struct tegra_runtime_data *prtd = runtime->private_data;
218
219         snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
220
221         prtd->dma_req[0].size = params_period_bytes(params);
222         prtd->dma_req[1].size = prtd->dma_req[0].size;
223
224         return 0;
225 }
226
227 static int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
228 {
229         snd_pcm_set_runtime_buffer(substream, NULL);
230
231         return 0;
232 }
233
234 static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
235 {
236         struct snd_pcm_runtime *runtime = substream->runtime;
237         struct tegra_runtime_data *prtd = runtime->private_data;
238         unsigned long flags;
239
240         switch (cmd) {
241         case SNDRV_PCM_TRIGGER_START:
242                 prtd->dma_pos = 0;
243                 prtd->dma_pos_end = frames_to_bytes(runtime, runtime->periods * runtime->period_size);
244                 prtd->period_index = 0;
245                 prtd->dma_req_idx = 0;
246                 /* Fall-through */
247         case SNDRV_PCM_TRIGGER_RESUME:
248         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
249                 spin_lock_irqsave(&prtd->lock, flags);
250                 prtd->running = 1;
251                 spin_unlock_irqrestore(&prtd->lock, flags);
252                 tegra_pcm_queue_dma(prtd);
253                 tegra_pcm_queue_dma(prtd);
254                 break;
255         case SNDRV_PCM_TRIGGER_STOP:
256         case SNDRV_PCM_TRIGGER_SUSPEND:
257         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
258                 spin_lock_irqsave(&prtd->lock, flags);
259                 prtd->running = 0;
260                 spin_unlock_irqrestore(&prtd->lock, flags);
261                 tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[0]);
262                 tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[1]);
263                 break;
264         default:
265                 return -EINVAL;
266         }
267
268         return 0;
269 }
270
271 static snd_pcm_uframes_t tegra_pcm_pointer(struct snd_pcm_substream *substream)
272 {
273         struct snd_pcm_runtime *runtime = substream->runtime;
274         struct tegra_runtime_data *prtd = runtime->private_data;
275         int dma_transfer_count;
276
277         dma_transfer_count = tegra_dma_get_transfer_count(prtd->dma_chan,
278                                         &prtd->dma_req[prtd->dma_req_idx],
279                                         false);
280
281         return prtd->period_index * runtime->period_size +
282                 bytes_to_frames(runtime, dma_transfer_count);
283 }
284
285 static int tegra_pcm_mmap(struct snd_pcm_substream *substream,
286                                 struct vm_area_struct *vma)
287 {
288         struct snd_pcm_runtime *runtime = substream->runtime;
289
290         return dma_mmap_writecombine(substream->pcm->card->dev, vma,
291                                         runtime->dma_area,
292                                         runtime->dma_addr,
293                                         runtime->dma_bytes);
294 }
295
296 static struct snd_pcm_ops tegra_pcm_ops = {
297         .open           = tegra_pcm_open,
298         .close          = tegra_pcm_close,
299         .ioctl          = snd_pcm_lib_ioctl,
300         .hw_params      = tegra_pcm_hw_params,
301         .hw_free        = tegra_pcm_hw_free,
302         .trigger        = tegra_pcm_trigger,
303         .pointer        = tegra_pcm_pointer,
304         .mmap           = tegra_pcm_mmap,
305 };
306
307 static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
308 {
309         struct snd_pcm_substream *substream = pcm->streams[stream].substream;
310         struct snd_dma_buffer *buf = &substream->dma_buffer;
311         size_t size = tegra_pcm_hardware.buffer_bytes_max;
312
313         buf->area = dma_alloc_writecombine(pcm->card->dev, size,
314                                                 &buf->addr, GFP_KERNEL);
315         if (!buf->area)
316                 return -ENOMEM;
317
318         buf->dev.type = SNDRV_DMA_TYPE_DEV;
319         buf->dev.dev = pcm->card->dev;
320         buf->private_data = NULL;
321         buf->bytes = size;
322
323         return 0;
324 }
325
326 static void tegra_pcm_deallocate_dma_buffer(struct snd_pcm *pcm, int stream)
327 {
328         struct snd_pcm_substream *substream;
329         struct snd_dma_buffer *buf;
330
331         substream = pcm->streams[stream].substream;
332         if (!substream)
333                 return;
334
335         buf = &substream->dma_buffer;
336         if (!buf->area)
337                 return;
338
339         dma_free_writecombine(pcm->card->dev, buf->bytes,
340                                 buf->area, buf->addr);
341         buf->area = NULL;
342 }
343
344 static u64 tegra_dma_mask = DMA_BIT_MASK(32);
345
346 static int tegra_pcm_new(struct snd_soc_pcm_runtime *rtd)
347 {
348         struct snd_card *card = rtd->card->snd_card;
349         struct snd_soc_dai *dai = rtd->cpu_dai;
350         struct snd_pcm *pcm = rtd->pcm;
351         int ret = 0;
352
353         if (!card->dev->dma_mask)
354                 card->dev->dma_mask = &tegra_dma_mask;
355         if (!card->dev->coherent_dma_mask)
356                 card->dev->coherent_dma_mask = 0xffffffff;
357
358         if (dai->driver->playback.channels_min) {
359                 ret = tegra_pcm_preallocate_dma_buffer(pcm,
360                                                 SNDRV_PCM_STREAM_PLAYBACK);
361                 if (ret)
362                         goto err;
363         }
364
365         if (dai->driver->capture.channels_min) {
366                 ret = tegra_pcm_preallocate_dma_buffer(pcm,
367                                                 SNDRV_PCM_STREAM_CAPTURE);
368                 if (ret)
369                         goto err_free_play;
370         }
371
372         return 0;
373
374 err_free_play:
375         tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
376 err:
377         return ret;
378 }
379
380 static void tegra_pcm_free(struct snd_pcm *pcm)
381 {
382         tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE);
383         tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
384 }
385
386 struct snd_soc_platform_driver tegra_pcm_platform = {
387         .ops            = &tegra_pcm_ops,
388         .pcm_new        = tegra_pcm_new,
389         .pcm_free       = tegra_pcm_free,
390 };
391
392 static int __devinit tegra_pcm_platform_probe(struct platform_device *pdev)
393 {
394         return snd_soc_register_platform(&pdev->dev, &tegra_pcm_platform);
395 }
396
397 static int __devexit tegra_pcm_platform_remove(struct platform_device *pdev)
398 {
399         snd_soc_unregister_platform(&pdev->dev);
400         return 0;
401 }
402
403 static struct platform_driver tegra_pcm_driver = {
404         .driver = {
405                 .name = DRV_NAME,
406                 .owner = THIS_MODULE,
407         },
408         .probe = tegra_pcm_platform_probe,
409         .remove = __devexit_p(tegra_pcm_platform_remove),
410 };
411
412 static int __init snd_tegra_pcm_init(void)
413 {
414         return platform_driver_register(&tegra_pcm_driver);
415 }
416 module_init(snd_tegra_pcm_init);
417
418 static void __exit snd_tegra_pcm_exit(void)
419 {
420         platform_driver_unregister(&tegra_pcm_driver);
421 }
422 module_exit(snd_tegra_pcm_exit);
423
424 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
425 MODULE_DESCRIPTION("Tegra PCM ASoC driver");
426 MODULE_LICENSE("GPL");
427 MODULE_ALIAS("platform:" DRV_NAME);