asoc: tegra: cs42l73: Add VSPIN to DAPM route
[linux-2.6.git] / sound / soc / tegra / tegra_cs42l73.c
1 /*
2  * tegra_cs42l73.c - Tegra machine ASoC driver for boards using CS42L73 codec.
3  *
4  * Author: Vijay Mali <vmali@nvidia.com>
5  * Copyright (C) 2011-2012, NVIDIA, Inc.
6  *
7  * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  *
22  */
23
24 #include <asm/mach-types.h>
25
26 #include <linux/clk.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 #include <linux/slab.h>
30 #include <linux/gpio.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/delay.h>
33 #include <linux/a2220.h>
34 #ifdef CONFIG_SWITCH
35 #include <linux/switch.h>
36 #endif
37 #include <mach/tegra_asoc_pdata.h>
38 #include <mach/gpio-tegra.h>
39
40 #include <sound/core.h>
41 #include <sound/jack.h>
42 #include <sound/pcm.h>
43 #include <sound/pcm_params.h>
44 #include <sound/soc.h>
45
46 #include "../codecs/cs42l73.h"
47
48 #include "tegra_pcm.h"
49 #include "tegra_asoc_utils.h"
50 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
51 #include "tegra30_ahub.h"
52 #include "tegra30_i2s.h"
53 #include "tegra30_dam.h"
54 #endif
55 #define DRV_NAME "tegra-snd-cs42l73"
56
57 #define GPIO_SPKR_EN    BIT(0)
58 #define GPIO_HP_MUTE    BIT(1)
59 #define GPIO_INT_MIC_EN BIT(2)
60 #define GPIO_EXT_MIC_EN BIT(3)
61 #define GPIO_HP_DET     BIT(4)
62
63 #define DAI_LINK_HIFI           0
64 #define DAI_LINK_SPDIF          1
65 #define DAI_LINK_BTSCO          2
66 #define DAI_LINK_VOICE_CALL     3
67 #define DAI_LINK_BT_VOICE_CALL  4
68 #define NUM_DAI_LINKS   5
69
70 const char *tegra_cs42l73_i2s_dai_name[TEGRA30_NR_I2S_IFC] = {
71         "tegra30-i2s.0",
72         "tegra30-i2s.1",
73         "tegra30-i2s.2",
74         "tegra30-i2s.3",
75         "tegra30-i2s.4",
76 };
77
78 extern int g_is_call_mode;
79
80
81 struct tegra_cs42l73 {
82         struct tegra_asoc_utils_data util_data;
83         struct tegra_asoc_platform_data *pdata;
84         int gpio_requested;
85         bool init_done;
86         int is_call_mode;
87         int is_device_bt;
88 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
89         struct codec_config codec_info[NUM_I2S_DEVICES];
90 #endif
91         struct regulator *dmic_reg;
92         struct regulator *dmic_1v8_reg;
93         struct regulator *hmic_reg;
94         enum snd_soc_bias_level bias_level;
95         struct snd_soc_card *pcard;
96 #ifdef CONFIG_SWITCH
97         int jack_status;
98 #endif
99         volatile int clock_enabled;
100 };
101
102 static int tegra_call_mode_info(struct snd_kcontrol *kcontrol,
103                         struct snd_ctl_elem_info *uinfo)
104 {
105         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
106         uinfo->count = 1;
107         uinfo->value.integer.min = 0;
108         uinfo->value.integer.max = 1;
109         return 0;
110 }
111
112 static int tegra_call_mode_get(struct snd_kcontrol *kcontrol,
113                 struct snd_ctl_elem_value *ucontrol)
114 {
115         struct tegra_cs42l73 *machine = snd_kcontrol_chip(kcontrol);
116
117         ucontrol->value.integer.value[0] = machine->is_call_mode;
118
119         return 0;
120 }
121
122 static int tegra_call_mode_put(struct snd_kcontrol *kcontrol,
123                 struct snd_ctl_elem_value *ucontrol)
124 {
125         struct tegra_cs42l73 *machine = snd_kcontrol_chip(kcontrol);
126         int is_call_mode_new = ucontrol->value.integer.value[0];
127         int codec_index;
128         unsigned int i;
129
130         if (machine->is_call_mode == is_call_mode_new)
131                 return 0;
132
133         if (machine->is_device_bt)
134                 codec_index = BT_SCO;
135         else
136                 codec_index = HIFI_CODEC;
137
138         if (is_call_mode_new) {
139                 if (machine->codec_info[codec_index].rate == 0 ||
140                         machine->codec_info[codec_index].channels == 0)
141                                 return -EINVAL;
142
143                 for (i = 0; i < machine->pcard->num_links; i++)
144                         machine->pcard->dai_link[i].ignore_suspend = 1;
145
146                 tegra30_make_voice_call_connections(
147                         &machine->codec_info[codec_index],
148                         &machine->codec_info[BASEBAND]);
149         } else {
150                 tegra30_break_voice_call_connections(
151                         &machine->codec_info[codec_index],
152                         &machine->codec_info[BASEBAND]);
153
154                 for (i = 0; i < machine->pcard->num_links; i++)
155                         machine->pcard->dai_link[i].ignore_suspend = 0;
156         }
157
158         machine->is_call_mode = is_call_mode_new;
159         g_is_call_mode = machine->is_call_mode;
160
161         return 1;
162 }
163
164 struct snd_kcontrol_new tegra_call_mode_control = {
165         .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
166         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
167         .name = "Call Mode Switch",
168         .private_value = 0xffff,
169         .info = tegra_call_mode_info,
170         .get = tegra_call_mode_get,
171         .put = tegra_call_mode_put
172 };
173
174 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
175 static int tegra_cs42l73_set_dam_cif(int dam_ifc, int srate,
176                         int channels, int bit_size, int src_on, int src_srate,
177                         int src_channels, int src_bit_size)
178 {
179         tegra30_dam_set_gain(dam_ifc, TEGRA30_DAM_CHIN1, 0x1000);
180         tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHOUT,
181                                 srate);
182         tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN1,
183                                 srate);
184         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1,
185                 channels, bit_size, channels,
186                                 bit_size);
187         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT,
188                 channels, bit_size, channels,
189                                 bit_size);
190
191         tegra30_dam_set_gain(dam_ifc, TEGRA30_DAM_CHIN0_SRC, 0x1000);
192         if (src_on) {
193                 tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN0_SRC,
194                         src_srate);
195                 tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN0_SRC,
196                         src_channels, src_bit_size, 1, 32);
197         }
198
199         return 0;
200 }
201 #endif
202
203
204 static int tegra_cs42l73_hw_params(struct snd_pcm_substream *substream,
205                                         struct snd_pcm_hw_params *params)
206 {
207         struct snd_soc_pcm_runtime *rtd = substream->private_data;
208         struct snd_soc_dai *codec_dai = rtd->codec_dai;
209         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
210         struct snd_soc_codec *codec = rtd->codec;
211         struct snd_soc_card *card = codec->card;
212         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
213         struct tegra_asoc_platform_data *pdata = machine->pdata;
214 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
215         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
216 #endif
217         int srate, mclk, sample_size, i2s_daifmt, i2s_master;
218         int err;
219         int rate;
220
221         i2s_master = pdata->i2s_param[HIFI_CODEC].is_i2s_master;
222
223         switch (params_format(params)) {
224         case SNDRV_PCM_FORMAT_S16_LE:
225                 sample_size = 16;
226                 break;
227         default:
228                 return -EINVAL;
229         }
230         srate = params_rate(params);
231
232         switch (srate) {
233         case 8000:
234                 mclk = 6144000;
235                 break;
236         case 16000:
237         case 32000:
238                 mclk = 12288000;
239                 break;
240         case 11025:
241                 mclk = 512 * srate;
242                 break;
243         default:
244                 mclk = 256 * srate;
245                 break;
246         }
247
248         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
249         i2s_daifmt |= i2s_master ? SND_SOC_DAIFMT_CBS_CFS :
250                                 SND_SOC_DAIFMT_CBM_CFM;
251
252         switch (pdata->i2s_param[HIFI_CODEC].i2s_mode) {
253         case TEGRA_DAIFMT_I2S:
254                 i2s_daifmt |= SND_SOC_DAIFMT_I2S;
255                 break;
256         case TEGRA_DAIFMT_DSP_A:
257                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
258                 break;
259         case TEGRA_DAIFMT_DSP_B:
260                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
261                 break;
262         case TEGRA_DAIFMT_LEFT_J:
263                 i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
264                 break;
265         case TEGRA_DAIFMT_RIGHT_J:
266                 i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
267                 break;
268         default:
269                 dev_err(card->dev, "Can't configure i2s format\n");
270                 return -EINVAL;
271         }
272
273         a2220_port_path_change(pdata->i2s_param[HIFI_CODEC].is_i2s_master ?
274                                                    A100_msg_PortC_A_PASS :
275                                                    A100_msg_PortA_C_PASS);
276
277         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
278         if (err < 0) {
279                 if (!(machine->util_data.set_mclk % mclk)) {
280                         mclk = machine->util_data.set_mclk;
281                 } else {
282                         dev_err(card->dev, "Can't configure clocks\n");
283                         return err;
284                 }
285         }
286
287         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
288
289         rate = clk_get_rate(machine->util_data.clk_cdev1);
290
291         err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
292         if (err < 0) {
293                 dev_err(card->dev, "codec_dai fmt not set\n");
294                 return err;
295         }
296
297         err = snd_soc_dai_set_fmt(cpu_dai, i2s_daifmt);
298         if (err < 0) {
299                 dev_err(card->dev, "cpu_dai fmt not set\n");
300                 return err;
301         }
302
303         err = snd_soc_dai_set_sysclk(codec_dai, 0, rate, SND_SOC_CLOCK_IN);
304         if (err < 0) {
305                 dev_err(card->dev, "codec_dai clock not set\n");
306                 return err;
307         }
308
309 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
310         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
311                 tegra_cs42l73_set_dam_cif(i2s->dam_ifc, srate,
312                         params_channels(params), sample_size, 0, 0, 0, 0);
313 #endif
314
315         return 0;
316 }
317
318 #if 1
319 static int tegra_spdif_hw_params(struct snd_pcm_substream *substream,
320                                         struct snd_pcm_hw_params *params)
321 {
322         struct snd_soc_pcm_runtime *rtd = substream->private_data;
323         struct snd_soc_card *card = rtd->card;
324         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
325         int srate, mclk, min_mclk;
326         int err;
327
328         srate = params_rate(params);
329         switch (srate) {
330         case 11025:
331         case 22050:
332         case 44100:
333         case 88200:
334                 mclk = 11289600;
335                 break;
336         case 8000:
337         case 16000:
338         case 32000:
339         case 48000:
340         case 64000:
341         case 96000:
342                 mclk = 12288000;
343                 break;
344         default:
345                 return -EINVAL;
346         }
347         min_mclk = 128 * srate;
348
349         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
350         if (err < 0) {
351                 if (!(machine->util_data.set_mclk % min_mclk))
352                         mclk = machine->util_data.set_mclk;
353                 else {
354                         dev_err(card->dev, "Can't configure clocks\n");
355                         return err;
356                 }
357         }
358
359         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
360
361         return 0;
362 }
363 #endif
364
365 static int tegra_bt_hw_params(struct snd_pcm_substream *substream,
366                 struct snd_pcm_hw_params *params)
367 {
368         struct snd_soc_pcm_runtime *rtd = substream->private_data;
369 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
370         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai);
371 #endif
372         struct snd_soc_card *card = rtd->card;
373         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
374         struct tegra_asoc_platform_data *pdata = machine->pdata;
375         int err, srate, mclk, min_mclk, sample_size;
376         int i2s_daifmt;
377
378         switch (params_format(params)) {
379         case SNDRV_PCM_FORMAT_S16_LE:
380                 sample_size = 16;
381                 break;
382         default:
383                 return -EINVAL;
384         }
385
386         srate = params_rate(params);
387         switch (srate) {
388         case 11025:
389         case 22050:
390         case 44100:
391         case 88200:
392                 mclk = 11289600;
393                 break;
394         case 8000:
395         case 16000:
396         case 32000:
397         case 48000:
398         case 64000:
399         case 96000:
400                 mclk = 12288000;
401                 break;
402         default:
403                 return -EINVAL;
404         }
405         min_mclk = 64 * srate;
406
407         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
408         if (err < 0) {
409                 if (!(machine->util_data.set_mclk % min_mclk))
410                         mclk = machine->util_data.set_mclk;
411                 else {
412                         dev_err(card->dev, "Can't configure clocks\n");
413                         return err;
414                 }
415         }
416
417         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
418
419         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
420         i2s_daifmt |= pdata->i2s_param[BT_SCO].is_i2s_master ?
421                         SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
422
423         switch (pdata->i2s_param[BT_SCO].i2s_mode) {
424         case TEGRA_DAIFMT_I2S:
425                 i2s_daifmt |= SND_SOC_DAIFMT_I2S;
426                 break;
427         case TEGRA_DAIFMT_DSP_A:
428                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
429                 break;
430         case TEGRA_DAIFMT_DSP_B:
431                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
432                 break;
433         case TEGRA_DAIFMT_LEFT_J:
434                 i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
435                 break;
436         case TEGRA_DAIFMT_RIGHT_J:
437                 i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
438                 break;
439         default:
440                 dev_err(card->dev, "Can't configure i2s format\n");
441                 return -EINVAL;
442         }
443
444         err = snd_soc_dai_set_fmt(rtd->cpu_dai, i2s_daifmt);
445         if (err < 0) {
446                 dev_err(rtd->codec->card->dev, "cpu_dai fmt not set\n");
447                 return err;
448         }
449
450 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
451         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
452                 tegra_cs42l73_set_dam_cif(i2s->dam_ifc, params_rate(params),
453                         params_channels(params), sample_size, 0, 0, 0, 0);
454 #endif
455
456         return 0;
457 }
458
459 static int tegra_hw_free(struct snd_pcm_substream *substream)
460 {
461         struct snd_soc_pcm_runtime *rtd = substream->private_data;
462         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(rtd->card);
463
464         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 0);
465
466         return 0;
467 }
468
469 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
470 static int tegra_cs42l73_startup(struct snd_pcm_substream *substream)
471 {
472         struct snd_soc_pcm_runtime *rtd = substream->private_data;
473         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
474         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
475         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(rtd->card);
476         struct codec_config *codec_info;
477         struct codec_config *bb_info;
478         int codec_index;
479
480         if (!i2s->is_dam_used)
481                 return 0;
482
483         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
484                 /*dam configuration*/
485                 if (!i2s->dam_ch_refcount)
486                         i2s->dam_ifc = tegra30_dam_allocate_controller();
487
488                 tegra30_dam_allocate_channel(i2s->dam_ifc, TEGRA30_DAM_CHIN1);
489                 i2s->dam_ch_refcount++;
490                 tegra30_dam_enable_clock(i2s->dam_ifc);
491
492                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
493                                 (i2s->dam_ifc*2), i2s->txcif);
494
495                 /*
496                 *make the dam tx to i2s rx connection if this is the only client
497                 *using i2s for playback
498                 */
499                 if (i2s->playback_ref_count == 1)
500                         tegra30_ahub_set_rx_cif_source(
501                                 TEGRA30_AHUB_RXCIF_I2S0_RX0 + i2s->id,
502                                 TEGRA30_AHUB_TXCIF_DAM0_TX0 + i2s->dam_ifc);
503
504                 /* enable the dam*/
505                 tegra30_dam_enable(i2s->dam_ifc, TEGRA30_DAM_ENABLE,
506                                 TEGRA30_DAM_CHIN1);
507         } else {
508
509                 i2s->is_call_mode_rec = machine->is_call_mode;
510
511                 if (!i2s->is_call_mode_rec)
512                         return 0;
513
514                 if (machine->is_device_bt)
515                         codec_index = BT_SCO;
516                 else
517                         codec_index = HIFI_CODEC;
518
519                 codec_info = &machine->codec_info[codec_index];
520                 bb_info = &machine->codec_info[BASEBAND];
521
522                 /* allocate a dam for voice call recording */
523
524                 i2s->call_record_dam_ifc = tegra30_dam_allocate_controller();
525                 tegra30_dam_allocate_channel(i2s->call_record_dam_ifc,
526                         TEGRA30_DAM_CHIN0_SRC);
527                 tegra30_dam_allocate_channel(i2s->call_record_dam_ifc,
528                         TEGRA30_DAM_CHIN1);
529                 tegra30_dam_enable_clock(i2s->call_record_dam_ifc);
530
531                 /* configure the dam */
532                 tegra_cs42l73_set_dam_cif(i2s->call_record_dam_ifc,
533                         codec_info->rate, codec_info->channels,
534                         codec_info->bitsize, 1, bb_info->rate,
535                         bb_info->channels, bb_info->bitsize);
536
537                 /* setup the connections for voice call record */
538
539                 tegra30_ahub_unset_rx_cif_source(i2s->rxcif);
540                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
541                         (i2s->call_record_dam_ifc*2),
542                         TEGRA30_AHUB_TXCIF_I2S0_TX0 + bb_info->i2s_id);
543                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
544                         (i2s->call_record_dam_ifc*2),
545                         TEGRA30_AHUB_TXCIF_I2S0_TX0 + codec_info->i2s_id);
546                 tegra30_ahub_set_rx_cif_source(i2s->rxcif,
547                         TEGRA30_AHUB_TXCIF_DAM0_TX0 + i2s->call_record_dam_ifc);
548
549                 /* enable the dam*/
550
551                 tegra30_dam_enable(i2s->call_record_dam_ifc, TEGRA30_DAM_ENABLE,
552                                 TEGRA30_DAM_CHIN1);
553                 tegra30_dam_enable(i2s->call_record_dam_ifc, TEGRA30_DAM_ENABLE,
554                                 TEGRA30_DAM_CHIN0_SRC);
555         }
556
557         return 0;
558 }
559
560 static void tegra_cs42l73_shutdown(struct snd_pcm_substream *substream)
561 {
562         struct snd_soc_pcm_runtime *rtd = substream->private_data;
563         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
564         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
565
566         if (!i2s->is_dam_used)
567                 return;
568
569         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
570                 /* disable the dam*/
571                 tegra30_dam_enable(i2s->dam_ifc, TEGRA30_DAM_DISABLE,
572                                 TEGRA30_DAM_CHIN1);
573
574                 /* disconnect the ahub connections*/
575                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
576                                         (i2s->dam_ifc*2));
577
578                 /* disable the dam and free the controller */
579                 tegra30_dam_disable_clock(i2s->dam_ifc);
580                 tegra30_dam_free_channel(i2s->dam_ifc, TEGRA30_DAM_CHIN1);
581                 i2s->dam_ch_refcount--;
582                 if (!i2s->dam_ch_refcount)
583                         tegra30_dam_free_controller(i2s->dam_ifc);
584          } else {
585
586                 if (!i2s->is_call_mode_rec)
587                         return;
588
589                 i2s->is_call_mode_rec = 0;
590
591                 /* disable the dam*/
592                 tegra30_dam_enable(i2s->call_record_dam_ifc,
593                         TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN1);
594                 tegra30_dam_enable(i2s->call_record_dam_ifc,
595                         TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN0_SRC);
596
597                 /* disconnect the ahub connections*/
598                 tegra30_ahub_unset_rx_cif_source(i2s->rxcif);
599                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
600                         (i2s->call_record_dam_ifc*2));
601                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
602                         (i2s->call_record_dam_ifc*2));
603
604                 /* free the dam channels and dam controller */
605                 tegra30_dam_disable_clock(i2s->call_record_dam_ifc);
606                 tegra30_dam_free_channel(i2s->call_record_dam_ifc,
607                         TEGRA30_DAM_CHIN1);
608                 tegra30_dam_free_channel(i2s->call_record_dam_ifc,
609                         TEGRA30_DAM_CHIN0_SRC);
610                 tegra30_dam_free_controller(i2s->call_record_dam_ifc);
611          }
612
613         return;
614 }
615 #endif
616
617 static int tegra_voice_call_hw_params(struct snd_pcm_substream *substream,
618                         struct snd_pcm_hw_params *params)
619 {
620         struct snd_soc_pcm_runtime *rtd = substream->private_data;
621         struct snd_soc_dai *codec_dai = rtd->codec_dai;
622         struct snd_soc_codec *codec = rtd->codec;
623         struct snd_soc_card *card = codec->card;
624         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
625         struct tegra_asoc_platform_data *pdata = machine->pdata;
626         int srate, mclk, i2s_daifmt;
627         int err, rate;
628
629         srate = params_rate(params);
630         switch (srate) {
631         case 8000:
632         case 16000:
633         case 24000:
634         case 32000:
635         case 48000:
636         case 64000:
637         case 96000:
638                 mclk = 12288000;
639                 break;
640         case 11025:
641         case 22050:
642         case 44100:
643         case 88200:
644                 mclk = 11289600;
645                 break;
646         default:
647                 return -EINVAL;
648                 break;
649         }
650
651         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
652         i2s_daifmt |= pdata->i2s_param[HIFI_CODEC].is_i2s_master ?
653                         SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
654
655         switch (pdata->i2s_param[HIFI_CODEC].i2s_mode) {
656         case TEGRA_DAIFMT_I2S:
657                 i2s_daifmt |= SND_SOC_DAIFMT_I2S;
658                 break;
659         case TEGRA_DAIFMT_DSP_A:
660                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
661                 break;
662         case TEGRA_DAIFMT_DSP_B:
663                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
664                 break;
665         case TEGRA_DAIFMT_LEFT_J:
666                 i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
667                 break;
668         case TEGRA_DAIFMT_RIGHT_J:
669                 i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
670                 break;
671         default:
672                 dev_err(card->dev, "Can't configure i2s format\n");
673                 return -EINVAL;
674         }
675
676         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
677         if (err < 0) {
678                 if (!(machine->util_data.set_mclk % mclk))
679                         mclk = machine->util_data.set_mclk;
680                 else {
681                         dev_err(card->dev, "Can't configure clocks\n");
682                         return err;
683                 }
684         }
685
686         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
687
688         rate = clk_get_rate(machine->util_data.clk_cdev1);
689
690         err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
691         if (err < 0) {
692                 dev_err(card->dev, "codec_dai fmt not set\n");
693                 return err;
694         }
695
696         err = snd_soc_dai_set_sysclk(codec_dai, 0, rate, SND_SOC_CLOCK_IN);
697         if (err < 0) {
698                 dev_err(card->dev, "codec_dai clock not set\n");
699                 return err;
700         }
701
702 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
703         /* codec configuration */
704         machine->codec_info[HIFI_CODEC].rate = params_rate(params);
705         machine->codec_info[HIFI_CODEC].channels = params_channels(params);
706 #endif
707
708         machine->is_device_bt = 0;
709
710         return 0;
711 }
712
713 static void tegra_voice_call_shutdown(struct snd_pcm_substream *substream)
714 {
715         struct snd_soc_pcm_runtime *rtd = substream->private_data;
716         struct tegra_cs42l73 *machine  =
717                         snd_soc_card_get_drvdata(rtd->codec->card);
718
719 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
720         machine->codec_info[HIFI_CODEC].rate = 0;
721         machine->codec_info[HIFI_CODEC].channels = 0;
722 #endif
723
724         return;
725 }
726
727 static int tegra_bt_voice_call_hw_params(struct snd_pcm_substream *substream,
728                         struct snd_pcm_hw_params *params)
729 {
730         struct snd_soc_pcm_runtime *rtd = substream->private_data;
731         struct snd_soc_card *card = rtd->card;
732         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
733         int err, srate, mclk, min_mclk;
734
735         srate = params_rate(params);
736         switch (srate) {
737         case 11025:
738         case 22050:
739         case 44100:
740         case 88200:
741                 mclk = 11289600;
742                 break;
743         case 8000:
744         case 16000:
745         case 32000:
746         case 48000:
747         case 64000:
748         case 96000:
749                 mclk = 12288000;
750                 break;
751         default:
752                 return -EINVAL;
753         }
754         min_mclk = 64 * srate;
755
756         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
757         if (err < 0) {
758                 if (!(machine->util_data.set_mclk % min_mclk))
759                         mclk = machine->util_data.set_mclk;
760                 else {
761                         dev_err(card->dev, "Can't configure clocks\n");
762                         return err;
763                 }
764         }
765
766         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
767
768 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
769         /* codec configuration */
770         machine->codec_info[BT_SCO].rate = params_rate(params);
771         machine->codec_info[BT_SCO].channels = params_channels(params);
772 #endif
773
774         machine->is_device_bt = 1;
775
776         return 0;
777 }
778
779 static void tegra_bt_voice_call_shutdown(struct snd_pcm_substream *substream)
780 {
781         struct snd_soc_pcm_runtime *rtd = substream->private_data;
782         struct tegra_cs42l73 *machine  =
783                         snd_soc_card_get_drvdata(rtd->codec->card);
784
785 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
786         machine->codec_info[BT_SCO].rate = 0;
787         machine->codec_info[BT_SCO].channels = 0;
788 #endif
789
790         return;
791 }
792
793 static struct snd_soc_ops tegra_cs42l73_ops = {
794         .hw_params = tegra_cs42l73_hw_params,
795         .hw_free = tegra_hw_free,
796 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
797         .startup = tegra_cs42l73_startup,
798         .shutdown = tegra_cs42l73_shutdown,
799 #endif
800 };
801
802 static struct snd_soc_ops tegra_spdif_ops = {
803         .hw_params = tegra_spdif_hw_params,
804         .hw_free = tegra_hw_free,
805 };
806
807 static struct snd_soc_ops tegra_voice_call_ops = {
808         .hw_params = tegra_voice_call_hw_params,
809         .shutdown = tegra_voice_call_shutdown,
810         .hw_free = tegra_hw_free,
811 };
812
813 static struct snd_soc_ops tegra_bt_voice_call_ops = {
814         .hw_params = tegra_bt_voice_call_hw_params,
815         .shutdown = tegra_bt_voice_call_shutdown,
816         .hw_free = tegra_hw_free,
817 };
818
819 static struct snd_soc_ops tegra_bt_ops = {
820         .hw_params = tegra_bt_hw_params,
821         .hw_free = tegra_hw_free,
822 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
823         .startup = tegra_cs42l73_startup,
824         .shutdown = tegra_cs42l73_shutdown,
825 #endif
826 };
827
828
829 /* Headset jack */
830 struct snd_soc_jack tegra_cs42l73_hp_jack;
831
832
833 #ifdef CONFIG_SWITCH
834 /* These values are copied from Android WiredAccessoryObserver */
835 enum headset_state {
836         BIT_NO_HEADSET = 0,
837         BIT_HEADSET = (1 << 0),
838         BIT_HEADSET_NO_MIC = (1 << 1),
839 };
840
841 static struct switch_dev tegra_cs42l73_headset_switch = {
842         .name = "h2w",
843 };
844
845 /* Headset jack detection gpios */
846 static struct snd_soc_jack_gpio tegra_cs42l73_hp_jack_gpio = {
847         .name = "headphone detect",
848         .report = SND_JACK_HEADPHONE,
849         .debounce_time = 150,
850         .invert = 1,
851 };
852
853 static int tegra_cs42l73_jack_notifier(struct notifier_block *self,
854                               unsigned long action, void *dev)
855 {
856         struct snd_soc_jack *jack = dev;
857         struct snd_soc_codec *codec = jack->codec;
858         struct snd_soc_card *card = codec->card;
859         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
860         enum headset_state state = BIT_NO_HEADSET;
861
862         if (jack == &tegra_cs42l73_hp_jack) {
863                 machine->jack_status &= ~SND_JACK_HEADPHONE;
864                 machine->jack_status |= (action & SND_JACK_HEADPHONE);
865         } else {
866                 machine->jack_status &= ~SND_JACK_MICROPHONE;
867                 machine->jack_status |= (action & SND_JACK_MICROPHONE);
868         }
869
870         switch (machine->jack_status) {
871         case SND_JACK_HEADPHONE:
872                 /*For now force headset mic mode*/
873                 /*state = BIT_HEADSET_NO_MIC; */
874                 state = BIT_HEADSET;
875                 break;
876         case SND_JACK_HEADSET:
877                 state = BIT_HEADSET;
878                 break;
879         case SND_JACK_MICROPHONE:
880                 /* mic: would not report */
881         default:
882                 state = BIT_NO_HEADSET;
883         }
884
885         switch_set_state(&tegra_cs42l73_headset_switch, state);
886
887         return NOTIFY_OK;
888 }
889
890 static struct notifier_block tegra_cs42l73_jack_detect_nb = {
891         .notifier_call = tegra_cs42l73_jack_notifier,
892 };
893 #else
894 /* Headset jack detection DAPM pins */
895 static struct snd_soc_jack_pin tegra_cs42l73_hs_jack_pins[] = {
896         {
897                 .pin = "Headset Mic",
898                 .mask = SND_JACK_MICROPHONE,
899         },
900         {
901                 .pin = "Headphone",
902                 .mask = SND_JACK_HEADPHONE,
903         },
904 };
905 #endif
906
907 static int tegra_cs42l73_event_int_mic(struct snd_soc_dapm_widget *w,
908                                         struct snd_kcontrol *k, int event)
909 {
910         struct snd_soc_dapm_context *dapm = w->dapm;
911         struct snd_soc_card *card = dapm->card;
912         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
913         struct tegra_asoc_platform_data *pdata = machine->pdata;
914
915         if (machine->dmic_reg && machine->dmic_1v8_reg) {
916                 if (SND_SOC_DAPM_EVENT_ON(event)) {
917                         regulator_enable(machine->dmic_reg);
918                         regulator_enable(machine->dmic_1v8_reg);
919                 } else {
920                         regulator_disable(machine->dmic_reg);
921                         regulator_disable(machine->dmic_1v8_reg);
922                 }
923         }
924
925         if (!(machine->gpio_requested & GPIO_INT_MIC_EN))
926                 return 0;
927
928         gpio_set_value_cansleep(pdata->gpio_int_mic_en,
929                                 SND_SOC_DAPM_EVENT_ON(event));
930
931         return 0;
932 }
933
934 static int tegra_cs42l73_event_int_spk(struct snd_soc_dapm_widget *w,
935                                         struct snd_kcontrol *k, int event)
936 {
937         struct snd_soc_dapm_context *dapm = w->dapm;
938         struct snd_soc_card *card = dapm->card;
939         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
940         struct tegra_asoc_platform_data *pdata = machine->pdata;
941
942         if (!(machine->gpio_requested & GPIO_SPKR_EN))
943                 return 0;
944
945         gpio_set_value_cansleep(pdata->gpio_spkr_en,
946                                 SND_SOC_DAPM_EVENT_ON(event));
947
948         return 0;
949 }
950
951 static int tegra_cs42l73_event_ext_mic(struct snd_soc_dapm_widget *w,
952                                         struct snd_kcontrol *k, int event)
953 {
954         struct snd_soc_dapm_context *dapm = w->dapm;
955         struct snd_soc_card *card = dapm->card;
956         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
957         struct tegra_asoc_platform_data *pdata = machine->pdata;
958
959         if (machine->hmic_reg) {
960                 if (SND_SOC_DAPM_EVENT_ON(event))
961                         regulator_enable(machine->hmic_reg);
962                 else
963                         regulator_disable(machine->hmic_reg);
964         }
965
966         if (!(machine->gpio_requested & GPIO_EXT_MIC_EN))
967                 return 0;
968
969         gpio_set_value_cansleep(pdata->gpio_ext_mic_en,
970                                 SND_SOC_DAPM_EVENT_ON(event));
971
972         return 0;
973 }
974
975 /* CS42L73 widgets */
976 static const struct snd_soc_dapm_widget tegra_cs42l73_dapm_widgets[] = {
977         SND_SOC_DAPM_SPK("Int Spk", tegra_cs42l73_event_int_spk),
978         SND_SOC_DAPM_HP("Headphone", NULL),
979         SND_SOC_DAPM_MIC("Headset Mic", tegra_cs42l73_event_ext_mic),
980         SND_SOC_DAPM_MIC("Int D-Mic", tegra_cs42l73_event_int_mic),
981 };
982
983 /* cs42l73 Audio Map */
984 static const struct snd_soc_dapm_route tegra_cs42l73_audio_map[] = {
985         {"Int Spk", NULL, "SPKOUT"},
986         {"MIC1", NULL, "Headset Mic"},
987         /* Headphone (L+R)->  HPOUTA, HPOUTB */
988         {"Headphone", NULL, "HPOUTA"},
989         {"Headphone", NULL, "HPOUTB"},
990         /* DMIC -> DMIC Left/Right and VSPIN */
991         {"DMIC Left", NULL, "Int D-Mic"},
992         {"DMIC Right", NULL, "Int D-Mic"},
993         {"VSPIN", NULL, "Int D-Mic"},
994 };
995
996 static const struct snd_kcontrol_new tegra_cs42l73_controls[] = {
997         SOC_DAPM_PIN_SWITCH("Int Spk"),
998         SOC_DAPM_PIN_SWITCH("Int D-Mic"),
999         SOC_DAPM_PIN_SWITCH("Headset Mic"),
1000 };
1001
1002 static int tegra_cs42l73_init(struct snd_soc_pcm_runtime *rtd)
1003 {
1004         struct snd_soc_codec *codec = rtd->codec;
1005         struct snd_soc_dapm_context *dapm = &codec->dapm;
1006         struct snd_soc_card *card = codec->card;
1007         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
1008         struct tegra_asoc_platform_data *pdata = machine->pdata;
1009 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1010         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai);
1011 #endif
1012         int ret;
1013
1014 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1015         if (machine->codec_info[BASEBAND].i2s_id != -1)
1016                 i2s->is_dam_used = true;
1017 #endif
1018
1019         if (machine->init_done)
1020                 return 0;
1021
1022         machine->init_done = true;
1023
1024         if (gpio_is_valid(pdata->gpio_hp_det)) {
1025                 /* Headphone detection */
1026                 tegra_cs42l73_hp_jack_gpio.gpio = pdata->gpio_hp_det;
1027                 snd_soc_jack_new(codec, "Headphone Jack",
1028                                 SND_JACK_HEADSET, &tegra_cs42l73_hp_jack);
1029
1030 #ifndef CONFIG_SWITCH
1031                 snd_soc_jack_add_pins(&tegra_cs42l73_hp_jack,
1032                                 ARRAY_SIZE(tegra_cs42l73_hs_jack_pins),
1033                                 tegra_cs42l73_hs_jack_pins);
1034 #else
1035                 snd_soc_jack_notifier_register(&tegra_cs42l73_hp_jack,
1036                                         &tegra_cs42l73_jack_detect_nb);
1037 #endif
1038                 snd_soc_jack_add_gpios(&tegra_cs42l73_hp_jack,
1039                                         1,
1040                                         &tegra_cs42l73_hp_jack_gpio);
1041                 /* FIX ME  Add Mic Jack notifier */
1042                 machine->gpio_requested |= GPIO_HP_DET;
1043         }
1044
1045         if (gpio_is_valid(pdata->gpio_spkr_en)) {
1046                 ret = gpio_request(pdata->gpio_spkr_en, "spkr_en");
1047                 if (ret) {
1048                         dev_err(card->dev, "cannot get spkr_en gpio\n");
1049                         return ret;
1050                 }
1051                 machine->gpio_requested |= GPIO_SPKR_EN;
1052
1053                 gpio_direction_output(pdata->gpio_spkr_en, 0);
1054         }
1055
1056
1057         /* Add call mode switch control */
1058         ret = snd_ctl_add(codec->card->snd_card,
1059                 snd_ctl_new1(&tegra_call_mode_control, machine));
1060
1061         ret = tegra_asoc_utils_register_ctls(&machine->util_data);
1062         if (ret < 0)
1063                 return ret;
1064
1065         snd_soc_dapm_sync(dapm);
1066
1067         return 0;
1068 }
1069
1070 static struct snd_soc_dai_link tegra_cs42l73_dai[NUM_DAI_LINKS] = {
1071         [DAI_LINK_HIFI] = {
1072                         .name = "CS42L73",
1073                         .stream_name = "VSP Playback Record",
1074                         .codec_name = "cs42l73.0-004a",
1075                         .platform_name = "tegra-pcm-audio",
1076                     .cpu_dai_name = "tegra30-i2s.1",
1077                         .codec_dai_name = "cs42l73-vsp",
1078                         .init = tegra_cs42l73_init,
1079                         .ops = &tegra_cs42l73_ops,
1080                 },
1081         [DAI_LINK_SPDIF] = {
1082                         .name = "SPDIF",
1083                         .stream_name = "SPDIF PCM",
1084                         .codec_name = "spdif-dit.0",
1085                         .platform_name = "tegra-pcm-audio",
1086                         .cpu_dai_name = "tegra30-spdif",
1087                         .codec_dai_name = "dit-hifi",
1088                         .ops = &tegra_spdif_ops,
1089                 },
1090         [DAI_LINK_BTSCO] = {
1091                         .name = "BT SCO",
1092                         .stream_name = "BT SCO PCM",
1093                         .codec_name = "spdif-dit.1",
1094                         .platform_name = "tegra-pcm-audio",
1095                         .codec_dai_name = "dit-hifi",
1096                         .init = tegra_cs42l73_init,
1097                         .ops = &tegra_bt_ops,
1098                 },
1099         [DAI_LINK_VOICE_CALL] = {
1100                         .name = "VOICE CALL",
1101                         .stream_name = "VOICE CALL PCM",
1102                         .codec_name = "cs42l73.0-004a",
1103                         .platform_name = "tegra-pcm-audio",
1104                         .cpu_dai_name = "dit-hifi",
1105                         .codec_dai_name = "cs42l73-vsp",
1106                         .ops = &tegra_voice_call_ops,
1107                 },
1108         [DAI_LINK_BT_VOICE_CALL] = {
1109                         .name = "BT VOICE CALL",
1110                         .stream_name = "BT VOICE CALL PCM",
1111                         .codec_name = "spdif-dit.2",
1112                         .platform_name = "tegra-pcm-audio",
1113                         .cpu_dai_name = "dit-hifi",
1114                         .codec_dai_name = "dit-hifi",
1115                         .ops = &tegra_bt_voice_call_ops,
1116                 },
1117 };
1118
1119 static int tegra_cs42l73_suspend_post(struct snd_soc_card *card)
1120 {
1121         struct snd_soc_jack_gpio *gpio = &tegra_cs42l73_hp_jack_gpio;
1122         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
1123
1124         if (gpio_is_valid(gpio->gpio))
1125                 disable_irq(gpio_to_irq(gpio->gpio));
1126
1127         if (machine->clock_enabled) {
1128                 machine->clock_enabled = 0;
1129                 tegra_asoc_utils_clk_disable(&machine->util_data);
1130         }
1131
1132         return 0;
1133 }
1134
1135 static int tegra_cs42l73_resume_pre(struct snd_soc_card *card)
1136 {
1137         int val;
1138         struct snd_soc_jack_gpio *gpio = &tegra_cs42l73_hp_jack_gpio;
1139         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
1140
1141         if (gpio_is_valid(gpio->gpio)) {
1142                 val = gpio_get_value(gpio->gpio);
1143                 val = gpio->invert ? !val : val;
1144                 snd_soc_jack_report(gpio->jack, val, gpio->report);
1145                 enable_irq(gpio_to_irq(gpio->gpio));
1146         }
1147
1148         if (!machine->clock_enabled) {
1149                 machine->clock_enabled = 1;
1150                 tegra_asoc_utils_clk_enable(&machine->util_data);
1151         }
1152
1153         return 0;
1154 }
1155
1156 static int tegra_cs42l73_set_bias_level(struct snd_soc_card *card,
1157         struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level)
1158 {
1159         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
1160
1161         if (machine->bias_level == SND_SOC_BIAS_OFF &&
1162                 level != SND_SOC_BIAS_OFF && (!machine->clock_enabled)) {
1163                 machine->clock_enabled = 1;
1164                 tegra_asoc_utils_clk_enable(&machine->util_data);
1165                 machine->bias_level = level;
1166         }
1167
1168         return 0;
1169 }
1170
1171 static int tegra_cs42l73_set_bias_level_post(struct snd_soc_card *card,
1172         struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level)
1173 {
1174         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
1175
1176         if (machine->bias_level != SND_SOC_BIAS_OFF &&
1177                 level == SND_SOC_BIAS_OFF && machine->clock_enabled) {
1178                 machine->clock_enabled = 0;
1179                 tegra_asoc_utils_clk_disable(&machine->util_data);
1180         }
1181
1182         machine->bias_level = level;
1183
1184         return 0 ;
1185 }
1186
1187 static struct snd_soc_card snd_soc_tegra_cs42l73 = {
1188         .name = "tegra-cs42l73",
1189         .owner = THIS_MODULE,
1190         .dai_link = tegra_cs42l73_dai,
1191         .num_links = ARRAY_SIZE(tegra_cs42l73_dai),
1192         .suspend_post = tegra_cs42l73_suspend_post,
1193         .resume_pre = tegra_cs42l73_resume_pre,
1194         .set_bias_level = tegra_cs42l73_set_bias_level,
1195         .set_bias_level_post = tegra_cs42l73_set_bias_level_post,
1196
1197         .controls = tegra_cs42l73_controls,
1198         .num_controls = ARRAY_SIZE(tegra_cs42l73_controls),
1199         .dapm_widgets = tegra_cs42l73_dapm_widgets,
1200         .num_dapm_widgets = ARRAY_SIZE(tegra_cs42l73_dapm_widgets),
1201         .dapm_routes = tegra_cs42l73_audio_map,
1202         .num_dapm_routes = ARRAY_SIZE(tegra_cs42l73_audio_map),
1203         .fully_routed = true,
1204 };
1205
1206 static __devinit int tegra_cs42l73_driver_probe(struct platform_device *pdev)
1207 {
1208         struct snd_soc_card *card = &snd_soc_tegra_cs42l73;
1209         struct tegra_cs42l73 *machine;
1210         struct tegra_asoc_platform_data *pdata;
1211         int ret;
1212         int i;
1213         pdata = pdev->dev.platform_data;
1214         if (!pdata) {
1215                 dev_err(&pdev->dev, "No platform data supplied\n");
1216                 return -EINVAL;
1217         }
1218
1219         if (pdata->codec_name)
1220                 card->dai_link->codec_name = pdata->codec_name;
1221
1222         if (pdata->codec_dai_name)
1223                 card->dai_link->codec_dai_name = pdata->codec_dai_name;
1224
1225         machine = kzalloc(sizeof(struct tegra_cs42l73), GFP_KERNEL);
1226         if (!machine) {
1227                 dev_err(&pdev->dev, "Can't allocate tegra_cs42l73 struct\n");
1228                 return -ENOMEM;
1229         }
1230
1231         if (gpio_is_valid(pdata->gpio_ldo1_en)) {
1232                 ret = gpio_request(pdata->gpio_ldo1_en, "cs42l73");
1233                 if (ret)
1234                         dev_err(&pdev->dev, "Fail gpio_request AUDIO_LDO1\n");
1235
1236                 ret = gpio_direction_output(pdata->gpio_ldo1_en, 0);
1237                 if (ret)
1238                         dev_err(&pdev->dev, "Fail gpio_direction AUDIO_LDO1\n");
1239
1240                 msleep(200);
1241         }
1242
1243         machine->pdata = pdata;
1244         machine->pcard = card;
1245         machine->bias_level = SND_SOC_BIAS_STANDBY;
1246         machine->clock_enabled = 1;
1247
1248         ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev, card);
1249         if (ret)
1250                 goto err_free_machine;
1251
1252         machine->dmic_reg = regulator_get(&pdev->dev, "vdd_mic");
1253         if (IS_ERR(machine->dmic_reg)) {
1254                 dev_info(&pdev->dev, "No digital mic regulator found\n");
1255                 machine->dmic_reg = 0;
1256         }
1257
1258         machine->dmic_1v8_reg = regulator_get(&pdev->dev, "vdd_1v8_mic");
1259         if (IS_ERR(machine->dmic_1v8_reg)) {
1260                 dev_info(&pdev->dev, "No digital mic regulator found\n");
1261                 machine->dmic_1v8_reg = 0;
1262         }
1263
1264         machine->hmic_reg = regulator_get(&pdev->dev, "mic_ventral");
1265         if (IS_ERR(machine->hmic_reg)) {
1266                 dev_info(&pdev->dev, "No headset mic regulator found\n");
1267                 machine->hmic_reg = 0;
1268         }
1269
1270 #ifdef CONFIG_SWITCH
1271         /* Addd h2w swith class support */
1272         ret = switch_dev_register(&tegra_cs42l73_headset_switch);
1273         if (ret < 0)
1274                 goto err_fini_utils;
1275 #endif
1276
1277         card->dev = &pdev->dev;
1278         platform_set_drvdata(pdev, card);
1279         snd_soc_card_set_drvdata(card, machine);
1280
1281 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1282         for (i = 0; i < NUM_I2S_DEVICES ; i++) {
1283                 machine->codec_info[i].i2s_id =
1284                         pdata->i2s_param[i].audio_port_id;
1285                 machine->codec_info[i].bitsize =
1286                         pdata->i2s_param[i].sample_size;
1287                 machine->codec_info[i].is_i2smaster =
1288                         pdata->i2s_param[i].is_i2s_master;
1289                 machine->codec_info[i].rate =
1290                         pdata->i2s_param[i].rate;
1291                 machine->codec_info[i].channels =
1292                         pdata->i2s_param[i].channels;
1293                 if ((pdata->i2s_param[i].i2s_mode == TEGRA_DAIFMT_DSP_A) ||
1294                         (pdata->i2s_param[i].i2s_mode == TEGRA_DAIFMT_DSP_B))
1295                         machine->codec_info[i].is_format_dsp = 1;
1296                 else
1297                         machine->codec_info[i].is_format_dsp = 0;
1298         }
1299
1300         tegra_cs42l73_dai[DAI_LINK_HIFI].cpu_dai_name =
1301         tegra_cs42l73_i2s_dai_name[machine->codec_info[HIFI_CODEC].i2s_id];
1302
1303         tegra_cs42l73_dai[DAI_LINK_BTSCO].cpu_dai_name =
1304         tegra_cs42l73_i2s_dai_name[machine->codec_info[BT_SCO].i2s_id];
1305 #endif
1306         card->dapm.idle_bias_off = 1;
1307         ret = snd_soc_register_card(card);
1308         if (ret) {
1309                 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
1310                         ret);
1311                 goto err_unregister_switch;
1312         }
1313
1314         if (!card->instantiated) {
1315                 ret = -ENODEV;
1316                 dev_err(&pdev->dev, "sound card not instantiated (%d)\n",
1317                         ret);
1318                 goto err_unregister_card;
1319         }
1320
1321         ret = tegra_asoc_utils_set_parent(&machine->util_data,
1322                                 pdata->i2s_param[HIFI_CODEC].is_i2s_master);
1323         if (ret) {
1324                 dev_err(&pdev->dev, "tegra_asoc_utils_set_parent failed (%d)\n",
1325                         ret);
1326                 goto err_unregister_card;
1327         }
1328
1329         return 0;
1330
1331 err_unregister_card:
1332         snd_soc_unregister_card(card);
1333 err_unregister_switch:
1334 #ifdef CONFIG_SWITCH
1335         switch_dev_unregister(&tegra_cs42l73_headset_switch);
1336 err_fini_utils:
1337 #endif
1338         tegra_asoc_utils_fini(&machine->util_data);
1339 err_free_machine:
1340         kfree(machine);
1341         return ret;
1342
1343 }
1344
1345 static int __devexit tegra_cs42l73_driver_remove(struct platform_device *pdev)
1346 {
1347         struct snd_soc_card *card = platform_get_drvdata(pdev);
1348         struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
1349         struct tegra_asoc_platform_data *pdata = machine->pdata;
1350
1351         if (machine->gpio_requested & GPIO_HP_DET)
1352                 snd_soc_jack_free_gpios(&tegra_cs42l73_hp_jack,
1353                                         1,
1354                                         &tegra_cs42l73_hp_jack_gpio);
1355
1356         machine->gpio_requested = 0;
1357
1358         if (machine->dmic_reg)
1359                 regulator_put(machine->dmic_reg);
1360         if (machine->dmic_1v8_reg)
1361                 regulator_put(machine->dmic_1v8_reg);
1362         if (machine->hmic_reg)
1363                 regulator_put(machine->hmic_reg);
1364
1365         if (gpio_is_valid(pdata->gpio_ldo1_en)) {
1366                 gpio_set_value(pdata->gpio_ldo1_en, 0);
1367                 gpio_free(pdata->gpio_ldo1_en);
1368         }
1369
1370         snd_soc_unregister_card(card);
1371
1372         tegra_asoc_utils_fini(&machine->util_data);
1373
1374         kfree(machine);
1375
1376         return 0;
1377 }
1378
1379 static struct platform_driver tegra_cs42l73_driver = {
1380         .driver = {
1381                 .name = DRV_NAME,
1382                 .owner = THIS_MODULE,
1383                 .pm = &snd_soc_pm_ops,
1384         },
1385         .probe = tegra_cs42l73_driver_probe,
1386         .remove = __devexit_p(tegra_cs42l73_driver_remove),
1387 };
1388
1389 static int __init tegra_cs42l73_modinit(void)
1390 {
1391         return platform_driver_register(&tegra_cs42l73_driver);
1392 }
1393 module_init(tegra_cs42l73_modinit);
1394
1395 static void __exit tegra_cs42l73_modexit(void)
1396 {
1397         platform_driver_unregister(&tegra_cs42l73_driver);
1398 }
1399 module_exit(tegra_cs42l73_modexit);
1400
1401 MODULE_AUTHOR("Vijay Mali <vmali@nvidia.com>");
1402 MODULE_DESCRIPTION("Tegra+CS42L73 machine ASoC driver");
1403 MODULE_LICENSE("GPL");
1404 MODULE_ALIAS("platform:" DRV_NAME);