asoc: tegra: aic326x: Fix DAM allocation for BT voice call
[linux-2.6.git] / sound / soc / tegra / tegra_aic326x.c
1 /*
2  * tegra_aic326x.c - Tegra machine ASoC driver for boards using TI 3262 codec.
3  *
4  * Author: Vinod G. <vinodg@nvidia.com>
5  *
6  * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19  * 02110-1301 USA
20  *
21  */
22
23 #include <asm/mach-types.h>
24
25 #include <linux/clk.h>
26 #include <linux/module.h>
27 #include <linux/platform_device.h>
28 #include <linux/slab.h>
29 #include <linux/gpio.h>
30 #include <linux/regulator/consumer.h>
31 #include <linux/edp.h>
32 #ifdef CONFIG_SWITCH
33 #include <linux/switch.h>
34 #endif
35 #include <mach/tegra_asoc_pdata.h>
36
37 #include <sound/core.h>
38 #include <sound/jack.h>
39 #include <sound/pcm.h>
40 #include <sound/pcm_params.h>
41 #include <sound/soc.h>
42 #include <linux/mfd/tlv320aic3262-registers.h>
43 #include <linux/mfd/tlv320aic3xxx-core.h>
44 #include "../codecs/tlv320aic326x.h"
45
46 #include "tegra_pcm.h"
47 #include "tegra_asoc_utils.h"
48
49 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
50 #include "tegra20_das.h"
51 #else
52 #include "tegra30_ahub.h"
53 #include "tegra30_i2s.h"
54 #include "tegra30_dam.h"
55 #endif
56
57
58 #define DRV_NAME "tegra-snd-aic326x"
59
60 #define GPIO_SPKR_EN    BIT(0)
61 #define GPIO_HP_MUTE    BIT(1)
62 #define GPIO_INT_MIC_EN BIT(2)
63 #define GPIO_EXT_MIC_EN BIT(3)
64 #define GPIO_HP_DET     BIT(4)
65
66 #define DAI_LINK_HIFI           0
67 #define DAI_LINK_SPDIF          1
68 #define DAI_LINK_BTSCO          2
69 #define DAI_LINK_VOICE_CALL     3
70 #define DAI_LINK_BT_VOICE_CALL  4
71 #define NUM_DAI_LINKS   5
72
73 extern int g_is_call_mode;
74
75 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
76 const char *tegra_i2s_dai_name[TEGRA30_NR_I2S_IFC] = {
77         "tegra30-i2s.0",
78         "tegra30-i2s.1",
79         "tegra30-i2s.2",
80         "tegra30-i2s.3",
81         "tegra30-i2s.4",
82 };
83 #endif
84
85 struct tegra_aic326x {
86         struct tegra_asoc_utils_data util_data;
87         struct tegra_asoc_platform_data *pdata;
88         struct regulator *audio_reg;
89         int gpio_requested;
90         bool init_done;
91         int is_call_mode;
92         int is_device_bt;
93 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
94         struct codec_config codec_info[NUM_I2S_DEVICES];
95         struct snd_soc_card *pcard;
96         struct regulator *dmic_reg;
97         struct regulator *dmic_1v8_reg;
98         struct regulator *hmic_reg;
99         enum snd_soc_bias_level bias_level;
100         struct edp_client *spk_edp_client;
101 #endif
102         int clock_enabled;
103 };
104
105 static int tegra_aic326x_call_mode_info(struct snd_kcontrol *kcontrol,
106                         struct snd_ctl_elem_info *uinfo)
107 {
108         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
109         uinfo->count = 1;
110         uinfo->value.integer.min = 0;
111         uinfo->value.integer.max = 1;
112         return 0;
113 }
114
115 static int tegra_aic326x_call_mode_get(struct snd_kcontrol *kcontrol,
116                 struct snd_ctl_elem_value *ucontrol)
117 {
118         struct tegra_aic326x *machine = snd_kcontrol_chip(kcontrol);
119
120         ucontrol->value.integer.value[0] = machine->is_call_mode;
121
122         return 0;
123 }
124
125 static int tegra_aic326x_call_mode_put(struct snd_kcontrol *kcontrol,
126                 struct snd_ctl_elem_value *ucontrol)
127 {
128         struct tegra_aic326x *machine = snd_kcontrol_chip(kcontrol);
129         int is_call_mode_new = ucontrol->value.integer.value[0];
130 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
131         int codec_dap_id, codec_dap_sel, bb_dap_id, bb_dap_sel;
132 #else /*assumes tegra3*/
133         int codec_index;
134         unsigned int i;
135         int uses_voice_codec;
136 #endif
137
138         if (machine->is_call_mode == is_call_mode_new)
139                 return 0;
140
141 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
142         bb_dap_id = TEGRA20_DAS_DAP_ID_3;
143         bb_dap_sel = TEGRA20_DAS_DAP_SEL_DAP3;
144
145         if (machine->is_device_bt) {
146                 codec_dap_id = TEGRA20_DAS_DAP_ID_4;
147                 codec_dap_sel = TEGRA20_DAS_DAP_SEL_DAP4;
148         }
149         else {
150                 codec_dap_id = TEGRA20_DAS_DAP_ID_2;
151                 codec_dap_sel = TEGRA20_DAS_DAP_SEL_DAP2;
152         }
153 #else /*assumes tegra3*/
154         if (machine->is_device_bt) {
155                 codec_index = BT_SCO;
156                 uses_voice_codec = 0;
157         } else {
158                 codec_index = VOICE_CODEC;
159                 uses_voice_codec = 1;
160         }
161 #endif
162
163         if (is_call_mode_new) {
164 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
165                 tegra20_das_set_tristate(codec_dap_id, 1);
166                 tegra20_das_set_tristate(bb_dap_id, 1);
167                 tegra20_das_connect_dap_to_dap(codec_dap_id,
168                         bb_dap_sel, 0, 0, 0);
169                 tegra20_das_connect_dap_to_dap(bb_dap_id,
170                         codec_dap_sel, 1, 0, 0);
171                 tegra20_das_set_tristate(codec_dap_id, 0);
172                 tegra20_das_set_tristate(bb_dap_id, 0);
173 #else /*assumes tegra3*/
174                 if (machine->codec_info[codec_index].rate == 0 ||
175                         machine->codec_info[codec_index].channels == 0)
176                                 return -EINVAL;
177
178                 for (i = 0; i < machine->pcard->num_links; i++)
179                         machine->pcard->dai_link[i].ignore_suspend = 1;
180
181                 tegra30_make_voice_call_connections(
182                         &machine->codec_info[codec_index],
183                         &machine->codec_info[BASEBAND], uses_voice_codec);
184 #endif
185         } else {
186 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
187                 tegra20_das_set_tristate(codec_dap_id, 1);
188                 tegra20_das_set_tristate(bb_dap_id, 1);
189                 tegra20_das_connect_dap_to_dap(bb_dap_id,
190                         bb_dap_sel, 0, 0, 0);
191                 tegra20_das_connect_dap_to_dap(codec_dap_id,
192                         codec_dap_sel, 0, 0, 0);
193                 tegra20_das_set_tristate(codec_dap_id, 0);
194                 tegra20_das_set_tristate(bb_dap_id, 0);
195 #else /*assumes tegra3*/
196                 tegra30_break_voice_call_connections(
197                         &machine->codec_info[codec_index],
198                         &machine->codec_info[BASEBAND], uses_voice_codec);
199
200                 for (i = 0; i < machine->pcard->num_links; i++)
201                         machine->pcard->dai_link[i].ignore_suspend = 0;
202 #endif
203         }
204
205         machine->is_call_mode = is_call_mode_new;
206         g_is_call_mode = machine->is_call_mode;
207
208         return 1;
209 }
210
211 struct snd_kcontrol_new tegra_aic326x_call_mode_control = {
212         .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
213         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
214         .name = "Call Mode Switch",
215         .private_value = 0xffff,
216         .info = tegra_aic326x_call_mode_info,
217         .get = tegra_aic326x_call_mode_get,
218         .put = tegra_aic326x_call_mode_put
219 };
220
221 static int tegra_aic326x_get_mclk(int srate)
222 {
223         int mclk = 0;
224         switch (srate) {
225         case 8000:
226         case 16000:
227         case 24000:
228         case 32000:
229         case 48000:
230         case 64000:
231         case 96000:
232                 mclk = 12288000;
233                 break;
234         case 11025:
235         case 22050:
236         case 44100:
237         case 88200:
238                 mclk = 11289600;
239                 break;
240         default:
241                 mclk = -EINVAL;
242                 break;
243         }
244
245         return mclk;
246 }
247
248 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
249 static int tegra_aic326x_set_dam_cif(int dam_ifc, int srate,
250                         int channels, int bit_size, int src_on, int src_srate,
251                         int src_channels, int src_bit_size)
252 {
253         tegra30_dam_set_gain(dam_ifc, TEGRA30_DAM_CHIN1, 0x1000);
254         tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHOUT,
255                                 srate);
256         tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN1,
257                                 srate);
258 #ifndef CONFIG_ARCH_TEGRA_3x_SOC
259         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1,
260                 channels, bit_size, channels,
261                                 32);
262         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT,
263                 channels, bit_size, channels,
264                                 32);
265 #else
266         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1,
267                 channels, bit_size, channels,
268                                 bit_size);
269         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT,
270                 channels, bit_size, channels,
271                                 bit_size);
272 #endif
273
274         if (src_on) {
275                 tegra30_dam_set_gain(dam_ifc, TEGRA30_DAM_CHIN0_SRC, 0x1000);
276                 tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN0_SRC,
277                         src_srate);
278 #ifndef CONFIG_ARCH_TEGRA_3x_SOC
279                 tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN0_SRC,
280                         src_channels, src_bit_size, 1, 32);
281 #else
282                 tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN0_SRC,
283                         src_channels, src_bit_size, 1, 16);
284 #endif
285         }
286
287         return 0;
288 }
289 #endif
290
291 static int tegra_aic326x_hw_params(struct snd_pcm_substream *substream,
292                                         struct snd_pcm_hw_params *params)
293 {
294         struct snd_soc_pcm_runtime *rtd = substream->private_data;
295         struct snd_soc_dai *codec_dai = rtd->codec_dai;
296         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
297         struct snd_soc_codec *codec = rtd->codec;
298         struct snd_soc_card *card = codec->card;
299         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
300         struct tegra_asoc_platform_data *pdata = machine->pdata;
301         int srate, mclk, sample_size, i2s_daifmt;
302         int err, rate;
303
304         switch (params_format(params)) {
305         case SNDRV_PCM_FORMAT_S16_LE:
306                 sample_size = 16;
307                 break;
308         default:
309                 return -EINVAL;
310         }
311
312         srate = params_rate(params);
313
314         mclk = tegra_aic326x_get_mclk(srate);
315         if (mclk < 0)
316                 return mclk;
317
318         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
319         i2s_daifmt |= pdata->i2s_param[HIFI_CODEC].is_i2s_master ?
320                         SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
321
322         switch (pdata->i2s_param[HIFI_CODEC].i2s_mode) {
323                 case TEGRA_DAIFMT_I2S :
324                         i2s_daifmt |= SND_SOC_DAIFMT_I2S;
325                         break;
326                 case TEGRA_DAIFMT_DSP_A :
327                         i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
328                         break;
329                 case TEGRA_DAIFMT_DSP_B :
330                         i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
331                         break;
332                 case TEGRA_DAIFMT_LEFT_J :
333                         i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
334                         break;
335                 case TEGRA_DAIFMT_RIGHT_J :
336                         i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
337                         break;
338                 default :
339                         dev_err(card->dev, "Can't configure i2s format\n");
340                         return -EINVAL;
341         }
342
343         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
344         if (err < 0) {
345                 if (!(machine->util_data.set_mclk % mclk))
346                         mclk = machine->util_data.set_mclk;
347                 else {
348                         dev_err(card->dev, "Can't configure clocks\n");
349                         return err;
350                 }
351         }
352
353         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
354
355         rate = clk_get_rate(machine->util_data.clk_cdev1);
356
357         err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
358         if (err < 0) {
359                 dev_err(card->dev, "codec_dai fmt not set\n");
360                 return err;
361         }
362
363         err = snd_soc_dai_set_fmt(cpu_dai, i2s_daifmt);
364         if (err < 0) {
365                 dev_err(card->dev, "cpu_dai fmt not set\n");
366                 return err;
367         }
368
369         err = snd_soc_dai_set_pll(codec_dai, 0, AIC3262_PLL_CLKIN_MCLK1 , rate,
370                 params_rate(params));
371
372 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
373         err = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAP_SEL_DAC1,
374                                         TEGRA20_DAS_DAP_ID_1);
375         if (err < 0) {
376                 dev_err(card->dev, "failed to set dap-dac path\n");
377                 return err;
378         }
379
380         err = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_1,
381                                         TEGRA20_DAS_DAP_SEL_DAC1);
382         if (err < 0) {
383                 dev_err(card->dev, "failed to set dac-dap path\n");
384                 return err;
385         }
386 #endif
387         return 0;
388 }
389
390 static int tegra_aic326x_spdif_hw_params(struct snd_pcm_substream *substream,
391                                         struct snd_pcm_hw_params *params)
392 {
393         struct snd_soc_pcm_runtime *rtd = substream->private_data;
394         struct snd_soc_card *card = rtd->card;
395         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
396         int srate, mclk, min_mclk;
397         int err;
398
399         srate = params_rate(params);
400
401         mclk = tegra_aic326x_get_mclk(srate);
402         if (mclk < 0)
403                 return mclk;
404
405         min_mclk = 128 * srate;
406
407         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
408         if (err < 0) {
409                 if (!(machine->util_data.set_mclk % min_mclk))
410                         mclk = machine->util_data.set_mclk;
411                 else {
412                         dev_err(card->dev, "Can't configure clocks\n");
413                         return err;
414                 }
415         }
416
417         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
418
419         return 0;
420 }
421
422 static int tegra_aic326x_bt_hw_params(struct snd_pcm_substream *substream,
423                 struct snd_pcm_hw_params *params)
424 {
425         struct snd_soc_pcm_runtime *rtd = substream->private_data;
426         struct snd_soc_card *card = rtd->card;
427         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
428         struct tegra_asoc_platform_data *pdata = machine->pdata;
429         int err, srate, mclk, min_mclk, sample_size, i2s_daifmt;
430 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
431         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai);
432 #endif
433
434         switch (params_format(params)) {
435         case SNDRV_PCM_FORMAT_S16_LE:
436                 sample_size = 16;
437                 break;
438         default:
439                 return -EINVAL;
440         }
441
442         srate = params_rate(params);
443
444         mclk = tegra_aic326x_get_mclk(srate);
445         if (mclk < 0)
446                 return mclk;
447
448         min_mclk = 64 * srate;
449
450         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
451         if (err < 0) {
452                 if (!(machine->util_data.set_mclk % min_mclk))
453                         mclk = machine->util_data.set_mclk;
454                 else {
455                         dev_err(card->dev, "Can't configure clocks\n");
456                         return err;
457                 }
458         }
459
460         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
461
462         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
463         i2s_daifmt |= pdata->i2s_param[BT_SCO].is_i2s_master ?
464                         SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
465
466         switch (pdata->i2s_param[BT_SCO].i2s_mode) {
467                 case TEGRA_DAIFMT_I2S :
468                         i2s_daifmt |= SND_SOC_DAIFMT_I2S;
469                         break;
470                 case TEGRA_DAIFMT_DSP_A :
471                         i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
472                         break;
473                 case TEGRA_DAIFMT_DSP_B :
474                         i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
475                         break;
476                 case TEGRA_DAIFMT_LEFT_J :
477                         i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
478                         break;
479                 case TEGRA_DAIFMT_RIGHT_J :
480                         i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
481                         break;
482                 default :
483                         dev_err(card->dev, "Can't configure i2s format\n");
484                         return -EINVAL;
485         }
486
487         err = snd_soc_dai_set_fmt(rtd->cpu_dai, i2s_daifmt);
488
489         if (err < 0) {
490                 dev_err(rtd->codec->card->dev, "cpu_dai fmt not set\n");
491                 return err;
492         }
493
494 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
495         err = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAP_SEL_DAC2,
496                                         TEGRA20_DAS_DAP_ID_4);
497         if (err < 0) {
498                 dev_err(card->dev, "failed to set dac-dap path\n");
499                 return err;
500         }
501
502         err = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_4,
503                                         TEGRA20_DAS_DAP_SEL_DAC2);
504         if (err < 0) {
505                 dev_err(card->dev, "failed to set dac-dap path\n");
506                 return err;
507         }
508 #else
509         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && i2s->is_dam_used)
510                 tegra_aic326x_set_dam_cif(i2s->dam_ifc, params_rate(params),
511                         params_channels(params), sample_size, 0, 0, 0, 0);
512 #endif
513
514         return 0;
515 }
516
517 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
518 static int tegra_aic326x_startup(struct snd_pcm_substream *substream)
519 {
520         struct snd_soc_pcm_runtime *rtd = substream->private_data;
521         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
522         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
523         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(rtd->card);
524         struct codec_config *codec_info;
525         struct codec_config *bb_info;
526         struct codec_config *hifi_info;
527         int codec_index;
528
529         if (!i2s->is_dam_used)
530                 return 0;
531
532         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
533                 if (i2s->id == machine->codec_info[BT_SCO].i2s_id) {
534                         /*dam configuration*/
535                         if (!i2s->dam_ch_refcount)
536                                 i2s->dam_ifc =
537                                         tegra30_dam_allocate_controller();
538                         if (i2s->dam_ifc < 0)
539                                 return i2s->dam_ifc;
540                         tegra30_dam_allocate_channel(i2s->dam_ifc,
541                                 TEGRA30_DAM_CHIN1);
542                         i2s->dam_ch_refcount++;
543                         tegra30_dam_enable_clock(i2s->dam_ifc);
544
545                         tegra30_ahub_set_rx_cif_source(
546                           TEGRA30_AHUB_RXCIF_DAM0_RX1 + (i2s->dam_ifc*2),
547                           i2s->txcif);
548
549                         /* make the dam tx to i2s rx connection if this is
550                          * the only client using i2s for playback */
551                         if (i2s->playback_ref_count == 1)
552                                 tegra30_ahub_set_rx_cif_source(
553                                   TEGRA30_AHUB_RXCIF_I2S0_RX0 + i2s->id,
554                                   TEGRA30_AHUB_TXCIF_DAM0_TX0 + i2s->dam_ifc);
555
556                         /* enable the dam*/
557                         tegra30_dam_enable(i2s->dam_ifc, TEGRA30_DAM_ENABLE,
558                                 TEGRA30_DAM_CHIN1);
559                 } else {
560                         /* make apbif tx to i2s rx connection if this is
561                          * the only client using i2s for playback */
562                         if (i2s->playback_ref_count == 1) {
563                                 tegra30_ahub_set_rx_cif_source(
564                                         TEGRA30_AHUB_RXCIF_I2S0_RX0 + i2s->id,
565                                         i2s->txcif);
566                         tegra30_ahub_enable_clocks();
567                         }
568                 }
569         } else {
570                 i2s->is_call_mode_rec = machine->is_call_mode;
571                 if (!i2s->is_call_mode_rec)
572                         return 0;
573
574                 if (machine->is_device_bt) {
575                         i2s->is_call_mode_rec = 0;
576                         return 0;
577                 }
578                 else
579                         codec_index = VOICE_CODEC;
580
581                 codec_info = &machine->codec_info[codec_index];
582                 bb_info = &machine->codec_info[BASEBAND];
583                 hifi_info = &machine->codec_info[HIFI_CODEC];
584
585                 /* allocate a dams for voice call recording */
586
587                 i2s->call_record_dam_ifc = tegra30_dam_allocate_controller();
588
589                 if (i2s->call_record_dam_ifc < 0)
590                         return i2s->call_record_dam_ifc;
591
592                 tegra30_dam_allocate_channel(i2s->call_record_dam_ifc,
593                         TEGRA30_DAM_CHIN0_SRC);
594                 tegra30_dam_allocate_channel(i2s->call_record_dam_ifc,
595                         TEGRA30_DAM_CHIN1);
596                 tegra30_dam_enable_clock(i2s->call_record_dam_ifc);
597
598                 i2s->call_record_dam_ifc2 = tegra30_dam_allocate_controller();
599
600                 if (i2s->call_record_dam_ifc2 < 0)
601                         return i2s->call_record_dam_ifc2;
602
603                 tegra30_dam_allocate_channel(i2s->call_record_dam_ifc2,
604                         TEGRA30_DAM_CHIN0_SRC);
605                 tegra30_dam_allocate_channel(i2s->call_record_dam_ifc2,
606                         TEGRA30_DAM_CHIN1);
607                 tegra30_dam_enable_clock(i2s->call_record_dam_ifc2);
608
609                 /* configure the dams */
610                 /* DAM0 SRC bb rate to hifi rate */
611                 tegra_aic326x_set_dam_cif(i2s->call_record_dam_ifc,
612                         codec_info->rate, codec_info->channels,
613                         codec_info->bitsize, 1, hifi_info->rate,
614                         hifi_info->channels, hifi_info->bitsize);
615                 /* DAM1 UL + DL Mix */
616                 tegra_aic326x_set_dam_cif(i2s->call_record_dam_ifc2,
617                         codec_info->rate, codec_info->channels,
618                         codec_info->bitsize, 1, bb_info->rate,
619                         bb_info->channels, bb_info->bitsize);
620
621                 /* setup the connections for voice call record */
622                 tegra30_ahub_unset_rx_cif_source(i2s->rxcif);
623                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
624                         (i2s->call_record_dam_ifc2*2),
625                         TEGRA30_AHUB_TXCIF_I2S0_TX0 + bb_info->i2s_id);
626                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
627                         (i2s->call_record_dam_ifc2*2),
628                         TEGRA30_AHUB_TXCIF_I2S0_TX0 + codec_info->i2s_id);
629                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
630                         (i2s->call_record_dam_ifc*2),
631                         TEGRA30_AHUB_TXCIF_DAM0_TX0 +
632                         i2s->call_record_dam_ifc2);
633                 tegra30_ahub_set_rx_cif_source(i2s->rxcif,
634                         TEGRA30_AHUB_TXCIF_DAM0_TX0 + i2s->call_record_dam_ifc);
635 #ifndef CONFIG_ARCH_TEGRA_3x_SOC
636                 /* Configure DAM0 for SRC */
637                 if (bb_info->rate != hifi_info->rate) {
638                         tegra30_dam_write_coeff_ram(i2s->call_record_dam_ifc,
639                                                 bb_info->rate, hifi_info->rate);
640                         tegra30_dam_set_farrow_param(i2s->call_record_dam_ifc,
641                                                 bb_info->rate, hifi_info->rate);
642                         tegra30_dam_set_biquad_fixed_coef(
643                                                 i2s->call_record_dam_ifc);
644                         tegra30_dam_enable_coeff_ram(i2s->call_record_dam_ifc);
645                         tegra30_dam_set_filter_stages(i2s->call_record_dam_ifc,
646                                                         bb_info->rate,
647                                                         hifi_info->rate);
648                 }
649 #endif
650                 /* enable the dam */
651                 tegra30_dam_enable(i2s->call_record_dam_ifc, TEGRA30_DAM_ENABLE,
652                                 TEGRA30_DAM_CHIN1);
653                 tegra30_dam_enable(i2s->call_record_dam_ifc, TEGRA30_DAM_ENABLE,
654                                 TEGRA30_DAM_CHIN0_SRC);
655                 tegra30_dam_enable(i2s->call_record_dam_ifc2,
656                                         TEGRA30_DAM_ENABLE,
657                                         TEGRA30_DAM_CHIN1);
658                 tegra30_dam_enable(i2s->call_record_dam_ifc2,
659                                         TEGRA30_DAM_ENABLE,
660                                         TEGRA30_DAM_CHIN0_SRC);
661         }
662
663         return 0;
664 }
665
666 static void tegra_aic326x_shutdown(struct snd_pcm_substream *substream)
667 {
668         struct snd_soc_pcm_runtime *rtd = substream->private_data;
669         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
670         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
671         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(rtd->card);
672
673         if (!i2s->is_dam_used)
674                 return;
675
676         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
677                 if (i2s->id == machine->codec_info[BT_SCO].i2s_id) {
678                         /* disable the dam*/
679                         tegra30_dam_enable(i2s->dam_ifc, TEGRA30_DAM_DISABLE,
680                                 TEGRA30_DAM_CHIN1);
681
682                         /* disconnect the ahub connections*/
683                         tegra30_ahub_unset_rx_cif_source(
684                           TEGRA30_AHUB_RXCIF_DAM0_RX1 + (i2s->dam_ifc*2));
685
686                         /* disable the dam and free the controller */
687                         tegra30_dam_disable_clock(i2s->dam_ifc);
688                         tegra30_dam_free_channel(i2s->dam_ifc,
689                                 TEGRA30_DAM_CHIN1);
690                         i2s->dam_ch_refcount--;
691                         if (!i2s->dam_ch_refcount)
692                                 tegra30_dam_free_controller(i2s->dam_ifc);
693
694                 } else {
695                         tegra30_ahub_unset_rx_cif_source(
696                                         TEGRA30_AHUB_RXCIF_I2S0_RX0 + i2s->id);
697                         tegra30_ahub_disable_clocks();
698                 }
699          } else {
700                 if (!i2s->is_call_mode_rec)
701                         return;
702
703                 i2s->is_call_mode_rec = 0;
704
705                 /* disable the dams*/
706                 tegra30_dam_enable(i2s->call_record_dam_ifc,
707                         TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN1);
708                 tegra30_dam_enable(i2s->call_record_dam_ifc,
709                         TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN0_SRC);
710                 tegra30_dam_enable(i2s->call_record_dam_ifc2,
711                         TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN1);
712                 tegra30_dam_enable(i2s->call_record_dam_ifc2,
713                         TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN0_SRC);
714
715                 /* disconnect the ahub connections*/
716                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
717                                                 (i2s->call_record_dam_ifc2*2));
718                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
719                                                 (i2s->call_record_dam_ifc2*2));
720                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
721                                                 (i2s->call_record_dam_ifc*2));
722                 tegra30_ahub_unset_rx_cif_source(i2s->rxcif);
723
724                 /* free the dam channels and dam controllers */
725                 tegra30_dam_disable_clock(i2s->call_record_dam_ifc);
726                 tegra30_dam_free_channel(i2s->call_record_dam_ifc,
727                                         TEGRA30_DAM_CHIN1);
728                 tegra30_dam_free_channel(i2s->call_record_dam_ifc,
729                                         TEGRA30_DAM_CHIN0_SRC);
730                 tegra30_dam_free_controller(i2s->call_record_dam_ifc);
731
732                 tegra30_dam_disable_clock(i2s->call_record_dam_ifc2);
733                 tegra30_dam_free_channel(i2s->call_record_dam_ifc2,
734                                         TEGRA30_DAM_CHIN1);
735                 tegra30_dam_free_channel(i2s->call_record_dam_ifc2,
736                                         TEGRA30_DAM_CHIN0_SRC);
737                 tegra30_dam_free_controller(i2s->call_record_dam_ifc2);
738          }
739
740         return;
741 }
742 #endif
743
744
745 static int tegra_aic326x_hw_free(struct snd_pcm_substream *substream)
746 {
747         struct snd_soc_pcm_runtime *rtd = substream->private_data;
748         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(rtd->card);
749
750         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 0);
751
752         return 0;
753 }
754
755 static int tegra_aic326x_voice_call_hw_params(
756                         struct snd_pcm_substream *substream,
757                         struct snd_pcm_hw_params *params)
758 {
759         struct snd_soc_pcm_runtime *rtd = substream->private_data;
760         struct snd_soc_dai *codec_dai = rtd->codec_dai;
761         struct snd_soc_codec *codec = rtd->codec;
762         struct snd_soc_card *card = codec->card;
763         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
764         struct tegra_asoc_platform_data *pdata = machine->pdata;
765         int srate, mclk, rate, i2s_daifmt;
766         int err, pcmdiv, vxclkdiv;
767
768         srate = params_rate(params);
769         mclk = tegra_aic326x_get_mclk(srate);
770         if (mclk < 0)
771                 return mclk;
772
773         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
774
775         i2s_daifmt |= pdata->i2s_param[VOICE_CODEC].is_i2s_master ?
776                 SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
777
778         switch (pdata->i2s_param[VOICE_CODEC].i2s_mode) {
779         case TEGRA_DAIFMT_I2S:
780                 i2s_daifmt |= SND_SOC_DAIFMT_I2S;
781                 break;
782         case TEGRA_DAIFMT_DSP_A:
783                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
784                 break;
785         case TEGRA_DAIFMT_DSP_B:
786                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
787                 break;
788         case TEGRA_DAIFMT_LEFT_J:
789                 i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
790                 break;
791         case TEGRA_DAIFMT_RIGHT_J:
792                 i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
793                 break;
794         default:
795                 dev_err(card->dev,
796                 "Can't configure i2s format\n");
797                 return -EINVAL;
798         }
799
800         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
801         if (err < 0) {
802                 if (!(machine->util_data.set_mclk % mclk))
803                         mclk = machine->util_data.set_mclk;
804                 else {
805                         dev_err(card->dev, "Can't configure clocks\n");
806                         return err;
807                 }
808         }
809
810         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
811
812         rate = clk_get_rate(machine->util_data.clk_cdev1);
813
814         err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
815         if (err < 0) {
816                 dev_err(card->dev, "codec_dai fmt not set\n");
817                 return err;
818         }
819
820
821         err = snd_soc_dai_set_pll(codec_dai, 0, AIC3262_PLL_CLKIN_MCLK1 , rate,
822                         params_rate(params));
823
824         if (err < 0) {
825                 dev_err(card->dev, "codec_dai PLL clock not set\n");
826                 return err;
827         }
828
829         if (!machine_is_tegra_enterprise()) {
830                 if (params_rate(params) == 8000) {
831                         /* Change these Settings for 8KHz*/
832                         pcmdiv = 1;
833                         /* BB expecting 2048Khz bclk */
834                         vxclkdiv = 27;
835                 } else if (params_rate(params) == 16000) {
836                         pcmdiv = 1;
837                         /* BB expecting 2048Khz bclk */
838                         vxclkdiv = 27;
839                 } else {
840                         dev_err(card->dev, "codec_dai unsupported voice rate\n");
841                         return -EINVAL;
842                 }
843         }
844
845         //snd_soc_dai_set_clkdiv(codec_dai, ASI2_BCLK_N, vxclkdiv);
846         //snd_soc_dai_set_clkdiv(codec_dai, ASI2_WCLK_N, pcmdiv);
847
848 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
849         /* codec configuration */
850         machine->codec_info[VOICE_CODEC].rate = params_rate(params);
851         machine->codec_info[VOICE_CODEC].channels = params_channels(params);
852 #endif
853
854         machine->is_device_bt = 0;
855
856         return 0;
857 }
858
859 static void tegra_aic326x_voice_call_shutdown(
860                                         struct snd_pcm_substream *substream)
861 {
862         struct snd_soc_pcm_runtime *rtd = substream->private_data;
863         struct tegra_aic326x *machine  =
864                         snd_soc_card_get_drvdata(rtd->codec->card);
865
866 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
867         machine->codec_info[VOICE_CODEC].rate = 0;
868         machine->codec_info[VOICE_CODEC].channels = 0;
869 #endif
870
871         machine->is_device_bt = 0;
872 }
873
874 static int tegra_aic326x_bt_voice_call_hw_params(
875                         struct snd_pcm_substream *substream,
876                         struct snd_pcm_hw_params *params)
877 {
878         struct snd_soc_pcm_runtime *rtd = substream->private_data;
879         struct snd_soc_card *card = rtd->card;
880         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
881         int err, srate, mclk, min_mclk;
882
883         srate = params_rate(params);
884
885         mclk = tegra_aic326x_get_mclk(srate);
886         if (mclk < 0)
887                 return mclk;
888
889         min_mclk = 64 * srate;
890
891         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
892         if (err < 0) {
893                 if (!(machine->util_data.set_mclk % min_mclk))
894                         mclk = machine->util_data.set_mclk;
895                 else {
896                         dev_err(card->dev, "Can't configure clocks\n");
897                         return err;
898                 }
899         }
900
901         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
902
903 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
904         /* codec configuration */
905         machine->codec_info[BT_SCO].rate = params_rate(params);
906         machine->codec_info[BT_SCO].channels = params_channels(params);
907 #endif
908
909         machine->is_device_bt = 1;
910
911         return 0;
912 }
913
914 static void tegra_aic326x_bt_voice_call_shutdown(
915                                 struct snd_pcm_substream *substream)
916 {
917         struct snd_soc_pcm_runtime *rtd = substream->private_data;
918         struct tegra_aic326x *machine  =
919                         snd_soc_card_get_drvdata(rtd->codec->card);
920
921 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
922         machine->codec_info[BT_SCO].rate = 0;
923         machine->codec_info[BT_SCO].channels = 0;
924 #endif
925
926         machine->is_device_bt = 0;
927 }
928
929 static struct snd_soc_ops tegra_aic326x_hifi_ops = {
930         .hw_params = tegra_aic326x_hw_params,
931         .hw_free = tegra_aic326x_hw_free,
932 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
933         .startup = tegra_aic326x_startup,
934         .shutdown = tegra_aic326x_shutdown,
935 #endif
936 };
937
938 static struct snd_soc_ops tegra_aic326x_spdif_ops = {
939         .hw_params = tegra_aic326x_spdif_hw_params,
940         .hw_free = tegra_aic326x_hw_free,
941 };
942
943 static struct snd_soc_ops tegra_aic326x_voice_call_ops = {
944         .hw_params = tegra_aic326x_voice_call_hw_params,
945         .shutdown = tegra_aic326x_voice_call_shutdown,
946         .hw_free = tegra_aic326x_hw_free,
947 };
948
949 static struct snd_soc_ops tegra_aic326x_bt_voice_call_ops = {
950         .hw_params = tegra_aic326x_bt_voice_call_hw_params,
951         .shutdown = tegra_aic326x_bt_voice_call_shutdown,
952         .hw_free = tegra_aic326x_hw_free,
953 };
954
955 static struct snd_soc_ops tegra_aic326x_bt_ops = {
956         .hw_params = tegra_aic326x_bt_hw_params,
957         .hw_free = tegra_aic326x_hw_free,
958 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
959         .startup = tegra_aic326x_startup,
960         .shutdown = tegra_aic326x_shutdown,
961 #endif
962 };
963
964 static struct snd_soc_jack tegra_aic326x_hp_jack;
965
966 #ifdef CONFIG_SWITCH
967 static struct switch_dev aic326x_wired_switch_dev = {
968         .name = "h2w",
969 };
970
971 /* Headset jack detection gpios */
972 static struct snd_soc_jack_gpio tegra_aic326x_hp_jack_gpio = {
973         .name = "headphone detect",
974         .report = SND_JACK_HEADPHONE,
975         .debounce_time = 150,
976         .invert = 1,
977 };
978
979 /* These values are copied from WiredAccessoryObserver */
980 enum headset_state {
981         BIT_NO_HEADSET = 0,
982         BIT_HEADSET = (1 << 0),
983         BIT_HEADSET_NO_MIC = (1 << 1),
984 };
985
986 static int aic326x_headset_switch_notify(struct notifier_block *self,
987         unsigned long action, void *dev)
988 {
989         int state = BIT_NO_HEADSET;
990
991         switch (action) {
992         case SND_JACK_HEADPHONE:
993         /*
994          * FIX ME: For now force headset mic mode
995          * Known HW issue Mic detection is not working
996          */
997                 state |= BIT_HEADSET;
998                 break;
999         case SND_JACK_HEADSET:
1000                 state |= BIT_HEADSET;
1001                 break;
1002         default:
1003                 state |= BIT_NO_HEADSET;
1004         }
1005
1006         switch_set_state(&aic326x_wired_switch_dev, state);
1007
1008         return NOTIFY_OK;
1009 }
1010
1011 static struct notifier_block aic326x_headset_switch_nb = {
1012         .notifier_call = aic326x_headset_switch_notify,
1013 };
1014 #else
1015 static struct snd_soc_jack_pin tegra_aic326x_hp_jack_pins[] = {
1016         {
1017                 .pin = "Headphone Jack",
1018                 .mask = SND_JACK_HEADPHONE,
1019         },
1020 };
1021 #endif
1022
1023 static void tegra_speaker_throttle(unsigned int new_state,  void *priv_data)
1024 {
1025         struct tegra_aic326x *machine = priv_data;
1026         struct snd_soc_card *card;
1027         struct snd_soc_codec *codec;
1028
1029         if (!machine)
1030                 return;
1031
1032         card = machine->pcard;
1033         codec = card->rtd[DAI_LINK_HIFI].codec;
1034
1035         /* set speaker amplifier voulme to 6dB, E0 state */
1036         snd_soc_write(codec, AIC3262_SPK_AMP_CNTL_R4, 0x11);
1037
1038 }
1039
1040 static int tegra_aic326x_event_int_spk(struct snd_soc_dapm_widget *w,
1041                                         struct snd_kcontrol *k, int event)
1042 {
1043         struct snd_soc_dapm_context *dapm = w->dapm;
1044         struct snd_soc_card *card = dapm->card;
1045         struct snd_soc_codec *codec = card->rtd[DAI_LINK_HIFI].codec;
1046         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1047         struct tegra_asoc_platform_data *pdata = machine->pdata;
1048         unsigned int approved;
1049         int ret;
1050
1051         if (machine->spk_edp_client == NULL)
1052                 goto err_null_spk_edp_client;
1053
1054         if (SND_SOC_DAPM_EVENT_ON(event)) {
1055                 ret = edp_update_client_request(
1056                                 machine->spk_edp_client,
1057                                 TEGRA_SPK_EDP_NEG_1, &approved);
1058                 if (ret || approved != TEGRA_SPK_EDP_NEG_1) {
1059                         /*  set speaker amplifier voulme to 6 dB, E0 state */
1060                         snd_soc_write(codec, AIC3262_SPK_AMP_CNTL_R4, 0x11);
1061                 } else {
1062                         /*  set speaker amplifier voulme to 18 dB, E-1 state */
1063                         snd_soc_write(codec, AIC3262_SPK_AMP_CNTL_R4, 0x33);
1064                 }
1065         } else {
1066                 ret = edp_update_client_request(
1067                                         machine->spk_edp_client,
1068                                         TEGRA_SPK_EDP_1, NULL);
1069                 if (ret) {
1070                         dev_err(card->dev,
1071                                 "E+1 state transition failed\n");
1072                 }
1073         }
1074 err_null_spk_edp_client:
1075         if (!(machine->gpio_requested & GPIO_SPKR_EN))
1076                 return 0;
1077
1078         gpio_set_value_cansleep(pdata->gpio_spkr_en,
1079                                 !!SND_SOC_DAPM_EVENT_ON(event));
1080
1081         return 0;
1082 }
1083
1084 static int tegra_aic326x_event_hp(struct snd_soc_dapm_widget *w,
1085                                         struct snd_kcontrol *k, int event)
1086 {
1087         struct snd_soc_dapm_context *dapm = w->dapm;
1088         struct snd_soc_card *card = dapm->card;
1089         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1090         struct tegra_asoc_platform_data *pdata = machine->pdata;
1091
1092         if (!(machine->gpio_requested & GPIO_HP_MUTE))
1093                 return 0;
1094
1095         gpio_set_value_cansleep(pdata->gpio_hp_mute,
1096                                 !SND_SOC_DAPM_EVENT_ON(event));
1097
1098         return 0;
1099 }
1100
1101 static int tegra_aic326x_event_dmic(struct snd_soc_dapm_widget *w,
1102                                         struct snd_kcontrol *k, int event)
1103 {
1104         struct snd_soc_dapm_context *dapm = w->dapm;
1105         struct snd_soc_card *card = dapm->card;
1106         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1107         struct tegra_asoc_platform_data *pdata = machine->pdata;
1108
1109         if (machine->dmic_reg && machine->dmic_1v8_reg) {
1110                 if (SND_SOC_DAPM_EVENT_ON(event)) {
1111                         regulator_enable(machine->dmic_reg);
1112                         regulator_enable(machine->dmic_1v8_reg);
1113                 } else {
1114                         regulator_disable(machine->dmic_reg);
1115                         regulator_disable(machine->dmic_1v8_reg);
1116                 }
1117         }
1118
1119         if (!(machine->gpio_requested & GPIO_INT_MIC_EN))
1120                 return 0;
1121
1122         gpio_set_value_cansleep(pdata->gpio_int_mic_en,
1123                                 !!SND_SOC_DAPM_EVENT_ON(event));
1124
1125         return 0;
1126 }
1127
1128 static const struct snd_soc_dapm_widget tegra_aic326x_dapm_widgets[] = {
1129         SND_SOC_DAPM_SPK("Int Spk", tegra_aic326x_event_int_spk),
1130         SND_SOC_DAPM_HP("Earpiece", NULL),
1131         SND_SOC_DAPM_HP("Headphone Jack", tegra_aic326x_event_hp),
1132         SND_SOC_DAPM_MIC("Mic Jack", NULL),
1133         SND_SOC_DAPM_INPUT("Ext Mic"),
1134         SND_SOC_DAPM_LINE("Linein", NULL),
1135         SND_SOC_DAPM_MIC("Int Mic", tegra_aic326x_event_dmic),
1136         SND_SOC_DAPM_MIC("DMIC", NULL),
1137 };
1138
1139 static const struct snd_soc_dapm_route aic326x_audio_map[] = {
1140         {"Int Spk", NULL, "SPK Left Playback"},
1141         {"Int Spk", NULL, "SPK Right Playback"},
1142         {"Earpiece", NULL, "RECP Playback"},
1143         {"Earpiece", NULL, "RECM Playback"},
1144         {"Headphone Jack", NULL, "HP Left Playback"},
1145         {"Headphone Jack", NULL, "HP Right Playback"},
1146         /* internal (IN2L/IN2R) mic is stero */
1147         {"Mic Bias Int" ,NULL, "Int Mic"},
1148         {"IN2 Left Capture", NULL, "Mic Bias Int"},
1149         {"Mic Bias Int" ,NULL, "Int Mic"},
1150         {"IN2 Right Capture", NULL, "Mic Bias Int"},
1151         {"IN1 Left Capture", NULL, "Mic Bias Ext"},
1152         {"Mic Bias Ext" , NULL, "Mic Jack"},
1153         /* Connect LDMIC and RDMIC to DMIC widget*/
1154         {"Left DMIC Capture", NULL, "Mic Bias Int"},
1155         {"Right DMIC Capture", NULL, "Mic Bias Int"},
1156         {"Mic Bias Int", NULL, "Int Mic"},
1157 };
1158
1159 static const struct snd_kcontrol_new tegra_aic326x_controls[] = {
1160         SOC_DAPM_PIN_SWITCH("Int Spk"),
1161         SOC_DAPM_PIN_SWITCH("Earpiece"),
1162         SOC_DAPM_PIN_SWITCH("Headphone Jack"),
1163         SOC_DAPM_PIN_SWITCH("Mic Jack"),
1164         SOC_DAPM_PIN_SWITCH("Ext Mic"),
1165         SOC_DAPM_PIN_SWITCH("Linein"),
1166         SOC_DAPM_PIN_SWITCH("Int Mic"),
1167 };
1168
1169 static int tegra_aic326x_init(struct snd_soc_pcm_runtime *rtd)
1170 {
1171         struct snd_soc_codec *codec = rtd->codec;
1172         struct snd_soc_dapm_context *dapm = &codec->dapm;
1173         struct snd_soc_card *card = codec->card;
1174         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1175         struct tegra_asoc_platform_data *pdata = machine->pdata;
1176 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1177         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai);
1178 #endif
1179         int ret;
1180
1181 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1182         if (machine->codec_info[BASEBAND].i2s_id != -1)
1183                 i2s->is_dam_used = true;
1184 #endif
1185
1186         if (machine->init_done)
1187                 return 0;
1188
1189         machine->init_done = true;
1190
1191 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1192         machine->pcard = card;
1193 #endif
1194
1195         if (machine_is_whistler()) {
1196                 machine->audio_reg = regulator_get(NULL, "avddio_audio");
1197                 if (IS_ERR(machine->audio_reg)) {
1198                         dev_err(card->dev, "cannot get avddio_audio reg\n");
1199                         ret = PTR_ERR(machine->audio_reg);
1200                         return ret;
1201                 }
1202
1203                 ret = regulator_enable(machine->audio_reg);
1204                 if (ret) {
1205                         dev_err(card->dev, "cannot enable avddio_audio reg\n");
1206                         regulator_put(machine->audio_reg);
1207                         machine->audio_reg = NULL;
1208                         return ret;
1209                 }
1210         }
1211
1212         if (gpio_is_valid(pdata->gpio_spkr_en)) {
1213                 ret = gpio_request(pdata->gpio_spkr_en, "spkr_en");
1214                 if (ret) {
1215                         dev_err(card->dev, "cannot get spkr_en gpio\n");
1216                         return ret;
1217                 }
1218                 machine->gpio_requested |= GPIO_SPKR_EN;
1219
1220                 gpio_direction_output(pdata->gpio_spkr_en, 0);
1221         }
1222
1223         if (gpio_is_valid(pdata->gpio_hp_mute)) {
1224                 ret = gpio_request(pdata->gpio_hp_mute, "hp_mute");
1225                 if (ret) {
1226                         dev_err(card->dev, "cannot get hp_mute gpio\n");
1227                         return ret;
1228                 }
1229                 machine->gpio_requested |= GPIO_HP_MUTE;
1230
1231                 gpio_direction_output(pdata->gpio_hp_mute, 0);
1232         }
1233
1234         if (gpio_is_valid(pdata->gpio_int_mic_en)) {
1235                 ret = gpio_request(pdata->gpio_int_mic_en, "int_mic_en");
1236                 if (ret) {
1237                         dev_err(card->dev, "cannot get int_mic_en gpio\n");
1238                         return ret;
1239                 }
1240                 machine->gpio_requested |= GPIO_INT_MIC_EN;
1241
1242                 /* Disable int mic; enable signal is active-high */
1243                 gpio_direction_output(pdata->gpio_int_mic_en, 0);
1244         }
1245
1246         if (gpio_is_valid(pdata->gpio_ext_mic_en)) {
1247                 ret = gpio_request(pdata->gpio_ext_mic_en, "ext_mic_en");
1248                 if (ret) {
1249                         dev_err(card->dev, "cannot get ext_mic_en gpio\n");
1250                         return ret;
1251                 }
1252                 machine->gpio_requested |= GPIO_EXT_MIC_EN;
1253
1254                 /* Enable ext mic; enable signal is active-low */
1255                 gpio_direction_output(pdata->gpio_ext_mic_en, 0);
1256         }
1257
1258         ret = snd_soc_add_card_controls(card, tegra_aic326x_controls,
1259                                    ARRAY_SIZE(tegra_aic326x_controls));
1260         if (ret < 0)
1261                 return ret;
1262
1263         snd_soc_dapm_new_controls(dapm, tegra_aic326x_dapm_widgets,
1264                                         ARRAY_SIZE(tegra_aic326x_dapm_widgets));
1265
1266         snd_soc_dapm_add_routes(dapm, aic326x_audio_map,
1267                                         ARRAY_SIZE(aic326x_audio_map));
1268
1269         ret = snd_soc_jack_new(codec, "Headset Jack", SND_JACK_HEADSET,
1270                         &tegra_aic326x_hp_jack);
1271         if (ret < 0)
1272                 return ret;
1273
1274         if (gpio_is_valid(pdata->gpio_hp_det)) {
1275                 /* Headphone detection */
1276                 tegra_aic326x_hp_jack_gpio.gpio = pdata->gpio_hp_det;
1277                 snd_soc_jack_new(codec, "Headphone Jack",
1278                                 SND_JACK_HEADSET, &tegra_aic326x_hp_jack);
1279
1280 #ifndef CONFIG_SWITCH
1281         snd_soc_jack_add_pins(&tegra_aic326x_hp_jack,
1282                 ARRAY_SIZE(tegra_aic326x_hp_jack_pins),
1283                 tegra_aic326x_hp_jack_pins);
1284 #else
1285                 snd_soc_jack_notifier_register(&tegra_aic326x_hp_jack,
1286                                         &aic326x_headset_switch_nb);
1287 #endif
1288                 snd_soc_jack_add_gpios(&tegra_aic326x_hp_jack,
1289                                         1,
1290                                         &tegra_aic326x_hp_jack_gpio);
1291
1292                 machine->gpio_requested |= GPIO_HP_DET;
1293         }
1294
1295 #ifndef CONFIG_ARCH_TEGRA_11x_SOC
1296         /* update jack status during boot */
1297         aic3262_hs_jack_detect(codec, &tegra_aic326x_hp_jack,
1298                 SND_JACK_HEADSET);
1299 #endif
1300
1301         /* Add call mode switch control */
1302         ret = snd_ctl_add(codec->card->snd_card,
1303                         snd_ctl_new1(&tegra_aic326x_call_mode_control,
1304                                 machine));
1305         if (ret < 0)
1306                 return ret;
1307
1308         ret = tegra_asoc_utils_register_ctls(&machine->util_data);
1309         if (ret < 0)
1310                 return ret;
1311
1312         return 0;
1313 }
1314
1315 static struct snd_soc_dai_link tegra_aic326x_dai[] = {
1316         [DAI_LINK_HIFI] = {
1317                 .name = "AIC3262",
1318                 .stream_name = "AIC3262 PCM HIFI",
1319                 .codec_name = "tlv320aic3262-codec",
1320                 .platform_name = "tegra-pcm-audio",
1321 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
1322                 .cpu_dai_name = "tegra20-i2s.0",
1323 #else
1324                 .cpu_dai_name = "tegra30-i2s.1",
1325 #endif
1326                 .codec_dai_name = "aic326x-asi1",
1327                 .init = tegra_aic326x_init,
1328                 .ops = &tegra_aic326x_hifi_ops,
1329                 },
1330         [DAI_LINK_SPDIF] = {
1331                 .name = "SPDIF",
1332                 .stream_name = "SPDIF PCM",
1333                 .codec_name = "spdif-dit.0",
1334                 .platform_name = "tegra-pcm-audio",
1335 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
1336                 .cpu_dai_name = "tegra20-spdif",
1337 #else
1338                 .cpu_dai_name = "tegra30-spdif",
1339 #endif
1340                 .codec_dai_name = "dit-hifi",
1341                 .ops = &tegra_aic326x_spdif_ops,
1342                 },
1343         [DAI_LINK_BTSCO] = {
1344                 .name = "BT-SCO",
1345                 .stream_name = "BT SCO PCM",
1346                 .codec_name = "spdif-dit.1",
1347                 .platform_name = "tegra-pcm-audio",
1348 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
1349                 .cpu_dai_name = "tegra20-i2s.1",
1350 #else
1351                 .cpu_dai_name = "tegra30-i2s.3",
1352 #endif
1353                 .codec_dai_name = "dit-hifi",
1354                 .init = tegra_aic326x_init,
1355                 .ops = &tegra_aic326x_bt_ops,
1356                 },
1357         [DAI_LINK_VOICE_CALL] = {
1358                         .name = "VOICE CALL",
1359                         .stream_name = "VOICE CALL PCM",
1360                         .codec_name = "tlv320aic3262-codec",
1361                         .platform_name = "tegra-pcm-audio",
1362                         .cpu_dai_name = "dit-hifi",
1363                         .codec_dai_name = "aic326x-asi3",
1364                         .ops = &tegra_aic326x_voice_call_ops,
1365                 },
1366         [DAI_LINK_BT_VOICE_CALL] = {
1367                         .name = "BT VOICE CALL",
1368                         .stream_name = "BT VOICE CALL PCM",
1369                         .codec_name = "spdif-dit.2",
1370                         .platform_name = "tegra-pcm-audio",
1371                         .cpu_dai_name = "dit-hifi",
1372                         .codec_dai_name = "dit-hifi",
1373                         .ops = &tegra_aic326x_bt_voice_call_ops,
1374                 },
1375 };
1376
1377 static int tegra_aic326x_suspend_post(struct snd_soc_card *card)
1378 {
1379         struct snd_soc_jack_gpio *gpio = &tegra_aic326x_hp_jack_gpio;
1380         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1381
1382         if (gpio_is_valid(gpio->gpio))
1383                 disable_irq(gpio_to_irq(gpio->gpio));
1384
1385         if (machine->clock_enabled) {
1386                 machine->clock_enabled = 0;
1387                 tegra_asoc_utils_clk_disable(&machine->util_data);
1388         }
1389
1390
1391         return 0;
1392 }
1393
1394 static int tegra_aic326x_resume_pre(struct snd_soc_card *card)
1395 {
1396         int val;
1397         struct snd_soc_jack_gpio *gpio = &tegra_aic326x_hp_jack_gpio;
1398         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1399
1400         if (gpio_is_valid(gpio->gpio)) {
1401                 val = gpio_get_value(gpio->gpio);
1402                 val = gpio->invert ? !val : val;
1403                 snd_soc_jack_report(gpio->jack, val, gpio->report);
1404                 enable_irq(gpio_to_irq(gpio->gpio));
1405         }
1406
1407         if (!machine->clock_enabled) {
1408                 machine->clock_enabled = 1;
1409                 tegra_asoc_utils_clk_enable(&machine->util_data);
1410         }
1411
1412         return 0;
1413 }
1414
1415
1416 static int tegra_aic326x_set_bias_level(struct snd_soc_card *card,
1417         struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level)
1418 {
1419         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1420
1421         if (machine->bias_level == SND_SOC_BIAS_OFF &&
1422                 level != SND_SOC_BIAS_OFF && (!machine->clock_enabled)) {
1423                 machine->clock_enabled = 1;
1424                 tegra_asoc_utils_clk_enable(&machine->util_data);
1425                 machine->bias_level = level;
1426         }
1427
1428         return 0;
1429 }
1430
1431 static int tegra_aic326x_set_bias_level_post(struct snd_soc_card *card,
1432         struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level)
1433 {
1434         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1435
1436         if (machine->bias_level != SND_SOC_BIAS_OFF &&
1437                 level == SND_SOC_BIAS_OFF && machine->clock_enabled) {
1438                 machine->clock_enabled = 0;
1439                 tegra_asoc_utils_clk_disable(&machine->util_data);
1440         }
1441
1442         machine->bias_level = level;
1443
1444         return 0 ;
1445 }
1446
1447
1448
1449 static struct snd_soc_card snd_soc_tegra_aic326x = {
1450         .name = "tegra-aic326x",
1451         .owner = THIS_MODULE,
1452         .dai_link = tegra_aic326x_dai,
1453         .num_links = ARRAY_SIZE(tegra_aic326x_dai),
1454         .set_bias_level = tegra_aic326x_set_bias_level,
1455         .set_bias_level_post = tegra_aic326x_set_bias_level_post,
1456         .suspend_post = tegra_aic326x_suspend_post,
1457         .resume_pre = tegra_aic326x_resume_pre,
1458 };
1459
1460 static __devinit int tegra_aic326x_driver_probe(struct platform_device *pdev)
1461 {
1462         struct snd_soc_card *card = &snd_soc_tegra_aic326x;
1463         struct snd_soc_codec *codec;
1464         struct tegra_aic326x *machine;
1465         struct tegra_asoc_platform_data *pdata;
1466         struct edp_manager *battery_manager = NULL;
1467         int ret;
1468 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1469         int i;
1470 #endif
1471         pdata = pdev->dev.platform_data;
1472         if (!pdata) {
1473                 dev_err(&pdev->dev, "No platform data supplied\n");
1474                 return -EINVAL;
1475         }
1476
1477         machine = kzalloc(sizeof(struct tegra_aic326x), GFP_KERNEL);
1478         if (!machine) {
1479                 dev_err(&pdev->dev, "Can't allocate tegra_aic326x struct\n");
1480                 return -ENOMEM;
1481         }
1482
1483         machine->pdata = pdata;
1484
1485         ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev, card);
1486         if (ret)
1487                 goto err_free_machine;
1488
1489         machine->dmic_reg = regulator_get(&pdev->dev, "vdd_mic");
1490         if (IS_ERR(machine->dmic_reg)) {
1491                 dev_info(&pdev->dev, "No digital mic regulator found\n");
1492                 machine->dmic_reg = 0;
1493         }
1494
1495         machine->dmic_1v8_reg = regulator_get(&pdev->dev, "vdd_1v8_mic");
1496         if (IS_ERR(machine->dmic_1v8_reg)) {
1497                 dev_info(&pdev->dev, "No digital mic regulator found\n");
1498                 machine->dmic_1v8_reg = 0;
1499         }
1500
1501         machine->hmic_reg = regulator_get(&pdev->dev, "mic_ventral");
1502         if (IS_ERR(machine->hmic_reg)) {
1503                 dev_info(&pdev->dev, "No headset mic regulator found\n");
1504                 machine->hmic_reg = 0;
1505         }
1506
1507         card->dev = &pdev->dev;
1508         platform_set_drvdata(pdev, card);
1509         snd_soc_card_set_drvdata(card, machine);
1510
1511 #ifdef CONFIG_SWITCH
1512         /* Add h2w switch class support */
1513         ret = tegra_asoc_switch_register(&aic326x_wired_switch_dev);
1514         if (ret < 0) {
1515                 dev_err(&pdev->dev, "not able to register switch device %d\n",
1516                         ret);
1517                 goto err_fini_utils;
1518         }
1519 #endif
1520
1521 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1522         for (i = 0; i < NUM_I2S_DEVICES ; i++) {
1523                 machine->codec_info[i].i2s_id =
1524                         pdata->i2s_param[i].audio_port_id;
1525                 machine->codec_info[i].bitsize =
1526                         pdata->i2s_param[i].sample_size;
1527                 machine->codec_info[i].is_i2smaster =
1528                         pdata->i2s_param[i].is_i2s_master;
1529                 machine->codec_info[i].rate =
1530                         pdata->i2s_param[i].rate;
1531                 machine->codec_info[i].channels =
1532                         pdata->i2s_param[i].channels;
1533                 machine->codec_info[i].i2s_mode =
1534                         pdata->i2s_param[i].i2s_mode;
1535                 machine->codec_info[i].bit_clk =
1536                         pdata->i2s_param[i].bit_clk;
1537
1538         }
1539
1540         tegra_aic326x_dai[DAI_LINK_HIFI].cpu_dai_name =
1541         tegra_i2s_dai_name[machine->codec_info[HIFI_CODEC].i2s_id];
1542
1543         tegra_aic326x_dai[DAI_LINK_BTSCO].cpu_dai_name =
1544         tegra_i2s_dai_name[machine->codec_info[BT_SCO].i2s_id];
1545 #endif
1546
1547         if (machine_is_tegra_enterprise()) {
1548                 tegra_aic326x_dai[DAI_LINK_HIFI].codec_name =
1549                                                 "tlv320aic3262-codec";
1550                 tegra_aic326x_dai[DAI_LINK_VOICE_CALL].codec_name =
1551                                                 "tlv320aic3262-codec";
1552                 tegra_aic326x_dai[DAI_LINK_VOICE_CALL].codec_dai_name =
1553                                                 "aic326x-asi1";
1554         }
1555
1556         ret = snd_soc_register_card(card);
1557         if (ret) {
1558                 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
1559                         ret);
1560                 goto err_switch_unregister;
1561         }
1562
1563         if (!card->instantiated) {
1564                 dev_err(&pdev->dev, "No TI AIC3262 codec\n");
1565                 goto err_unregister_card;
1566         }
1567
1568 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
1569         ret = tegra_asoc_utils_set_parent(&machine->util_data,
1570                                 pdata->i2s_param[HIFI_CODEC].is_i2s_master);
1571         if (ret) {
1572                 dev_err(&pdev->dev, "tegra_asoc_utils_set_parent failed (%d)\n",
1573                         ret);
1574                 goto err_unregister_card;
1575         }
1576 #endif
1577
1578         if (pdata->edp_states == NULL)
1579                 return 0;
1580
1581         machine->spk_edp_client = devm_kzalloc(&pdev->dev,
1582                                         sizeof(struct edp_client),
1583                                         GFP_KERNEL);
1584         if (IS_ERR_OR_NULL(machine->spk_edp_client)) {
1585                 dev_err(&pdev->dev, "could not allocate edp client\n");
1586                 return 0;
1587         }
1588         machine->spk_edp_client->name[EDP_NAME_LEN - 1] = '\0';
1589         strncpy(machine->spk_edp_client->name, "speaker", EDP_NAME_LEN - 1);
1590         machine->spk_edp_client->states = pdata->edp_states;
1591         machine->spk_edp_client->num_states = TEGRA_SPK_EDP_NUM_STATES;
1592         machine->spk_edp_client->e0_index = TEGRA_SPK_EDP_ZERO;
1593         machine->spk_edp_client->priority = EDP_MAX_PRIO + 2;
1594         machine->spk_edp_client->throttle = tegra_speaker_throttle;
1595         machine->spk_edp_client->private_data = machine;
1596
1597         battery_manager = edp_get_manager("battery");
1598         if (!battery_manager) {
1599                 dev_err(&pdev->dev, "unable to get edp manager\n");
1600         } else {
1601                 /* register speaker edp client */
1602                 ret = edp_register_client(battery_manager,
1603                                         machine->spk_edp_client);
1604                 if (ret) {
1605                         dev_err(&pdev->dev, "unable to register edp client\n");
1606                         devm_kfree(&pdev->dev, machine->spk_edp_client);
1607                         machine->spk_edp_client = NULL;
1608                         return 0;
1609                 }
1610                 codec = card->rtd[DAI_LINK_HIFI].codec;
1611                 /*  set speaker amplifier volume to 6 dB , E0 state*/
1612                 snd_soc_write(codec, AIC3262_SPK_AMP_CNTL_R4, 0x11);
1613                 /* request E1 */
1614                 ret = edp_update_client_request(machine->spk_edp_client,
1615                                 TEGRA_SPK_EDP_1, NULL);
1616                 if (ret) {
1617                         dev_err(&pdev->dev,
1618                                         "unable to set E1 EDP state\n");
1619                         edp_unregister_client(machine->spk_edp_client);
1620                         devm_kfree(&pdev->dev, machine->spk_edp_client);
1621                         machine->spk_edp_client = NULL;
1622                 }
1623         }
1624         return 0;
1625
1626 err_unregister_card:
1627         snd_soc_unregister_card(card);
1628 err_switch_unregister:
1629 #ifdef CONFIG_SWITCH
1630         tegra_asoc_switch_unregister(&aic326x_wired_switch_dev);
1631 #endif
1632 err_fini_utils:
1633         tegra_asoc_utils_fini(&machine->util_data);
1634 err_free_machine:
1635         kfree(machine);
1636         return ret;
1637 }
1638
1639 static int __devexit tegra_aic326x_driver_remove(struct platform_device *pdev)
1640 {
1641         struct snd_soc_card *card = platform_get_drvdata(pdev);
1642         struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
1643         struct tegra_asoc_platform_data *pdata = machine->pdata;
1644
1645         if (machine->gpio_requested & GPIO_HP_DET)
1646                 snd_soc_jack_free_gpios(&tegra_aic326x_hp_jack,
1647                                         1,
1648                                         &tegra_aic326x_hp_jack_gpio);
1649
1650         snd_soc_unregister_card(card);
1651
1652 #ifdef CONFIG_SWITCH
1653         tegra_asoc_switch_unregister(&aic326x_wired_switch_dev);
1654 #endif
1655
1656         tegra_asoc_utils_fini(&machine->util_data);
1657
1658         if (machine->gpio_requested & GPIO_EXT_MIC_EN)
1659                 gpio_free(pdata->gpio_ext_mic_en);
1660         if (machine->gpio_requested & GPIO_INT_MIC_EN)
1661                 gpio_free(pdata->gpio_int_mic_en);
1662         if (machine->gpio_requested & GPIO_HP_MUTE)
1663                 gpio_free(pdata->gpio_hp_mute);
1664         if (machine->gpio_requested & GPIO_SPKR_EN)
1665                 gpio_free(pdata->gpio_spkr_en);
1666
1667         kfree(machine);
1668
1669         return 0;
1670 }
1671
1672 static struct platform_driver tegra_aic326x_driver = {
1673         .driver = {
1674                 .name = DRV_NAME,
1675                 .owner = THIS_MODULE,
1676                 .pm = &snd_soc_pm_ops,
1677         },
1678         .probe = tegra_aic326x_driver_probe,
1679         .remove = __devexit_p(tegra_aic326x_driver_remove),
1680 };
1681
1682 static int __init tegra_aic326x_modinit(void)
1683 {
1684         return platform_driver_register(&tegra_aic326x_driver);
1685 }
1686 module_init(tegra_aic326x_modinit);
1687
1688 static void __exit tegra_aic326x_modexit(void)
1689 {
1690         platform_driver_unregister(&tegra_aic326x_driver);
1691 }
1692 module_exit(tegra_aic326x_modexit);
1693
1694 /* Module information */
1695 MODULE_AUTHOR("Vinod G. <vinodg@nvidia.com>");
1696 MODULE_DESCRIPTION("Tegra+AIC3262 machine ASoC driver");
1697 MODULE_DESCRIPTION("Tegra ALSA SoC");
1698 MODULE_LICENSE("GPL");
1699