ASoC: Convert WM8993 to use shared cache I/O code
[linux-2.6.git] / sound / soc / codecs / wm8993.c
1 /*
2  * wm8993.c -- WM8993 ALSA SoC audio driver
3  *
4  * Copyright 2009, 2010 Wolfson Microelectronics plc
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/i2c.h>
19 #include <linux/spi/spi.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/tlv.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/initval.h>
27 #include <sound/wm8993.h>
28
29 #include "wm8993.h"
30 #include "wm_hubs.h"
31
32 static u16 wm8993_reg_defaults[WM8993_REGISTER_COUNT] = {
33         0x8993,     /* R0   - Software Reset */
34         0x0000,     /* R1   - Power Management (1) */
35         0x6000,     /* R2   - Power Management (2) */
36         0x0000,     /* R3   - Power Management (3) */
37         0x4050,     /* R4   - Audio Interface (1) */
38         0x4000,     /* R5   - Audio Interface (2) */
39         0x01C8,     /* R6   - Clocking 1 */
40         0x0000,     /* R7   - Clocking 2 */
41         0x0000,     /* R8   - Audio Interface (3) */
42         0x0040,     /* R9   - Audio Interface (4) */
43         0x0004,     /* R10  - DAC CTRL */
44         0x00C0,     /* R11  - Left DAC Digital Volume */
45         0x00C0,     /* R12  - Right DAC Digital Volume */
46         0x0000,     /* R13  - Digital Side Tone */
47         0x0300,     /* R14  - ADC CTRL */
48         0x00C0,     /* R15  - Left ADC Digital Volume */
49         0x00C0,     /* R16  - Right ADC Digital Volume */
50         0x0000,     /* R17 */
51         0x0000,     /* R18  - GPIO CTRL 1 */
52         0x0010,     /* R19  - GPIO1 */
53         0x0000,     /* R20  - IRQ_DEBOUNCE */
54         0x0000,     /* R21 */
55         0x8000,     /* R22  - GPIOCTRL 2 */
56         0x0800,     /* R23  - GPIO_POL */
57         0x008B,     /* R24  - Left Line Input 1&2 Volume */
58         0x008B,     /* R25  - Left Line Input 3&4 Volume */
59         0x008B,     /* R26  - Right Line Input 1&2 Volume */
60         0x008B,     /* R27  - Right Line Input 3&4 Volume */
61         0x006D,     /* R28  - Left Output Volume */
62         0x006D,     /* R29  - Right Output Volume */
63         0x0066,     /* R30  - Line Outputs Volume */
64         0x0020,     /* R31  - HPOUT2 Volume */
65         0x0079,     /* R32  - Left OPGA Volume */
66         0x0079,     /* R33  - Right OPGA Volume */
67         0x0003,     /* R34  - SPKMIXL Attenuation */
68         0x0003,     /* R35  - SPKMIXR Attenuation */
69         0x0011,     /* R36  - SPKOUT Mixers */
70         0x0100,     /* R37  - SPKOUT Boost */
71         0x0079,     /* R38  - Speaker Volume Left */
72         0x0079,     /* R39  - Speaker Volume Right */
73         0x0000,     /* R40  - Input Mixer2 */
74         0x0000,     /* R41  - Input Mixer3 */
75         0x0000,     /* R42  - Input Mixer4 */
76         0x0000,     /* R43  - Input Mixer5 */
77         0x0000,     /* R44  - Input Mixer6 */
78         0x0000,     /* R45  - Output Mixer1 */
79         0x0000,     /* R46  - Output Mixer2 */
80         0x0000,     /* R47  - Output Mixer3 */
81         0x0000,     /* R48  - Output Mixer4 */
82         0x0000,     /* R49  - Output Mixer5 */
83         0x0000,     /* R50  - Output Mixer6 */
84         0x0000,     /* R51  - HPOUT2 Mixer */
85         0x0000,     /* R52  - Line Mixer1 */
86         0x0000,     /* R53  - Line Mixer2 */
87         0x0000,     /* R54  - Speaker Mixer */
88         0x0000,     /* R55  - Additional Control */
89         0x0000,     /* R56  - AntiPOP1 */
90         0x0000,     /* R57  - AntiPOP2 */
91         0x0000,     /* R58  - MICBIAS */
92         0x0000,     /* R59 */
93         0x0000,     /* R60  - FLL Control 1 */
94         0x0000,     /* R61  - FLL Control 2 */
95         0x0000,     /* R62  - FLL Control 3 */
96         0x2EE0,     /* R63  - FLL Control 4 */
97         0x0002,     /* R64  - FLL Control 5 */
98         0x2287,     /* R65  - Clocking 3 */
99         0x025F,     /* R66  - Clocking 4 */
100         0x0000,     /* R67  - MW Slave Control */
101         0x0000,     /* R68 */
102         0x0002,     /* R69  - Bus Control 1 */
103         0x0000,     /* R70  - Write Sequencer 0 */
104         0x0000,     /* R71  - Write Sequencer 1 */
105         0x0000,     /* R72  - Write Sequencer 2 */
106         0x0000,     /* R73  - Write Sequencer 3 */
107         0x0000,     /* R74  - Write Sequencer 4 */
108         0x0000,     /* R75  - Write Sequencer 5 */
109         0x1F25,     /* R76  - Charge Pump 1 */
110         0x0000,     /* R77 */
111         0x0000,     /* R78 */
112         0x0000,     /* R79 */
113         0x0000,     /* R80 */
114         0x0000,     /* R81  - Class W 0 */
115         0x0000,     /* R82 */
116         0x0000,     /* R83 */
117         0x0000,     /* R84  - DC Servo 0 */
118         0x054A,     /* R85  - DC Servo 1 */
119         0x0000,     /* R86 */
120         0x0000,     /* R87  - DC Servo 3 */
121         0x0000,     /* R88  - DC Servo Readback 0 */
122         0x0000,     /* R89  - DC Servo Readback 1 */
123         0x0000,     /* R90  - DC Servo Readback 2 */
124         0x0000,     /* R91 */
125         0x0000,     /* R92 */
126         0x0000,     /* R93 */
127         0x0000,     /* R94 */
128         0x0000,     /* R95 */
129         0x0100,     /* R96  - Analogue HP 0 */
130         0x0000,     /* R97 */
131         0x0000,     /* R98  - EQ1 */
132         0x000C,     /* R99  - EQ2 */
133         0x000C,     /* R100 - EQ3 */
134         0x000C,     /* R101 - EQ4 */
135         0x000C,     /* R102 - EQ5 */
136         0x000C,     /* R103 - EQ6 */
137         0x0FCA,     /* R104 - EQ7 */
138         0x0400,     /* R105 - EQ8 */
139         0x00D8,     /* R106 - EQ9 */
140         0x1EB5,     /* R107 - EQ10 */
141         0xF145,     /* R108 - EQ11 */
142         0x0B75,     /* R109 - EQ12 */
143         0x01C5,     /* R110 - EQ13 */
144         0x1C58,     /* R111 - EQ14 */
145         0xF373,     /* R112 - EQ15 */
146         0x0A54,     /* R113 - EQ16 */
147         0x0558,     /* R114 - EQ17 */
148         0x168E,     /* R115 - EQ18 */
149         0xF829,     /* R116 - EQ19 */
150         0x07AD,     /* R117 - EQ20 */
151         0x1103,     /* R118 - EQ21 */
152         0x0564,     /* R119 - EQ22 */
153         0x0559,     /* R120 - EQ23 */
154         0x4000,     /* R121 - EQ24 */
155         0x0000,     /* R122 - Digital Pulls */
156         0x0F08,     /* R123 - DRC Control 1 */
157         0x0000,     /* R124 - DRC Control 2 */
158         0x0080,     /* R125 - DRC Control 3 */
159         0x0000,     /* R126 - DRC Control 4 */
160 };
161
162 static struct {
163         int ratio;
164         int clk_sys_rate;
165 } clk_sys_rates[] = {
166         { 64,   0 },
167         { 128,  1 },
168         { 192,  2 },
169         { 256,  3 },
170         { 384,  4 },
171         { 512,  5 },
172         { 768,  6 },
173         { 1024, 7 },
174         { 1408, 8 },
175         { 1536, 9 },
176 };
177
178 static struct {
179         int rate;
180         int sample_rate;
181 } sample_rates[] = {
182         { 8000,  0  },
183         { 11025, 1  },
184         { 12000, 1  },
185         { 16000, 2  },
186         { 22050, 3  },
187         { 24000, 3  },
188         { 32000, 4  },
189         { 44100, 5  },
190         { 48000, 5  },
191 };
192
193 static struct {
194         int div; /* *10 due to .5s */
195         int bclk_div;
196 } bclk_divs[] = {
197         { 10,  0  },
198         { 15,  1  },
199         { 20,  2  },
200         { 30,  3  },
201         { 40,  4  },
202         { 55,  5  },
203         { 60,  6  },
204         { 80,  7  },
205         { 110, 8  },
206         { 120, 9  },
207         { 160, 10 },
208         { 220, 11 },
209         { 240, 12 },
210         { 320, 13 },
211         { 440, 14 },
212         { 480, 15 },
213 };
214
215 struct wm8993_priv {
216         struct wm_hubs_data hubs_data;
217         u16 reg_cache[WM8993_REGISTER_COUNT];
218         struct wm8993_platform_data pdata;
219         struct snd_soc_codec codec;
220         int master;
221         int sysclk_source;
222         int tdm_slots;
223         int tdm_width;
224         unsigned int mclk_rate;
225         unsigned int sysclk_rate;
226         unsigned int fs;
227         unsigned int bclk;
228         int class_w_users;
229         unsigned int fll_fref;
230         unsigned int fll_fout;
231         int fll_src;
232 };
233
234 static int wm8993_volatile(unsigned int reg)
235 {
236         switch (reg) {
237         case WM8993_SOFTWARE_RESET:
238         case WM8993_DC_SERVO_0:
239         case WM8993_DC_SERVO_READBACK_0:
240         case WM8993_DC_SERVO_READBACK_1:
241         case WM8993_DC_SERVO_READBACK_2:
242                 return 1;
243         default:
244                 return 0;
245         }
246 }
247
248 struct _fll_div {
249         u16 fll_fratio;
250         u16 fll_outdiv;
251         u16 fll_clk_ref_div;
252         u16 n;
253         u16 k;
254 };
255
256 /* The size in bits of the FLL divide multiplied by 10
257  * to allow rounding later */
258 #define FIXED_FLL_SIZE ((1 << 16) * 10)
259
260 static struct {
261         unsigned int min;
262         unsigned int max;
263         u16 fll_fratio;
264         int ratio;
265 } fll_fratios[] = {
266         {       0,    64000, 4, 16 },
267         {   64000,   128000, 3,  8 },
268         {  128000,   256000, 2,  4 },
269         {  256000,  1000000, 1,  2 },
270         { 1000000, 13500000, 0,  1 },
271 };
272
273 static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
274                        unsigned int Fout)
275 {
276         u64 Kpart;
277         unsigned int K, Ndiv, Nmod, target;
278         unsigned int div;
279         int i;
280
281         /* Fref must be <=13.5MHz */
282         div = 1;
283         fll_div->fll_clk_ref_div = 0;
284         while ((Fref / div) > 13500000) {
285                 div *= 2;
286                 fll_div->fll_clk_ref_div++;
287
288                 if (div > 8) {
289                         pr_err("Can't scale %dMHz input down to <=13.5MHz\n",
290                                Fref);
291                         return -EINVAL;
292                 }
293         }
294
295         pr_debug("Fref=%u Fout=%u\n", Fref, Fout);
296
297         /* Apply the division for our remaining calculations */
298         Fref /= div;
299
300         /* Fvco should be 90-100MHz; don't check the upper bound */
301         div = 0;
302         target = Fout * 2;
303         while (target < 90000000) {
304                 div++;
305                 target *= 2;
306                 if (div > 7) {
307                         pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n",
308                                Fout);
309                         return -EINVAL;
310                 }
311         }
312         fll_div->fll_outdiv = div;
313
314         pr_debug("Fvco=%dHz\n", target);
315
316         /* Find an appropraite FLL_FRATIO and factor it out of the target */
317         for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
318                 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
319                         fll_div->fll_fratio = fll_fratios[i].fll_fratio;
320                         target /= fll_fratios[i].ratio;
321                         break;
322                 }
323         }
324         if (i == ARRAY_SIZE(fll_fratios)) {
325                 pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref);
326                 return -EINVAL;
327         }
328
329         /* Now, calculate N.K */
330         Ndiv = target / Fref;
331
332         fll_div->n = Ndiv;
333         Nmod = target % Fref;
334         pr_debug("Nmod=%d\n", Nmod);
335
336         /* Calculate fractional part - scale up so we can round. */
337         Kpart = FIXED_FLL_SIZE * (long long)Nmod;
338
339         do_div(Kpart, Fref);
340
341         K = Kpart & 0xFFFFFFFF;
342
343         if ((K % 10) >= 5)
344                 K += 5;
345
346         /* Move down to proper range now rounding is done */
347         fll_div->k = K / 10;
348
349         pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n",
350                  fll_div->n, fll_div->k,
351                  fll_div->fll_fratio, fll_div->fll_outdiv,
352                  fll_div->fll_clk_ref_div);
353
354         return 0;
355 }
356
357 static int wm8993_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
358                           unsigned int Fref, unsigned int Fout)
359 {
360         struct snd_soc_codec *codec = dai->codec;
361         struct wm8993_priv *wm8993 = codec->private_data;
362         u16 reg1, reg4, reg5;
363         struct _fll_div fll_div;
364         int ret;
365
366         /* Any change? */
367         if (Fref == wm8993->fll_fref && Fout == wm8993->fll_fout)
368                 return 0;
369
370         /* Disable the FLL */
371         if (Fout == 0) {
372                 dev_dbg(codec->dev, "FLL disabled\n");
373                 wm8993->fll_fref = 0;
374                 wm8993->fll_fout = 0;
375
376                 reg1 = snd_soc_read(codec, WM8993_FLL_CONTROL_1);
377                 reg1 &= ~WM8993_FLL_ENA;
378                 snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
379
380                 return 0;
381         }
382
383         ret = fll_factors(&fll_div, Fref, Fout);
384         if (ret != 0)
385                 return ret;
386
387         reg5 = snd_soc_read(codec, WM8993_FLL_CONTROL_5);
388         reg5 &= ~WM8993_FLL_CLK_SRC_MASK;
389
390         switch (fll_id) {
391         case WM8993_FLL_MCLK:
392                 break;
393
394         case WM8993_FLL_LRCLK:
395                 reg5 |= 1;
396                 break;
397
398         case WM8993_FLL_BCLK:
399                 reg5 |= 2;
400                 break;
401
402         default:
403                 dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id);
404                 return -EINVAL;
405         }
406
407         /* Any FLL configuration change requires that the FLL be
408          * disabled first. */
409         reg1 = snd_soc_read(codec, WM8993_FLL_CONTROL_1);
410         reg1 &= ~WM8993_FLL_ENA;
411         snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
412
413         /* Apply the configuration */
414         if (fll_div.k)
415                 reg1 |= WM8993_FLL_FRAC_MASK;
416         else
417                 reg1 &= ~WM8993_FLL_FRAC_MASK;
418         snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
419
420         snd_soc_write(codec, WM8993_FLL_CONTROL_2,
421                       (fll_div.fll_outdiv << WM8993_FLL_OUTDIV_SHIFT) |
422                       (fll_div.fll_fratio << WM8993_FLL_FRATIO_SHIFT));
423         snd_soc_write(codec, WM8993_FLL_CONTROL_3, fll_div.k);
424
425         reg4 = snd_soc_read(codec, WM8993_FLL_CONTROL_4);
426         reg4 &= ~WM8993_FLL_N_MASK;
427         reg4 |= fll_div.n << WM8993_FLL_N_SHIFT;
428         snd_soc_write(codec, WM8993_FLL_CONTROL_4, reg4);
429
430         reg5 &= ~WM8993_FLL_CLK_REF_DIV_MASK;
431         reg5 |= fll_div.fll_clk_ref_div << WM8993_FLL_CLK_REF_DIV_SHIFT;
432         snd_soc_write(codec, WM8993_FLL_CONTROL_5, reg5);
433
434         /* Enable the FLL */
435         snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1 | WM8993_FLL_ENA);
436
437         dev_dbg(codec->dev, "FLL enabled at %dHz->%dHz\n", Fref, Fout);
438
439         wm8993->fll_fref = Fref;
440         wm8993->fll_fout = Fout;
441         wm8993->fll_src = source;
442
443         return 0;
444 }
445
446 static int configure_clock(struct snd_soc_codec *codec)
447 {
448         struct wm8993_priv *wm8993 = codec->private_data;
449         unsigned int reg;
450
451         /* This should be done on init() for bypass paths */
452         switch (wm8993->sysclk_source) {
453         case WM8993_SYSCLK_MCLK:
454                 dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8993->mclk_rate);
455
456                 reg = snd_soc_read(codec, WM8993_CLOCKING_2);
457                 reg &= ~(WM8993_MCLK_DIV | WM8993_SYSCLK_SRC);
458                 if (wm8993->mclk_rate > 13500000) {
459                         reg |= WM8993_MCLK_DIV;
460                         wm8993->sysclk_rate = wm8993->mclk_rate / 2;
461                 } else {
462                         reg &= ~WM8993_MCLK_DIV;
463                         wm8993->sysclk_rate = wm8993->mclk_rate;
464                 }
465                 snd_soc_write(codec, WM8993_CLOCKING_2, reg);
466                 break;
467
468         case WM8993_SYSCLK_FLL:
469                 dev_dbg(codec->dev, "Using %dHz FLL clock\n",
470                         wm8993->fll_fout);
471
472                 reg = snd_soc_read(codec, WM8993_CLOCKING_2);
473                 reg |= WM8993_SYSCLK_SRC;
474                 if (wm8993->fll_fout > 13500000) {
475                         reg |= WM8993_MCLK_DIV;
476                         wm8993->sysclk_rate = wm8993->fll_fout / 2;
477                 } else {
478                         reg &= ~WM8993_MCLK_DIV;
479                         wm8993->sysclk_rate = wm8993->fll_fout;
480                 }
481                 snd_soc_write(codec, WM8993_CLOCKING_2, reg);
482                 break;
483
484         default:
485                 dev_err(codec->dev, "System clock not configured\n");
486                 return -EINVAL;
487         }
488
489         dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8993->sysclk_rate);
490
491         return 0;
492 }
493
494 static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0);
495 static const DECLARE_TLV_DB_SCALE(drc_comp_threash, -4500, 75, 0);
496 static const DECLARE_TLV_DB_SCALE(drc_comp_amp, -2250, 75, 0);
497 static const DECLARE_TLV_DB_SCALE(drc_min_tlv, -1800, 600, 0);
498 static const unsigned int drc_max_tlv[] = {
499         TLV_DB_RANGE_HEAD(4),
500         0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0),
501         3, 3, TLV_DB_SCALE_ITEM(3600, 0, 0),
502 };
503 static const DECLARE_TLV_DB_SCALE(drc_qr_tlv, 1200, 600, 0);
504 static const DECLARE_TLV_DB_SCALE(drc_startup_tlv, -1800, 300, 0);
505 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
506 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
507 static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0);
508
509 static const char *dac_deemph_text[] = {
510         "None",
511         "32kHz",
512         "44.1kHz",
513         "48kHz",
514 };
515
516 static const struct soc_enum dac_deemph =
517         SOC_ENUM_SINGLE(WM8993_DAC_CTRL, 4, 4, dac_deemph_text);
518
519 static const char *adc_hpf_text[] = {
520         "Hi-Fi",
521         "Voice 1",
522         "Voice 2",
523         "Voice 3",
524 };
525
526 static const struct soc_enum adc_hpf =
527         SOC_ENUM_SINGLE(WM8993_ADC_CTRL, 5, 4, adc_hpf_text);
528
529 static const char *drc_path_text[] = {
530         "ADC",
531         "DAC"
532 };
533
534 static const struct soc_enum drc_path =
535         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 14, 2, drc_path_text);
536
537 static const char *drc_r0_text[] = {
538         "1",
539         "1/2",
540         "1/4",
541         "1/8",
542         "1/16",
543         "0",
544 };
545
546 static const struct soc_enum drc_r0 =
547         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 8, 6, drc_r0_text);
548
549 static const char *drc_r1_text[] = {
550         "1",
551         "1/2",
552         "1/4",
553         "1/8",
554         "0",
555 };
556
557 static const struct soc_enum drc_r1 =
558         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_4, 13, 5, drc_r1_text);
559
560 static const char *drc_attack_text[] = {
561         "Reserved",
562         "181us",
563         "363us",
564         "726us",
565         "1.45ms",
566         "2.9ms",
567         "5.8ms",
568         "11.6ms",
569         "23.2ms",
570         "46.4ms",
571         "92.8ms",
572         "185.6ms",
573 };
574
575 static const struct soc_enum drc_attack =
576         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 12, 12, drc_attack_text);
577
578 static const char *drc_decay_text[] = {
579         "186ms",
580         "372ms",
581         "743ms",
582         "1.49s",
583         "2.97ms",
584         "5.94ms",
585         "11.89ms",
586         "23.78ms",
587         "47.56ms",
588 };
589
590 static const struct soc_enum drc_decay =
591         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 8, 9, drc_decay_text);
592
593 static const char *drc_ff_text[] = {
594         "5 samples",
595         "9 samples",
596 };
597
598 static const struct soc_enum drc_ff =
599         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 7, 2, drc_ff_text);
600
601 static const char *drc_qr_rate_text[] = {
602         "0.725ms",
603         "1.45ms",
604         "5.8ms",
605 };
606
607 static const struct soc_enum drc_qr_rate =
608         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 0, 3, drc_qr_rate_text);
609
610 static const char *drc_smooth_text[] = {
611         "Low",
612         "Medium",
613         "High",
614 };
615
616 static const struct soc_enum drc_smooth =
617         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 4, 3, drc_smooth_text);
618
619 static const struct snd_kcontrol_new wm8993_snd_controls[] = {
620 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8993_DIGITAL_SIDE_TONE,
621                5, 9, 12, 0, sidetone_tlv),
622
623 SOC_SINGLE("DRC Switch", WM8993_DRC_CONTROL_1, 15, 1, 0),
624 SOC_ENUM("DRC Path", drc_path),
625 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8993_DRC_CONTROL_2,
626                2, 60, 1, drc_comp_threash),
627 SOC_SINGLE_TLV("DRC Compressor Amplitude Volume", WM8993_DRC_CONTROL_3,
628                11, 30, 1, drc_comp_amp),
629 SOC_ENUM("DRC R0", drc_r0),
630 SOC_ENUM("DRC R1", drc_r1),
631 SOC_SINGLE_TLV("DRC Minimum Volume", WM8993_DRC_CONTROL_1, 2, 3, 1,
632                drc_min_tlv),
633 SOC_SINGLE_TLV("DRC Maximum Volume", WM8993_DRC_CONTROL_1, 0, 3, 0,
634                drc_max_tlv),
635 SOC_ENUM("DRC Attack Rate", drc_attack),
636 SOC_ENUM("DRC Decay Rate", drc_decay),
637 SOC_ENUM("DRC FF Delay", drc_ff),
638 SOC_SINGLE("DRC Anti-clip Switch", WM8993_DRC_CONTROL_1, 9, 1, 0),
639 SOC_SINGLE("DRC Quick Release Switch", WM8993_DRC_CONTROL_1, 10, 1, 0),
640 SOC_SINGLE_TLV("DRC Quick Release Volume", WM8993_DRC_CONTROL_3, 2, 3, 0,
641                drc_qr_tlv),
642 SOC_ENUM("DRC Quick Release Rate", drc_qr_rate),
643 SOC_SINGLE("DRC Smoothing Switch", WM8993_DRC_CONTROL_1, 11, 1, 0),
644 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8993_DRC_CONTROL_1, 8, 1, 0),
645 SOC_ENUM("DRC Smoothing Hysteresis Threshold", drc_smooth),
646 SOC_SINGLE_TLV("DRC Startup Volume", WM8993_DRC_CONTROL_4, 8, 18, 0,
647                drc_startup_tlv),
648
649 SOC_SINGLE("EQ Switch", WM8993_EQ1, 0, 1, 0),
650
651 SOC_DOUBLE_R_TLV("Capture Volume", WM8993_LEFT_ADC_DIGITAL_VOLUME,
652                  WM8993_RIGHT_ADC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
653 SOC_SINGLE("ADC High Pass Filter Switch", WM8993_ADC_CTRL, 8, 1, 0),
654 SOC_ENUM("ADC High Pass Filter Mode", adc_hpf),
655
656 SOC_DOUBLE_R_TLV("Playback Volume", WM8993_LEFT_DAC_DIGITAL_VOLUME,
657                  WM8993_RIGHT_DAC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
658 SOC_SINGLE_TLV("Playback Boost Volume", WM8993_AUDIO_INTERFACE_2, 10, 3, 0,
659                dac_boost_tlv),
660 SOC_ENUM("DAC Deemphasis", dac_deemph),
661
662 SOC_SINGLE_TLV("SPKL DAC Volume", WM8993_SPKMIXL_ATTENUATION,
663                2, 1, 1, wm_hubs_spkmix_tlv),
664
665 SOC_SINGLE_TLV("SPKR DAC Volume", WM8993_SPKMIXR_ATTENUATION,
666                2, 1, 1, wm_hubs_spkmix_tlv),
667 };
668
669 static const struct snd_kcontrol_new wm8993_eq_controls[] = {
670 SOC_SINGLE_TLV("EQ1 Volume", WM8993_EQ2, 0, 24, 0, eq_tlv),
671 SOC_SINGLE_TLV("EQ2 Volume", WM8993_EQ3, 0, 24, 0, eq_tlv),
672 SOC_SINGLE_TLV("EQ3 Volume", WM8993_EQ4, 0, 24, 0, eq_tlv),
673 SOC_SINGLE_TLV("EQ4 Volume", WM8993_EQ5, 0, 24, 0, eq_tlv),
674 SOC_SINGLE_TLV("EQ5 Volume", WM8993_EQ6, 0, 24, 0, eq_tlv),
675 };
676
677 static int clk_sys_event(struct snd_soc_dapm_widget *w,
678                          struct snd_kcontrol *kcontrol, int event)
679 {
680         struct snd_soc_codec *codec = w->codec;
681
682         switch (event) {
683         case SND_SOC_DAPM_PRE_PMU:
684                 return configure_clock(codec);
685
686         case SND_SOC_DAPM_POST_PMD:
687                 break;
688         }
689
690         return 0;
691 }
692
693 /*
694  * When used with DAC outputs only the WM8993 charge pump supports
695  * operation in class W mode, providing very low power consumption
696  * when used with digital sources.  Enable and disable this mode
697  * automatically depending on the mixer configuration.
698  *
699  * Currently the only supported paths are the direct DAC->headphone
700  * paths (which provide minimum power consumption anyway).
701  */
702 static int class_w_put(struct snd_kcontrol *kcontrol,
703                        struct snd_ctl_elem_value *ucontrol)
704 {
705         struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
706         struct snd_soc_codec *codec = widget->codec;
707         struct wm8993_priv *wm8993 = codec->private_data;
708         int ret;
709
710         /* Turn it off if we're using the main output mixer */
711         if (ucontrol->value.integer.value[0] == 0) {
712                 if (wm8993->class_w_users == 0) {
713                         dev_dbg(codec->dev, "Disabling Class W\n");
714                         snd_soc_update_bits(codec, WM8993_CLASS_W_0,
715                                             WM8993_CP_DYN_FREQ |
716                                             WM8993_CP_DYN_V,
717                                             0);
718                 }
719                 wm8993->class_w_users++;
720         }
721
722         /* Implement the change */
723         ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
724
725         /* Enable it if we're using the direct DAC path */
726         if (ucontrol->value.integer.value[0] == 1) {
727                 if (wm8993->class_w_users == 1) {
728                         dev_dbg(codec->dev, "Enabling Class W\n");
729                         snd_soc_update_bits(codec, WM8993_CLASS_W_0,
730                                             WM8993_CP_DYN_FREQ |
731                                             WM8993_CP_DYN_V,
732                                             WM8993_CP_DYN_FREQ |
733                                             WM8993_CP_DYN_V);
734                 }
735                 wm8993->class_w_users--;
736         }
737
738         dev_dbg(codec->dev, "Indirect DAC use count now %d\n",
739                 wm8993->class_w_users);
740
741         return ret;
742 }
743
744 #define SOC_DAPM_ENUM_W(xname, xenum) \
745 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
746         .info = snd_soc_info_enum_double, \
747         .get = snd_soc_dapm_get_enum_double, \
748         .put = class_w_put, \
749         .private_value = (unsigned long)&xenum }
750
751 static const char *hp_mux_text[] = {
752         "Mixer",
753         "DAC",
754 };
755
756 static const struct soc_enum hpl_enum =
757         SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
758
759 static const struct snd_kcontrol_new hpl_mux =
760         SOC_DAPM_ENUM_W("Left Headphone Mux", hpl_enum);
761
762 static const struct soc_enum hpr_enum =
763         SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
764
765 static const struct snd_kcontrol_new hpr_mux =
766         SOC_DAPM_ENUM_W("Right Headphone Mux", hpr_enum);
767
768 static const struct snd_kcontrol_new left_speaker_mixer[] = {
769 SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 7, 1, 0),
770 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_SPEAKER_MIXER, 5, 1, 0),
771 SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 3, 1, 0),
772 SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
773 };
774
775 static const struct snd_kcontrol_new right_speaker_mixer[] = {
776 SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
777 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_SPEAKER_MIXER, 4, 1, 0),
778 SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 2, 1, 0),
779 SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 0, 1, 0),
780 };
781
782 static const char *aif_text[] = {
783         "Left", "Right"
784 };
785
786 static const struct soc_enum aifoutl_enum =
787         SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 15, 2, aif_text);
788
789 static const struct snd_kcontrol_new aifoutl_mux =
790         SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum);
791
792 static const struct soc_enum aifoutr_enum =
793         SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 14, 2, aif_text);
794
795 static const struct snd_kcontrol_new aifoutr_mux =
796         SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum);
797
798 static const struct soc_enum aifinl_enum =
799         SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 15, 2, aif_text);
800
801 static const struct snd_kcontrol_new aifinl_mux =
802         SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum);
803
804 static const struct soc_enum aifinr_enum =
805         SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 14, 2, aif_text);
806
807 static const struct snd_kcontrol_new aifinr_mux =
808         SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum);
809
810 static const char *sidetone_text[] = {
811         "None", "Left", "Right"
812 };
813
814 static const struct soc_enum sidetonel_enum =
815         SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 2, 3, sidetone_text);
816
817 static const struct snd_kcontrol_new sidetonel_mux =
818         SOC_DAPM_ENUM("Left Sidetone", sidetonel_enum);
819
820 static const struct soc_enum sidetoner_enum =
821         SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 0, 3, sidetone_text);
822
823 static const struct snd_kcontrol_new sidetoner_mux =
824         SOC_DAPM_ENUM("Right Sidetone", sidetoner_enum);
825
826 static const struct snd_soc_dapm_widget wm8993_dapm_widgets[] = {
827 SND_SOC_DAPM_SUPPLY("CLK_SYS", WM8993_BUS_CONTROL_1, 1, 0, clk_sys_event,
828                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
829 SND_SOC_DAPM_SUPPLY("TOCLK", WM8993_CLOCKING_1, 14, 0, NULL, 0),
830 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8993_CLOCKING_3, 0, 0, NULL, 0),
831
832 SND_SOC_DAPM_ADC("ADCL", NULL, WM8993_POWER_MANAGEMENT_2, 1, 0),
833 SND_SOC_DAPM_ADC("ADCR", NULL, WM8993_POWER_MANAGEMENT_2, 0, 0),
834
835 SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux),
836 SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux),
837
838 SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
839 SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
840
841 SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
842 SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
843
844 SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux),
845 SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux),
846
847 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &sidetonel_mux),
848 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &sidetoner_mux),
849
850 SND_SOC_DAPM_DAC("DACL", NULL, WM8993_POWER_MANAGEMENT_3, 1, 0),
851 SND_SOC_DAPM_DAC("DACR", NULL, WM8993_POWER_MANAGEMENT_3, 0, 0),
852
853 SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux),
854 SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux),
855
856 SND_SOC_DAPM_MIXER("SPKL", WM8993_POWER_MANAGEMENT_3, 8, 0,
857                    left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
858 SND_SOC_DAPM_MIXER("SPKR", WM8993_POWER_MANAGEMENT_3, 9, 0,
859                    right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
860
861 };
862
863 static const struct snd_soc_dapm_route routes[] = {
864         { "ADCL", NULL, "CLK_SYS" },
865         { "ADCL", NULL, "CLK_DSP" },
866         { "ADCR", NULL, "CLK_SYS" },
867         { "ADCR", NULL, "CLK_DSP" },
868
869         { "AIFOUTL Mux", "Left", "ADCL" },
870         { "AIFOUTL Mux", "Right", "ADCR" },
871         { "AIFOUTR Mux", "Left", "ADCL" },
872         { "AIFOUTR Mux", "Right", "ADCR" },
873
874         { "AIFOUTL", NULL, "AIFOUTL Mux" },
875         { "AIFOUTR", NULL, "AIFOUTR Mux" },
876
877         { "DACL Mux", "Left", "AIFINL" },
878         { "DACL Mux", "Right", "AIFINR" },
879         { "DACR Mux", "Left", "AIFINL" },
880         { "DACR Mux", "Right", "AIFINR" },
881
882         { "DACL Sidetone", "Left", "ADCL" },
883         { "DACL Sidetone", "Right", "ADCR" },
884         { "DACR Sidetone", "Left", "ADCL" },
885         { "DACR Sidetone", "Right", "ADCR" },
886
887         { "DACL", NULL, "CLK_SYS" },
888         { "DACL", NULL, "CLK_DSP" },
889         { "DACL", NULL, "DACL Mux" },
890         { "DACL", NULL, "DACL Sidetone" },
891         { "DACR", NULL, "CLK_SYS" },
892         { "DACR", NULL, "CLK_DSP" },
893         { "DACR", NULL, "DACR Mux" },
894         { "DACR", NULL, "DACR Sidetone" },
895
896         { "Left Output Mixer", "DAC Switch", "DACL" },
897
898         { "Right Output Mixer", "DAC Switch", "DACR" },
899
900         { "Left Output PGA", NULL, "CLK_SYS" },
901
902         { "Right Output PGA", NULL, "CLK_SYS" },
903
904         { "SPKL", "DAC Switch", "DACL" },
905         { "SPKL", NULL, "CLK_SYS" },
906
907         { "SPKR", "DAC Switch", "DACR" },
908         { "SPKR", NULL, "CLK_SYS" },
909
910         { "Left Headphone Mux", "DAC", "DACL" },
911         { "Right Headphone Mux", "DAC", "DACR" },
912 };
913
914 static int wm8993_set_bias_level(struct snd_soc_codec *codec,
915                                  enum snd_soc_bias_level level)
916 {
917         struct wm8993_priv *wm8993 = codec->private_data;
918
919         switch (level) {
920         case SND_SOC_BIAS_ON:
921         case SND_SOC_BIAS_PREPARE:
922                 /* VMID=2*40k */
923                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
924                                     WM8993_VMID_SEL_MASK, 0x2);
925                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
926                                     WM8993_TSHUT_ENA, WM8993_TSHUT_ENA);
927                 break;
928
929         case SND_SOC_BIAS_STANDBY:
930                 if (codec->bias_level == SND_SOC_BIAS_OFF) {
931                         /* Tune DC servo configuration */
932                         snd_soc_write(codec, 0x44, 3);
933                         snd_soc_write(codec, 0x56, 3);
934                         snd_soc_write(codec, 0x44, 0);
935
936                         /* Bring up VMID with fast soft start */
937                         snd_soc_update_bits(codec, WM8993_ANTIPOP2,
938                                             WM8993_STARTUP_BIAS_ENA |
939                                             WM8993_VMID_BUF_ENA |
940                                             WM8993_VMID_RAMP_MASK |
941                                             WM8993_BIAS_SRC,
942                                             WM8993_STARTUP_BIAS_ENA |
943                                             WM8993_VMID_BUF_ENA |
944                                             WM8993_VMID_RAMP_MASK |
945                                             WM8993_BIAS_SRC);
946
947                         /* If either line output is single ended we
948                          * need the VMID buffer */
949                         if (!wm8993->pdata.lineout1_diff ||
950                             !wm8993->pdata.lineout2_diff)
951                                 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
952                                                  WM8993_LINEOUT_VMID_BUF_ENA,
953                                                  WM8993_LINEOUT_VMID_BUF_ENA);
954
955                         /* VMID=2*40k */
956                         snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
957                                             WM8993_VMID_SEL_MASK |
958                                             WM8993_BIAS_ENA,
959                                             WM8993_BIAS_ENA | 0x2);
960                         msleep(32);
961
962                         /* Switch to normal bias */
963                         snd_soc_update_bits(codec, WM8993_ANTIPOP2,
964                                             WM8993_BIAS_SRC |
965                                             WM8993_STARTUP_BIAS_ENA, 0);
966                 }
967
968                 /* VMID=2*240k */
969                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
970                                     WM8993_VMID_SEL_MASK, 0x4);
971
972                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
973                                     WM8993_TSHUT_ENA, 0);
974                 break;
975
976         case SND_SOC_BIAS_OFF:
977                 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
978                                     WM8993_LINEOUT_VMID_BUF_ENA, 0);
979
980                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
981                                     WM8993_VMID_SEL_MASK | WM8993_BIAS_ENA,
982                                     0);
983                 break;
984         }
985
986         codec->bias_level = level;
987
988         return 0;
989 }
990
991 static int wm8993_set_sysclk(struct snd_soc_dai *codec_dai,
992                              int clk_id, unsigned int freq, int dir)
993 {
994         struct snd_soc_codec *codec = codec_dai->codec;
995         struct wm8993_priv *wm8993 = codec->private_data;
996
997         switch (clk_id) {
998         case WM8993_SYSCLK_MCLK:
999                 wm8993->mclk_rate = freq;
1000         case WM8993_SYSCLK_FLL:
1001                 wm8993->sysclk_source = clk_id;
1002                 break;
1003
1004         default:
1005                 return -EINVAL;
1006         }
1007
1008         return 0;
1009 }
1010
1011 static int wm8993_set_dai_fmt(struct snd_soc_dai *dai,
1012                               unsigned int fmt)
1013 {
1014         struct snd_soc_codec *codec = dai->codec;
1015         struct wm8993_priv *wm8993 = codec->private_data;
1016         unsigned int aif1 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_1);
1017         unsigned int aif4 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_4);
1018
1019         aif1 &= ~(WM8993_BCLK_DIR | WM8993_AIF_BCLK_INV |
1020                   WM8993_AIF_LRCLK_INV | WM8993_AIF_FMT_MASK);
1021         aif4 &= ~WM8993_LRCLK_DIR;
1022
1023         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1024         case SND_SOC_DAIFMT_CBS_CFS:
1025                 wm8993->master = 0;
1026                 break;
1027         case SND_SOC_DAIFMT_CBS_CFM:
1028                 aif4 |= WM8993_LRCLK_DIR;
1029                 wm8993->master = 1;
1030                 break;
1031         case SND_SOC_DAIFMT_CBM_CFS:
1032                 aif1 |= WM8993_BCLK_DIR;
1033                 wm8993->master = 1;
1034                 break;
1035         case SND_SOC_DAIFMT_CBM_CFM:
1036                 aif1 |= WM8993_BCLK_DIR;
1037                 aif4 |= WM8993_LRCLK_DIR;
1038                 wm8993->master = 1;
1039                 break;
1040         default:
1041                 return -EINVAL;
1042         }
1043
1044         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1045         case SND_SOC_DAIFMT_DSP_B:
1046                 aif1 |= WM8993_AIF_LRCLK_INV;
1047         case SND_SOC_DAIFMT_DSP_A:
1048                 aif1 |= 0x18;
1049                 break;
1050         case SND_SOC_DAIFMT_I2S:
1051                 aif1 |= 0x10;
1052                 break;
1053         case SND_SOC_DAIFMT_RIGHT_J:
1054                 break;
1055         case SND_SOC_DAIFMT_LEFT_J:
1056                 aif1 |= 0x8;
1057                 break;
1058         default:
1059                 return -EINVAL;
1060         }
1061
1062         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1063         case SND_SOC_DAIFMT_DSP_A:
1064         case SND_SOC_DAIFMT_DSP_B:
1065                 /* frame inversion not valid for DSP modes */
1066                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1067                 case SND_SOC_DAIFMT_NB_NF:
1068                         break;
1069                 case SND_SOC_DAIFMT_IB_NF:
1070                         aif1 |= WM8993_AIF_BCLK_INV;
1071                         break;
1072                 default:
1073                         return -EINVAL;
1074                 }
1075                 break;
1076
1077         case SND_SOC_DAIFMT_I2S:
1078         case SND_SOC_DAIFMT_RIGHT_J:
1079         case SND_SOC_DAIFMT_LEFT_J:
1080                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1081                 case SND_SOC_DAIFMT_NB_NF:
1082                         break;
1083                 case SND_SOC_DAIFMT_IB_IF:
1084                         aif1 |= WM8993_AIF_BCLK_INV | WM8993_AIF_LRCLK_INV;
1085                         break;
1086                 case SND_SOC_DAIFMT_IB_NF:
1087                         aif1 |= WM8993_AIF_BCLK_INV;
1088                         break;
1089                 case SND_SOC_DAIFMT_NB_IF:
1090                         aif1 |= WM8993_AIF_LRCLK_INV;
1091                         break;
1092                 default:
1093                         return -EINVAL;
1094                 }
1095                 break;
1096         default:
1097                 return -EINVAL;
1098         }
1099
1100         snd_soc_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1101         snd_soc_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1102
1103         return 0;
1104 }
1105
1106 static int wm8993_hw_params(struct snd_pcm_substream *substream,
1107                             struct snd_pcm_hw_params *params,
1108                             struct snd_soc_dai *dai)
1109 {
1110         struct snd_soc_codec *codec = dai->codec;
1111         struct wm8993_priv *wm8993 = codec->private_data;
1112         int ret, i, best, best_val, cur_val;
1113         unsigned int clocking1, clocking3, aif1, aif4;
1114
1115         clocking1 = snd_soc_read(codec, WM8993_CLOCKING_1);
1116         clocking1 &= ~WM8993_BCLK_DIV_MASK;
1117
1118         clocking3 = snd_soc_read(codec, WM8993_CLOCKING_3);
1119         clocking3 &= ~(WM8993_CLK_SYS_RATE_MASK | WM8993_SAMPLE_RATE_MASK);
1120
1121         aif1 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_1);
1122         aif1 &= ~WM8993_AIF_WL_MASK;
1123
1124         aif4 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_4);
1125         aif4 &= ~WM8993_LRCLK_RATE_MASK;
1126
1127         /* What BCLK do we need? */
1128         wm8993->fs = params_rate(params);
1129         wm8993->bclk = 2 * wm8993->fs;
1130         if (wm8993->tdm_slots) {
1131                 dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n",
1132                         wm8993->tdm_slots, wm8993->tdm_width);
1133                 wm8993->bclk *= wm8993->tdm_width * wm8993->tdm_slots;
1134         } else {
1135                 switch (params_format(params)) {
1136                 case SNDRV_PCM_FORMAT_S16_LE:
1137                         wm8993->bclk *= 16;
1138                         break;
1139                 case SNDRV_PCM_FORMAT_S20_3LE:
1140                         wm8993->bclk *= 20;
1141                         aif1 |= 0x8;
1142                         break;
1143                 case SNDRV_PCM_FORMAT_S24_LE:
1144                         wm8993->bclk *= 24;
1145                         aif1 |= 0x10;
1146                         break;
1147                 case SNDRV_PCM_FORMAT_S32_LE:
1148                         wm8993->bclk *= 32;
1149                         aif1 |= 0x18;
1150                         break;
1151                 default:
1152                         return -EINVAL;
1153                 }
1154         }
1155
1156         dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8993->bclk);
1157
1158         ret = configure_clock(codec);
1159         if (ret != 0)
1160                 return ret;
1161
1162         /* Select nearest CLK_SYS_RATE */
1163         best = 0;
1164         best_val = abs((wm8993->sysclk_rate / clk_sys_rates[0].ratio)
1165                        - wm8993->fs);
1166         for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) {
1167                 cur_val = abs((wm8993->sysclk_rate /
1168                                clk_sys_rates[i].ratio) - wm8993->fs);;
1169                 if (cur_val < best_val) {
1170                         best = i;
1171                         best_val = cur_val;
1172                 }
1173         }
1174         dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n",
1175                 clk_sys_rates[best].ratio);
1176         clocking3 |= (clk_sys_rates[best].clk_sys_rate
1177                       << WM8993_CLK_SYS_RATE_SHIFT);
1178
1179         /* SAMPLE_RATE */
1180         best = 0;
1181         best_val = abs(wm8993->fs - sample_rates[0].rate);
1182         for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1183                 /* Closest match */
1184                 cur_val = abs(wm8993->fs - sample_rates[i].rate);
1185                 if (cur_val < best_val) {
1186                         best = i;
1187                         best_val = cur_val;
1188                 }
1189         }
1190         dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n",
1191                 sample_rates[best].rate);
1192         clocking3 |= (sample_rates[best].sample_rate
1193                       << WM8993_SAMPLE_RATE_SHIFT);
1194
1195         /* BCLK_DIV */
1196         best = 0;
1197         best_val = INT_MAX;
1198         for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
1199                 cur_val = ((wm8993->sysclk_rate * 10) / bclk_divs[i].div)
1200                         - wm8993->bclk;
1201                 if (cur_val < 0) /* Table is sorted */
1202                         break;
1203                 if (cur_val < best_val) {
1204                         best = i;
1205                         best_val = cur_val;
1206                 }
1207         }
1208         wm8993->bclk = (wm8993->sysclk_rate * 10) / bclk_divs[best].div;
1209         dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n",
1210                 bclk_divs[best].div, wm8993->bclk);
1211         clocking1 |= bclk_divs[best].bclk_div << WM8993_BCLK_DIV_SHIFT;
1212
1213         /* LRCLK is a simple fraction of BCLK */
1214         dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8993->bclk / wm8993->fs);
1215         aif4 |= wm8993->bclk / wm8993->fs;
1216
1217         snd_soc_write(codec, WM8993_CLOCKING_1, clocking1);
1218         snd_soc_write(codec, WM8993_CLOCKING_3, clocking3);
1219         snd_soc_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1220         snd_soc_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1221
1222         /* ReTune Mobile? */
1223         if (wm8993->pdata.num_retune_configs) {
1224                 u16 eq1 = snd_soc_read(codec, WM8993_EQ1);
1225                 struct wm8993_retune_mobile_setting *s;
1226
1227                 best = 0;
1228                 best_val = abs(wm8993->pdata.retune_configs[0].rate
1229                                - wm8993->fs);
1230                 for (i = 0; i < wm8993->pdata.num_retune_configs; i++) {
1231                         cur_val = abs(wm8993->pdata.retune_configs[i].rate
1232                                       - wm8993->fs);
1233                         if (cur_val < best_val) {
1234                                 best_val = cur_val;
1235                                 best = i;
1236                         }
1237                 }
1238                 s = &wm8993->pdata.retune_configs[best];
1239
1240                 dev_dbg(codec->dev, "ReTune Mobile %s tuned for %dHz\n",
1241                         s->name, s->rate);
1242
1243                 /* Disable EQ while we reconfigure */
1244                 snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, 0);
1245
1246                 for (i = 1; i < ARRAY_SIZE(s->config); i++)
1247                         snd_soc_write(codec, WM8993_EQ1 + i, s->config[i]);
1248
1249                 snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, eq1);
1250         }
1251
1252         return 0;
1253 }
1254
1255 static int wm8993_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1256 {
1257         struct snd_soc_codec *codec = codec_dai->codec;
1258         unsigned int reg;
1259
1260         reg = snd_soc_read(codec, WM8993_DAC_CTRL);
1261
1262         if (mute)
1263                 reg |= WM8993_DAC_MUTE;
1264         else
1265                 reg &= ~WM8993_DAC_MUTE;
1266
1267         snd_soc_write(codec, WM8993_DAC_CTRL, reg);
1268
1269         return 0;
1270 }
1271
1272 static int wm8993_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1273                                unsigned int rx_mask, int slots, int slot_width)
1274 {
1275         struct snd_soc_codec *codec = dai->codec;
1276         struct wm8993_priv *wm8993 = codec->private_data;
1277         int aif1 = 0;
1278         int aif2 = 0;
1279
1280         /* Don't need to validate anything if we're turning off TDM */
1281         if (slots == 0) {
1282                 wm8993->tdm_slots = 0;
1283                 goto out;
1284         }
1285
1286         /* Note that we allow configurations we can't handle ourselves - 
1287          * for example, we can generate clocks for slots 2 and up even if
1288          * we can't use those slots ourselves.
1289          */
1290         aif1 |= WM8993_AIFADC_TDM;
1291         aif2 |= WM8993_AIFDAC_TDM;
1292
1293         switch (rx_mask) {
1294         case 3:
1295                 break;
1296         case 0xc:
1297                 aif1 |= WM8993_AIFADC_TDM_CHAN;
1298                 break;
1299         default:
1300                 return -EINVAL;
1301         }
1302
1303
1304         switch (tx_mask) {
1305         case 3:
1306                 break;
1307         case 0xc:
1308                 aif2 |= WM8993_AIFDAC_TDM_CHAN;
1309                 break;
1310         default:
1311                 return -EINVAL;
1312         }
1313
1314 out:
1315         wm8993->tdm_width = slot_width;
1316         wm8993->tdm_slots = slots / 2;
1317
1318         snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_1,
1319                             WM8993_AIFADC_TDM | WM8993_AIFADC_TDM_CHAN, aif1);
1320         snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_2,
1321                             WM8993_AIFDAC_TDM | WM8993_AIFDAC_TDM_CHAN, aif2);
1322
1323         return 0;
1324 }
1325
1326 static struct snd_soc_dai_ops wm8993_ops = {
1327         .set_sysclk = wm8993_set_sysclk,
1328         .set_fmt = wm8993_set_dai_fmt,
1329         .hw_params = wm8993_hw_params,
1330         .digital_mute = wm8993_digital_mute,
1331         .set_pll = wm8993_set_fll,
1332         .set_tdm_slot = wm8993_set_tdm_slot,
1333 };
1334
1335 #define WM8993_RATES SNDRV_PCM_RATE_8000_48000
1336
1337 #define WM8993_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1338                         SNDRV_PCM_FMTBIT_S20_3LE |\
1339                         SNDRV_PCM_FMTBIT_S24_LE |\
1340                         SNDRV_PCM_FMTBIT_S32_LE)
1341
1342 struct snd_soc_dai wm8993_dai = {
1343         .name = "WM8993",
1344         .playback = {
1345                 .stream_name = "Playback",
1346                 .channels_min = 1,
1347                 .channels_max = 2,
1348                 .rates = WM8993_RATES,
1349                 .formats = WM8993_FORMATS,
1350         },
1351         .capture = {
1352                  .stream_name = "Capture",
1353                  .channels_min = 1,
1354                  .channels_max = 2,
1355                  .rates = WM8993_RATES,
1356                  .formats = WM8993_FORMATS,
1357          },
1358         .ops = &wm8993_ops,
1359         .symmetric_rates = 1,
1360 };
1361 EXPORT_SYMBOL_GPL(wm8993_dai);
1362
1363 static struct snd_soc_codec *wm8993_codec;
1364
1365 static int wm8993_probe(struct platform_device *pdev)
1366 {
1367         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1368         struct snd_soc_codec *codec;
1369         struct wm8993_priv *wm8993;
1370         int ret = 0;
1371
1372         if (!wm8993_codec) {
1373                 dev_err(&pdev->dev, "I2C device not yet probed\n");
1374                 goto err;
1375         }
1376
1377         socdev->card->codec = wm8993_codec;
1378         codec = wm8993_codec;
1379         wm8993 = codec->private_data;
1380
1381         ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1382         if (ret < 0) {
1383                 dev_err(codec->dev, "failed to create pcms\n");
1384                 goto err;
1385         }
1386
1387         snd_soc_add_controls(codec, wm8993_snd_controls,
1388                              ARRAY_SIZE(wm8993_snd_controls));
1389         if (wm8993->pdata.num_retune_configs != 0) {
1390                 dev_dbg(codec->dev, "Using ReTune Mobile\n");
1391         } else {
1392                 dev_dbg(codec->dev, "No ReTune Mobile, using normal EQ\n");
1393                 snd_soc_add_controls(codec, wm8993_eq_controls,
1394                                      ARRAY_SIZE(wm8993_eq_controls));
1395         }
1396
1397         snd_soc_dapm_new_controls(codec, wm8993_dapm_widgets,
1398                                   ARRAY_SIZE(wm8993_dapm_widgets));
1399         wm_hubs_add_analogue_controls(codec);
1400
1401         snd_soc_dapm_add_routes(codec, routes, ARRAY_SIZE(routes));
1402         wm_hubs_add_analogue_routes(codec, wm8993->pdata.lineout1_diff,
1403                                     wm8993->pdata.lineout2_diff);
1404
1405         return ret;
1406
1407 err:
1408         return ret;
1409 }
1410
1411 static int wm8993_remove(struct platform_device *pdev)
1412 {
1413         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1414
1415         snd_soc_free_pcms(socdev);
1416         snd_soc_dapm_free(socdev);
1417
1418         return 0;
1419 }
1420
1421 #ifdef CONFIG_PM
1422 static int wm8993_suspend(struct platform_device *pdev, pm_message_t state)
1423 {
1424         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1425         struct snd_soc_codec *codec = socdev->card->codec;
1426         struct wm8993_priv *wm8993 = codec->private_data;
1427         int fll_fout = wm8993->fll_fout;
1428         int fll_fref  = wm8993->fll_fref;
1429         int ret;
1430
1431         /* Stop the FLL in an orderly fashion */
1432         ret = wm8993_set_fll(codec->dai, 0, 0, 0, 0);
1433         if (ret != 0) {
1434                 dev_err(&pdev->dev, "Failed to stop FLL\n");
1435                 return ret;
1436         }
1437
1438         wm8993->fll_fout = fll_fout;
1439         wm8993->fll_fref = fll_fref;
1440
1441         wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1442
1443         return 0;
1444 }
1445
1446 static int wm8993_resume(struct platform_device *pdev)
1447 {
1448         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1449         struct snd_soc_codec *codec = socdev->card->codec;
1450         struct wm8993_priv *wm8993 = codec->private_data;
1451         u16 *cache = wm8993->reg_cache;
1452         int i, ret;
1453
1454         /* Restore the register settings */
1455         for (i = 1; i < WM8993_MAX_REGISTER; i++) {
1456                 if (cache[i] == wm8993_reg_defaults[i])
1457                         continue;
1458                 snd_soc_write(codec, i, cache[i]);
1459         }
1460
1461         wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1462
1463         /* Restart the FLL? */
1464         if (wm8993->fll_fout) {
1465                 int fll_fout = wm8993->fll_fout;
1466                 int fll_fref  = wm8993->fll_fref;
1467
1468                 wm8993->fll_fref = 0;
1469                 wm8993->fll_fout = 0;
1470
1471                 ret = wm8993_set_fll(codec->dai, 0, wm8993->fll_src,
1472                                      fll_fref, fll_fout);
1473                 if (ret != 0)
1474                         dev_err(codec->dev, "Failed to restart FLL\n");
1475         }
1476
1477         return 0;
1478 }
1479 #else
1480 #define wm8993_suspend NULL
1481 #define wm8993_resume NULL
1482 #endif
1483
1484 struct snd_soc_codec_device soc_codec_dev_wm8993 = {
1485         .probe =        wm8993_probe,
1486         .remove =       wm8993_remove,
1487         .suspend =      wm8993_suspend,
1488         .resume =       wm8993_resume,
1489 };
1490 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8993);
1491
1492 static int wm8993_i2c_probe(struct i2c_client *i2c,
1493                             const struct i2c_device_id *id)
1494 {
1495         struct wm8993_priv *wm8993;
1496         struct snd_soc_codec *codec;
1497         unsigned int val;
1498         int ret;
1499
1500         if (wm8993_codec) {
1501                 dev_err(&i2c->dev, "A WM8993 is already registered\n");
1502                 return -EINVAL;
1503         }
1504
1505         wm8993 = kzalloc(sizeof(struct wm8993_priv), GFP_KERNEL);
1506         if (wm8993 == NULL)
1507                 return -ENOMEM;
1508
1509         codec = &wm8993->codec;
1510         if (i2c->dev.platform_data)
1511                 memcpy(&wm8993->pdata, i2c->dev.platform_data,
1512                        sizeof(wm8993->pdata));
1513
1514         mutex_init(&codec->mutex);
1515         INIT_LIST_HEAD(&codec->dapm_widgets);
1516         INIT_LIST_HEAD(&codec->dapm_paths);
1517
1518         codec->name = "WM8993";
1519         codec->volatile_register = wm8993_volatile;
1520         codec->reg_cache = wm8993->reg_cache;
1521         codec->reg_cache_size = ARRAY_SIZE(wm8993->reg_cache);
1522         codec->bias_level = SND_SOC_BIAS_OFF;
1523         codec->set_bias_level = wm8993_set_bias_level;
1524         codec->dai = &wm8993_dai;
1525         codec->num_dai = 1;
1526         codec->private_data = wm8993;
1527
1528         wm8993->hubs_data.hp_startup_mode = 1;
1529         wm8993->hubs_data.dcs_codes = -2;
1530
1531         memcpy(wm8993->reg_cache, wm8993_reg_defaults,
1532                sizeof(wm8993->reg_cache));
1533
1534         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1535         if (ret != 0) {
1536                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1537                 goto err;
1538         }
1539
1540         i2c_set_clientdata(i2c, wm8993);
1541         codec->control_data = i2c;
1542         wm8993_codec = codec;
1543
1544         codec->dev = &i2c->dev;
1545
1546         val = snd_soc_read(codec, WM8993_SOFTWARE_RESET);
1547         if (val != wm8993_reg_defaults[WM8993_SOFTWARE_RESET]) {
1548                 dev_err(codec->dev, "Invalid ID register value %x\n", val);
1549                 ret = -EINVAL;
1550                 goto err;
1551         }
1552
1553         ret = snd_soc_write(codec, WM8993_SOFTWARE_RESET, 0xffff);
1554         if (ret != 0)
1555                 goto err;
1556
1557         /* By default we're using the output mixers */
1558         wm8993->class_w_users = 2;
1559
1560         /* Latch volume update bits and default ZC on */
1561         snd_soc_update_bits(codec, WM8993_RIGHT_DAC_DIGITAL_VOLUME,
1562                             WM8993_DAC_VU, WM8993_DAC_VU);
1563         snd_soc_update_bits(codec, WM8993_RIGHT_ADC_DIGITAL_VOLUME,
1564                             WM8993_ADC_VU, WM8993_ADC_VU);
1565
1566         /* Manualy manage the HPOUT sequencing for independent stereo
1567          * control. */
1568         snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
1569                             WM8993_HPOUT1_AUTO_PU, 0);
1570
1571         /* Use automatic clock configuration */
1572         snd_soc_update_bits(codec, WM8993_CLOCKING_4, WM8993_SR_MODE, 0);
1573
1574         wm_hubs_handle_analogue_pdata(codec, wm8993->pdata.lineout1_diff,
1575                                       wm8993->pdata.lineout2_diff,
1576                                       wm8993->pdata.lineout1fb,
1577                                       wm8993->pdata.lineout2fb,
1578                                       wm8993->pdata.jd_scthr,
1579                                       wm8993->pdata.jd_thr,
1580                                       wm8993->pdata.micbias1_lvl,
1581                                       wm8993->pdata.micbias2_lvl);
1582                              
1583         ret = wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1584         if (ret != 0)
1585                 goto err;
1586
1587         wm8993_dai.dev = codec->dev;
1588
1589         ret = snd_soc_register_dai(&wm8993_dai);
1590         if (ret != 0)
1591                 goto err_bias;
1592
1593         ret = snd_soc_register_codec(codec);
1594
1595         return 0;
1596
1597 err_bias:
1598         wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1599 err:
1600         wm8993_codec = NULL;
1601         kfree(wm8993);
1602         return ret;
1603 }
1604
1605 static int wm8993_i2c_remove(struct i2c_client *client)
1606 {
1607         struct wm8993_priv *wm8993 = i2c_get_clientdata(client);
1608
1609         snd_soc_unregister_codec(&wm8993->codec);
1610         snd_soc_unregister_dai(&wm8993_dai);
1611
1612         wm8993_set_bias_level(&wm8993->codec, SND_SOC_BIAS_OFF);
1613         kfree(wm8993);
1614
1615         return 0;
1616 }
1617
1618 static const struct i2c_device_id wm8993_i2c_id[] = {
1619         { "wm8993", 0 },
1620         { }
1621 };
1622 MODULE_DEVICE_TABLE(i2c, wm8993_i2c_id);
1623
1624 static struct i2c_driver wm8993_i2c_driver = {
1625         .driver = {
1626                 .name = "WM8993",
1627                 .owner = THIS_MODULE,
1628         },
1629         .probe = wm8993_i2c_probe,
1630         .remove = wm8993_i2c_remove,
1631         .id_table = wm8993_i2c_id,
1632 };
1633
1634
1635 static int __init wm8993_modinit(void)
1636 {
1637         int ret;
1638
1639         ret = i2c_add_driver(&wm8993_i2c_driver);
1640         if (ret != 0)
1641                 pr_err("WM8993: Unable to register I2C driver: %d\n", ret);
1642
1643         return ret;
1644 }
1645 module_init(wm8993_modinit);
1646
1647 static void __exit wm8993_exit(void)
1648 {
1649         i2c_del_driver(&wm8993_i2c_driver);
1650 }
1651 module_exit(wm8993_exit);
1652
1653
1654 MODULE_DESCRIPTION("ASoC WM8993 driver");
1655 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1656 MODULE_LICENSE("GPL");