10f6e521451161dbdd169b59d69101a3010f41c3
[linux-2.6.git] / sound / soc / codecs / twl6040.c
1 /*
2  * ALSA SoC TWL6040 codec driver
3  *
4  * Author:       Misael Lopez Cruz <x0052729@ti.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * version 2 as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18  * 02110-1301 USA
19  *
20  */
21
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/pm.h>
27 #include <linux/i2c.h>
28 #include <linux/gpio.h>
29 #include <linux/platform_device.h>
30 #include <linux/slab.h>
31 #include <linux/i2c/twl.h>
32
33 #include <sound/core.h>
34 #include <sound/pcm.h>
35 #include <sound/pcm_params.h>
36 #include <sound/soc.h>
37 #include <sound/soc-dapm.h>
38 #include <sound/initval.h>
39 #include <sound/tlv.h>
40
41 #include "twl6040.h"
42
43 #define TWL6040_RATES    (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
44 #define TWL6040_FORMATS  (SNDRV_PCM_FMTBIT_S32_LE)
45
46 /* codec private data */
47 struct twl6040_data {
48         int audpwron;
49         int naudint;
50         int codec_powered;
51         int pll;
52         int non_lp;
53         unsigned int sysclk;
54         struct snd_pcm_hw_constraint_list *sysclk_constraints;
55         struct completion ready;
56 };
57
58 /*
59  * twl6040 register cache & default register settings
60  */
61 static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
62         0x00, /* not used               0x00    */
63         0x4B, /* TWL6040_ASICID (ro)    0x01    */
64         0x00, /* TWL6040_ASICREV (ro)   0x02    */
65         0x00, /* TWL6040_INTID          0x03    */
66         0x00, /* TWL6040_INTMR          0x04    */
67         0x00, /* TWL6040_NCPCTRL        0x05    */
68         0x00, /* TWL6040_LDOCTL         0x06    */
69         0x60, /* TWL6040_HPPLLCTL       0x07    */
70         0x00, /* TWL6040_LPPLLCTL       0x08    */
71         0x4A, /* TWL6040_LPPLLDIV       0x09    */
72         0x00, /* TWL6040_AMICBCTL       0x0A    */
73         0x00, /* TWL6040_DMICBCTL       0x0B    */
74         0x18, /* TWL6040_MICLCTL        0x0C    - No input selected on Left Mic */
75         0x18, /* TWL6040_MICRCTL        0x0D    - No input selected on Right Mic */
76         0x00, /* TWL6040_MICGAIN        0x0E    */
77         0x1B, /* TWL6040_LINEGAIN       0x0F    */
78         0x00, /* TWL6040_HSLCTL         0x10    */
79         0x00, /* TWL6040_HSRCTL         0x11    */
80         0x00, /* TWL6040_HSGAIN         0x12    */
81         0x00, /* TWL6040_EARCTL         0x13    */
82         0x00, /* TWL6040_HFLCTL         0x14    */
83         0x00, /* TWL6040_HFLGAIN        0x15    */
84         0x00, /* TWL6040_HFRCTL         0x16    */
85         0x00, /* TWL6040_HFRGAIN        0x17    */
86         0x00, /* TWL6040_VIBCTLL        0x18    */
87         0x00, /* TWL6040_VIBDATL        0x19    */
88         0x00, /* TWL6040_VIBCTLR        0x1A    */
89         0x00, /* TWL6040_VIBDATR        0x1B    */
90         0x00, /* TWL6040_HKCTL1         0x1C    */
91         0x00, /* TWL6040_HKCTL2         0x1D    */
92         0x00, /* TWL6040_GPOCTL         0x1E    */
93         0x00, /* TWL6040_ALB            0x1F    */
94         0x00, /* TWL6040_DLB            0x20    */
95         0x00, /* not used               0x21    */
96         0x00, /* not used               0x22    */
97         0x00, /* not used               0x23    */
98         0x00, /* not used               0x24    */
99         0x00, /* not used               0x25    */
100         0x00, /* not used               0x26    */
101         0x00, /* not used               0x27    */
102         0x00, /* TWL6040_TRIM1          0x28    */
103         0x00, /* TWL6040_TRIM2          0x29    */
104         0x00, /* TWL6040_TRIM3          0x2A    */
105         0x00, /* TWL6040_HSOTRIM        0x2B    */
106         0x00, /* TWL6040_HFOTRIM        0x2C    */
107         0x09, /* TWL6040_ACCCTL         0x2D    */
108         0x00, /* TWL6040_STATUS (ro)    0x2E    */
109 };
110
111 /*
112  * twl6040 vio/gnd registers:
113  * registers under vio/gnd supply can be accessed
114  * before the power-up sequence, after NRESPWRON goes high
115  */
116 static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = {
117         TWL6040_REG_ASICID,
118         TWL6040_REG_ASICREV,
119         TWL6040_REG_INTID,
120         TWL6040_REG_INTMR,
121         TWL6040_REG_NCPCTL,
122         TWL6040_REG_LDOCTL,
123         TWL6040_REG_AMICBCTL,
124         TWL6040_REG_DMICBCTL,
125         TWL6040_REG_HKCTL1,
126         TWL6040_REG_HKCTL2,
127         TWL6040_REG_GPOCTL,
128         TWL6040_REG_TRIM1,
129         TWL6040_REG_TRIM2,
130         TWL6040_REG_TRIM3,
131         TWL6040_REG_HSOTRIM,
132         TWL6040_REG_HFOTRIM,
133         TWL6040_REG_ACCCTL,
134         TWL6040_REG_STATUS,
135 };
136
137 /*
138  * twl6040 vdd/vss registers:
139  * registers under vdd/vss supplies can only be accessed
140  * after the power-up sequence
141  */
142 static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = {
143         TWL6040_REG_HPPLLCTL,
144         TWL6040_REG_LPPLLCTL,
145         TWL6040_REG_LPPLLDIV,
146         TWL6040_REG_MICLCTL,
147         TWL6040_REG_MICRCTL,
148         TWL6040_REG_MICGAIN,
149         TWL6040_REG_LINEGAIN,
150         TWL6040_REG_HSLCTL,
151         TWL6040_REG_HSRCTL,
152         TWL6040_REG_HSGAIN,
153         TWL6040_REG_EARCTL,
154         TWL6040_REG_HFLCTL,
155         TWL6040_REG_HFLGAIN,
156         TWL6040_REG_HFRCTL,
157         TWL6040_REG_HFRGAIN,
158         TWL6040_REG_VIBCTLL,
159         TWL6040_REG_VIBDATL,
160         TWL6040_REG_VIBCTLR,
161         TWL6040_REG_VIBDATR,
162         TWL6040_REG_ALB,
163         TWL6040_REG_DLB,
164 };
165
166 /*
167  * read twl6040 register cache
168  */
169 static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
170                                                 unsigned int reg)
171 {
172         u8 *cache = codec->reg_cache;
173
174         if (reg >= TWL6040_CACHEREGNUM)
175                 return -EIO;
176
177         return cache[reg];
178 }
179
180 /*
181  * write twl6040 register cache
182  */
183 static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
184                                                 u8 reg, u8 value)
185 {
186         u8 *cache = codec->reg_cache;
187
188         if (reg >= TWL6040_CACHEREGNUM)
189                 return;
190         cache[reg] = value;
191 }
192
193 /*
194  * read from twl6040 hardware register
195  */
196 static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
197                         unsigned int reg)
198 {
199         u8 value;
200
201         if (reg >= TWL6040_CACHEREGNUM)
202                 return -EIO;
203
204         twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
205         twl6040_write_reg_cache(codec, reg, value);
206
207         return value;
208 }
209
210 /*
211  * write to the twl6040 register space
212  */
213 static int twl6040_write(struct snd_soc_codec *codec,
214                         unsigned int reg, unsigned int value)
215 {
216         if (reg >= TWL6040_CACHEREGNUM)
217                 return -EIO;
218
219         twl6040_write_reg_cache(codec, reg, value);
220         return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
221 }
222
223 static void twl6040_init_vio_regs(struct snd_soc_codec *codec)
224 {
225         u8 *cache = codec->reg_cache;
226         int reg, i;
227
228         /* allow registers to be accessed by i2c */
229         twl6040_write(codec, TWL6040_REG_ACCCTL, cache[TWL6040_REG_ACCCTL]);
230
231         for (i = 0; i < TWL6040_VIOREGNUM; i++) {
232                 reg = twl6040_vio_reg[i];
233                 /* skip read-only registers (ASICID, ASICREV, STATUS) */
234                 switch (reg) {
235                 case TWL6040_REG_ASICID:
236                 case TWL6040_REG_ASICREV:
237                 case TWL6040_REG_STATUS:
238                         continue;
239                 default:
240                         break;
241                 }
242                 twl6040_write(codec, reg, cache[reg]);
243         }
244 }
245
246 static void twl6040_init_vdd_regs(struct snd_soc_codec *codec)
247 {
248         u8 *cache = codec->reg_cache;
249         int reg, i;
250
251         for (i = 0; i < TWL6040_VDDREGNUM; i++) {
252                 reg = twl6040_vdd_reg[i];
253                 twl6040_write(codec, reg, cache[reg]);
254         }
255 }
256
257 /* twl6040 codec manual power-up sequence */
258 static void twl6040_power_up(struct snd_soc_codec *codec)
259 {
260         u8 ncpctl, ldoctl, lppllctl, accctl;
261
262         ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
263         ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
264         lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
265         accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
266
267         /* enable reference system */
268         ldoctl |= TWL6040_REFENA;
269         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
270         msleep(10);
271         /* enable internal oscillator */
272         ldoctl |= TWL6040_OSCENA;
273         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
274         udelay(10);
275         /* enable high-side ldo */
276         ldoctl |= TWL6040_HSLDOENA;
277         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
278         udelay(244);
279         /* enable negative charge pump */
280         ncpctl |= TWL6040_NCPENA | TWL6040_NCPOPEN;
281         twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
282         udelay(488);
283         /* enable low-side ldo */
284         ldoctl |= TWL6040_LSLDOENA;
285         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
286         udelay(244);
287         /* enable low-power pll */
288         lppllctl |= TWL6040_LPLLENA;
289         twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
290         /* reset state machine */
291         accctl |= TWL6040_RESETSPLIT;
292         twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
293         mdelay(5);
294         accctl &= ~TWL6040_RESETSPLIT;
295         twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
296         /* disable internal oscillator */
297         ldoctl &= ~TWL6040_OSCENA;
298         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
299 }
300
301 /* twl6040 codec manual power-down sequence */
302 static void twl6040_power_down(struct snd_soc_codec *codec)
303 {
304         u8 ncpctl, ldoctl, lppllctl, accctl;
305
306         ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
307         ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
308         lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
309         accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
310
311         /* enable internal oscillator */
312         ldoctl |= TWL6040_OSCENA;
313         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
314         udelay(10);
315         /* disable low-power pll */
316         lppllctl &= ~TWL6040_LPLLENA;
317         twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
318         /* disable low-side ldo */
319         ldoctl &= ~TWL6040_LSLDOENA;
320         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
321         udelay(244);
322         /* disable negative charge pump */
323         ncpctl &= ~(TWL6040_NCPENA | TWL6040_NCPOPEN);
324         twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
325         udelay(488);
326         /* disable high-side ldo */
327         ldoctl &= ~TWL6040_HSLDOENA;
328         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
329         udelay(244);
330         /* disable internal oscillator */
331         ldoctl &= ~TWL6040_OSCENA;
332         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
333         /* disable reference system */
334         ldoctl &= ~TWL6040_REFENA;
335         twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
336         msleep(10);
337 }
338
339 /* set headset dac and driver power mode */
340 static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
341 {
342         int hslctl, hsrctl;
343         int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
344
345         hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
346         hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
347
348         if (high_perf) {
349                 hslctl &= ~mask;
350                 hsrctl &= ~mask;
351         } else {
352                 hslctl |= mask;
353                 hsrctl |= mask;
354         }
355
356         twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
357         twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
358
359         return 0;
360 }
361
362 static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
363                         struct snd_kcontrol *kcontrol, int event)
364 {
365         msleep(1);
366         return 0;
367 }
368
369 static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
370                         struct snd_kcontrol *kcontrol, int event)
371 {
372         struct snd_soc_codec *codec = w->codec;
373         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
374
375         if (SND_SOC_DAPM_EVENT_ON(event))
376                 priv->non_lp++;
377         else
378                 priv->non_lp--;
379
380         msleep(1);
381
382         return 0;
383 }
384
385 /* audio interrupt handler */
386 static irqreturn_t twl6040_naudint_handler(int irq, void *data)
387 {
388         struct snd_soc_codec *codec = data;
389         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
390         u8 intid;
391
392         twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &intid, TWL6040_REG_INTID);
393
394         switch (intid) {
395         case TWL6040_THINT:
396                 dev_alert(codec->dev, "die temp over-limit detection\n");
397                 break;
398         case TWL6040_PLUGINT:
399         case TWL6040_UNPLUGINT:
400         case TWL6040_HOOKINT:
401                 break;
402         case TWL6040_HFINT:
403                 dev_alert(codec->dev, "hf drivers over current detection\n");
404                 break;
405         case TWL6040_VIBINT:
406                 dev_alert(codec->dev, "vib drivers over current detection\n");
407                 break;
408         case TWL6040_READYINT:
409                 complete(&priv->ready);
410                 break;
411         default:
412                 dev_err(codec->dev, "unknown audio interrupt %d\n", intid);
413                 break;
414         }
415
416         return IRQ_HANDLED;
417 }
418
419 /*
420  * MICATT volume control:
421  * from -6 to 0 dB in 6 dB steps
422  */
423 static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
424
425 /*
426  * MICGAIN volume control:
427  * from 6 to 30 dB in 6 dB steps
428  */
429 static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
430
431 /*
432  * HSGAIN volume control:
433  * from -30 to 0 dB in 2 dB steps
434  */
435 static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
436
437 /*
438  * HFGAIN volume control:
439  * from -52 to 6 dB in 2 dB steps
440  */
441 static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
442
443 /*
444  * EPGAIN volume control:
445  * from -24 to 6 dB in 2 dB steps
446  */
447 static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
448
449 /* Left analog microphone selection */
450 static const char *twl6040_amicl_texts[] =
451         {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
452
453 /* Right analog microphone selection */
454 static const char *twl6040_amicr_texts[] =
455         {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
456
457 static const struct soc_enum twl6040_enum[] = {
458         SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 3, twl6040_amicl_texts),
459         SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 3, twl6040_amicr_texts),
460 };
461
462 static const struct snd_kcontrol_new amicl_control =
463         SOC_DAPM_ENUM("Route", twl6040_enum[0]);
464
465 static const struct snd_kcontrol_new amicr_control =
466         SOC_DAPM_ENUM("Route", twl6040_enum[1]);
467
468 /* Headset DAC playback switches */
469 static const struct snd_kcontrol_new hsdacl_switch_controls =
470         SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSLCTL, 5, 1, 0);
471
472 static const struct snd_kcontrol_new hsdacr_switch_controls =
473         SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSRCTL, 5, 1, 0);
474
475 /* Handsfree DAC playback switches */
476 static const struct snd_kcontrol_new hfdacl_switch_controls =
477         SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 2, 1, 0);
478
479 static const struct snd_kcontrol_new hfdacr_switch_controls =
480         SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 2, 1, 0);
481
482 static const struct snd_kcontrol_new ep_driver_switch_controls =
483         SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0);
484
485 static const struct snd_kcontrol_new twl6040_snd_controls[] = {
486         /* Capture gains */
487         SOC_DOUBLE_TLV("Capture Preamplifier Volume",
488                 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
489         SOC_DOUBLE_TLV("Capture Volume",
490                 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
491
492         /* Playback gains */
493         SOC_DOUBLE_TLV("Headset Playback Volume",
494                 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
495         SOC_DOUBLE_R_TLV("Handsfree Playback Volume",
496                 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
497         SOC_SINGLE_TLV("Earphone Playback Volume",
498                 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
499 };
500
501 static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
502         /* Inputs */
503         SND_SOC_DAPM_INPUT("MAINMIC"),
504         SND_SOC_DAPM_INPUT("HSMIC"),
505         SND_SOC_DAPM_INPUT("SUBMIC"),
506         SND_SOC_DAPM_INPUT("AFML"),
507         SND_SOC_DAPM_INPUT("AFMR"),
508
509         /* Outputs */
510         SND_SOC_DAPM_OUTPUT("HSOL"),
511         SND_SOC_DAPM_OUTPUT("HSOR"),
512         SND_SOC_DAPM_OUTPUT("HFL"),
513         SND_SOC_DAPM_OUTPUT("HFR"),
514         SND_SOC_DAPM_OUTPUT("EP"),
515
516         /* Analog input muxes for the capture amplifiers */
517         SND_SOC_DAPM_MUX("Analog Left Capture Route",
518                         SND_SOC_NOPM, 0, 0, &amicl_control),
519         SND_SOC_DAPM_MUX("Analog Right Capture Route",
520                         SND_SOC_NOPM, 0, 0, &amicr_control),
521
522         /* Analog capture PGAs */
523         SND_SOC_DAPM_PGA("MicAmpL",
524                         TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
525         SND_SOC_DAPM_PGA("MicAmpR",
526                         TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
527
528         /* ADCs */
529         SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
530                         TWL6040_REG_MICLCTL, 2, 0),
531         SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
532                         TWL6040_REG_MICRCTL, 2, 0),
533
534         /* Microphone bias */
535         SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
536                         TWL6040_REG_AMICBCTL, 0, 0),
537         SND_SOC_DAPM_MICBIAS("Main Mic Bias",
538                         TWL6040_REG_AMICBCTL, 4, 0),
539         SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
540                         TWL6040_REG_DMICBCTL, 0, 0),
541         SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
542                         TWL6040_REG_DMICBCTL, 4, 0),
543
544         /* DACs */
545         SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
546                         TWL6040_REG_HSLCTL, 0, 0,
547                         twl6040_hs_dac_event,
548                         SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
549         SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
550                         TWL6040_REG_HSRCTL, 0, 0,
551                         twl6040_hs_dac_event,
552                         SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
553         SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
554                         TWL6040_REG_HFLCTL, 0, 0,
555                         twl6040_power_mode_event,
556                         SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
557         SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
558                         TWL6040_REG_HFRCTL, 0, 0,
559                         twl6040_power_mode_event,
560                         SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
561
562         /* Analog playback switches */
563         SND_SOC_DAPM_SWITCH("HSDAC Left Playback",
564                         SND_SOC_NOPM, 0, 0, &hsdacl_switch_controls),
565         SND_SOC_DAPM_SWITCH("HSDAC Right Playback",
566                         SND_SOC_NOPM, 0, 0, &hsdacr_switch_controls),
567         SND_SOC_DAPM_SWITCH("HFDAC Left Playback",
568                         SND_SOC_NOPM, 0, 0, &hfdacl_switch_controls),
569         SND_SOC_DAPM_SWITCH("HFDAC Right Playback",
570                         SND_SOC_NOPM, 0, 0, &hfdacr_switch_controls),
571
572         /* Analog playback drivers */
573         SND_SOC_DAPM_PGA_E("Handsfree Left Driver",
574                         TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
575                         twl6040_power_mode_event,
576                         SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
577         SND_SOC_DAPM_PGA_E("Handsfree Right Driver",
578                         TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
579                         twl6040_power_mode_event,
580                         SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
581         SND_SOC_DAPM_PGA("Headset Left Driver",
582                         TWL6040_REG_HSLCTL, 2, 0, NULL, 0),
583         SND_SOC_DAPM_PGA("Headset Right Driver",
584                         TWL6040_REG_HSRCTL, 2, 0, NULL, 0),
585         SND_SOC_DAPM_SWITCH_E("Earphone Driver",
586                         SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls,
587                         twl6040_power_mode_event,
588                         SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
589
590         /* Analog playback PGAs */
591         SND_SOC_DAPM_PGA("HFDAC Left PGA",
592                         TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
593         SND_SOC_DAPM_PGA("HFDAC Right PGA",
594                         TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
595
596 };
597
598 static const struct snd_soc_dapm_route intercon[] = {
599         /* Capture path */
600         {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
601         {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
602         {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
603
604         {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
605         {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
606         {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
607
608         {"MicAmpL", NULL, "Analog Left Capture Route"},
609         {"MicAmpR", NULL, "Analog Right Capture Route"},
610
611         {"ADC Left", NULL, "MicAmpL"},
612         {"ADC Right", NULL, "MicAmpR"},
613
614         /* Headset playback path */
615         {"HSDAC Left Playback", "Switch", "HSDAC Left"},
616         {"HSDAC Right Playback", "Switch", "HSDAC Right"},
617
618         {"Headset Left Driver", NULL, "HSDAC Left Playback"},
619         {"Headset Right Driver", NULL, "HSDAC Right Playback"},
620
621         {"HSOL", NULL, "Headset Left Driver"},
622         {"HSOR", NULL, "Headset Right Driver"},
623
624         /* Earphone playback path */
625         {"Earphone Driver", "Switch", "HSDAC Left"},
626         {"EP", NULL, "Earphone Driver"},
627
628         /* Handsfree playback path */
629         {"HFDAC Left Playback", "Switch", "HFDAC Left"},
630         {"HFDAC Right Playback", "Switch", "HFDAC Right"},
631
632         {"HFDAC Left PGA", NULL, "HFDAC Left Playback"},
633         {"HFDAC Right PGA", NULL, "HFDAC Right Playback"},
634
635         {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"},
636         {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"},
637
638         {"HFL", NULL, "Handsfree Left Driver"},
639         {"HFR", NULL, "Handsfree Right Driver"},
640 };
641
642 static int twl6040_add_widgets(struct snd_soc_codec *codec)
643 {
644         snd_soc_dapm_new_controls(codec, twl6040_dapm_widgets,
645                                  ARRAY_SIZE(twl6040_dapm_widgets));
646
647         snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
648
649         snd_soc_dapm_new_widgets(codec);
650
651         return 0;
652 }
653
654 static int twl6040_power_up_completion(struct snd_soc_codec *codec,
655                                         int naudint)
656 {
657         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
658         int time_left;
659         u8 intid;
660
661         time_left = wait_for_completion_timeout(&priv->ready,
662                                 msecs_to_jiffies(48));
663
664         if (!time_left) {
665                 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &intid,
666                                                         TWL6040_REG_INTID);
667                 if (!(intid & TWL6040_READYINT)) {
668                         dev_err(codec->dev, "timeout waiting for READYINT\n");
669                         return -ETIMEDOUT;
670                 }
671         }
672
673         priv->codec_powered = 1;
674
675         return 0;
676 }
677
678 static int twl6040_set_bias_level(struct snd_soc_codec *codec,
679                                 enum snd_soc_bias_level level)
680 {
681         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
682         int audpwron = priv->audpwron;
683         int naudint = priv->naudint;
684         int ret;
685
686         switch (level) {
687         case SND_SOC_BIAS_ON:
688                 break;
689         case SND_SOC_BIAS_PREPARE:
690                 break;
691         case SND_SOC_BIAS_STANDBY:
692                 if (priv->codec_powered)
693                         break;
694
695                 if (gpio_is_valid(audpwron)) {
696                         /* use AUDPWRON line */
697                         gpio_set_value(audpwron, 1);
698
699                         /* wait for power-up completion */
700                         ret = twl6040_power_up_completion(codec, naudint);
701                         if (ret)
702                                 return ret;
703
704                         /* sync registers updated during power-up sequence */
705                         twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
706                         twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
707                         twl6040_read_reg_volatile(codec, TWL6040_REG_LPPLLCTL);
708                 } else {
709                         /* use manual power-up sequence */
710                         twl6040_power_up(codec);
711                         priv->codec_powered = 1;
712                 }
713
714                 /* initialize vdd/vss registers with reg_cache */
715                 twl6040_init_vdd_regs(codec);
716                 break;
717         case SND_SOC_BIAS_OFF:
718                 if (!priv->codec_powered)
719                         break;
720
721                 if (gpio_is_valid(audpwron)) {
722                         /* use AUDPWRON line */
723                         gpio_set_value(audpwron, 0);
724
725                         /* power-down sequence latency */
726                         udelay(500);
727
728                         /* sync registers updated during power-down sequence */
729                         twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
730                         twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
731                         twl6040_write_reg_cache(codec, TWL6040_REG_LPPLLCTL,
732                                                 0x00);
733                 } else {
734                         /* use manual power-down sequence */
735                         twl6040_power_down(codec);
736                 }
737
738                 priv->codec_powered = 0;
739                 break;
740         }
741
742         codec->bias_level = level;
743
744         return 0;
745 }
746
747 /* set of rates for each pll: low-power and high-performance */
748
749 static unsigned int lp_rates[] = {
750         88200,
751         96000,
752 };
753
754 static struct snd_pcm_hw_constraint_list lp_constraints = {
755         .count  = ARRAY_SIZE(lp_rates),
756         .list   = lp_rates,
757 };
758
759 static unsigned int hp_rates[] = {
760         96000,
761 };
762
763 static struct snd_pcm_hw_constraint_list hp_constraints = {
764         .count  = ARRAY_SIZE(hp_rates),
765         .list   = hp_rates,
766 };
767
768 static int twl6040_startup(struct snd_pcm_substream *substream,
769                         struct snd_soc_dai *dai)
770 {
771         struct snd_soc_pcm_runtime *rtd = substream->private_data;
772         struct snd_soc_codec *codec = rtd->codec;
773         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
774
775         if (!priv->sysclk) {
776                 dev_err(codec->dev,
777                         "no mclk configured, call set_sysclk() on init\n");
778                 return -EINVAL;
779         }
780
781         /*
782          * capture is not supported at 17.64 MHz,
783          * it's reserved for headset low-power playback scenario
784          */
785         if ((priv->sysclk == 17640000) && substream->stream) {
786                 dev_err(codec->dev,
787                         "capture mode is not supported at %dHz\n",
788                         priv->sysclk);
789                 return -EINVAL;
790         }
791
792         snd_pcm_hw_constraint_list(substream->runtime, 0,
793                                 SNDRV_PCM_HW_PARAM_RATE,
794                                 priv->sysclk_constraints);
795
796         return 0;
797 }
798
799 static int twl6040_hw_params(struct snd_pcm_substream *substream,
800                         struct snd_pcm_hw_params *params,
801                         struct snd_soc_dai *dai)
802 {
803         struct snd_soc_pcm_runtime *rtd = substream->private_data;
804         struct snd_soc_codec *codec = rtd->codec;
805         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
806         u8 lppllctl;
807         int rate;
808
809         /* nothing to do for high-perf pll, it supports only 48 kHz */
810         if (priv->pll == TWL6040_HPPLL_ID)
811                 return 0;
812
813         lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
814
815         rate = params_rate(params);
816         switch (rate) {
817         case 88200:
818                 lppllctl |= TWL6040_LPLLFIN;
819                 priv->sysclk = 17640000;
820                 break;
821         case 96000:
822                 lppllctl &= ~TWL6040_LPLLFIN;
823                 priv->sysclk = 19200000;
824                 break;
825         default:
826                 dev_err(codec->dev, "unsupported rate %d\n", rate);
827                 return -EINVAL;
828         }
829
830         twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
831
832         return 0;
833 }
834
835 static int twl6040_trigger(struct snd_pcm_substream *substream,
836                         int cmd, struct snd_soc_dai *dai)
837 {
838         struct snd_soc_pcm_runtime *rtd = substream->private_data;
839         struct snd_soc_codec *codec = rtd->codec;
840         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
841
842         switch (cmd) {
843         case SNDRV_PCM_TRIGGER_START:
844         case SNDRV_PCM_TRIGGER_RESUME:
845                 /*
846                  * low-power playback mode is restricted
847                  * for headset path only
848                  */
849                 if ((priv->sysclk == 17640000) && priv->non_lp) {
850                         dev_err(codec->dev,
851                                 "some enabled paths aren't supported at %dHz\n",
852                                 priv->sysclk);
853                         return -EPERM;
854                 }
855                 break;
856         default:
857                 break;
858         }
859
860         return 0;
861 }
862
863 static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
864                 int clk_id, unsigned int freq, int dir)
865 {
866         struct snd_soc_codec *codec = codec_dai->codec;
867         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
868         u8 hppllctl, lppllctl;
869
870         hppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_HPPLLCTL);
871         lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
872
873         switch (clk_id) {
874         case TWL6040_SYSCLK_SEL_LPPLL:
875                 switch (freq) {
876                 case 32768:
877                         /* headset dac and driver must be in low-power mode */
878                         headset_power_mode(codec, 0);
879
880                         /* clk32k input requires low-power pll */
881                         lppllctl |= TWL6040_LPLLENA;
882                         twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
883                         mdelay(5);
884                         lppllctl &= ~TWL6040_HPLLSEL;
885                         twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
886                         hppllctl &= ~TWL6040_HPLLENA;
887                         twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
888                         break;
889                 default:
890                         dev_err(codec->dev, "unknown mclk freq %d\n", freq);
891                         return -EINVAL;
892                 }
893
894                 /* lppll divider */
895                 switch (priv->sysclk) {
896                 case 17640000:
897                         lppllctl |= TWL6040_LPLLFIN;
898                         break;
899                 case 19200000:
900                         lppllctl &= ~TWL6040_LPLLFIN;
901                         break;
902                 default:
903                         /* sysclk not yet configured */
904                         lppllctl &= ~TWL6040_LPLLFIN;
905                         priv->sysclk = 19200000;
906                         break;
907                 }
908
909                 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
910
911                 priv->pll = TWL6040_LPPLL_ID;
912                 priv->sysclk_constraints = &lp_constraints;
913                 break;
914         case TWL6040_SYSCLK_SEL_HPPLL:
915                 hppllctl &= ~TWL6040_MCLK_MSK;
916
917                 switch (freq) {
918                 case 12000000:
919                         /* mclk input, pll enabled */
920                         hppllctl |= TWL6040_MCLK_12000KHZ |
921                                     TWL6040_HPLLSQRBP |
922                                     TWL6040_HPLLENA;
923                         break;
924                 case 19200000:
925                         /* mclk input, pll disabled */
926                         hppllctl |= TWL6040_MCLK_19200KHZ |
927                                     TWL6040_HPLLSQRENA |
928                                     TWL6040_HPLLBP;
929                         break;
930                 case 26000000:
931                         /* mclk input, pll enabled */
932                         hppllctl |= TWL6040_MCLK_26000KHZ |
933                                     TWL6040_HPLLSQRBP |
934                                     TWL6040_HPLLENA;
935                         break;
936                 case 38400000:
937                         /* clk slicer, pll disabled */
938                         hppllctl |= TWL6040_MCLK_38400KHZ |
939                                     TWL6040_HPLLSQRENA |
940                                     TWL6040_HPLLBP;
941                         break;
942                 default:
943                         dev_err(codec->dev, "unknown mclk freq %d\n", freq);
944                         return -EINVAL;
945                 }
946
947                 /* headset dac and driver must be in high-performance mode */
948                 headset_power_mode(codec, 1);
949
950                 twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
951                 udelay(500);
952                 lppllctl |= TWL6040_HPLLSEL;
953                 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
954                 lppllctl &= ~TWL6040_LPLLENA;
955                 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
956
957                 /* high-performance pll can provide only 19.2 MHz */
958                 priv->pll = TWL6040_HPPLL_ID;
959                 priv->sysclk = 19200000;
960                 priv->sysclk_constraints = &hp_constraints;
961                 break;
962         default:
963                 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
964                 return -EINVAL;
965         }
966
967         return 0;
968 }
969
970 static struct snd_soc_dai_ops twl6040_dai_ops = {
971         .startup        = twl6040_startup,
972         .hw_params      = twl6040_hw_params,
973         .trigger        = twl6040_trigger,
974         .set_sysclk     = twl6040_set_dai_sysclk,
975 };
976
977 static struct snd_soc_dai_driver twl6040_dai = {
978         .name = "twl6040-hifi",
979         .playback = {
980                 .stream_name = "Playback",
981                 .channels_min = 1,
982                 .channels_max = 4,
983                 .rates = TWL6040_RATES,
984                 .formats = TWL6040_FORMATS,
985         },
986         .capture = {
987                 .stream_name = "Capture",
988                 .channels_min = 1,
989                 .channels_max = 2,
990                 .rates = TWL6040_RATES,
991                 .formats = TWL6040_FORMATS,
992         },
993         .ops = &twl6040_dai_ops,
994 };
995
996 #ifdef CONFIG_PM
997 static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
998 {
999         twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1000
1001         return 0;
1002 }
1003
1004 static int twl6040_resume(struct snd_soc_codec *codec)
1005 {
1006         twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1007
1008         return 0;
1009 }
1010 #else
1011 #define twl6040_suspend NULL
1012 #define twl6040_resume NULL
1013 #endif
1014
1015 static int twl6040_probe(struct snd_soc_codec *codec)
1016 {
1017         struct twl4030_codec_data *twl_codec = codec->dev->platform_data;
1018         struct twl6040_data *priv;
1019         int audpwron, naudint;
1020         int ret = 0;
1021
1022         priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1023         if (priv == NULL)
1024                 return -ENOMEM;
1025         snd_soc_codec_set_drvdata(codec, priv);
1026
1027         if (twl_codec) {
1028                 audpwron = twl_codec->audpwron_gpio;
1029                 naudint = twl_codec->naudint_irq;
1030         } else {
1031                 audpwron = -EINVAL;
1032                 naudint = 0;
1033         }
1034
1035         priv->audpwron = audpwron;
1036         priv->naudint = naudint;
1037
1038         init_completion(&priv->ready);
1039
1040         if (gpio_is_valid(audpwron)) {
1041                 ret = gpio_request(audpwron, "audpwron");
1042                 if (ret)
1043                         goto gpio1_err;
1044
1045                 ret = gpio_direction_output(audpwron, 0);
1046                 if (ret)
1047                         goto gpio2_err;
1048
1049                 priv->codec_powered = 0;
1050         }
1051
1052         if (naudint) {
1053                 /* audio interrupt */
1054                 ret = request_threaded_irq(naudint, NULL,
1055                                 twl6040_naudint_handler,
1056                                 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1057                                 "twl6040_codec", codec);
1058                 if (ret)
1059                         goto gpio2_err;
1060         } else {
1061                 if (gpio_is_valid(audpwron)) {
1062                         /* enable only codec ready interrupt */
1063                         twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
1064                                         ~TWL6040_READYMSK & TWL6040_ALLINT_MSK);
1065                 } else {
1066                         /* no interrupts at all */
1067                         twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
1068                                                 TWL6040_ALLINT_MSK);
1069                 }
1070         }
1071
1072         /* init vio registers */
1073         twl6040_init_vio_regs(codec);
1074
1075         /* power on device */
1076         ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1077         if (ret)
1078                 goto irq_err;
1079
1080         snd_soc_add_controls(codec, twl6040_snd_controls,
1081                                 ARRAY_SIZE(twl6040_snd_controls));
1082         twl6040_add_widgets(codec);
1083
1084         return 0;
1085
1086 irq_err:
1087         if (naudint)
1088                 free_irq(naudint, codec);
1089 gpio2_err:
1090         if (gpio_is_valid(audpwron))
1091                 gpio_free(audpwron);
1092 gpio1_err:
1093         kfree(priv);
1094         return ret;
1095 }
1096
1097 static int twl6040_remove(struct snd_soc_codec *codec)
1098 {
1099         struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1100         int audpwron = priv->audpwron;
1101         int naudint = priv->naudint;
1102
1103         twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1104
1105         if (gpio_is_valid(audpwron))
1106                 gpio_free(audpwron);
1107
1108         if (naudint)
1109                 free_irq(naudint, codec);
1110
1111         kfree(priv);
1112
1113         return 0;
1114 }
1115
1116 static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1117         .probe = twl6040_probe,
1118         .remove = twl6040_remove,
1119         .suspend = twl6040_suspend,
1120         .resume = twl6040_resume,
1121         .read = twl6040_read_reg_cache,
1122         .write = twl6040_write,
1123         .set_bias_level = twl6040_set_bias_level,
1124         .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1125         .reg_word_size = sizeof(u8),
1126         .reg_cache_default = twl6040_reg,
1127 };
1128
1129 static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1130 {
1131         return snd_soc_register_codec(&pdev->dev,
1132                         &soc_codec_dev_twl6040, &twl6040_dai, 1);
1133 }
1134
1135 static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1136 {
1137         snd_soc_unregister_codec(&pdev->dev);
1138         return 0;
1139 }
1140
1141 static struct platform_driver twl6040_codec_driver = {
1142         .driver = {
1143                 .name = "twl6040-codec",
1144                 .owner = THIS_MODULE,
1145         },
1146         .probe = twl6040_codec_probe,
1147         .remove = __devexit_p(twl6040_codec_remove),
1148 };
1149
1150 static int __init twl6040_codec_init(void)
1151 {
1152         return platform_driver_register(&twl6040_codec_driver);
1153 }
1154 module_init(twl6040_codec_init);
1155
1156 static void __exit twl6040_codec_exit(void)
1157 {
1158         platform_driver_unregister(&twl6040_codec_driver);
1159 }
1160 module_exit(twl6040_codec_exit);
1161
1162 MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1163 MODULE_AUTHOR("Misael Lopez Cruz");
1164 MODULE_LICENSE("GPL");