asoc: codecs: rt5640: fix headset power issue
[linux-2.6.git] / sound / soc / codecs / rt5640.c
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 #include "rt5640.h"
28 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
30 #endif
31
32 #define RT5640_DEMO 1
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35 #define RT5639_RESET_ID 0x0008
36
37 #define CHECK_I2C_SHUTDOWN(r, c) { if (r && r->shutdown_complete) { \
38 dev_err(c->dev, "error: i2c state is 'shutdown'\n"); \
39 mutex_unlock(&r->lock); return -ENODEV; } }
40
41 #ifdef RT5640_DEMO
42 struct rt5640_init_reg {
43         u8 reg;
44         u16 val;
45 };
46
47 static struct rt5640_init_reg init_list[] = {
48         {RT5640_DUMMY1          , 0x3701},/*fa[12:13] = 1'b;fa[8~10]=1;fa[0]=1*/
49         {RT5640_DEPOP_M1        , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
50         {RT5640_DEPOP_M2        , 0x3100},/* 8f[13] = 1'b */
51         {RT5640_ADDA_CLK1       , 0x1114},/* 73[2] = 1'b  */
52         {RT5640_MICBIAS         , 0x3030},/* 93[5:4] = 11'b */
53         {RT5640_PRIV_INDEX      , 0x003d},/* PR3d[12] = 1'b */
54         {RT5640_PRIV_DATA       , 0x3600},
55         {RT5640_CLS_D_OUT       , 0xa000},/* 8d[11] = 0'b */
56         {RT5640_PRIV_INDEX      , 0x001c},/* PR1c = 0D21'h */
57         {RT5640_PRIV_DATA       , 0x0D21},
58         {RT5640_PRIV_INDEX      , 0x001b},/* PR1B = 0D21'h */
59         {RT5640_PRIV_DATA       , 0x0000},
60         {RT5640_PRIV_INDEX      , 0x0012},/* PR12 = 0aa8'h */
61         {RT5640_PRIV_DATA       , 0x0aa8},
62         {RT5640_PRIV_INDEX      , 0x0014},/* PR14 = 0aaa'h */
63         {RT5640_PRIV_DATA       , 0x0aaa},
64         {RT5640_PRIV_INDEX      , 0x0020},/* PR20 = 6110'h */
65         {RT5640_PRIV_DATA       , 0x6110},
66         {RT5640_PRIV_INDEX      , 0x0021},/* PR21 = e0e0'h */
67         {RT5640_PRIV_DATA       , 0xe0e0},
68         {RT5640_PRIV_INDEX      , 0x0023},/* PR23 = 1804'h */
69         {RT5640_PRIV_DATA       , 0x1804},
70         /*playback*/
71         {RT5640_STO_DAC_MIXER   , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
72         {RT5640_OUT_L3_MIXER    , 0x01fe},/*DACL1 -> OUTMIXL*/
73         {RT5640_OUT_R3_MIXER    , 0x01fe},/*DACR1 -> OUTMIXR */
74         {RT5640_HP_VOL          , 0x8888},/* OUTMIX -> HPVOL */
75         {RT5640_HPO_MIXER       , 0xc000},/* HPVOL -> HPOLMIX */
76 /*      {RT5640_HPO_MIXER       , 0xa000},// DAC1 -> HPOLMIX   */
77         {RT5640_SPK_L_MIXER     , 0x0036},/* DACL1 -> SPKMIXL */
78         {RT5640_SPK_R_MIXER     , 0x0036},/* DACR1 -> SPKMIXR */
79         {RT5640_SPK_VOL         , 0x8888},/* SPKMIX -> SPKVOL */
80         {RT5640_SPO_L_MIXER     , 0xe800},/* SPKVOLL -> SPOLMIX */
81         {RT5640_SPO_R_MIXER     , 0x2800},/* SPKVOLR -> SPORMIX */
82 /*      {RT5640_SPO_L_MIXER     , 0xb800},//DAC -> SPOLMIX */
83 /*      {RT5640_SPO_R_MIXER     , 0x1800},//DAC -> SPORMIX */
84 /*      {RT5640_I2S1_SDP        , 0xD000},//change IIS1 and IIS2 */
85         /*record*/
86         {RT5640_IN1_IN2         , 0x5080},/*IN1 boost 40db & differential mode*/
87         {RT5640_IN3_IN4         , 0x0500},/*IN2 boost 40db & signal ended mode*/
88         {RT5640_REC_L2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXL */
89         {RT5640_REC_R2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXR */
90 /*      {RT5640_REC_L2_MIXER    , 0x006f},//Mic2 -> RECMIXL */
91 /*      {RT5640_REC_R2_MIXER    , 0x006f},//Mic2 -> RECMIXR */
92         {RT5640_STO_ADC_MIXER   , 0x3020},/* ADC -> Sto ADC mixer */
93
94 #if RT5640_DET_EXT_MIC
95         {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
96         {RT5640_GPIO_CTRL1      , 0x8400},/* set GPIO1 to IRQ */
97         {RT5640_GPIO_CTRL3      , 0x0004},/* set GPIO1 output */
98         {RT5640_IRQ_CTRL2       , 0x8000},/*set MICBIAS short current to IRQ */
99                                         /*( if sticky set regBE : 8800 ) */
100 #endif
101
102 };
103 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
104
105 static int rt5640_reg_init(struct snd_soc_codec *codec)
106 {
107         int i;
108         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
109                 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
110         return 0;
111 }
112 #endif
113
114 static int rt5640_index_sync(struct snd_soc_codec *codec)
115 {
116         int i;
117
118         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
119                 if (RT5640_PRIV_INDEX == init_list[i].reg ||
120                         RT5640_PRIV_DATA == init_list[i].reg)
121                         snd_soc_write(codec, init_list[i].reg,
122                                         init_list[i].val);
123         return 0;
124 }
125
126 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
127         [RT5640_RESET] = 0x000c,
128         [RT5640_SPK_VOL] = 0xc8c8,
129         [RT5640_HP_VOL] = 0xc8c8,
130         [RT5640_OUTPUT] = 0xc8c8,
131         [RT5640_MONO_OUT] = 0x8000,
132         [RT5640_INL_INR_VOL] = 0x0808,
133         [RT5640_DAC1_DIG_VOL] = 0xafaf,
134         [RT5640_DAC2_DIG_VOL] = 0xafaf,
135         [RT5640_ADC_DIG_VOL] = 0x2f2f,
136         [RT5640_ADC_DATA] = 0x2f2f,
137         [RT5640_STO_ADC_MIXER] = 0x7060,
138         [RT5640_MONO_ADC_MIXER] = 0x7070,
139         [RT5640_AD_DA_MIXER] = 0x8080,
140         [RT5640_STO_DAC_MIXER] = 0x5454,
141         [RT5640_MONO_DAC_MIXER] = 0x5454,
142         [RT5640_DIG_MIXER] = 0xaa00,
143         [RT5640_DSP_PATH2] = 0xa000,
144         [RT5640_REC_L2_MIXER] = 0x007f,
145         [RT5640_REC_R2_MIXER] = 0x007f,
146         [RT5640_HPO_MIXER] = 0xe000,
147         [RT5640_SPK_L_MIXER] = 0x003e,
148         [RT5640_SPK_R_MIXER] = 0x003e,
149         [RT5640_SPO_L_MIXER] = 0xf800,
150         [RT5640_SPO_R_MIXER] = 0x3800,
151         [RT5640_SPO_CLSD_RATIO] = 0x0004,
152         [RT5640_MONO_MIXER] = 0xfc00,
153         [RT5640_OUT_L3_MIXER] = 0x01ff,
154         [RT5640_OUT_R3_MIXER] = 0x01ff,
155         [RT5640_LOUT_MIXER] = 0xf000,
156         [RT5640_PWR_ANLG1] = 0x00c0,
157         [RT5640_I2S1_SDP] = 0x8000,
158         [RT5640_I2S2_SDP] = 0x8000,
159         [RT5640_I2S3_SDP] = 0x8000,
160         [RT5640_ADDA_CLK1] = 0x1110,
161         [RT5640_ADDA_CLK2] = 0x0c00,
162         [RT5640_DMIC] = 0x1d00,
163         [RT5640_ASRC_3] = 0x0008,
164         [RT5640_HP_OVCD] = 0x0600,
165         [RT5640_CLS_D_OVCD] = 0x0228,
166         [RT5640_CLS_D_OUT] = 0xa800,
167         [RT5640_DEPOP_M1] = 0x0004,
168         [RT5640_DEPOP_M2] = 0x1100,
169         [RT5640_DEPOP_M3] = 0x0646,
170         [RT5640_CHARGE_PUMP] = 0x0c00,
171         [RT5640_MICBIAS] = 0x3000,
172         [RT5640_EQ_CTRL1] = 0x2080,
173         [RT5640_DRC_AGC_1] = 0x2206,
174         [RT5640_DRC_AGC_2] = 0x1f00,
175         [RT5640_ANC_CTRL1] = 0x034b,
176         [RT5640_ANC_CTRL2] = 0x0066,
177         [RT5640_ANC_CTRL3] = 0x000b,
178         [RT5640_GPIO_CTRL1] = 0x0400,
179         [RT5640_DSP_CTRL3] = 0x2000,
180         [RT5640_BASE_BACK] = 0x0013,
181         [RT5640_MP3_PLUS1] = 0x0680,
182         [RT5640_MP3_PLUS2] = 0x1c17,
183         [RT5640_3D_HP] = 0x8c00,
184         [RT5640_ADJ_HPF] = 0x2a20,
185         [RT5640_HP_CALIB_AMP_DET] = 0x0400,
186         [RT5640_SV_ZCD1] = 0x0809,
187         [RT5640_VENDOR_ID1] = 0x10ec,
188         [RT5640_VENDOR_ID2] = 0x6231,
189 };
190
191 static int rt5640_reset(struct snd_soc_codec *codec)
192 {
193         return snd_soc_write(codec, RT5640_RESET, 0);
194 }
195
196 /**
197  * rt5640_index_write - Write private register.
198  * @codec: SoC audio codec device.
199  * @reg: Private register index.
200  * @value: Private register Data.
201  *
202  * Modify private register for advanced setting. It can be written through
203  * private index (0x6a) and data (0x6c) register.
204  *
205  * Returns 0 for success or negative error code.
206  */
207 static int rt5640_index_write(struct snd_soc_codec *codec,
208                 unsigned int reg, unsigned int value)
209 {
210         int ret;
211
212         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
213         if (ret < 0) {
214                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
215                 goto err;
216         }
217         ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
218         if (ret < 0) {
219                 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
220                 goto err;
221         }
222         return 0;
223
224 err:
225         return ret;
226 }
227
228 /**
229  * rt5640_index_read - Read private register.
230  * @codec: SoC audio codec device.
231  * @reg: Private register index.
232  *
233  * Read advanced setting from private register. It can be read through
234  * private index (0x6a) and data (0x6c) register.
235  *
236  * Returns private register value or negative error code.
237  */
238 static unsigned int rt5640_index_read(
239         struct snd_soc_codec *codec, unsigned int reg)
240 {
241         int ret;
242
243         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
244         if (ret < 0) {
245                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
246                 return ret;
247         }
248         return snd_soc_read(codec, RT5640_PRIV_DATA);
249 }
250
251 /**
252  * rt5640_index_update_bits - update private register bits
253  * @codec: audio codec
254  * @reg: Private register index.
255  * @mask: register mask
256  * @value: new value
257  *
258  * Writes new register value.
259  *
260  * Returns 1 for change, 0 for no change, or negative error code.
261  */
262 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
263         unsigned int reg, unsigned int mask, unsigned int value)
264 {
265         unsigned int old, new;
266         int change, ret;
267
268         ret = rt5640_index_read(codec, reg);
269         if (ret < 0) {
270                 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
271                 goto err;
272         }
273
274         old = ret;
275         new = (old & ~mask) | (value & mask);
276         change = old != new;
277         if (change) {
278                 ret = rt5640_index_write(codec, reg, new);
279                 if (ret < 0) {
280                         dev_err(codec->dev,
281                                 "Failed to write private reg: %d\n", ret);
282                         goto err;
283                 }
284         }
285         return change;
286
287 err:
288         return ret;
289 }
290
291 static int rt5640_volatile_register(
292         struct snd_soc_codec *codec, unsigned int reg)
293 {
294         switch (reg) {
295         case RT5640_RESET:
296         case RT5640_PRIV_DATA:
297         case RT5640_ASRC_5:
298         case RT5640_EQ_CTRL1:
299         case RT5640_DRC_AGC_1:
300         case RT5640_ANC_CTRL1:
301         case RT5640_IRQ_CTRL2:
302         case RT5640_INT_IRQ_ST:
303         case RT5640_DSP_CTRL2:
304         case RT5640_DSP_CTRL3:
305         case RT5640_PGM_REG_ARR1:
306         case RT5640_PGM_REG_ARR3:
307                 return 1;
308         default:
309                 return 0;
310         }
311 }
312
313 static int rt5640_readable_register(
314         struct snd_soc_codec *codec, unsigned int reg)
315 {
316         switch (reg) {
317         case RT5640_RESET:
318         case RT5640_SPK_VOL:
319         case RT5640_HP_VOL:
320         case RT5640_OUTPUT:
321         case RT5640_MONO_OUT:
322         case RT5640_IN1_IN2:
323         case RT5640_IN3_IN4:
324         case RT5640_INL_INR_VOL:
325         case RT5640_DAC1_DIG_VOL:
326         case RT5640_DAC2_DIG_VOL:
327         case RT5640_DAC2_CTRL:
328         case RT5640_ADC_DIG_VOL:
329         case RT5640_ADC_DATA:
330         case RT5640_ADC_BST_VOL:
331         case RT5640_STO_ADC_MIXER:
332         case RT5640_MONO_ADC_MIXER:
333         case RT5640_AD_DA_MIXER:
334         case RT5640_STO_DAC_MIXER:
335         case RT5640_MONO_DAC_MIXER:
336         case RT5640_DIG_MIXER:
337         case RT5640_DSP_PATH1:
338         case RT5640_DSP_PATH2:
339         case RT5640_DIG_INF_DATA:
340         case RT5640_REC_L1_MIXER:
341         case RT5640_REC_L2_MIXER:
342         case RT5640_REC_R1_MIXER:
343         case RT5640_REC_R2_MIXER:
344         case RT5640_HPO_MIXER:
345         case RT5640_SPK_L_MIXER:
346         case RT5640_SPK_R_MIXER:
347         case RT5640_SPO_L_MIXER:
348         case RT5640_SPO_R_MIXER:
349         case RT5640_SPO_CLSD_RATIO:
350         case RT5640_MONO_MIXER:
351         case RT5640_OUT_L1_MIXER:
352         case RT5640_OUT_L2_MIXER:
353         case RT5640_OUT_L3_MIXER:
354         case RT5640_OUT_R1_MIXER:
355         case RT5640_OUT_R2_MIXER:
356         case RT5640_OUT_R3_MIXER:
357         case RT5640_LOUT_MIXER:
358         case RT5640_PWR_DIG1:
359         case RT5640_PWR_DIG2:
360         case RT5640_PWR_ANLG1:
361         case RT5640_PWR_ANLG2:
362         case RT5640_PWR_MIXER:
363         case RT5640_PWR_VOL:
364         case RT5640_PRIV_INDEX:
365         case RT5640_PRIV_DATA:
366         case RT5640_I2S1_SDP:
367         case RT5640_I2S2_SDP:
368         case RT5640_I2S3_SDP:
369         case RT5640_ADDA_CLK1:
370         case RT5640_ADDA_CLK2:
371         case RT5640_DMIC:
372         case RT5640_GLB_CLK:
373         case RT5640_PLL_CTRL1:
374         case RT5640_PLL_CTRL2:
375         case RT5640_ASRC_1:
376         case RT5640_ASRC_2:
377         case RT5640_ASRC_3:
378         case RT5640_ASRC_4:
379         case RT5640_ASRC_5:
380         case RT5640_HP_OVCD:
381         case RT5640_CLS_D_OVCD:
382         case RT5640_CLS_D_OUT:
383         case RT5640_DEPOP_M1:
384         case RT5640_DEPOP_M2:
385         case RT5640_DEPOP_M3:
386         case RT5640_CHARGE_PUMP:
387         case RT5640_PV_DET_SPK_G:
388         case RT5640_MICBIAS:
389         case RT5640_EQ_CTRL1:
390         case RT5640_EQ_CTRL2:
391         case RT5640_WIND_FILTER:
392         case RT5640_DRC_AGC_1:
393         case RT5640_DRC_AGC_2:
394         case RT5640_DRC_AGC_3:
395         case RT5640_SVOL_ZC:
396         case RT5640_ANC_CTRL1:
397         case RT5640_ANC_CTRL2:
398         case RT5640_ANC_CTRL3:
399         case RT5640_JD_CTRL:
400         case RT5640_ANC_JD:
401         case RT5640_IRQ_CTRL1:
402         case RT5640_IRQ_CTRL2:
403         case RT5640_INT_IRQ_ST:
404         case RT5640_GPIO_CTRL1:
405         case RT5640_GPIO_CTRL2:
406         case RT5640_GPIO_CTRL3:
407         case RT5640_DSP_CTRL1:
408         case RT5640_DSP_CTRL2:
409         case RT5640_DSP_CTRL3:
410         case RT5640_DSP_CTRL4:
411         case RT5640_PGM_REG_ARR1:
412         case RT5640_PGM_REG_ARR2:
413         case RT5640_PGM_REG_ARR3:
414         case RT5640_PGM_REG_ARR4:
415         case RT5640_PGM_REG_ARR5:
416         case RT5640_SCB_FUNC:
417         case RT5640_SCB_CTRL:
418         case RT5640_BASE_BACK:
419         case RT5640_MP3_PLUS1:
420         case RT5640_MP3_PLUS2:
421         case RT5640_3D_HP:
422         case RT5640_ADJ_HPF:
423         case RT5640_HP_CALIB_AMP_DET:
424         case RT5640_HP_CALIB2:
425         case RT5640_SV_ZCD1:
426         case RT5640_SV_ZCD2:
427         case RT5640_DUMMY1:
428         case RT5640_DUMMY2:
429         case RT5640_DUMMY3:
430         case RT5640_VENDOR_ID:
431         case RT5640_VENDOR_ID1:
432         case RT5640_VENDOR_ID2:
433                 return 1;
434         default:
435                 return 0;
436         }
437 }
438
439 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
440 {
441         int jack_type;
442         int sclk_src;
443         int reg63, reg64;
444         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
445         mutex_lock(&rt5640->lock);
446         CHECK_I2C_SHUTDOWN(rt5640, codec)
447
448         if (jack_insert) {
449                 reg63 = snd_soc_read(codec, RT5640_PWR_ANLG1);
450                 reg64 = snd_soc_read(codec, RT5640_PWR_ANLG2);
451                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
452                         snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
453                         snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
454                         snd_soc_write(codec, RT5640_DUMMY1 , 0x3701);
455                 }
456                 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
457                         RT5640_SCLK_SRC_MASK;
458                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
459                         RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
460                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
461                         RT5640_PWR_LDO2, RT5640_PWR_LDO2);
462                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
463                         RT5640_PWR_MB1, RT5640_PWR_MB1);
464                 snd_soc_update_bits(codec, RT5640_MICBIAS,
465                         RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
466                         RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
467                         RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
468                         RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
469                 snd_soc_update_bits(codec, RT5640_DUMMY1,
470                         0x1, 0x1);
471                 msleep(150);
472                 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
473                         jack_type = RT5640_HEADPHO_DET;
474                 else
475                         jack_type = RT5640_HEADSET_DET;
476                 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
477                         RT5640_MB1_OC_CLR, 0);
478                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
479                         RT5640_SCLK_SRC_MASK, sclk_src);
480                 snd_soc_write(codec, RT5640_PWR_ANLG1, reg63);
481                 snd_soc_write(codec, RT5640_PWR_ANLG2, reg64);
482         } else {
483                 snd_soc_update_bits(codec, RT5640_MICBIAS,
484                         RT5640_MIC1_OVCD_MASK,
485                         RT5640_MIC1_OVCD_DIS);
486
487                 jack_type = RT5640_NO_JACK;
488         }
489
490         mutex_unlock(&rt5640->lock);
491         return jack_type;
492 }
493 EXPORT_SYMBOL(rt5640_headset_detect);
494
495 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
496 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
497 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
498 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
499 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
500
501 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
502 static unsigned int bst_tlv[] = {
503         TLV_DB_RANGE_HEAD(7),
504         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
505         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
506         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
507         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
508         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
509         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
510         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
511 };
512
513 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
514                 struct snd_ctl_elem_value *ucontrol)
515 {
516         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
517         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
518
519         ucontrol->value.integer.value[0] = rt5640->dmic_en;
520
521         return 0;
522 }
523
524 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
525                 struct snd_ctl_elem_value *ucontrol)
526 {
527         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
528         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
529         mutex_lock(&rt5640->lock);
530         CHECK_I2C_SHUTDOWN(rt5640, codec)
531
532         if (rt5640->dmic_en == ucontrol->value.integer.value[0]) {
533                 mutex_unlock(&rt5640->lock);
534                 return 0;
535         }
536
537         rt5640->dmic_en = ucontrol->value.integer.value[0];
538         switch (rt5640->dmic_en) {
539         case RT5640_DMIC_DIS:
540                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
541                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
542                         RT5640_GP4_PIN_MASK,
543                         RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
544                         RT5640_GP4_PIN_GPIO4);
545                 snd_soc_update_bits(codec, RT5640_DMIC,
546                         RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
547                         RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
548                 snd_soc_update_bits(codec, RT5640_DMIC,
549                         RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
550                         RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
551                 break;
552
553         case RT5640_DMIC1:
554                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
555                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
556                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
557                 snd_soc_update_bits(codec, RT5640_DMIC,
558                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
559                         RT5640_DMIC_1_DP_MASK,
560                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
561                         RT5640_DMIC_1_DP_IN1P);
562                 snd_soc_update_bits(codec, RT5640_DMIC,
563                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
564                 break;
565
566         case RT5640_DMIC2:
567                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
568                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
569                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
570                 snd_soc_update_bits(codec, RT5640_DMIC,
571                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
572                         RT5640_DMIC_2_DP_MASK,
573                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
574                         RT5640_DMIC_2_DP_IN1N);
575                 snd_soc_update_bits(codec, RT5640_DMIC,
576                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
577                 break;
578
579         default:
580                 mutex_unlock(&rt5640->lock);
581                 return -EINVAL;
582         }
583
584         mutex_unlock(&rt5640->lock);
585         return 0;
586 }
587
588
589 /* IN1/IN2 Input Type */
590 static const char *rt5640_input_mode[] = {
591         "Single ended", "Differential"};
592
593 static const SOC_ENUM_SINGLE_DECL(
594         rt5640_in1_mode_enum, RT5640_IN1_IN2,
595         RT5640_IN_SFT1, rt5640_input_mode);
596
597 static const SOC_ENUM_SINGLE_DECL(
598         rt5640_in2_mode_enum, RT5640_IN3_IN4,
599         RT5640_IN_SFT2, rt5640_input_mode);
600
601 /* Interface data select */
602 static const char *rt5640_data_select[] = {
603         "Normal", "left copy to right", "right copy to left", "Swap"};
604
605 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
606                                 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
607
608 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
609                                 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
610
611 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
612                                 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
613
614 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
615                                 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
616
617 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
618                                 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
619
620 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
621                                 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
622
623 /* Class D speaker gain ratio */
624 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
625         "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
626
627 static const SOC_ENUM_SINGLE_DECL(
628         rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
629         RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
630
631 /* DMIC */
632 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
633
634 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
635
636
637
638 #ifdef RT5640_REG_RW
639 #define REGVAL_MAX 0xffff
640 static unsigned int regctl_addr;
641 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
642                         struct snd_ctl_elem_info *uinfo) {
643         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
644         uinfo->count = 2;
645         uinfo->value.integer.min = 0;
646         uinfo->value.integer.max = REGVAL_MAX;
647         return 0;
648 }
649
650 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
651                         struct snd_ctl_elem_value *ucontrol)
652 {
653         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
654         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
655         mutex_lock(&rt5640->lock);
656         CHECK_I2C_SHUTDOWN(rt5640, codec)
657
658         ucontrol->value.integer.value[0] = regctl_addr;
659         ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
660         mutex_unlock(&rt5640->lock);
661         return 0;
662 }
663
664 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
665                         struct snd_ctl_elem_value *ucontrol)
666 {
667         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
668         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
669         mutex_lock(&rt5640->lock);
670         CHECK_I2C_SHUTDOWN(rt5640, codec)
671
672         regctl_addr = ucontrol->value.integer.value[0];
673         if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
674                 snd_soc_write(codec, regctl_addr,
675                 ucontrol->value.integer.value[1]);
676         mutex_unlock(&rt5640->lock);
677         return 0;
678 }
679 #endif
680
681
682 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
683 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
684
685 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
686                 struct snd_ctl_elem_value *ucontrol)
687 {
688         struct soc_mixer_control *mc =
689                 (struct soc_mixer_control *)kcontrol->private_value;
690         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
691         unsigned int val;
692         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
693         mutex_lock(&rt5640->lock);
694         CHECK_I2C_SHUTDOWN(rt5640, codec)
695         val = snd_soc_read(codec, mc->reg);
696
697         ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
698                 ((val & RT5640_L_VOL_MASK) >> mc->shift);
699         ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
700                 (val & RT5640_R_VOL_MASK);
701
702         mutex_unlock(&rt5640->lock);
703         return 0;
704 }
705
706 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
707                 struct snd_ctl_elem_value *ucontrol)
708 {
709         struct soc_mixer_control *mc =
710                 (struct soc_mixer_control *)kcontrol->private_value;
711         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
712         unsigned int val, val2;
713         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
714         int ret;
715         mutex_lock(&rt5640->lock);
716         CHECK_I2C_SHUTDOWN(rt5640, codec)
717
718         val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
719         val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
720         ret = snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
721                         RT5640_R_VOL_MASK, val << mc->shift | val2);
722         mutex_unlock(&rt5640->lock);
723         return ret;
724 }
725
726
727 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
728         /* Speaker Output Volume */
729         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
730                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
731                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
732
733         /* Headphone Output Volume */
734         SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
735                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
736
737         SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
738                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
739                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
740
741         /* OUTPUT Control */
742         SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
743                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
744         SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
745                 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
746         SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
747                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
748         /* MONO Output Control */
749         SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
750                                 RT5640_L_MUTE_SFT, 1, 1),
751         /* DAC Digital Volume */
752         SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
753                 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
754         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
755                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
756                         175, 0, dac_vol_tlv),
757         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
758                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
759                         175, 0, dac_vol_tlv),
760         /* IN1/IN2 Control */
761         SOC_ENUM("IN1 Mode Control",  rt5640_in1_mode_enum),
762         SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
763                 RT5640_BST_SFT1, 8, 0, bst_tlv),
764         SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
765         SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
766                 RT5640_BST_SFT2, 8, 0, bst_tlv),
767         /* INL/INR Volume Control */
768         SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
769                         RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
770                         31, 1, in_vol_tlv),
771         /* ADC Digital Volume Control */
772         SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
773                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
774         SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
775                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
776                         127, 0, adc_vol_tlv),
777         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
778                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
779                         127, 0, adc_vol_tlv),
780         /* ADC Boost Volume Control */
781         SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
782                         RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
783                         3, 0, adc_bst_tlv),
784         /* Class D speaker gain ratio */
785         SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
786         /* DMIC */
787         SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
788                 rt5640_dmic_get, rt5640_dmic_put),
789
790 #ifdef RT5640_REG_RW
791         {
792                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
793                 .name = "Register Control",
794                 .info = rt5640_regctl_info,
795                 .get = rt5640_regctl_get,
796                 .put = rt5640_regctl_put,
797         },
798 #endif
799 };
800
801 /**
802  * set_dmic_clk - Set parameter of dmic.
803  *
804  * @w: DAPM widget.
805  * @kcontrol: The kcontrol of this widget.
806  * @event: Event id.
807  *
808  * Choose dmic clock between 1MHz and 3MHz.
809  * It is better for clock to approximate 3MHz.
810  */
811 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
812         struct snd_kcontrol *kcontrol, int event)
813 {
814         struct snd_soc_codec *codec = w->codec;
815         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
816         int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
817         mutex_lock(&rt5640->lock);
818         CHECK_I2C_SHUTDOWN(rt5640, codec)
819
820         rate = rt5640->lrck[rt5640->aif_pu] << 8;
821         red = 3000000 * 12;
822         for (i = 0; i < ARRAY_SIZE(div); i++) {
823                 bound = div[i] * 3000000;
824                 if (rate > bound)
825                         continue;
826                 temp = bound - rate;
827                 if (temp < red) {
828                         red = temp;
829                         idx = i;
830                 }
831         }
832         if (idx < 0)
833                 dev_err(codec->dev, "Failed to set DMIC clock\n");
834         else
835                 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
836                                         idx << RT5640_DMIC_CLK_SFT);
837         mutex_unlock(&rt5640->lock);
838         return idx;
839 }
840
841 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
842                          struct snd_soc_dapm_widget *sink)
843 {
844         unsigned int val;
845         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(source->codec);
846         mutex_lock(&rt5640->lock);
847         CHECK_I2C_SHUTDOWN(rt5640, source->codec)
848
849         val = snd_soc_read(source->codec, RT5640_GLB_CLK);
850         val &= RT5640_SCLK_SRC_MASK;
851         mutex_unlock(&rt5640->lock);
852         if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
853                 return 1;
854         else
855                 return 0;
856 }
857
858 /* Digital Mixer */
859 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
860         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
861                         RT5640_M_ADC_L1_SFT, 1, 1),
862         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
863                         RT5640_M_ADC_L2_SFT, 1, 1),
864 };
865
866 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
867         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
868                         RT5640_M_ADC_R1_SFT, 1, 1),
869         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
870                         RT5640_M_ADC_R2_SFT, 1, 1),
871 };
872
873 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
874         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
875                         RT5640_M_MONO_ADC_L1_SFT, 1, 1),
876         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
877                         RT5640_M_MONO_ADC_L2_SFT, 1, 1),
878 };
879
880 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
881         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
882                         RT5640_M_MONO_ADC_R1_SFT, 1, 1),
883         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
884                         RT5640_M_MONO_ADC_R2_SFT, 1, 1),
885 };
886
887 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
888         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
889                         RT5640_M_ADCMIX_L_SFT, 1, 1),
890         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
891                         RT5640_M_IF1_DAC_L_SFT, 1, 1),
892 };
893
894 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
895         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
896                         RT5640_M_ADCMIX_R_SFT, 1, 1),
897         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
898                         RT5640_M_IF1_DAC_R_SFT, 1, 1),
899 };
900
901 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
902         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
903                         RT5640_M_DAC_L1_SFT, 1, 1),
904         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
905                         RT5640_M_DAC_L2_SFT, 1, 1),
906         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
907                         RT5640_M_ANC_DAC_L_SFT, 1, 1),
908 };
909
910 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
911         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
912                         RT5640_M_DAC_R1_SFT, 1, 1),
913         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
914                         RT5640_M_DAC_R2_SFT, 1, 1),
915         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
916                         RT5640_M_ANC_DAC_R_SFT, 1, 1),
917 };
918
919 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
920         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
921                         RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
922         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
923                         RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
924         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
925                         RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
926 };
927
928 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
929         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
930                         RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
931         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
932                         RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
933         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
934                         RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
935 };
936
937 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
938         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
939                         RT5640_M_STO_L_DAC_L_SFT, 1, 1),
940         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
941                         RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
942 };
943
944 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
945         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
946                         RT5640_M_STO_R_DAC_R_SFT, 1, 1),
947         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
948                         RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
949 };
950
951 /* Analog Input Mixer */
952 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
953         SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
954                         RT5640_M_HP_L_RM_L_SFT, 1, 1),
955         SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
956                         RT5640_M_IN_L_RM_L_SFT, 1, 1),
957         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
958                         RT5640_M_BST4_RM_L_SFT, 1, 1),
959         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
960                         RT5640_M_BST1_RM_L_SFT, 1, 1),
961         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
962                         RT5640_M_OM_L_RM_L_SFT, 1, 1),
963 };
964
965 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
966         SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
967                         RT5640_M_HP_R_RM_R_SFT, 1, 1),
968         SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
969                         RT5640_M_IN_R_RM_R_SFT, 1, 1),
970         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
971                         RT5640_M_BST4_RM_R_SFT, 1, 1),
972         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
973                         RT5640_M_BST1_RM_R_SFT, 1, 1),
974         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
975                         RT5640_M_OM_R_RM_R_SFT, 1, 1),
976 };
977
978 /* Analog Output Mixer */
979 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
980         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
981                         RT5640_M_RM_L_SM_L_SFT, 1, 1),
982         SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
983                         RT5640_M_IN_L_SM_L_SFT, 1, 1),
984         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
985                         RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
986         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
987                         RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
988         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
989                         RT5640_M_OM_L_SM_L_SFT, 1, 1),
990 };
991
992 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
993         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
994                         RT5640_M_RM_R_SM_R_SFT, 1, 1),
995         SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
996                         RT5640_M_IN_R_SM_R_SFT, 1, 1),
997         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
998                         RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
999         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
1000                         RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
1001         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
1002                         RT5640_M_OM_R_SM_R_SFT, 1, 1),
1003 };
1004
1005 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
1006         SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
1007                         RT5640_M_SM_L_OM_L_SFT, 1, 1),
1008         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
1009                         RT5640_M_BST1_OM_L_SFT, 1, 1),
1010         SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
1011                         RT5640_M_IN_L_OM_L_SFT, 1, 1),
1012         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
1013                         RT5640_M_RM_L_OM_L_SFT, 1, 1),
1014         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
1015                         RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
1016         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
1017                         RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
1018         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
1019                         RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
1020 };
1021
1022 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
1023         SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
1024                         RT5640_M_SM_L_OM_R_SFT, 1, 1),
1025         SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
1026                         RT5640_M_BST4_OM_R_SFT, 1, 1),
1027         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
1028                         RT5640_M_BST1_OM_R_SFT, 1, 1),
1029         SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
1030                         RT5640_M_IN_R_OM_R_SFT, 1, 1),
1031         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
1032                         RT5640_M_RM_R_OM_R_SFT, 1, 1),
1033         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
1034                         RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
1035         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
1036                         RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
1037         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
1038                         RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
1039 };
1040
1041 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
1042         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
1043                         RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
1044         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
1045                         RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
1046         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
1047                         RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1048         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1049                         RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1050         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1051                         RT5640_M_BST1_SPM_L_SFT, 1, 1),
1052 };
1053
1054 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1055         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1056                         RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1057         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1058                         RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1059         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1060                         RT5640_M_BST1_SPM_R_SFT, 1, 1),
1061 };
1062
1063 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1064         SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1065                         RT5640_M_DAC2_HM_SFT, 1, 1),
1066         SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1067                         RT5640_M_DAC1_HM_SFT, 1, 1),
1068         SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1069                         RT5640_M_HPVOL_HM_SFT, 1, 1),
1070 };
1071
1072 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1073         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1074                         RT5640_M_DAC_L1_LM_SFT, 1, 1),
1075         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1076                         RT5640_M_DAC_R1_LM_SFT, 1, 1),
1077         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1078                         RT5640_M_OV_L_LM_SFT, 1, 1),
1079         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1080                         RT5640_M_OV_R_LM_SFT, 1, 1),
1081 };
1082
1083 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1084         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1085                         RT5640_M_DAC_R2_MM_SFT, 1, 1),
1086         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1087                         RT5640_M_DAC_L2_MM_SFT, 1, 1),
1088         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1089                         RT5640_M_OV_R_MM_SFT, 1, 1),
1090         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1091                         RT5640_M_OV_L_MM_SFT, 1, 1),
1092         SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1093                         RT5640_M_BST1_MM_SFT, 1, 1),
1094 };
1095
1096 /* INL/R source */
1097 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1098
1099 static const SOC_ENUM_SINGLE_DECL(
1100         rt5640_inl_enum, RT5640_INL_INR_VOL,
1101         RT5640_INL_SEL_SFT, rt5640_inl_src);
1102
1103 static const struct snd_kcontrol_new rt5640_inl_mux =
1104         SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1105
1106 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1107
1108 static const SOC_ENUM_SINGLE_DECL(
1109         rt5640_inr_enum, RT5640_INL_INR_VOL,
1110         RT5640_INR_SEL_SFT, rt5640_inr_src);
1111
1112 static const struct snd_kcontrol_new rt5640_inr_mux =
1113         SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1114
1115 /* Stereo ADC source */
1116 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1117
1118 static const SOC_ENUM_SINGLE_DECL(
1119         rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1120         RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1121
1122 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1123         SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1124
1125 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1126         SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1127
1128 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1129
1130 static const SOC_ENUM_SINGLE_DECL(
1131         rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1132         RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1133
1134 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1135         SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1136
1137 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1138         SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1139
1140 /* Mono ADC source */
1141 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1142
1143 static const SOC_ENUM_SINGLE_DECL(
1144         rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1145         RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1146
1147 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1148         SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1149
1150 static const char *rt5640_mono_adc_l2_src[] = {
1151         "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1152 };
1153
1154 static const SOC_ENUM_SINGLE_DECL(
1155         rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1156         RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1157
1158 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1159         SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1160
1161 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1162
1163 static const SOC_ENUM_SINGLE_DECL(
1164         rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1165         RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1166
1167 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1168         SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1169
1170 static const char *rt5640_mono_adc_r2_src[] = {
1171         "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1172 };
1173
1174 static const SOC_ENUM_SINGLE_DECL(
1175         rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1176         RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1177
1178 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1179         SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1180
1181 /* DAC2 channel source */
1182 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1183
1184 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1185                                 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1186
1187 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1188         SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1189
1190 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1191
1192 static const SOC_ENUM_SINGLE_DECL(
1193         rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1194         RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1195
1196 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1197         SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1198
1199 /* Interface 2  ADC channel source */
1200 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1201
1202 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1203                         RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1204
1205 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1206         SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1207
1208 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1209
1210 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1211                         RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1212
1213 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1214         SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1215
1216 /* digital interface and iis interface map */
1217 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1218         "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1219         "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1220
1221 static const SOC_ENUM_SINGLE_DECL(
1222         rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1223         RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1224
1225 static const struct snd_kcontrol_new rt5640_dai_mux =
1226         SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1227
1228 /* SDI select */
1229 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1230
1231 static const SOC_ENUM_SINGLE_DECL(
1232         rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1233         RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1234
1235 static const struct snd_kcontrol_new rt5640_sdi_mux =
1236         SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1237
1238 static int spk_event(struct snd_soc_dapm_widget *w,
1239         struct snd_kcontrol *kcontrol, int event)
1240 {
1241         struct snd_soc_codec *codec = w->codec;
1242         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1243         mutex_lock(&rt5640->lock);
1244         CHECK_I2C_SHUTDOWN(rt5640, codec)
1245
1246         switch (event) {
1247         case SND_SOC_DAPM_POST_PMU:
1248                 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1249                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1250                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1251                 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1252                 break;
1253
1254         case SND_SOC_DAPM_PRE_PMD:
1255                 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1256                 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1257                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1258                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1259                 break;
1260
1261         default:
1262                 mutex_unlock(&rt5640->lock);
1263                 return 0;
1264         }
1265         mutex_unlock(&rt5640->lock);
1266         return 0;
1267 }
1268
1269 static int hp_event(struct snd_soc_dapm_widget *w,
1270         struct snd_kcontrol *kcontrol, int event)
1271 {
1272         switch (event) {
1273         case SND_SOC_DAPM_POST_PMU:
1274                 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1275                 break;
1276
1277         case SND_SOC_DAPM_PRE_PMD:
1278                 pr_info("hp_event --SND_SOC_DAPM_POST_PMD\n");
1279                 break;
1280
1281         default:
1282                 return 0;
1283         }
1284         return 0;
1285 }
1286
1287 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
1288         struct snd_kcontrol *kcontrol, int event)
1289 {
1290         struct snd_soc_codec *codec = w->codec;
1291         unsigned int val, mask;
1292         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1293         mutex_lock(&rt5640->lock);
1294         CHECK_I2C_SHUTDOWN(rt5640, codec)
1295
1296         switch (event) {
1297         case SND_SOC_DAPM_PRE_PMU:
1298                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1299                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
1300                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
1301                 snd_soc_update_bits(codec, RT5640_DMIC,
1302                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
1303                         RT5640_DMIC_1_DP_MASK,
1304                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
1305                         RT5640_DMIC_1_DP_IN1P);
1306                 snd_soc_update_bits(codec, RT5640_DMIC,
1307                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
1308         default:
1309                 mutex_unlock(&rt5640->lock);
1310                 return 0;
1311         }
1312
1313         mutex_unlock(&rt5640->lock);
1314         return 0;
1315 }
1316
1317 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
1318         struct snd_kcontrol *kcontrol, int event)
1319 {
1320         struct snd_soc_codec *codec = w->codec;
1321         unsigned int val, mask;
1322         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1323         mutex_lock(&rt5640->lock);
1324         CHECK_I2C_SHUTDOWN(rt5640, codec)
1325
1326         switch (event) {
1327         case SND_SOC_DAPM_PRE_PMU:
1328                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1329                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
1330                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
1331                 snd_soc_update_bits(codec, RT5640_DMIC,
1332                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
1333                         RT5640_DMIC_2_DP_MASK,
1334                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
1335                         RT5640_DMIC_2_DP_IN1N);
1336                 snd_soc_update_bits(codec, RT5640_DMIC,
1337                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
1338         default:
1339                 mutex_unlock(&rt5640->lock);
1340                 return 0;
1341         }
1342
1343         mutex_unlock(&rt5640->lock);
1344         return 0;
1345 }
1346
1347 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1348         SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1349                         RT5640_PWR_PLL_BIT, 0, NULL, 0),
1350         /* Input Side */
1351         /* micbias */
1352         SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1353                         RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1354         SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1355                         RT5640_PWR_MB1_BIT, 0),
1356         SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1357                         RT5640_PWR_MB2_BIT, 0),
1358         /* Input Lines */
1359
1360         SND_SOC_DAPM_INPUT("MIC1"),
1361         SND_SOC_DAPM_INPUT("MIC2"),
1362         SND_SOC_DAPM_INPUT("DMIC1"),
1363         SND_SOC_DAPM_INPUT("DMIC2"),
1364         SND_SOC_DAPM_INPUT("IN1P"),
1365         SND_SOC_DAPM_INPUT("IN1N"),
1366         SND_SOC_DAPM_INPUT("IN2P"),
1367         SND_SOC_DAPM_INPUT("IN2N"),
1368 #if 0
1369         SND_SOC_DAPM_INPUT("DMIC L1"),
1370         SND_SOC_DAPM_INPUT("DMIC R1"),
1371         SND_SOC_DAPM_INPUT("DMIC L2"),
1372         SND_SOC_DAPM_INPUT("DMIC R2"),
1373 #else
1374         SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
1375                 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1376         SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1377         SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
1378                 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1379         SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1380 #endif
1381         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1382                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1383         /* Boost */
1384         SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1385                 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1386         SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1387                 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1388         /* Input Volume */
1389         SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1390                 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1391         SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1392                 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1393         /* IN Mux */
1394         SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1395         SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1396         /* REC Mixer */
1397         SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1398                         rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1399         SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1400                         rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1401         /* ADCs */
1402         SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1403                         RT5640_PWR_ADC_L_BIT, 0),
1404         SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1405                         RT5640_PWR_ADC_R_BIT, 0),
1406         /* ADC Mux */
1407         SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1408                                 &rt5640_sto_adc_l2_mux),
1409         SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1410                                 &rt5640_sto_adc_r2_mux),
1411         SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1412                                 &rt5640_sto_adc_l1_mux),
1413         SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1414                                 &rt5640_sto_adc_r1_mux),
1415         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1416                                 &rt5640_mono_adc_l2_mux),
1417         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1418                                 &rt5640_mono_adc_l1_mux),
1419         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1420                                 &rt5640_mono_adc_r1_mux),
1421         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1422                                 &rt5640_mono_adc_r2_mux),
1423         /* ADC Mixer */
1424         SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1425                 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1426         SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1427                 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1428         SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1429                 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1430         SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1431                 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1432         SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1433                 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1434         SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1435                 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1436         SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1437                 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1438
1439         /* IF2 Mux */
1440         SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1441                                 &rt5640_if2_adc_l_mux),
1442         SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1443                                 &rt5640_if2_adc_r_mux),
1444
1445         /* Digital Interface */
1446         SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1447                 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1448         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1449         SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1450         SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1451         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1452         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1453         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1454         SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1455                 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1456         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1457         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1458         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1459         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1460         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1461         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1462         SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1463                 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1464         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1465         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1466         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1467         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1468         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1469         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1470
1471         /* Digital Interface Select */
1472         SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1473         SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1474         SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1475         SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1476         SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1477
1478         SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1479         SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1480         SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1481         SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1482         SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1483
1484         SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1485         SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1486
1487         /* Audio Interface */
1488         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1489         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1490         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1491         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1492         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1493         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1494
1495         /* Audio DSP */
1496         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1497
1498         /* ANC */
1499         SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1500
1501         /* Output Side */
1502         /* DAC mixer before sound effect  */
1503         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1504                 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1505         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1506                 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1507
1508         /* DAC2 channel Mux */
1509         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1510                                 &rt5640_dac_l2_mux),
1511         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1512                                 &rt5640_dac_r2_mux),
1513
1514         /* DAC Mixer */
1515         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1516                 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1517         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1518                 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1519         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1520                 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1521         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1522                 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1523         SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1524                 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1525         SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1526                 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1527         /* DACs */
1528         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1529                         RT5640_PWR_DAC_L1_BIT, 0),
1530         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1531                         RT5640_PWR_DAC_L2_BIT, 0),
1532         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1533                         RT5640_PWR_DAC_R1_BIT, 0),
1534         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1535                         RT5640_PWR_DAC_R2_BIT, 0),
1536         /* SPK/OUT Mixer */
1537         SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1538                 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1539         SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1540                 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1541         SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1542                 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1543         SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1544                 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1545         /* Ouput Volume */
1546         SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1547                 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1548         SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1549                 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1550         SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1551                 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1552         SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1553                 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1554         SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1555                 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1556         SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1557                 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1558         /* SPO/HPO/LOUT/Mono Mixer */
1559         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1560                 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1561         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1562                 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1563
1564         SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1565                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1566         SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1567                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1568         SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1569                 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1570         SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1571                 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1572
1573         SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1574                 RT5640_PWR_MA_BIT, 0, NULL, 0),
1575
1576         SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1577         SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1578                                         SND_SOC_DAPM_POST_PMU),
1579
1580         SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1581                 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1582
1583         SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1584                 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1585
1586         SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1587                 SND_SOC_NOPM, 0, spk_event,
1588                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1589
1590         /* Output Lines */
1591         SND_SOC_DAPM_OUTPUT("SPOLP"),
1592         SND_SOC_DAPM_OUTPUT("SPOLN"),
1593         SND_SOC_DAPM_OUTPUT("SPORP"),
1594         SND_SOC_DAPM_OUTPUT("SPORN"),
1595         SND_SOC_DAPM_OUTPUT("HPOL"),
1596         SND_SOC_DAPM_OUTPUT("HPOR"),
1597         SND_SOC_DAPM_OUTPUT("LOUTL"),
1598         SND_SOC_DAPM_OUTPUT("LOUTR"),
1599         SND_SOC_DAPM_OUTPUT("MonoP"),
1600         SND_SOC_DAPM_OUTPUT("MonoN"),
1601 };
1602
1603 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1604         {"IN1P", NULL, "LDO2"},
1605         {"IN2P", NULL, "LDO2"},
1606
1607         {"IN1P", NULL, "MIC1"},
1608         {"IN1N", NULL, "MIC1"},
1609         {"IN2P", NULL, "MIC2"},
1610         {"IN2N", NULL, "MIC2"},
1611
1612         {"DMIC L1", NULL, "DMIC1"},
1613         {"DMIC R1", NULL, "DMIC1"},
1614         {"DMIC L2", NULL, "DMIC2"},
1615         {"DMIC R2", NULL, "DMIC2"},
1616
1617         {"BST1", NULL, "IN1P"},
1618         {"BST1", NULL, "IN1N"},
1619         {"BST2", NULL, "IN2P"},
1620         {"BST2", NULL, "IN2N"},
1621
1622         {"INL VOL", NULL, "IN2P"},
1623         {"INR VOL", NULL, "IN2N"},
1624
1625         {"RECMIXL", "HPOL Switch", "HPOL"},
1626         {"RECMIXL", "INL Switch", "INL VOL"},
1627         {"RECMIXL", "BST2 Switch", "BST2"},
1628         {"RECMIXL", "BST1 Switch", "BST1"},
1629         {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1630
1631         {"RECMIXR", "HPOR Switch", "HPOR"},
1632         {"RECMIXR", "INR Switch", "INR VOL"},
1633         {"RECMIXR", "BST2 Switch", "BST2"},
1634         {"RECMIXR", "BST1 Switch", "BST1"},
1635         {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1636
1637         {"ADC L", NULL, "RECMIXL"},
1638         {"ADC R", NULL, "RECMIXR"},
1639
1640         {"DMIC L1", NULL, "DMIC CLK"},
1641         {"DMIC L2", NULL, "DMIC CLK"},
1642
1643         {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1644         {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1645         {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1646         {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1647         {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1648
1649         {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1650         {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1651         {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1652         {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1653         {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1654
1655         {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1656         {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1657         {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1658         {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1659         {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1660
1661         {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1662         {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1663         {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1664         {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1665         {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1666
1667         {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1668         {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1669         {"Stereo ADC MIXL", NULL, "stereo filter"},
1670         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1671
1672         {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1673         {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1674         {"Stereo ADC MIXR", NULL, "stereo filter"},
1675         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1676
1677         {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1678         {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1679         {"Mono ADC MIXL", NULL, "mono left filter"},
1680         {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1681
1682         {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1683         {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1684         {"Mono ADC MIXR", NULL, "mono right filter"},
1685         {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1686
1687         {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1688         {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1689
1690         {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1691         {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1692         {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1693         {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1694         {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1695         {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1696
1697         {"IF1 ADC", NULL, "I2S1"},
1698         {"IF1 ADC", NULL, "IF1 ADC L"},
1699         {"IF1 ADC", NULL, "IF1 ADC R"},
1700         {"IF2 ADC", NULL, "I2S2"},
1701         {"IF2 ADC", NULL, "IF2 ADC L"},
1702         {"IF2 ADC", NULL, "IF2 ADC R"},
1703         {"IF3 ADC", NULL, "I2S3"},
1704         {"IF3 ADC", NULL, "IF3 ADC L"},
1705         {"IF3 ADC", NULL, "IF3 ADC R"},
1706
1707         {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1708         {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1709         {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1710         {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1711         {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1712         {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1713         {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1714         {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1715         {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1716         {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1717
1718         {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1719         {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1720         {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1721         {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1722         {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1723         {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1724         {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1725         {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1726         {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1727         {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1728
1729         {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1730         {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1731         {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1732         {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1733         {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1734         {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1735         {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1736         {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1737
1738         {"AIF1TX", NULL, "DAI1 TX Mux"},
1739         {"AIF1TX", NULL, "SDI1 TX Mux"},
1740         {"AIF2TX", NULL, "DAI2 TX Mux"},
1741         {"AIF2TX", NULL, "SDI2 TX Mux"},
1742         {"AIF3TX", NULL, "DAI3 TX Mux"},
1743
1744         {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1745         {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1746         {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1747         {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1748         {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1749         {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1750         {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1751         {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1752
1753         {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1754         {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1755         {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1756         {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
1757         {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
1758         {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1759         {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
1760         {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
1761
1762         {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
1763         {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
1764         {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
1765         {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
1766         {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
1767         {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
1768         {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
1769         {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
1770
1771         {"IF1 DAC", NULL, "I2S1"},
1772         {"IF1 DAC", NULL, "DAI1 RX Mux"},
1773         {"IF2 DAC", NULL, "I2S2"},
1774         {"IF2 DAC", NULL, "DAI2 RX Mux"},
1775         {"IF3 DAC", NULL, "I2S3"},
1776         {"IF3 DAC", NULL, "DAI3 RX Mux"},
1777
1778         {"IF1 DAC L", NULL, "IF1 DAC"},
1779         {"IF1 DAC R", NULL, "IF1 DAC"},
1780         {"IF2 DAC L", NULL, "IF2 DAC"},
1781         {"IF2 DAC R", NULL, "IF2 DAC"},
1782         {"IF3 DAC L", NULL, "IF3 DAC"},
1783         {"IF3 DAC R", NULL, "IF3 DAC"},
1784
1785         {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1786         {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1787         {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1788         {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1789
1790         {"ANC", NULL, "Stereo ADC MIXL"},
1791         {"ANC", NULL, "Stereo ADC MIXR"},
1792
1793         {"Audio DSP", NULL, "DAC MIXL"},
1794         {"Audio DSP", NULL, "DAC MIXR"},
1795
1796         {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1797         {"DAC L2 Mux", "IF3", "IF3 DAC L"},
1798         {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1799
1800         {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1801         {"DAC R2 Mux", "IF3", "IF3 DAC R"},
1802
1803         {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1804         {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1805         {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1806         {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1807         {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1808         {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1809
1810         {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1811         {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1812         {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1813         {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1814         {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1815         {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1816
1817         {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1818         {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1819         {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1820         {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1821
1822         {"DAC L1", NULL, "Stereo DAC MIXL"},
1823         {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1824         {"DAC R1", NULL, "Stereo DAC MIXR"},
1825         {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1826         {"DAC L2", NULL, "Mono DAC MIXL"},
1827         {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1828         {"DAC R2", NULL, "Mono DAC MIXR"},
1829         {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1830
1831         {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1832         {"SPK MIXL", "INL Switch", "INL VOL"},
1833         {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1834         {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1835         {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1836         {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1837         {"SPK MIXR", "INR Switch", "INR VOL"},
1838         {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1839         {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1840         {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1841
1842         {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1843         {"OUT MIXL", "BST1 Switch", "BST1"},
1844         {"OUT MIXL", "INL Switch", "INL VOL"},
1845         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1846         {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1847         {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1848         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1849
1850         {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1851         {"OUT MIXR", "BST2 Switch", "BST2"},
1852         {"OUT MIXR", "BST1 Switch", "BST1"},
1853         {"OUT MIXR", "INR Switch", "INR VOL"},
1854         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1855         {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1856         {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1857         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1858
1859         {"SPKVOL L", NULL, "SPK MIXL"},
1860         {"SPKVOL R", NULL, "SPK MIXR"},
1861         {"HPOVOL L", NULL, "OUT MIXL"},
1862         {"HPOVOL R", NULL, "OUT MIXR"},
1863         {"OUTVOL L", NULL, "OUT MIXL"},
1864         {"OUTVOL R", NULL, "OUT MIXR"},
1865
1866         {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1867         {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1868         {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1869         {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1870         {"SPOL MIX", "BST1 Switch", "BST1"},
1871         {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1872         {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1873         {"SPOR MIX", "BST1 Switch", "BST1"},
1874
1875         {"HPOL MIX", "DAC2 Switch", "DAC L2"},
1876         {"HPOL MIX", "DAC1 Switch", "DAC L1"},
1877         {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
1878         {"HPOR MIX", "DAC2 Switch", "DAC R2"},
1879         {"HPOR MIX", "DAC1 Switch", "DAC R1"},
1880         {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
1881
1882         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1883         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1884         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1885         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1886
1887         {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1888         {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1889         {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1890         {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1891         {"Mono MIX", "BST1 Switch", "BST1"},
1892
1893         {"HP L amp", NULL, "HPOL MIX"},
1894         {"HP R amp", NULL, "HPOR MIX"},
1895
1896 /*      {"HP L amp", NULL, "Improve HP amp drv"},
1897         {"HP R amp", NULL, "Improve HP amp drv"}, */
1898
1899         {"SPOLP", NULL, "SPOL MIX"},
1900         {"SPOLN", NULL, "SPOL MIX"},
1901         {"SPORP", NULL, "SPOR MIX"},
1902         {"SPORN", NULL, "SPOR MIX"},
1903
1904         {"SPOLP", NULL, "Improve SPK amp drv"},
1905         {"SPOLN", NULL, "Improve SPK amp drv"},
1906         {"SPORP", NULL, "Improve SPK amp drv"},
1907         {"SPORN", NULL, "Improve SPK amp drv"},
1908
1909         {"HPOL", NULL, "Improve HP amp drv"},
1910         {"HPOR", NULL, "Improve HP amp drv"},
1911
1912         {"HPOL", NULL, "HP L amp"},
1913         {"HPOR", NULL, "HP R amp"},
1914         {"LOUTL", NULL, "LOUT MIX"},
1915         {"LOUTR", NULL, "LOUT MIX"},
1916         {"MonoP", NULL, "Mono MIX"},
1917         {"MonoN", NULL, "Mono MIX"},
1918         {"MonoP", NULL, "Improve mono amp drv"},
1919 };
1920
1921 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1922 {
1923         int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
1924
1925         if (codec == NULL)
1926                 return -EINVAL;
1927
1928         val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1929         switch (dai_id) {
1930         case RT5640_AIF1:
1931                 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
1932                         val == RT5640_IF_113)
1933                         ret |= RT5640_U_IF1;
1934                 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
1935                         val == RT5640_IF_113)
1936                         ret |= RT5640_U_IF2;
1937                 if (val == RT5640_IF_321 || val == RT5640_IF_231)
1938                         ret |= RT5640_U_IF3;
1939                 break;
1940
1941         case RT5640_AIF2:
1942                 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
1943                         val == RT5640_IF_223)
1944                         ret |= RT5640_U_IF1;
1945                 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
1946                         val == RT5640_IF_223)
1947                         ret |= RT5640_U_IF2;
1948                 if (val == RT5640_IF_132 || val == RT5640_IF_312)
1949                         ret |= RT5640_U_IF3;
1950                 break;
1951
1952 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
1953         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1954         case RT5640_AIF3:
1955                 if (val == RT5640_IF_312 || val == RT5640_IF_321)
1956                         ret |= RT5640_U_IF1;
1957                 if (val == RT5640_IF_132 || val == RT5640_IF_231)
1958                         ret |= RT5640_U_IF2;
1959                 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
1960                         val == RT5640_IF_113 || val == RT5640_IF_223)
1961                         ret |= RT5640_U_IF3;
1962                 break;
1963 #endif
1964
1965         default:
1966                 ret = -EINVAL;
1967                 break;
1968         }
1969
1970         return ret;
1971 }
1972
1973 static int get_clk_info(int sclk, int rate)
1974 {
1975         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1976
1977         if (sclk <= 0 || rate <= 0)
1978                 return -EINVAL;
1979
1980         rate = rate << 8;
1981         for (i = 0; i < ARRAY_SIZE(pd); i++)
1982                 if (sclk == rate * pd[i])
1983                         return i;
1984
1985         return -EINVAL;
1986 }
1987
1988 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1989         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1990 {
1991         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1992         struct snd_soc_codec *codec = rtd->codec;
1993         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1994         unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1995         int pre_div, bclk_ms, frame_size;
1996         mutex_lock(&rt5640->lock);
1997         CHECK_I2C_SHUTDOWN(rt5640, codec)
1998
1999         rt5640->lrck[dai->id] = params_rate(params);
2000         pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
2001         if (pre_div < 0) {
2002                 dev_err(codec->dev, "Unsupported clock setting\n");
2003                 mutex_unlock(&rt5640->lock);
2004                 return -EINVAL;
2005         }
2006         frame_size = snd_soc_params_to_frame_size(params);
2007         if (frame_size < 0) {
2008                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2009                 mutex_unlock(&rt5640->lock);
2010                 return -EINVAL;
2011         }
2012         bclk_ms = frame_size > 32 ? 1 : 0;
2013         rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
2014
2015         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2016                 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
2017         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2018                                 bclk_ms, pre_div, dai->id);
2019
2020         switch (params_format(params)) {
2021         case SNDRV_PCM_FORMAT_S16_LE:
2022                 break;
2023         case SNDRV_PCM_FORMAT_S20_3LE:
2024                 val_len |= RT5640_I2S_DL_20;
2025                 break;
2026         case SNDRV_PCM_FORMAT_S24_LE:
2027                 val_len |= RT5640_I2S_DL_24;
2028                 break;
2029         case SNDRV_PCM_FORMAT_S8:
2030                 val_len |= RT5640_I2S_DL_8;
2031                 break;
2032         default:
2033                 mutex_unlock(&rt5640->lock);
2034                 return -EINVAL;
2035         }
2036
2037         dai_sel = get_sdp_info(codec, dai->id);
2038         if (dai_sel < 0) {
2039                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2040                 mutex_unlock(&rt5640->lock);
2041                 return -EINVAL;
2042         }
2043         if (dai_sel & RT5640_U_IF1) {
2044                 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
2045                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
2046                         pre_div << RT5640_I2S_PD1_SFT;
2047                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2048                         RT5640_I2S_DL_MASK, val_len);
2049                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2050         }
2051         if (dai_sel & RT5640_U_IF2) {
2052                 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
2053                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
2054                         pre_div << RT5640_I2S_PD2_SFT;
2055                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2056                         RT5640_I2S_DL_MASK, val_len);
2057                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2058         }
2059 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2060         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2061         if (dai_sel & RT5640_U_IF3) {
2062                 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
2063                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
2064                         pre_div << RT5640_I2S_PD3_SFT;
2065                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2066                         RT5640_I2S_DL_MASK, val_len);
2067                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2068         }
2069 #endif
2070         mutex_unlock(&rt5640->lock);
2071         return 0;
2072 }
2073
2074 static int rt5640_prepare(struct snd_pcm_substream *substream,
2075                                 struct snd_soc_dai *dai)
2076 {
2077         struct snd_soc_pcm_runtime *rtd = substream->private_data;
2078         struct snd_soc_codec *codec = rtd->codec;
2079         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2080
2081         rt5640->aif_pu = dai->id;
2082         return 0;
2083 }
2084
2085 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2086 {
2087         struct snd_soc_codec *codec = dai->codec;
2088         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2089         unsigned int reg_val = 0, dai_sel;
2090         mutex_lock(&rt5640->lock);
2091         CHECK_I2C_SHUTDOWN(rt5640, codec)
2092
2093         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2094         case SND_SOC_DAIFMT_CBM_CFM:
2095                 rt5640->master[dai->id] = 1;
2096                 break;
2097         case SND_SOC_DAIFMT_CBS_CFS:
2098                 reg_val |= RT5640_I2S_MS_S;
2099                 rt5640->master[dai->id] = 0;
2100                 break;
2101         default:
2102                 mutex_unlock(&rt5640->lock);
2103                 return -EINVAL;
2104         }
2105
2106         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2107         case SND_SOC_DAIFMT_NB_NF:
2108                 break;
2109         case SND_SOC_DAIFMT_IB_NF:
2110                 reg_val |= RT5640_I2S_BP_INV;
2111                 break;
2112         default:
2113                 mutex_unlock(&rt5640->lock);
2114                 return -EINVAL;
2115         }
2116
2117         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2118         case SND_SOC_DAIFMT_I2S:
2119                 break;
2120         case SND_SOC_DAIFMT_LEFT_J:
2121                 reg_val |= RT5640_I2S_DF_LEFT;
2122                 break;
2123         case SND_SOC_DAIFMT_DSP_A:
2124                 reg_val |= RT5640_I2S_DF_PCM_A;
2125                 break;
2126         case SND_SOC_DAIFMT_DSP_B:
2127                 reg_val  |= RT5640_I2S_DF_PCM_B;
2128                 break;
2129         default:
2130                 mutex_unlock(&rt5640->lock);
2131                 return -EINVAL;
2132         }
2133
2134         dai_sel = get_sdp_info(codec, dai->id);
2135         if (dai_sel < 0) {
2136                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2137                 mutex_unlock(&rt5640->lock);
2138                 return -EINVAL;
2139         }
2140         if (dai_sel & RT5640_U_IF1) {
2141                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2142                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2143                         RT5640_I2S_DF_MASK, reg_val);
2144         }
2145         if (dai_sel & RT5640_U_IF2) {
2146                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2147                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2148                         RT5640_I2S_DF_MASK, reg_val);
2149         }
2150 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2151         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2152         if (dai_sel & RT5640_U_IF3) {
2153                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2154                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2155                         RT5640_I2S_DF_MASK, reg_val);
2156         }
2157 #endif
2158         mutex_unlock(&rt5640->lock);
2159         return 0;
2160 }
2161
2162 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2163                 int clk_id, unsigned int freq, int dir)
2164 {
2165         struct snd_soc_codec *codec = dai->codec;
2166         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2167         unsigned int reg_val = 0;
2168         mutex_lock(&rt5640->lock);
2169         CHECK_I2C_SHUTDOWN(rt5640, codec)
2170
2171         if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src) {
2172                 mutex_unlock(&rt5640->lock);
2173                 return 0;
2174         }
2175
2176         switch (clk_id) {
2177         case RT5640_SCLK_S_MCLK:
2178                 reg_val |= RT5640_SCLK_SRC_MCLK;
2179                 break;
2180         case RT5640_SCLK_S_PLL1:
2181                 reg_val |= RT5640_SCLK_SRC_PLL1;
2182                 break;
2183         case RT5640_SCLK_S_PLL1_TK:
2184                 reg_val |= RT5640_SCLK_SRC_PLL1T;
2185                 break;
2186         case RT5640_SCLK_S_RCCLK:
2187                 reg_val |= RT5640_SCLK_SRC_RCCLK;
2188                 break;
2189         default:
2190                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2191                 mutex_unlock(&rt5640->lock);
2192                 return -EINVAL;
2193         }
2194         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2195                 RT5640_SCLK_SRC_MASK, reg_val);
2196         rt5640->sysclk = freq;
2197         rt5640->sysclk_src = clk_id;
2198
2199         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2200         mutex_unlock(&rt5640->lock);
2201         return 0;
2202 }
2203
2204 /**
2205  * rt5640_pll_calc - Calcualte PLL M/N/K code.
2206  * @freq_in: external clock provided to codec.
2207  * @freq_out: target clock which codec works on.
2208  * @pll_code: Pointer to structure with M, N, K and bypass flag.
2209  *
2210  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2211  * which make calculation more efficiently.
2212  *
2213  * Returns 0 for success or negative error code.
2214  */
2215 static int rt5640_pll_calc(const unsigned int freq_in,
2216         const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2217 {
2218         int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2219         int n, m, red, n_t, m_t, in_t, out_t, red_t = abs(freq_out - freq_in);
2220         bool bypass = false;
2221
2222         if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2223                 return -EINVAL;
2224
2225         for (n_t = 0; n_t <= max_n; n_t++) {
2226                 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
2227                 if (in_t < 0)
2228                         continue;
2229                 if (in_t == freq_out) {
2230                         bypass = true;
2231                         n = n_t;
2232                         goto code_find;
2233                 }
2234                 for (m_t = 0; m_t <= max_m; m_t++) {
2235                         out_t = in_t / (m_t + 2);
2236                         red = abs(out_t - freq_out);
2237                         if (red < red_t) {
2238                                 n = n_t;
2239                                 m = m_t;
2240                                 if (red == 0)
2241                                         goto code_find;
2242                                 red_t = red;
2243                         }
2244                 }
2245         }
2246         pr_debug("Only get approximation about PLL\n");
2247
2248 code_find:
2249
2250         pll_code->m_bp = bypass;
2251         pll_code->m_code = m;
2252         pll_code->n_code = n;
2253         pll_code->k_code = 2;
2254         return 0;
2255 }
2256
2257 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2258                         unsigned int freq_in, unsigned int freq_out)
2259 {
2260         struct snd_soc_codec *codec = dai->codec;
2261         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2262         struct rt5640_pll_code pll_code;
2263         int ret, dai_sel;
2264         mutex_lock(&rt5640->lock);
2265         CHECK_I2C_SHUTDOWN(rt5640, codec)
2266
2267         if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2268             freq_out == rt5640->pll_out) {
2269                 mutex_unlock(&rt5640->lock);
2270                 return 0;
2271                 }
2272
2273         if (!freq_in || !freq_out) {
2274                 dev_dbg(codec->dev, "PLL disabled\n");
2275
2276                 rt5640->pll_in = 0;
2277                 rt5640->pll_out = 0;
2278                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2279                         RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2280                 mutex_unlock(&rt5640->lock);
2281                 return 0;
2282         }
2283
2284         switch (source) {
2285         case RT5640_PLL1_S_MCLK:
2286                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2287                         RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2288                 break;
2289         case RT5640_PLL1_S_BCLK1:
2290         case RT5640_PLL1_S_BCLK2:
2291 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2292         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2293         case RT5640_PLL1_S_BCLK3:
2294
2295 #endif
2296                 dai_sel = get_sdp_info(codec, dai->id);
2297                 if (dai_sel < 0) {
2298                         dev_err(codec->dev,
2299                                 "Failed to get sdp info: %d\n", dai_sel);
2300                         mutex_unlock(&rt5640->lock);
2301                         return -EINVAL;
2302                 }
2303                 if (dai_sel & RT5640_U_IF1) {
2304                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2305                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2306                 }
2307                 if (dai_sel & RT5640_U_IF2) {
2308                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2309                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2310                 }
2311                 if (dai_sel & RT5640_U_IF3) {
2312                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2313                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2314                 }
2315                 break;
2316         default:
2317                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2318                 mutex_unlock(&rt5640->lock);
2319                 return -EINVAL;
2320         }
2321
2322         ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2323         if (ret < 0) {
2324                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2325                 mutex_unlock(&rt5640->lock);
2326                 return ret;
2327         }
2328
2329         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code.m_bp,
2330                 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code);
2331
2332         snd_soc_write(codec, RT5640_PLL_CTRL1,
2333                 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2334         snd_soc_write(codec, RT5640_PLL_CTRL2,
2335                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2336                 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2337
2338         rt5640->pll_in = freq_in;
2339         rt5640->pll_out = freq_out;
2340         rt5640->pll_src = source;
2341
2342         mutex_unlock(&rt5640->lock);
2343         return 0;
2344 }
2345
2346 /**
2347  * rt5640_index_show - Dump private registers.
2348  * @dev: codec device.
2349  * @attr: device attribute.
2350  * @buf: buffer for display.
2351  *
2352  * To show non-zero values of all private registers.
2353  *
2354  * Returns buffer length.
2355  */
2356 static ssize_t rt5640_index_show(struct device *dev,
2357         struct device_attribute *attr, char *buf)
2358 {
2359         struct i2c_client *client = to_i2c_client(dev);
2360         struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2361         struct snd_soc_codec *codec = rt5640->codec;
2362         unsigned int val;
2363         int cnt = 0, i;
2364         mutex_lock(&rt5640->lock);
2365         CHECK_I2C_SHUTDOWN(rt5640, codec)
2366
2367         cnt += sprintf(buf, "RT5640 index register\n");
2368         for (i = 0; i < 0xb4; i++) {
2369                 if (cnt + 9 >= PAGE_SIZE - 1)
2370                         break;
2371                 val = rt5640_index_read(codec, i);
2372                 if (!val)
2373                         continue;
2374                 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2375         }
2376
2377         if (cnt >= PAGE_SIZE)
2378                 cnt = PAGE_SIZE - 1;
2379
2380         mutex_unlock(&rt5640->lock);
2381         return cnt;
2382 }
2383 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2384
2385 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2386                         enum snd_soc_bias_level level)
2387 {
2388         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2389         mutex_lock(&rt5640->lock);
2390         CHECK_I2C_SHUTDOWN(rt5640, codec)
2391
2392         switch (level) {
2393         case SND_SOC_BIAS_ON:
2394 #ifdef RT5640_DEMO
2395                 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2396                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2397                 snd_soc_update_bits(codec, RT5640_HP_VOL,
2398                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2399                 break;
2400 #endif
2401         case SND_SOC_BIAS_PREPARE:
2402 #ifdef RT5640_DEMO
2403                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2404                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2405                         RT5640_PWR_BG | RT5640_PWR_VREF2,
2406                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2407                         RT5640_PWR_BG | RT5640_PWR_VREF2);
2408                 msleep(100);
2409
2410                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2411                         RT5640_PWR_FV1 | RT5640_PWR_FV2,
2412                         RT5640_PWR_FV1 | RT5640_PWR_FV2);
2413
2414                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2415                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2416                         RT5640_PWR_MB1 | RT5640_PWR_MB2);
2417 #endif
2418                 break;
2419
2420         case SND_SOC_BIAS_STANDBY:
2421 #ifdef RT5640_DEMO
2422                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2423                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2424                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2425                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2426
2427                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2428                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2429                         0);
2430 #endif
2431                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2432                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2433                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2434                                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2435                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2436                                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2437                         msleep(10);
2438                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2439                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2440                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2441                         codec->cache_only = false;
2442                         codec->cache_sync = 1;
2443                         snd_soc_cache_sync(codec);
2444                         rt5640_index_sync(codec);
2445                 }
2446                 break;
2447
2448         case SND_SOC_BIAS_OFF:
2449 #ifdef RT5640_DEMO
2450                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2451                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2452                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2453                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2454                 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2455                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2456                 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2457                         RT5640_L_MUTE, RT5640_L_MUTE);
2458 #endif
2459                 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2460                 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2461                 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2462                 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2463                 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2464                 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2465                 break;
2466
2467         default:
2468                 break;
2469         }
2470         codec->dapm.bias_level = level;
2471
2472         mutex_unlock(&rt5640->lock);
2473         return 0;
2474 }
2475
2476 static int rt5640_probe(struct snd_soc_codec *codec)
2477 {
2478         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2479         int ret;
2480         u16 val;
2481         mutex_lock(&rt5640->lock);
2482         CHECK_I2C_SHUTDOWN(rt5640, codec)
2483
2484         codec->dapm.idle_bias_off = 1;
2485
2486         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2487         if (ret != 0) {
2488                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2489                 mutex_unlock(&rt5640->lock);
2490                 return ret;
2491         }
2492
2493         val = snd_soc_read(codec, RT5640_RESET);
2494         if ((val != rt5640_reg[RT5640_RESET]) && (val != RT5639_RESET_ID)) {
2495                 dev_err(codec->dev,
2496                         "Device with ID register %x is not rt5640/39\n", val);
2497                 mutex_unlock(&rt5640->lock);
2498                 return -ENODEV;
2499         }
2500
2501         rt5640_reset(codec);
2502         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2503                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2504                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2505                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2506                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2507         msleep(100);
2508         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2509                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2510                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2511         /* DMIC */
2512         if (rt5640->dmic_en == RT5640_DMIC1) {
2513                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2514                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2515                 snd_soc_update_bits(codec, RT5640_DMIC,
2516                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2517                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2518         } else if (rt5640->dmic_en == RT5640_DMIC2) {
2519                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2520                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2521                 snd_soc_update_bits(codec, RT5640_DMIC,
2522                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2523                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2524         }
2525
2526 #ifdef RT5640_DEMO
2527         rt5640_reg_init(codec);
2528 #endif
2529
2530 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
2531         rt5640_register_dsp(codec);
2532 #endif
2533
2534         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2535
2536         snd_soc_add_codec_controls(codec, rt5640_snd_controls,
2537                 ARRAY_SIZE(rt5640_snd_controls));
2538
2539         rt5640->codec = codec;
2540         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2541         if (ret != 0) {
2542                 dev_err(codec->dev,
2543                         "Failed to create index_reg sysfs files: %d\n", ret);
2544                 mutex_unlock(&rt5640->lock);
2545                 return ret;
2546         }
2547
2548         mutex_unlock(&rt5640->lock);
2549         return 0;
2550 }
2551
2552 static int rt5640_remove(struct snd_soc_codec *codec)
2553 {
2554         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2555
2556         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2557         mutex_lock(&rt5640->lock);
2558         CHECK_I2C_SHUTDOWN(rt5640, codec)
2559         rt5640_reset(codec);
2560         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2561
2562         mutex_unlock(&rt5640->lock);
2563         return 0;
2564 }
2565 #ifdef CONFIG_PM
2566 static int rt5640_suspend(struct snd_soc_codec *codec, pm_message_t state)
2567 {
2568         rt5640_reset(codec);
2569         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2570         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2571
2572         return 0;
2573 }
2574
2575 static int rt5640_resume(struct snd_soc_codec *codec)
2576 {
2577         int ret = 0 ;
2578
2579         codec->cache_sync = 1;
2580         ret = snd_soc_cache_sync(codec);
2581         if (ret) {
2582                 dev_err(codec->dev,"Failed to sync cache: %d\n", ret);
2583                 return ret;
2584         }
2585         rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2586
2587         return 0;
2588 }
2589 #else
2590 #define rt5640_suspend NULL
2591 #define rt5640_resume NULL
2592 #endif
2593
2594 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2595 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2596                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2597
2598 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2599         .hw_params = rt5640_hw_params,
2600         .prepare = rt5640_prepare,
2601         .set_fmt = rt5640_set_dai_fmt,
2602         .set_sysclk = rt5640_set_dai_sysclk,
2603         .set_pll = rt5640_set_dai_pll,
2604 };
2605
2606 struct snd_soc_dai_driver rt5640_dai[] = {
2607         {
2608                 .name = "rt5640-aif1",
2609                 .id = RT5640_AIF1,
2610                 .playback = {
2611                         .stream_name = "AIF1 Playback",
2612                         .channels_min = 1,
2613                         .channels_max = 2,
2614                         .rates = RT5640_STEREO_RATES,
2615                         .formats = RT5640_FORMATS,
2616                 },
2617                 .capture = {
2618                         .stream_name = "AIF1 Capture",
2619                         .channels_min = 1,
2620                         .channels_max = 2,
2621                         .rates = RT5640_STEREO_RATES,
2622                         .formats = RT5640_FORMATS,
2623                 },
2624                 .ops = &rt5640_aif_dai_ops,
2625         },
2626         {
2627                 .name = "rt5640-aif2",
2628                 .id = RT5640_AIF2,
2629                 .playback = {
2630                         .stream_name = "AIF2 Playback",
2631                         .channels_min = 1,
2632                         .channels_max = 2,
2633                         .rates = RT5640_STEREO_RATES,
2634                         .formats = RT5640_FORMATS,
2635                 },
2636                 .capture = {
2637                         .stream_name = "AIF2 Capture",
2638                         .channels_min = 1,
2639                         .channels_max = 2,
2640                         .rates = RT5640_STEREO_RATES,
2641                         .formats = RT5640_FORMATS,
2642                 },
2643                 .ops = &rt5640_aif_dai_ops,
2644         },
2645 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2646         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2647         {
2648                 .name = "rt5640-aif3",
2649                 .id = RT5640_AIF3,
2650                 .playback = {
2651                         .stream_name = "AIF3 Playback",
2652                         .channels_min = 1,
2653                         .channels_max = 2,
2654                         .rates = RT5640_STEREO_RATES,
2655                         .formats = RT5640_FORMATS,
2656                 },
2657                 .capture = {
2658                         .stream_name = "AIF3 Capture",
2659                         .channels_min = 1,
2660                         .channels_max = 2,
2661                         .rates = RT5640_STEREO_RATES,
2662                         .formats = RT5640_FORMATS,
2663                 },
2664                 .ops = &rt5640_aif_dai_ops,
2665         },
2666 #endif
2667 };
2668
2669 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2670         .probe = rt5640_probe,
2671         .remove = rt5640_remove,
2672         .suspend = rt5640_suspend,
2673         .resume = rt5640_resume,
2674         .set_bias_level = rt5640_set_bias_level,
2675         .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2676         .reg_word_size = sizeof(u16),
2677         .reg_cache_default = rt5640_reg,
2678         .volatile_register = rt5640_volatile_register,
2679         .readable_register = rt5640_readable_register,
2680         .reg_cache_step = 1,
2681         .dapm_widgets = rt5640_dapm_widgets,
2682         .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2683         .dapm_routes = rt5640_dapm_routes,
2684         .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2685 };
2686
2687 static const struct i2c_device_id rt5640_i2c_id[] = {
2688         { "rt5640", 0 },
2689         { }
2690 };
2691 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2692
2693 static int rt5640_i2c_probe(struct i2c_client *i2c,
2694                     const struct i2c_device_id *id)
2695 {
2696         struct rt5640_priv *rt5640;
2697         int ret;
2698
2699         rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2700         if (NULL == rt5640)
2701                 return -ENOMEM;
2702
2703         i2c_set_clientdata(i2c, rt5640);
2704         mutex_init(&rt5640->lock);
2705
2706         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2707                         rt5640_dai, ARRAY_SIZE(rt5640_dai));
2708         if (ret < 0)
2709                 kfree(rt5640);
2710
2711         return ret;
2712 }
2713
2714 static __devexit int rt5640_i2c_remove(struct i2c_client *i2c)
2715 {
2716         snd_soc_unregister_codec(&i2c->dev);
2717         kfree(i2c_get_clientdata(i2c));
2718         return 0;
2719 }
2720
2721 static void rt5640_i2c_shutdown(struct i2c_client *i2c)
2722 {
2723         struct rt5640_priv *rt5640 = i2c_get_clientdata(i2c);
2724
2725         mutex_lock(&rt5640->lock);
2726
2727         if (i2c->irq)
2728                 disable_irq(i2c->irq);
2729         rt5640->shutdown_complete = 1;
2730
2731         mutex_unlock(&rt5640->lock);
2732 }
2733
2734 struct i2c_driver rt5640_i2c_driver = {
2735         .driver = {
2736                 .name = "rt5640",
2737                 .owner = THIS_MODULE,
2738         },
2739         .probe = rt5640_i2c_probe,
2740         .remove   = __devexit_p(rt5640_i2c_remove),
2741         .id_table = rt5640_i2c_id,
2742         .shutdown = rt5640_i2c_shutdown,
2743 };
2744
2745 static int __init rt5640_modinit(void)
2746 {
2747         return i2c_add_driver(&rt5640_i2c_driver);
2748 }
2749 module_init(rt5640_modinit);
2750
2751 static void __exit rt5640_modexit(void)
2752 {
2753         i2c_del_driver(&rt5640_i2c_driver);
2754 }
2755 module_exit(rt5640_modexit);
2756
2757 MODULE_DESCRIPTION("ASoC RT5640 driver");
2758 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2759 MODULE_LICENSE("GPL");