asoc: codecs: Updated RT5640 driver with DMIC clk fix
[linux-2.6.git] / sound / soc / codecs / rt5640.c
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 #include "rt5640.h"
28 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
30 #endif
31
32 #define RT5640_DEMO 1
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35
36 #ifdef RT5640_DEMO
37 struct rt5640_init_reg {
38         u8 reg;
39         u16 val;
40 };
41
42 static struct rt5640_init_reg init_list[] = {
43         {RT5640_DUMMY1          , 0x3701},/*fa[12:13] = 1'b;fa[8~10]=1;fa[0]=1*/
44         {RT5640_DEPOP_M1        , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
45         {RT5640_DEPOP_M2        , 0x3100},/* 8f[13] = 1'b */
46         {RT5640_ADDA_CLK1       , 0x1114},/* 73[2] = 1'b  */
47         {RT5640_MICBIAS         , 0x3030},/* 93[5:4] = 11'b */
48         {RT5640_PRIV_INDEX      , 0x003d},/* PR3d[12] = 1'b */
49         {RT5640_PRIV_DATA       , 0x3600},
50         {RT5640_CLS_D_OUT       , 0xa000},/* 8d[11] = 0'b */
51         {RT5640_PRIV_INDEX      , 0x001c},/* PR1c = 0D21'h */
52         {RT5640_PRIV_DATA       , 0x0D21},
53         {RT5640_PRIV_INDEX      , 0x001b},/* PR1B = 0D21'h */
54         {RT5640_PRIV_DATA       , 0x0000},
55         {RT5640_PRIV_INDEX      , 0x0012},/* PR12 = 0aa8'h */
56         {RT5640_PRIV_DATA       , 0x0aa8},
57         {RT5640_PRIV_INDEX      , 0x0014},/* PR14 = 0aaa'h */
58         {RT5640_PRIV_DATA       , 0x0aaa},
59         {RT5640_PRIV_INDEX      , 0x0020},/* PR20 = 6110'h */
60         {RT5640_PRIV_DATA       , 0x6110},
61         {RT5640_PRIV_INDEX      , 0x0021},/* PR21 = e0e0'h */
62         {RT5640_PRIV_DATA       , 0xe0e0},
63         {RT5640_PRIV_INDEX      , 0x0023},/* PR23 = 1804'h */
64         {RT5640_PRIV_DATA       , 0x1804},
65         /*playback*/
66         {RT5640_STO_DAC_MIXER   , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
67         {RT5640_OUT_L3_MIXER    , 0x01fe},/*DACL1 -> OUTMIXL*/
68         {RT5640_OUT_R3_MIXER    , 0x01fe},/*DACR1 -> OUTMIXR */
69         {RT5640_HP_VOL          , 0x8888},/* OUTMIX -> HPVOL */
70         {RT5640_HPO_MIXER       , 0xc000},/* HPVOL -> HPOLMIX */
71 /*      {RT5640_HPO_MIXER       , 0xa000},// DAC1 -> HPOLMIX   */
72         {RT5640_SPK_L_MIXER     , 0x0036},/* DACL1 -> SPKMIXL */
73         {RT5640_SPK_R_MIXER     , 0x0036},/* DACR1 -> SPKMIXR */
74         {RT5640_SPK_VOL         , 0x8888},/* SPKMIX -> SPKVOL */
75         {RT5640_SPO_L_MIXER     , 0xe800},/* SPKVOLL -> SPOLMIX */
76         {RT5640_SPO_R_MIXER     , 0x2800},/* SPKVOLR -> SPORMIX */
77 /*      {RT5640_SPO_L_MIXER     , 0xb800},//DAC -> SPOLMIX */
78 /*      {RT5640_SPO_R_MIXER     , 0x1800},//DAC -> SPORMIX */
79 /*      {RT5640_I2S1_SDP        , 0xD000},//change IIS1 and IIS2 */
80         /*record*/
81         {RT5640_IN1_IN2         , 0x5080},/*IN1 boost 40db & differential mode*/
82         {RT5640_IN3_IN4         , 0x0500},/*IN2 boost 40db & signal ended mode*/
83         {RT5640_REC_L2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXL */
84         {RT5640_REC_R2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXR */
85 /*      {RT5640_REC_L2_MIXER    , 0x006f},//Mic2 -> RECMIXL */
86 /*      {RT5640_REC_R2_MIXER    , 0x006f},//Mic2 -> RECMIXR */
87         {RT5640_STO_ADC_MIXER   , 0x3020},/* ADC -> Sto ADC mixer */
88
89 #if RT5640_DET_EXT_MIC
90         {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
91         {RT5640_GPIO_CTRL1      , 0x8400},/* set GPIO1 to IRQ */
92         {RT5640_GPIO_CTRL3      , 0x0004},/* set GPIO1 output */
93         {RT5640_IRQ_CTRL2       , 0x8000},/*set MICBIAS short current to IRQ */
94                                         /*( if sticky set regBE : 8800 ) */
95 #endif
96
97 };
98 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
99
100 static int rt5640_reg_init(struct snd_soc_codec *codec)
101 {
102         int i;
103         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
104                 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
105         return 0;
106 }
107 #endif
108
109 static int rt5640_index_sync(struct snd_soc_codec *codec)
110 {
111         int i;
112
113         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
114                 if (RT5640_PRIV_INDEX == init_list[i].reg ||
115                         RT5640_PRIV_DATA == init_list[i].reg)
116                         snd_soc_write(codec, init_list[i].reg,
117                                         init_list[i].val);
118         return 0;
119 }
120
121 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
122         [RT5640_RESET] = 0x000c,
123         [RT5640_SPK_VOL] = 0xc8c8,
124         [RT5640_HP_VOL] = 0xc8c8,
125         [RT5640_OUTPUT] = 0xc8c8,
126         [RT5640_MONO_OUT] = 0x8000,
127         [RT5640_INL_INR_VOL] = 0x0808,
128         [RT5640_DAC1_DIG_VOL] = 0xafaf,
129         [RT5640_DAC2_DIG_VOL] = 0xafaf,
130         [RT5640_ADC_DIG_VOL] = 0x2f2f,
131         [RT5640_ADC_DATA] = 0x2f2f,
132         [RT5640_STO_ADC_MIXER] = 0x7060,
133         [RT5640_MONO_ADC_MIXER] = 0x7070,
134         [RT5640_AD_DA_MIXER] = 0x8080,
135         [RT5640_STO_DAC_MIXER] = 0x5454,
136         [RT5640_MONO_DAC_MIXER] = 0x5454,
137         [RT5640_DIG_MIXER] = 0xaa00,
138         [RT5640_DSP_PATH2] = 0xa000,
139         [RT5640_REC_L2_MIXER] = 0x007f,
140         [RT5640_REC_R2_MIXER] = 0x007f,
141         [RT5640_HPO_MIXER] = 0xe000,
142         [RT5640_SPK_L_MIXER] = 0x003e,
143         [RT5640_SPK_R_MIXER] = 0x003e,
144         [RT5640_SPO_L_MIXER] = 0xf800,
145         [RT5640_SPO_R_MIXER] = 0x3800,
146         [RT5640_SPO_CLSD_RATIO] = 0x0004,
147         [RT5640_MONO_MIXER] = 0xfc00,
148         [RT5640_OUT_L3_MIXER] = 0x01ff,
149         [RT5640_OUT_R3_MIXER] = 0x01ff,
150         [RT5640_LOUT_MIXER] = 0xf000,
151         [RT5640_PWR_ANLG1] = 0x00c0,
152         [RT5640_I2S1_SDP] = 0x8000,
153         [RT5640_I2S2_SDP] = 0x8000,
154         [RT5640_I2S3_SDP] = 0x8000,
155         [RT5640_ADDA_CLK1] = 0x1110,
156         [RT5640_ADDA_CLK2] = 0x0c00,
157         [RT5640_DMIC] = 0x1d00,
158         [RT5640_ASRC_3] = 0x0008,
159         [RT5640_HP_OVCD] = 0x0600,
160         [RT5640_CLS_D_OVCD] = 0x0228,
161         [RT5640_CLS_D_OUT] = 0xa800,
162         [RT5640_DEPOP_M1] = 0x0004,
163         [RT5640_DEPOP_M2] = 0x1100,
164         [RT5640_DEPOP_M3] = 0x0646,
165         [RT5640_CHARGE_PUMP] = 0x0c00,
166         [RT5640_MICBIAS] = 0x3000,
167         [RT5640_EQ_CTRL1] = 0x2080,
168         [RT5640_DRC_AGC_1] = 0x2206,
169         [RT5640_DRC_AGC_2] = 0x1f00,
170         [RT5640_ANC_CTRL1] = 0x034b,
171         [RT5640_ANC_CTRL2] = 0x0066,
172         [RT5640_ANC_CTRL3] = 0x000b,
173         [RT5640_GPIO_CTRL1] = 0x0400,
174         [RT5640_DSP_CTRL3] = 0x2000,
175         [RT5640_BASE_BACK] = 0x0013,
176         [RT5640_MP3_PLUS1] = 0x0680,
177         [RT5640_MP3_PLUS2] = 0x1c17,
178         [RT5640_3D_HP] = 0x8c00,
179         [RT5640_ADJ_HPF] = 0x2a20,
180         [RT5640_HP_CALIB_AMP_DET] = 0x0400,
181         [RT5640_SV_ZCD1] = 0x0809,
182         [RT5640_VENDOR_ID1] = 0x10ec,
183         [RT5640_VENDOR_ID2] = 0x6231,
184 };
185
186 static int rt5640_reset(struct snd_soc_codec *codec)
187 {
188         return snd_soc_write(codec, RT5640_RESET, 0);
189 }
190
191 /**
192  * rt5640_index_write - Write private register.
193  * @codec: SoC audio codec device.
194  * @reg: Private register index.
195  * @value: Private register Data.
196  *
197  * Modify private register for advanced setting. It can be written through
198  * private index (0x6a) and data (0x6c) register.
199  *
200  * Returns 0 for success or negative error code.
201  */
202 static int rt5640_index_write(struct snd_soc_codec *codec,
203                 unsigned int reg, unsigned int value)
204 {
205         int ret;
206
207         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
208         if (ret < 0) {
209                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
210                 goto err;
211         }
212         ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
213         if (ret < 0) {
214                 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
215                 goto err;
216         }
217         return 0;
218
219 err:
220         return ret;
221 }
222
223 /**
224  * rt5640_index_read - Read private register.
225  * @codec: SoC audio codec device.
226  * @reg: Private register index.
227  *
228  * Read advanced setting from private register. It can be read through
229  * private index (0x6a) and data (0x6c) register.
230  *
231  * Returns private register value or negative error code.
232  */
233 static unsigned int rt5640_index_read(
234         struct snd_soc_codec *codec, unsigned int reg)
235 {
236         int ret;
237
238         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
239         if (ret < 0) {
240                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
241                 return ret;
242         }
243         return snd_soc_read(codec, RT5640_PRIV_DATA);
244 }
245
246 /**
247  * rt5640_index_update_bits - update private register bits
248  * @codec: audio codec
249  * @reg: Private register index.
250  * @mask: register mask
251  * @value: new value
252  *
253  * Writes new register value.
254  *
255  * Returns 1 for change, 0 for no change, or negative error code.
256  */
257 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
258         unsigned int reg, unsigned int mask, unsigned int value)
259 {
260         unsigned int old, new;
261         int change, ret;
262
263         ret = rt5640_index_read(codec, reg);
264         if (ret < 0) {
265                 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
266                 goto err;
267         }
268
269         old = ret;
270         new = (old & ~mask) | (value & mask);
271         change = old != new;
272         if (change) {
273                 ret = rt5640_index_write(codec, reg, new);
274                 if (ret < 0) {
275                         dev_err(codec->dev,
276                                 "Failed to write private reg: %d\n", ret);
277                         goto err;
278                 }
279         }
280         return change;
281
282 err:
283         return ret;
284 }
285
286 static int rt5640_volatile_register(
287         struct snd_soc_codec *codec, unsigned int reg)
288 {
289         switch (reg) {
290         case RT5640_RESET:
291         case RT5640_PRIV_DATA:
292         case RT5640_ASRC_5:
293         case RT5640_EQ_CTRL1:
294         case RT5640_DRC_AGC_1:
295         case RT5640_ANC_CTRL1:
296         case RT5640_IRQ_CTRL2:
297         case RT5640_INT_IRQ_ST:
298         case RT5640_DSP_CTRL2:
299         case RT5640_DSP_CTRL3:
300         case RT5640_PGM_REG_ARR1:
301         case RT5640_PGM_REG_ARR3:
302                 return 1;
303         default:
304                 return 0;
305         }
306 }
307
308 static int rt5640_readable_register(
309         struct snd_soc_codec *codec, unsigned int reg)
310 {
311         switch (reg) {
312         case RT5640_RESET:
313         case RT5640_SPK_VOL:
314         case RT5640_HP_VOL:
315         case RT5640_OUTPUT:
316         case RT5640_MONO_OUT:
317         case RT5640_IN1_IN2:
318         case RT5640_IN3_IN4:
319         case RT5640_INL_INR_VOL:
320         case RT5640_DAC1_DIG_VOL:
321         case RT5640_DAC2_DIG_VOL:
322         case RT5640_DAC2_CTRL:
323         case RT5640_ADC_DIG_VOL:
324         case RT5640_ADC_DATA:
325         case RT5640_ADC_BST_VOL:
326         case RT5640_STO_ADC_MIXER:
327         case RT5640_MONO_ADC_MIXER:
328         case RT5640_AD_DA_MIXER:
329         case RT5640_STO_DAC_MIXER:
330         case RT5640_MONO_DAC_MIXER:
331         case RT5640_DIG_MIXER:
332         case RT5640_DSP_PATH1:
333         case RT5640_DSP_PATH2:
334         case RT5640_DIG_INF_DATA:
335         case RT5640_REC_L1_MIXER:
336         case RT5640_REC_L2_MIXER:
337         case RT5640_REC_R1_MIXER:
338         case RT5640_REC_R2_MIXER:
339         case RT5640_HPO_MIXER:
340         case RT5640_SPK_L_MIXER:
341         case RT5640_SPK_R_MIXER:
342         case RT5640_SPO_L_MIXER:
343         case RT5640_SPO_R_MIXER:
344         case RT5640_SPO_CLSD_RATIO:
345         case RT5640_MONO_MIXER:
346         case RT5640_OUT_L1_MIXER:
347         case RT5640_OUT_L2_MIXER:
348         case RT5640_OUT_L3_MIXER:
349         case RT5640_OUT_R1_MIXER:
350         case RT5640_OUT_R2_MIXER:
351         case RT5640_OUT_R3_MIXER:
352         case RT5640_LOUT_MIXER:
353         case RT5640_PWR_DIG1:
354         case RT5640_PWR_DIG2:
355         case RT5640_PWR_ANLG1:
356         case RT5640_PWR_ANLG2:
357         case RT5640_PWR_MIXER:
358         case RT5640_PWR_VOL:
359         case RT5640_PRIV_INDEX:
360         case RT5640_PRIV_DATA:
361         case RT5640_I2S1_SDP:
362         case RT5640_I2S2_SDP:
363         case RT5640_I2S3_SDP:
364         case RT5640_ADDA_CLK1:
365         case RT5640_ADDA_CLK2:
366         case RT5640_DMIC:
367         case RT5640_GLB_CLK:
368         case RT5640_PLL_CTRL1:
369         case RT5640_PLL_CTRL2:
370         case RT5640_ASRC_1:
371         case RT5640_ASRC_2:
372         case RT5640_ASRC_3:
373         case RT5640_ASRC_4:
374         case RT5640_ASRC_5:
375         case RT5640_HP_OVCD:
376         case RT5640_CLS_D_OVCD:
377         case RT5640_CLS_D_OUT:
378         case RT5640_DEPOP_M1:
379         case RT5640_DEPOP_M2:
380         case RT5640_DEPOP_M3:
381         case RT5640_CHARGE_PUMP:
382         case RT5640_PV_DET_SPK_G:
383         case RT5640_MICBIAS:
384         case RT5640_EQ_CTRL1:
385         case RT5640_EQ_CTRL2:
386         case RT5640_WIND_FILTER:
387         case RT5640_DRC_AGC_1:
388         case RT5640_DRC_AGC_2:
389         case RT5640_DRC_AGC_3:
390         case RT5640_SVOL_ZC:
391         case RT5640_ANC_CTRL1:
392         case RT5640_ANC_CTRL2:
393         case RT5640_ANC_CTRL3:
394         case RT5640_JD_CTRL:
395         case RT5640_ANC_JD:
396         case RT5640_IRQ_CTRL1:
397         case RT5640_IRQ_CTRL2:
398         case RT5640_INT_IRQ_ST:
399         case RT5640_GPIO_CTRL1:
400         case RT5640_GPIO_CTRL2:
401         case RT5640_GPIO_CTRL3:
402         case RT5640_DSP_CTRL1:
403         case RT5640_DSP_CTRL2:
404         case RT5640_DSP_CTRL3:
405         case RT5640_DSP_CTRL4:
406         case RT5640_PGM_REG_ARR1:
407         case RT5640_PGM_REG_ARR2:
408         case RT5640_PGM_REG_ARR3:
409         case RT5640_PGM_REG_ARR4:
410         case RT5640_PGM_REG_ARR5:
411         case RT5640_SCB_FUNC:
412         case RT5640_SCB_CTRL:
413         case RT5640_BASE_BACK:
414         case RT5640_MP3_PLUS1:
415         case RT5640_MP3_PLUS2:
416         case RT5640_3D_HP:
417         case RT5640_ADJ_HPF:
418         case RT5640_HP_CALIB_AMP_DET:
419         case RT5640_HP_CALIB2:
420         case RT5640_SV_ZCD1:
421         case RT5640_SV_ZCD2:
422         case RT5640_DUMMY1:
423         case RT5640_DUMMY2:
424         case RT5640_DUMMY3:
425         case RT5640_VENDOR_ID:
426         case RT5640_VENDOR_ID1:
427         case RT5640_VENDOR_ID2:
428                 return 1;
429         default:
430                 return 0;
431         }
432 }
433
434 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
435 {
436         int jack_type;
437         int sclk_src;
438
439         if (jack_insert) {
440                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
441                         snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
442                         snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
443                         snd_soc_write(codec, RT5640_DUMMY1 , 0x3701);
444                 }
445                 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
446                         RT5640_SCLK_SRC_MASK;
447                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
448                         RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
449                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
450                         RT5640_PWR_LDO2, RT5640_PWR_LDO2);
451                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
452                         RT5640_PWR_MB1, RT5640_PWR_MB1);
453                 snd_soc_update_bits(codec, RT5640_MICBIAS,
454                         RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
455                         RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
456                         RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
457                         RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
458                 snd_soc_update_bits(codec, RT5640_DUMMY1,
459                         0x1, 0x1);
460                 msleep(150);
461                 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
462                         jack_type = RT5640_HEADPHO_DET;
463                 else
464                         jack_type = RT5640_HEADSET_DET;
465                 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
466                         RT5640_MB1_OC_CLR, 0);
467                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
468                         RT5640_SCLK_SRC_MASK, sclk_src);
469         } else {
470                 snd_soc_update_bits(codec, RT5640_MICBIAS,
471                         RT5640_MIC1_OVCD_MASK,
472                         RT5640_MIC1_OVCD_DIS);
473
474                 jack_type = RT5640_NO_JACK;
475         }
476
477         return jack_type;
478 }
479 EXPORT_SYMBOL(rt5640_headset_detect);
480
481 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
482 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
483 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
484 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
485 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
486
487 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
488 static unsigned int bst_tlv[] = {
489         TLV_DB_RANGE_HEAD(7),
490         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
491         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
492         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
493         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
494         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
495         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
496         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
497 };
498
499 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
500                 struct snd_ctl_elem_value *ucontrol)
501 {
502         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
503         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
504
505         ucontrol->value.integer.value[0] = rt5640->dmic_en;
506
507         return 0;
508 }
509
510 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
511                 struct snd_ctl_elem_value *ucontrol)
512 {
513         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
514         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
515
516         if (rt5640->dmic_en == ucontrol->value.integer.value[0])
517                 return 0;
518
519         rt5640->dmic_en = ucontrol->value.integer.value[0];
520         switch (rt5640->dmic_en) {
521         case RT5640_DMIC_DIS:
522                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
523                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
524                         RT5640_GP4_PIN_MASK,
525                         RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
526                         RT5640_GP4_PIN_GPIO4);
527                 snd_soc_update_bits(codec, RT5640_DMIC,
528                         RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
529                         RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
530                 snd_soc_update_bits(codec, RT5640_DMIC,
531                         RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
532                         RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
533                 break;
534
535         case RT5640_DMIC1:
536                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
537                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
538                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
539                 snd_soc_update_bits(codec, RT5640_DMIC,
540                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
541                         RT5640_DMIC_1_DP_MASK,
542                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
543                         RT5640_DMIC_1_DP_IN1P);
544                 snd_soc_update_bits(codec, RT5640_DMIC,
545                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
546                 break;
547
548         case RT5640_DMIC2:
549                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
550                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
551                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
552                 snd_soc_update_bits(codec, RT5640_DMIC,
553                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
554                         RT5640_DMIC_2_DP_MASK,
555                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
556                         RT5640_DMIC_2_DP_IN1N);
557                 snd_soc_update_bits(codec, RT5640_DMIC,
558                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
559                 break;
560
561         default:
562                 return -EINVAL;
563         }
564
565         return 0;
566 }
567
568
569 /* IN1/IN2 Input Type */
570 static const char *rt5640_input_mode[] = {
571         "Single ended", "Differential"};
572
573 static const SOC_ENUM_SINGLE_DECL(
574         rt5640_in1_mode_enum, RT5640_IN1_IN2,
575         RT5640_IN_SFT1, rt5640_input_mode);
576
577 static const SOC_ENUM_SINGLE_DECL(
578         rt5640_in2_mode_enum, RT5640_IN3_IN4,
579         RT5640_IN_SFT2, rt5640_input_mode);
580
581 /* Interface data select */
582 static const char *rt5640_data_select[] = {
583         "Normal", "left copy to right", "right copy to left", "Swap"};
584
585 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
586                                 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
587
588 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
589                                 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
590
591 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
592                                 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
593
594 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
595                                 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
596
597 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
598                                 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
599
600 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
601                                 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
602
603 /* Class D speaker gain ratio */
604 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
605         "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
606
607 static const SOC_ENUM_SINGLE_DECL(
608         rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
609         RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
610
611 /* DMIC */
612 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
613
614 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
615
616
617
618 #ifdef RT5640_REG_RW
619 #define REGVAL_MAX 0xffff
620 static unsigned int regctl_addr;
621 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
622                         struct snd_ctl_elem_info *uinfo) {
623         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
624         uinfo->count = 2;
625         uinfo->value.integer.min = 0;
626         uinfo->value.integer.max = REGVAL_MAX;
627         return 0;
628 }
629
630 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
631                         struct snd_ctl_elem_value *ucontrol)
632 {
633         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
634         ucontrol->value.integer.value[0] = regctl_addr;
635         ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
636         return 0;
637 }
638
639 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
640                         struct snd_ctl_elem_value *ucontrol)
641 {
642         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
643         regctl_addr = ucontrol->value.integer.value[0];
644         if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
645                 snd_soc_write(codec, regctl_addr,
646                 ucontrol->value.integer.value[1]);
647         return 0;
648 }
649 #endif
650
651
652 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
653 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
654
655 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
656                 struct snd_ctl_elem_value *ucontrol)
657 {
658         struct soc_mixer_control *mc =
659                 (struct soc_mixer_control *)kcontrol->private_value;
660         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
661         unsigned int val = snd_soc_read(codec, mc->reg);
662
663         ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
664                 ((val & RT5640_L_VOL_MASK) >> mc->shift);
665         ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
666                 (val & RT5640_R_VOL_MASK);
667
668         return 0;
669 }
670
671 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
672                 struct snd_ctl_elem_value *ucontrol)
673 {
674         struct soc_mixer_control *mc =
675                 (struct soc_mixer_control *)kcontrol->private_value;
676         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
677         unsigned int val, val2;
678
679         val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
680         val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
681         return snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
682                         RT5640_R_VOL_MASK, val << mc->shift | val2);
683 }
684
685
686 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
687         /* Speaker Output Volume */
688         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
689                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
690                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
691
692         /* Headphone Output Volume */
693         SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
694                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
695
696         SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
697                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
698                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
699
700         /* OUTPUT Control */
701         SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
702                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
703         SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
704                 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
705         SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
706                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
707         /* MONO Output Control */
708         SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
709                                 RT5640_L_MUTE_SFT, 1, 1),
710         /* DAC Digital Volume */
711         SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
712                 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
713         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
714                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
715                         175, 0, dac_vol_tlv),
716         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
717                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
718                         175, 0, dac_vol_tlv),
719         /* IN1/IN2 Control */
720         SOC_ENUM("IN1 Mode Control",  rt5640_in1_mode_enum),
721         SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
722                 RT5640_BST_SFT1, 8, 0, bst_tlv),
723         SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
724         SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
725                 RT5640_BST_SFT2, 8, 0, bst_tlv),
726         /* INL/INR Volume Control */
727         SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
728                         RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
729                         31, 1, in_vol_tlv),
730         /* ADC Digital Volume Control */
731         SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
732                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
733         SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
734                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
735                         127, 0, adc_vol_tlv),
736         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
737                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
738                         127, 0, adc_vol_tlv),
739         /* ADC Boost Volume Control */
740         SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
741                         RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
742                         3, 0, adc_bst_tlv),
743         /* Class D speaker gain ratio */
744         SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
745         /* DMIC */
746         SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
747                 rt5640_dmic_get, rt5640_dmic_put),
748
749 #ifdef RT5640_REG_RW
750         {
751                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
752                 .name = "Register Control",
753                 .info = rt5640_regctl_info,
754                 .get = rt5640_regctl_get,
755                 .put = rt5640_regctl_put,
756         },
757 #endif
758 };
759
760 /**
761  * set_dmic_clk - Set parameter of dmic.
762  *
763  * @w: DAPM widget.
764  * @kcontrol: The kcontrol of this widget.
765  * @event: Event id.
766  *
767  * Choose dmic clock between 1MHz and 3MHz.
768  * It is better for clock to approximate 3MHz.
769  */
770 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
771         struct snd_kcontrol *kcontrol, int event)
772 {
773         struct snd_soc_codec *codec = w->codec;
774         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
775         int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
776
777         rate = rt5640->lrck[rt5640->aif_pu] << 8;
778         red = 3000000 * 12;
779         for (i = 0; i < ARRAY_SIZE(div); i++) {
780                 bound = div[i] * 3000000;
781                 if (rate > bound)
782                         continue;
783                 temp = bound - rate;
784                 if (temp < red) {
785                         red = temp;
786                         idx = i;
787                 }
788         }
789         if (idx < 0)
790                 dev_err(codec->dev, "Failed to set DMIC clock\n");
791         else
792                 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
793                                         idx << RT5640_DMIC_CLK_SFT);
794         return idx;
795 }
796
797 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
798                          struct snd_soc_dapm_widget *sink)
799 {
800         unsigned int val;
801
802         val = snd_soc_read(source->codec, RT5640_GLB_CLK);
803         val &= RT5640_SCLK_SRC_MASK;
804         if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
805                 return 1;
806         else
807                 return 0;
808 }
809
810 /* Digital Mixer */
811 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
812         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
813                         RT5640_M_ADC_L1_SFT, 1, 1),
814         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
815                         RT5640_M_ADC_L2_SFT, 1, 1),
816 };
817
818 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
819         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
820                         RT5640_M_ADC_R1_SFT, 1, 1),
821         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
822                         RT5640_M_ADC_R2_SFT, 1, 1),
823 };
824
825 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
826         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
827                         RT5640_M_MONO_ADC_L1_SFT, 1, 1),
828         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
829                         RT5640_M_MONO_ADC_L2_SFT, 1, 1),
830 };
831
832 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
833         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
834                         RT5640_M_MONO_ADC_R1_SFT, 1, 1),
835         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
836                         RT5640_M_MONO_ADC_R2_SFT, 1, 1),
837 };
838
839 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
840         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
841                         RT5640_M_ADCMIX_L_SFT, 1, 1),
842         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
843                         RT5640_M_IF1_DAC_L_SFT, 1, 1),
844 };
845
846 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
847         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
848                         RT5640_M_ADCMIX_R_SFT, 1, 1),
849         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
850                         RT5640_M_IF1_DAC_R_SFT, 1, 1),
851 };
852
853 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
854         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
855                         RT5640_M_DAC_L1_SFT, 1, 1),
856         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
857                         RT5640_M_DAC_L2_SFT, 1, 1),
858         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
859                         RT5640_M_ANC_DAC_L_SFT, 1, 1),
860 };
861
862 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
863         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
864                         RT5640_M_DAC_R1_SFT, 1, 1),
865         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
866                         RT5640_M_DAC_R2_SFT, 1, 1),
867         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
868                         RT5640_M_ANC_DAC_R_SFT, 1, 1),
869 };
870
871 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
872         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
873                         RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
874         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
875                         RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
876         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
877                         RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
878 };
879
880 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
881         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
882                         RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
883         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
884                         RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
885         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
886                         RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
887 };
888
889 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
890         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
891                         RT5640_M_STO_L_DAC_L_SFT, 1, 1),
892         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
893                         RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
894 };
895
896 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
897         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
898                         RT5640_M_STO_R_DAC_R_SFT, 1, 1),
899         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
900                         RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
901 };
902
903 /* Analog Input Mixer */
904 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
905         SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
906                         RT5640_M_HP_L_RM_L_SFT, 1, 1),
907         SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
908                         RT5640_M_IN_L_RM_L_SFT, 1, 1),
909         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
910                         RT5640_M_BST4_RM_L_SFT, 1, 1),
911         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
912                         RT5640_M_BST1_RM_L_SFT, 1, 1),
913         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
914                         RT5640_M_OM_L_RM_L_SFT, 1, 1),
915 };
916
917 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
918         SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
919                         RT5640_M_HP_R_RM_R_SFT, 1, 1),
920         SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
921                         RT5640_M_IN_R_RM_R_SFT, 1, 1),
922         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
923                         RT5640_M_BST4_RM_R_SFT, 1, 1),
924         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
925                         RT5640_M_BST1_RM_R_SFT, 1, 1),
926         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
927                         RT5640_M_OM_R_RM_R_SFT, 1, 1),
928 };
929
930 /* Analog Output Mixer */
931 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
932         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
933                         RT5640_M_RM_L_SM_L_SFT, 1, 1),
934         SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
935                         RT5640_M_IN_L_SM_L_SFT, 1, 1),
936         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
937                         RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
938         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
939                         RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
940         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
941                         RT5640_M_OM_L_SM_L_SFT, 1, 1),
942 };
943
944 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
945         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
946                         RT5640_M_RM_R_SM_R_SFT, 1, 1),
947         SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
948                         RT5640_M_IN_R_SM_R_SFT, 1, 1),
949         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
950                         RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
951         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
952                         RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
953         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
954                         RT5640_M_OM_R_SM_R_SFT, 1, 1),
955 };
956
957 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
958         SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
959                         RT5640_M_SM_L_OM_L_SFT, 1, 1),
960         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
961                         RT5640_M_BST1_OM_L_SFT, 1, 1),
962         SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
963                         RT5640_M_IN_L_OM_L_SFT, 1, 1),
964         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
965                         RT5640_M_RM_L_OM_L_SFT, 1, 1),
966         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
967                         RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
968         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
969                         RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
970         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
971                         RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
972 };
973
974 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
975         SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
976                         RT5640_M_SM_L_OM_R_SFT, 1, 1),
977         SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
978                         RT5640_M_BST4_OM_R_SFT, 1, 1),
979         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
980                         RT5640_M_BST1_OM_R_SFT, 1, 1),
981         SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
982                         RT5640_M_IN_R_OM_R_SFT, 1, 1),
983         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
984                         RT5640_M_RM_R_OM_R_SFT, 1, 1),
985         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
986                         RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
987         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
988                         RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
989         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
990                         RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
991 };
992
993 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
994         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
995                         RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
996         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
997                         RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
998         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
999                         RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1000         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1001                         RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1002         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1003                         RT5640_M_BST1_SPM_L_SFT, 1, 1),
1004 };
1005
1006 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1007         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1008                         RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1009         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1010                         RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1011         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1012                         RT5640_M_BST1_SPM_R_SFT, 1, 1),
1013 };
1014
1015 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1016         SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1017                         RT5640_M_DAC2_HM_SFT, 1, 1),
1018         SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1019                         RT5640_M_DAC1_HM_SFT, 1, 1),
1020         SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1021                         RT5640_M_HPVOL_HM_SFT, 1, 1),
1022 };
1023
1024 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1025         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1026                         RT5640_M_DAC_L1_LM_SFT, 1, 1),
1027         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1028                         RT5640_M_DAC_R1_LM_SFT, 1, 1),
1029         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1030                         RT5640_M_OV_L_LM_SFT, 1, 1),
1031         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1032                         RT5640_M_OV_R_LM_SFT, 1, 1),
1033 };
1034
1035 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1036         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1037                         RT5640_M_DAC_R2_MM_SFT, 1, 1),
1038         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1039                         RT5640_M_DAC_L2_MM_SFT, 1, 1),
1040         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1041                         RT5640_M_OV_R_MM_SFT, 1, 1),
1042         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1043                         RT5640_M_OV_L_MM_SFT, 1, 1),
1044         SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1045                         RT5640_M_BST1_MM_SFT, 1, 1),
1046 };
1047
1048 /* INL/R source */
1049 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1050
1051 static const SOC_ENUM_SINGLE_DECL(
1052         rt5640_inl_enum, RT5640_INL_INR_VOL,
1053         RT5640_INL_SEL_SFT, rt5640_inl_src);
1054
1055 static const struct snd_kcontrol_new rt5640_inl_mux =
1056         SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1057
1058 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1059
1060 static const SOC_ENUM_SINGLE_DECL(
1061         rt5640_inr_enum, RT5640_INL_INR_VOL,
1062         RT5640_INR_SEL_SFT, rt5640_inr_src);
1063
1064 static const struct snd_kcontrol_new rt5640_inr_mux =
1065         SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1066
1067 /* Stereo ADC source */
1068 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1069
1070 static const SOC_ENUM_SINGLE_DECL(
1071         rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1072         RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1073
1074 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1075         SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1076
1077 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1078         SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1079
1080 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1081
1082 static const SOC_ENUM_SINGLE_DECL(
1083         rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1084         RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1085
1086 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1087         SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1088
1089 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1090         SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1091
1092 /* Mono ADC source */
1093 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1094
1095 static const SOC_ENUM_SINGLE_DECL(
1096         rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1097         RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1098
1099 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1100         SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1101
1102 static const char *rt5640_mono_adc_l2_src[] = {
1103         "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1104 };
1105
1106 static const SOC_ENUM_SINGLE_DECL(
1107         rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1108         RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1109
1110 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1111         SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1112
1113 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1114
1115 static const SOC_ENUM_SINGLE_DECL(
1116         rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1117         RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1118
1119 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1120         SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1121
1122 static const char *rt5640_mono_adc_r2_src[] = {
1123         "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1124 };
1125
1126 static const SOC_ENUM_SINGLE_DECL(
1127         rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1128         RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1129
1130 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1131         SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1132
1133 /* DAC2 channel source */
1134 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1135
1136 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1137                                 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1138
1139 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1140         SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1141
1142 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1143
1144 static const SOC_ENUM_SINGLE_DECL(
1145         rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1146         RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1147
1148 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1149         SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1150
1151 /* Interface 2  ADC channel source */
1152 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1153
1154 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1155                         RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1156
1157 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1158         SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1159
1160 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1161
1162 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1163                         RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1164
1165 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1166         SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1167
1168 /* digital interface and iis interface map */
1169 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1170         "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1171         "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1172
1173 static const SOC_ENUM_SINGLE_DECL(
1174         rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1175         RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1176
1177 static const struct snd_kcontrol_new rt5640_dai_mux =
1178         SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1179
1180 /* SDI select */
1181 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1182
1183 static const SOC_ENUM_SINGLE_DECL(
1184         rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1185         RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1186
1187 static const struct snd_kcontrol_new rt5640_sdi_mux =
1188         SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1189
1190 static int spk_event(struct snd_soc_dapm_widget *w,
1191         struct snd_kcontrol *kcontrol, int event)
1192 {
1193         struct snd_soc_codec *codec = w->codec;
1194
1195         switch (event) {
1196         case SND_SOC_DAPM_POST_PMU:
1197                 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1198                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1199                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1200                 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1201                 break;
1202
1203         case SND_SOC_DAPM_PRE_PMD:
1204                 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1205                 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1206                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1207                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1208                 break;
1209
1210         default:
1211                 return 0;
1212         }
1213         return 0;
1214 }
1215
1216 static int hp_event(struct snd_soc_dapm_widget *w,
1217         struct snd_kcontrol *kcontrol, int event)
1218 {
1219         switch (event) {
1220         case SND_SOC_DAPM_POST_PMU:
1221                 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1222                 break;
1223
1224         case SND_SOC_DAPM_PRE_PMD:
1225                 pr_info("hp_event --SND_SOC_DAPM_POST_PMD\n");
1226                 break;
1227
1228         default:
1229                 return 0;
1230         }
1231         return 0;
1232 }
1233
1234 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
1235         struct snd_kcontrol *kcontrol, int event)
1236 {
1237         struct snd_soc_codec *codec = w->codec;
1238         unsigned int val, mask;
1239
1240         switch (event) {
1241         case SND_SOC_DAPM_PRE_PMU:
1242                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1243                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
1244                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
1245                 snd_soc_update_bits(codec, RT5640_DMIC,
1246                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
1247                         RT5640_DMIC_1_DP_MASK,
1248                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
1249                         RT5640_DMIC_1_DP_IN1P);
1250                 snd_soc_update_bits(codec, RT5640_DMIC,
1251                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
1252         default:
1253                 return 0;
1254         }
1255
1256         return 0;
1257 }
1258
1259 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
1260         struct snd_kcontrol *kcontrol, int event)
1261 {
1262         struct snd_soc_codec *codec = w->codec;
1263         unsigned int val, mask;
1264
1265         switch (event) {
1266         case SND_SOC_DAPM_PRE_PMU:
1267                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1268                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
1269                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
1270                 snd_soc_update_bits(codec, RT5640_DMIC,
1271                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
1272                         RT5640_DMIC_2_DP_MASK,
1273                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
1274                         RT5640_DMIC_2_DP_IN1N);
1275                 snd_soc_update_bits(codec, RT5640_DMIC,
1276                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
1277         default:
1278                 return 0;
1279         }
1280
1281         return 0;
1282 }
1283
1284 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1285         SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1286                         RT5640_PWR_PLL_BIT, 0, NULL, 0),
1287         /* Input Side */
1288         /* micbias */
1289         SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1290                         RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1291         SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1292                         RT5640_PWR_MB1_BIT, 0),
1293         SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1294                         RT5640_PWR_MB2_BIT, 0),
1295         /* Input Lines */
1296
1297         SND_SOC_DAPM_INPUT("MIC1"),
1298         SND_SOC_DAPM_INPUT("MIC2"),
1299         SND_SOC_DAPM_INPUT("DMIC1"),
1300         SND_SOC_DAPM_INPUT("DMIC2"),
1301         SND_SOC_DAPM_INPUT("IN1P"),
1302         SND_SOC_DAPM_INPUT("IN1N"),
1303         SND_SOC_DAPM_INPUT("IN2P"),
1304         SND_SOC_DAPM_INPUT("IN2N"),
1305 #if 0
1306         SND_SOC_DAPM_INPUT("DMIC L1"),
1307         SND_SOC_DAPM_INPUT("DMIC R1"),
1308         SND_SOC_DAPM_INPUT("DMIC L2"),
1309         SND_SOC_DAPM_INPUT("DMIC R2"),
1310 #else
1311         SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
1312                 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1313         SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1314         SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
1315                 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1316         SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1317 #endif
1318         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1319                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1320         /* Boost */
1321         SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1322                 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1323         SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1324                 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1325         /* Input Volume */
1326         SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1327                 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1328         SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1329                 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1330         /* IN Mux */
1331         SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1332         SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1333         /* REC Mixer */
1334         SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1335                         rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1336         SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1337                         rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1338         /* ADCs */
1339         SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1340                         RT5640_PWR_ADC_L_BIT, 0),
1341         SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1342                         RT5640_PWR_ADC_R_BIT, 0),
1343         /* ADC Mux */
1344         SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1345                                 &rt5640_sto_adc_l2_mux),
1346         SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1347                                 &rt5640_sto_adc_r2_mux),
1348         SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1349                                 &rt5640_sto_adc_l1_mux),
1350         SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1351                                 &rt5640_sto_adc_r1_mux),
1352         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1353                                 &rt5640_mono_adc_l2_mux),
1354         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1355                                 &rt5640_mono_adc_l1_mux),
1356         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1357                                 &rt5640_mono_adc_r1_mux),
1358         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1359                                 &rt5640_mono_adc_r2_mux),
1360         /* ADC Mixer */
1361         SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1362                 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1363         SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1364                 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1365         SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1366                 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1367         SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1368                 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1369         SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1370                 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1371         SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1372                 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1373         SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1374                 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1375
1376         /* IF2 Mux */
1377         SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1378                                 &rt5640_if2_adc_l_mux),
1379         SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1380                                 &rt5640_if2_adc_r_mux),
1381
1382         /* Digital Interface */
1383         SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1384                 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1385         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1386         SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1387         SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1388         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1389         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1390         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1391         SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1392                 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1393         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1394         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1395         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1396         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1397         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1398         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1399         SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1400                 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1401         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1402         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1403         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1404         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1405         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1406         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1407
1408         /* Digital Interface Select */
1409         SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1410         SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1411         SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1412         SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1413         SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1414
1415         SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1416         SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1417         SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1418         SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1419         SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1420
1421         SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1422         SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1423
1424         /* Audio Interface */
1425         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1426         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1427         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1428         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1429         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1430         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1431
1432         /* Audio DSP */
1433         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1434
1435         /* ANC */
1436         SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1437
1438         /* Output Side */
1439         /* DAC mixer before sound effect  */
1440         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1441                 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1442         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1443                 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1444
1445         /* DAC2 channel Mux */
1446         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1447                                 &rt5640_dac_l2_mux),
1448         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1449                                 &rt5640_dac_r2_mux),
1450
1451         /* DAC Mixer */
1452         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1453                 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1454         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1455                 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1456         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1457                 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1458         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1459                 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1460         SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1461                 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1462         SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1463                 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1464         /* DACs */
1465         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1466                         RT5640_PWR_DAC_L1_BIT, 0),
1467         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1468                         RT5640_PWR_DAC_L2_BIT, 0),
1469         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1470                         RT5640_PWR_DAC_R1_BIT, 0),
1471         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1472                         RT5640_PWR_DAC_R2_BIT, 0),
1473         /* SPK/OUT Mixer */
1474         SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1475                 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1476         SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1477                 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1478         SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1479                 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1480         SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1481                 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1482         /* Ouput Volume */
1483         SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1484                 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1485         SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1486                 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1487         SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1488                 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1489         SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1490                 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1491         SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1492                 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1493         SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1494                 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1495         /* SPO/HPO/LOUT/Mono Mixer */
1496         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1497                 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1498         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1499                 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1500
1501         SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1502                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1503         SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1504                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1505         SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1506                 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1507         SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1508                 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1509
1510         SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1511                 RT5640_PWR_MA_BIT, 0, NULL, 0),
1512
1513         SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1514         SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1515                                         SND_SOC_DAPM_POST_PMU),
1516
1517         SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1518                 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1519
1520         SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1521                 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1522
1523         SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1524                 SND_SOC_NOPM, 0, spk_event,
1525                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1526
1527         /* Output Lines */
1528         SND_SOC_DAPM_OUTPUT("SPOLP"),
1529         SND_SOC_DAPM_OUTPUT("SPOLN"),
1530         SND_SOC_DAPM_OUTPUT("SPORP"),
1531         SND_SOC_DAPM_OUTPUT("SPORN"),
1532         SND_SOC_DAPM_OUTPUT("HPOL"),
1533         SND_SOC_DAPM_OUTPUT("HPOR"),
1534         SND_SOC_DAPM_OUTPUT("LOUTL"),
1535         SND_SOC_DAPM_OUTPUT("LOUTR"),
1536         SND_SOC_DAPM_OUTPUT("MonoP"),
1537         SND_SOC_DAPM_OUTPUT("MonoN"),
1538 };
1539
1540 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1541         {"IN1P", NULL, "LDO2"},
1542         {"IN2P", NULL, "LDO2"},
1543
1544         {"IN1P", NULL, "MIC1"},
1545         {"IN1N", NULL, "MIC1"},
1546         {"IN2P", NULL, "MIC2"},
1547         {"IN2N", NULL, "MIC2"},
1548
1549         {"DMIC L1", NULL, "DMIC1"},
1550         {"DMIC R1", NULL, "DMIC1"},
1551         {"DMIC L2", NULL, "DMIC2"},
1552         {"DMIC R2", NULL, "DMIC2"},
1553
1554         {"BST1", NULL, "IN1P"},
1555         {"BST1", NULL, "IN1N"},
1556         {"BST2", NULL, "IN2P"},
1557         {"BST2", NULL, "IN2N"},
1558
1559         {"INL VOL", NULL, "IN2P"},
1560         {"INR VOL", NULL, "IN2N"},
1561
1562         {"RECMIXL", "HPOL Switch", "HPOL"},
1563         {"RECMIXL", "INL Switch", "INL VOL"},
1564         {"RECMIXL", "BST2 Switch", "BST2"},
1565         {"RECMIXL", "BST1 Switch", "BST1"},
1566         {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1567
1568         {"RECMIXR", "HPOR Switch", "HPOR"},
1569         {"RECMIXR", "INR Switch", "INR VOL"},
1570         {"RECMIXR", "BST2 Switch", "BST2"},
1571         {"RECMIXR", "BST1 Switch", "BST1"},
1572         {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1573
1574         {"ADC L", NULL, "RECMIXL"},
1575         {"ADC R", NULL, "RECMIXR"},
1576
1577         {"DMIC L1", NULL, "DMIC CLK"},
1578         {"DMIC L2", NULL, "DMIC CLK"},
1579
1580         {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1581         {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1582         {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1583         {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1584         {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1585
1586         {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1587         {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1588         {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1589         {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1590         {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1591
1592         {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1593         {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1594         {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1595         {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1596         {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1597
1598         {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1599         {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1600         {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1601         {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1602         {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1603
1604         {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1605         {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1606         {"Stereo ADC MIXL", NULL, "stereo filter"},
1607         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1608
1609         {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1610         {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1611         {"Stereo ADC MIXR", NULL, "stereo filter"},
1612         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1613
1614         {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1615         {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1616         {"Mono ADC MIXL", NULL, "mono left filter"},
1617         {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1618
1619         {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1620         {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1621         {"Mono ADC MIXR", NULL, "mono right filter"},
1622         {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1623
1624         {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1625         {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1626
1627         {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1628         {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1629         {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1630         {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1631         {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1632         {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1633
1634         {"IF1 ADC", NULL, "I2S1"},
1635         {"IF1 ADC", NULL, "IF1 ADC L"},
1636         {"IF1 ADC", NULL, "IF1 ADC R"},
1637         {"IF2 ADC", NULL, "I2S2"},
1638         {"IF2 ADC", NULL, "IF2 ADC L"},
1639         {"IF2 ADC", NULL, "IF2 ADC R"},
1640         {"IF3 ADC", NULL, "I2S3"},
1641         {"IF3 ADC", NULL, "IF3 ADC L"},
1642         {"IF3 ADC", NULL, "IF3 ADC R"},
1643
1644         {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1645         {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1646         {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1647         {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1648         {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1649         {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1650         {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1651         {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1652         {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1653         {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1654
1655         {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1656         {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1657         {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1658         {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1659         {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1660         {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1661         {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1662         {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1663         {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1664         {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1665
1666         {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1667         {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1668         {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1669         {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1670         {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1671         {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1672         {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1673         {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1674
1675         {"AIF1TX", NULL, "DAI1 TX Mux"},
1676         {"AIF1TX", NULL, "SDI1 TX Mux"},
1677         {"AIF2TX", NULL, "DAI2 TX Mux"},
1678         {"AIF2TX", NULL, "SDI2 TX Mux"},
1679         {"AIF3TX", NULL, "DAI3 TX Mux"},
1680
1681         {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1682         {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1683         {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1684         {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1685         {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1686         {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1687         {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1688         {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1689
1690         {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1691         {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1692         {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1693         {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
1694         {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
1695         {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1696         {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
1697         {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
1698
1699         {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
1700         {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
1701         {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
1702         {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
1703         {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
1704         {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
1705         {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
1706         {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
1707
1708         {"IF1 DAC", NULL, "I2S1"},
1709         {"IF1 DAC", NULL, "DAI1 RX Mux"},
1710         {"IF2 DAC", NULL, "I2S2"},
1711         {"IF2 DAC", NULL, "DAI2 RX Mux"},
1712         {"IF3 DAC", NULL, "I2S3"},
1713         {"IF3 DAC", NULL, "DAI3 RX Mux"},
1714
1715         {"IF1 DAC L", NULL, "IF1 DAC"},
1716         {"IF1 DAC R", NULL, "IF1 DAC"},
1717         {"IF2 DAC L", NULL, "IF2 DAC"},
1718         {"IF2 DAC R", NULL, "IF2 DAC"},
1719         {"IF3 DAC L", NULL, "IF3 DAC"},
1720         {"IF3 DAC R", NULL, "IF3 DAC"},
1721
1722         {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1723         {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1724         {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1725         {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1726
1727         {"ANC", NULL, "Stereo ADC MIXL"},
1728         {"ANC", NULL, "Stereo ADC MIXR"},
1729
1730         {"Audio DSP", NULL, "DAC MIXL"},
1731         {"Audio DSP", NULL, "DAC MIXR"},
1732
1733         {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1734         {"DAC L2 Mux", "IF3", "IF3 DAC L"},
1735         {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1736
1737         {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1738         {"DAC R2 Mux", "IF3", "IF3 DAC R"},
1739
1740         {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1741         {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1742         {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1743         {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1744         {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1745         {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1746
1747         {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1748         {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1749         {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1750         {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1751         {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1752         {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1753
1754         {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1755         {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1756         {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1757         {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1758
1759         {"DAC L1", NULL, "Stereo DAC MIXL"},
1760         {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1761         {"DAC R1", NULL, "Stereo DAC MIXR"},
1762         {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1763         {"DAC L2", NULL, "Mono DAC MIXL"},
1764         {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1765         {"DAC R2", NULL, "Mono DAC MIXR"},
1766         {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1767
1768         {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1769         {"SPK MIXL", "INL Switch", "INL VOL"},
1770         {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1771         {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1772         {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1773         {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1774         {"SPK MIXR", "INR Switch", "INR VOL"},
1775         {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1776         {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1777         {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1778
1779         {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1780         {"OUT MIXL", "BST1 Switch", "BST1"},
1781         {"OUT MIXL", "INL Switch", "INL VOL"},
1782         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1783         {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1784         {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1785         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1786
1787         {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1788         {"OUT MIXR", "BST2 Switch", "BST2"},
1789         {"OUT MIXR", "BST1 Switch", "BST1"},
1790         {"OUT MIXR", "INR Switch", "INR VOL"},
1791         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1792         {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1793         {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1794         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1795
1796         {"SPKVOL L", NULL, "SPK MIXL"},
1797         {"SPKVOL R", NULL, "SPK MIXR"},
1798         {"HPOVOL L", NULL, "OUT MIXL"},
1799         {"HPOVOL R", NULL, "OUT MIXR"},
1800         {"OUTVOL L", NULL, "OUT MIXL"},
1801         {"OUTVOL R", NULL, "OUT MIXR"},
1802
1803         {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1804         {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1805         {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1806         {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1807         {"SPOL MIX", "BST1 Switch", "BST1"},
1808         {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1809         {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1810         {"SPOR MIX", "BST1 Switch", "BST1"},
1811
1812         {"HPOL MIX", "DAC2 Switch", "DAC L2"},
1813         {"HPOL MIX", "DAC1 Switch", "DAC L1"},
1814         {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
1815         {"HPOR MIX", "DAC2 Switch", "DAC R2"},
1816         {"HPOR MIX", "DAC1 Switch", "DAC R1"},
1817         {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
1818
1819         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1820         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1821         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1822         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1823
1824         {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1825         {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1826         {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1827         {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1828         {"Mono MIX", "BST1 Switch", "BST1"},
1829
1830         {"HP L amp", NULL, "HPOL MIX"},
1831         {"HP R amp", NULL, "HPOR MIX"},
1832
1833 /*      {"HP L amp", NULL, "Improve HP amp drv"},
1834         {"HP R amp", NULL, "Improve HP amp drv"}, */
1835
1836         {"SPOLP", NULL, "SPOL MIX"},
1837         {"SPOLN", NULL, "SPOL MIX"},
1838         {"SPORP", NULL, "SPOR MIX"},
1839         {"SPORN", NULL, "SPOR MIX"},
1840
1841         {"SPOLP", NULL, "Improve SPK amp drv"},
1842         {"SPOLN", NULL, "Improve SPK amp drv"},
1843         {"SPORP", NULL, "Improve SPK amp drv"},
1844         {"SPORN", NULL, "Improve SPK amp drv"},
1845
1846         {"HPOL", NULL, "Improve HP amp drv"},
1847         {"HPOR", NULL, "Improve HP amp drv"},
1848
1849         {"HPOL", NULL, "HP L amp"},
1850         {"HPOR", NULL, "HP R amp"},
1851         {"LOUTL", NULL, "LOUT MIX"},
1852         {"LOUTR", NULL, "LOUT MIX"},
1853         {"MonoP", NULL, "Mono MIX"},
1854         {"MonoN", NULL, "Mono MIX"},
1855         {"MonoP", NULL, "Improve mono amp drv"},
1856 };
1857
1858 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1859 {
1860         int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
1861
1862         if (codec == NULL)
1863                 return -EINVAL;
1864
1865         val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1866         switch (dai_id) {
1867         case RT5640_AIF1:
1868                 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
1869                         val == RT5640_IF_113)
1870                         ret |= RT5640_U_IF1;
1871                 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
1872                         val == RT5640_IF_113)
1873                         ret |= RT5640_U_IF2;
1874                 if (val == RT5640_IF_321 || val == RT5640_IF_231)
1875                         ret |= RT5640_U_IF3;
1876                 break;
1877
1878         case RT5640_AIF2:
1879                 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
1880                         val == RT5640_IF_223)
1881                         ret |= RT5640_U_IF1;
1882                 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
1883                         val == RT5640_IF_223)
1884                         ret |= RT5640_U_IF2;
1885                 if (val == RT5640_IF_132 || val == RT5640_IF_312)
1886                         ret |= RT5640_U_IF3;
1887                 break;
1888
1889 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
1890         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1891         case RT5640_AIF3:
1892                 if (val == RT5640_IF_312 || val == RT5640_IF_321)
1893                         ret |= RT5640_U_IF1;
1894                 if (val == RT5640_IF_132 || val == RT5640_IF_231)
1895                         ret |= RT5640_U_IF2;
1896                 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
1897                         val == RT5640_IF_113 || val == RT5640_IF_223)
1898                         ret |= RT5640_U_IF3;
1899                 break;
1900 #endif
1901
1902         default:
1903                 ret = -EINVAL;
1904                 break;
1905         }
1906
1907         return ret;
1908 }
1909
1910 static int get_clk_info(int sclk, int rate)
1911 {
1912         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1913
1914         if (sclk <= 0 || rate <= 0)
1915                 return -EINVAL;
1916
1917         rate = rate << 8;
1918         for (i = 0; i < ARRAY_SIZE(pd); i++)
1919                 if (sclk == rate * pd[i])
1920                         return i;
1921
1922         return -EINVAL;
1923 }
1924
1925 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1926         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1927 {
1928         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1929         struct snd_soc_codec *codec = rtd->codec;
1930         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1931         unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1932         int pre_div, bclk_ms, frame_size;
1933
1934         rt5640->lrck[dai->id] = params_rate(params);
1935         pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1936         if (pre_div < 0) {
1937                 dev_err(codec->dev, "Unsupported clock setting\n");
1938                 return -EINVAL;
1939         }
1940         frame_size = snd_soc_params_to_frame_size(params);
1941         if (frame_size < 0) {
1942                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1943                 return -EINVAL;
1944         }
1945         bclk_ms = frame_size > 32 ? 1 : 0;
1946         rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1947
1948         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1949                 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1950         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1951                                 bclk_ms, pre_div, dai->id);
1952
1953         switch (params_format(params)) {
1954         case SNDRV_PCM_FORMAT_S16_LE:
1955                 break;
1956         case SNDRV_PCM_FORMAT_S20_3LE:
1957                 val_len |= RT5640_I2S_DL_20;
1958                 break;
1959         case SNDRV_PCM_FORMAT_S24_LE:
1960                 val_len |= RT5640_I2S_DL_24;
1961                 break;
1962         case SNDRV_PCM_FORMAT_S8:
1963                 val_len |= RT5640_I2S_DL_8;
1964                 break;
1965         default:
1966                 return -EINVAL;
1967         }
1968
1969         dai_sel = get_sdp_info(codec, dai->id);
1970         if (dai_sel < 0) {
1971                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1972                 return -EINVAL;
1973         }
1974         if (dai_sel & RT5640_U_IF1) {
1975                 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1976                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1977                         pre_div << RT5640_I2S_PD1_SFT;
1978                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1979                         RT5640_I2S_DL_MASK, val_len);
1980                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1981         }
1982         if (dai_sel & RT5640_U_IF2) {
1983                 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1984                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1985                         pre_div << RT5640_I2S_PD2_SFT;
1986                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1987                         RT5640_I2S_DL_MASK, val_len);
1988                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1989         }
1990 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
1991         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1992         if (dai_sel & RT5640_U_IF3) {
1993                 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
1994                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
1995                         pre_div << RT5640_I2S_PD3_SFT;
1996                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
1997                         RT5640_I2S_DL_MASK, val_len);
1998                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1999         }
2000 #endif
2001         return 0;
2002 }
2003
2004 static int rt5640_prepare(struct snd_pcm_substream *substream,
2005                                 struct snd_soc_dai *dai)
2006 {
2007         struct snd_soc_pcm_runtime *rtd = substream->private_data;
2008         struct snd_soc_codec *codec = rtd->codec;
2009         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2010
2011         rt5640->aif_pu = dai->id;
2012         return 0;
2013 }
2014
2015 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2016 {
2017         struct snd_soc_codec *codec = dai->codec;
2018         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2019         unsigned int reg_val = 0, dai_sel;
2020
2021         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2022         case SND_SOC_DAIFMT_CBM_CFM:
2023                 rt5640->master[dai->id] = 1;
2024                 break;
2025         case SND_SOC_DAIFMT_CBS_CFS:
2026                 reg_val |= RT5640_I2S_MS_S;
2027                 rt5640->master[dai->id] = 0;
2028                 break;
2029         default:
2030                 return -EINVAL;
2031         }
2032
2033         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2034         case SND_SOC_DAIFMT_NB_NF:
2035                 break;
2036         case SND_SOC_DAIFMT_IB_NF:
2037                 reg_val |= RT5640_I2S_BP_INV;
2038                 break;
2039         default:
2040                 return -EINVAL;
2041         }
2042
2043         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2044         case SND_SOC_DAIFMT_I2S:
2045                 break;
2046         case SND_SOC_DAIFMT_LEFT_J:
2047                 reg_val |= RT5640_I2S_DF_LEFT;
2048                 break;
2049         case SND_SOC_DAIFMT_DSP_A:
2050                 reg_val |= RT5640_I2S_DF_PCM_A;
2051                 break;
2052         case SND_SOC_DAIFMT_DSP_B:
2053                 reg_val  |= RT5640_I2S_DF_PCM_B;
2054                 break;
2055         default:
2056                 return -EINVAL;
2057         }
2058
2059         dai_sel = get_sdp_info(codec, dai->id);
2060         if (dai_sel < 0) {
2061                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2062                 return -EINVAL;
2063         }
2064         if (dai_sel & RT5640_U_IF1) {
2065                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2066                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2067                         RT5640_I2S_DF_MASK, reg_val);
2068         }
2069         if (dai_sel & RT5640_U_IF2) {
2070                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2071                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2072                         RT5640_I2S_DF_MASK, reg_val);
2073         }
2074 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2075         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2076         if (dai_sel & RT5640_U_IF3) {
2077                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2078                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2079                         RT5640_I2S_DF_MASK, reg_val);
2080         }
2081 #endif
2082         return 0;
2083 }
2084
2085 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2086                 int clk_id, unsigned int freq, int dir)
2087 {
2088         struct snd_soc_codec *codec = dai->codec;
2089         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2090         unsigned int reg_val = 0;
2091
2092         if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
2093                 return 0;
2094
2095         switch (clk_id) {
2096         case RT5640_SCLK_S_MCLK:
2097                 reg_val |= RT5640_SCLK_SRC_MCLK;
2098                 break;
2099         case RT5640_SCLK_S_PLL1:
2100                 reg_val |= RT5640_SCLK_SRC_PLL1;
2101                 break;
2102         case RT5640_SCLK_S_PLL1_TK:
2103                 reg_val |= RT5640_SCLK_SRC_PLL1T;
2104                 break;
2105         case RT5640_SCLK_S_RCCLK:
2106                 reg_val |= RT5640_SCLK_SRC_RCCLK;
2107                 break;
2108         default:
2109                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2110                 return -EINVAL;
2111         }
2112         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2113                 RT5640_SCLK_SRC_MASK, reg_val);
2114         rt5640->sysclk = freq;
2115         rt5640->sysclk_src = clk_id;
2116
2117         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2118         return 0;
2119 }
2120
2121 /**
2122  * rt5640_pll_calc - Calcualte PLL M/N/K code.
2123  * @freq_in: external clock provided to codec.
2124  * @freq_out: target clock which codec works on.
2125  * @pll_code: Pointer to structure with M, N, K and bypass flag.
2126  *
2127  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2128  * which make calculation more efficiently.
2129  *
2130  * Returns 0 for success or negative error code.
2131  */
2132 static int rt5640_pll_calc(const unsigned int freq_in,
2133         const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2134 {
2135         int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2136         int n, m, red, n_t, m_t, in_t, out_t, red_t = abs(freq_out - freq_in);
2137         bool bypass = false;
2138
2139         if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2140                 return -EINVAL;
2141
2142         for (n_t = 0; n_t <= max_n; n_t++) {
2143                 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
2144                 if (in_t < 0)
2145                         continue;
2146                 if (in_t == freq_out) {
2147                         bypass = true;
2148                         n = n_t;
2149                         goto code_find;
2150                 }
2151                 for (m_t = 0; m_t <= max_m; m_t++) {
2152                         out_t = in_t / (m_t + 2);
2153                         red = abs(out_t - freq_out);
2154                         if (red < red_t) {
2155                                 n = n_t;
2156                                 m = m_t;
2157                                 if (red == 0)
2158                                         goto code_find;
2159                                 red_t = red;
2160                         }
2161                 }
2162         }
2163         pr_debug("Only get approximation about PLL\n");
2164
2165 code_find:
2166
2167         pll_code->m_bp = bypass;
2168         pll_code->m_code = m;
2169         pll_code->n_code = n;
2170         pll_code->k_code = 2;
2171         return 0;
2172 }
2173
2174 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2175                         unsigned int freq_in, unsigned int freq_out)
2176 {
2177         struct snd_soc_codec *codec = dai->codec;
2178         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2179         struct rt5640_pll_code pll_code;
2180         int ret, dai_sel;
2181
2182         if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2183             freq_out == rt5640->pll_out)
2184                 return 0;
2185
2186         if (!freq_in || !freq_out) {
2187                 dev_dbg(codec->dev, "PLL disabled\n");
2188
2189                 rt5640->pll_in = 0;
2190                 rt5640->pll_out = 0;
2191                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2192                         RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2193                 return 0;
2194         }
2195
2196         switch (source) {
2197         case RT5640_PLL1_S_MCLK:
2198                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2199                         RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2200                 break;
2201         case RT5640_PLL1_S_BCLK1:
2202         case RT5640_PLL1_S_BCLK2:
2203 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2204         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2205         case RT5640_PLL1_S_BCLK3:
2206
2207 #endif
2208                 dai_sel = get_sdp_info(codec, dai->id);
2209                 if (dai_sel < 0) {
2210                         dev_err(codec->dev,
2211                                 "Failed to get sdp info: %d\n", dai_sel);
2212                         return -EINVAL;
2213                 }
2214                 if (dai_sel & RT5640_U_IF1) {
2215                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2216                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2217                 }
2218                 if (dai_sel & RT5640_U_IF2) {
2219                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2220                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2221                 }
2222                 if (dai_sel & RT5640_U_IF3) {
2223                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2224                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2225                 }
2226                 break;
2227         default:
2228                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2229                 return -EINVAL;
2230         }
2231
2232         ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2233         if (ret < 0) {
2234                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2235                 return ret;
2236         }
2237
2238         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code.m_bp,
2239                 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code);
2240
2241         snd_soc_write(codec, RT5640_PLL_CTRL1,
2242                 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2243         snd_soc_write(codec, RT5640_PLL_CTRL2,
2244                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2245                 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2246
2247         rt5640->pll_in = freq_in;
2248         rt5640->pll_out = freq_out;
2249         rt5640->pll_src = source;
2250
2251         return 0;
2252 }
2253
2254 /**
2255  * rt5640_index_show - Dump private registers.
2256  * @dev: codec device.
2257  * @attr: device attribute.
2258  * @buf: buffer for display.
2259  *
2260  * To show non-zero values of all private registers.
2261  *
2262  * Returns buffer length.
2263  */
2264 static ssize_t rt5640_index_show(struct device *dev,
2265         struct device_attribute *attr, char *buf)
2266 {
2267         struct i2c_client *client = to_i2c_client(dev);
2268         struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2269         struct snd_soc_codec *codec = rt5640->codec;
2270         unsigned int val;
2271         int cnt = 0, i;
2272
2273         cnt += sprintf(buf, "RT5640 index register\n");
2274         for (i = 0; i < 0xb4; i++) {
2275                 if (cnt + 9 >= PAGE_SIZE - 1)
2276                         break;
2277                 val = rt5640_index_read(codec, i);
2278                 if (!val)
2279                         continue;
2280                 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2281         }
2282
2283         if (cnt >= PAGE_SIZE)
2284                 cnt = PAGE_SIZE - 1;
2285
2286         return cnt;
2287 }
2288 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2289
2290 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2291                         enum snd_soc_bias_level level)
2292 {
2293         switch (level) {
2294         case SND_SOC_BIAS_ON:
2295 #ifdef RT5640_DEMO
2296                 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2297                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2298                 snd_soc_update_bits(codec, RT5640_HP_VOL,
2299                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2300                 break;
2301 #endif
2302         case SND_SOC_BIAS_PREPARE:
2303 #ifdef RT5640_DEMO
2304                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2305                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2306                         RT5640_PWR_BG | RT5640_PWR_VREF2,
2307                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2308                         RT5640_PWR_BG | RT5640_PWR_VREF2);
2309                 msleep(100);
2310
2311                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2312                         RT5640_PWR_FV1 | RT5640_PWR_FV2,
2313                         RT5640_PWR_FV1 | RT5640_PWR_FV2);
2314
2315                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2316                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2317                         RT5640_PWR_MB1 | RT5640_PWR_MB2);
2318 #endif
2319                 break;
2320
2321         case SND_SOC_BIAS_STANDBY:
2322 #ifdef RT5640_DEMO
2323                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2324                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2325                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2326                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2327
2328                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2329                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2330                         0);
2331 #endif
2332                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2333                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2334                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2335                                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2336                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2337                                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2338                         msleep(10);
2339                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2340                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2341                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2342                         codec->cache_only = false;
2343                         codec->cache_sync = 1;
2344                         snd_soc_cache_sync(codec);
2345                         rt5640_index_sync(codec);
2346                 }
2347                 break;
2348
2349         case SND_SOC_BIAS_OFF:
2350 #ifdef RT5640_DEMO
2351                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2352                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2353                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2354                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2355                 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2356                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2357                 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2358                         RT5640_L_MUTE, RT5640_L_MUTE);
2359 #endif
2360                 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2361                 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2362                 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2363                 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2364                 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2365                 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2366                 break;
2367
2368         default:
2369                 break;
2370         }
2371         codec->dapm.bias_level = level;
2372
2373         return 0;
2374 }
2375
2376 static int rt5640_probe(struct snd_soc_codec *codec)
2377 {
2378         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2379         int ret;
2380         u16 val;
2381
2382         codec->dapm.idle_bias_off = 1;
2383
2384         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2385         if (ret != 0) {
2386                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2387                 return ret;
2388         }
2389
2390         val = snd_soc_read(codec, RT5640_RESET);
2391         if (val != rt5640_reg[RT5640_RESET]) {
2392                 dev_err(codec->dev,
2393                         "Device with ID register %x is not a rt5640\n", val);
2394                 return -ENODEV;
2395         }
2396
2397         rt5640_reset(codec);
2398         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2399                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2400                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2401                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2402                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2403         msleep(100);
2404         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2405                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2406                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2407         /* DMIC */
2408         if (rt5640->dmic_en == RT5640_DMIC1) {
2409                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2410                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2411                 snd_soc_update_bits(codec, RT5640_DMIC,
2412                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2413                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2414         } else if (rt5640->dmic_en == RT5640_DMIC2) {
2415                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2416                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2417                 snd_soc_update_bits(codec, RT5640_DMIC,
2418                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2419                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2420         }
2421
2422 #ifdef RT5640_DEMO
2423         rt5640_reg_init(codec);
2424 #endif
2425
2426 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
2427         rt5640_register_dsp(codec);
2428 #endif
2429
2430         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2431
2432         snd_soc_add_codec_controls(codec, rt5640_snd_controls,
2433                 ARRAY_SIZE(rt5640_snd_controls));
2434
2435         rt5640->codec = codec;
2436         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2437         if (ret != 0) {
2438                 dev_err(codec->dev,
2439                         "Failed to create index_reg sysfs files: %d\n", ret);
2440                 return ret;
2441         }
2442
2443         return 0;
2444 }
2445
2446 static int rt5640_remove(struct snd_soc_codec *codec)
2447 {
2448         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2449         rt5640_reset(codec);
2450         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2451
2452         return 0;
2453 }
2454 #ifdef CONFIG_PM
2455 static int rt5640_suspend(struct snd_soc_codec *codec, pm_message_t state)
2456 {
2457         rt5640_reset(codec);
2458         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2459         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2460
2461         return 0;
2462 }
2463
2464 static int rt5640_resume(struct snd_soc_codec *codec)
2465 {
2466         int ret = 0 ;
2467
2468         codec->cache_sync = 1;
2469         ret = snd_soc_cache_sync(codec);
2470         if (ret) {
2471                 dev_err(codec->dev,"Failed to sync cache: %d\n", ret);
2472                 return ret;
2473         }
2474         rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2475
2476         return 0;
2477 }
2478 #else
2479 #define rt5640_suspend NULL
2480 #define rt5640_resume NULL
2481 #endif
2482
2483 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2484 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2485                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2486
2487 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2488         .hw_params = rt5640_hw_params,
2489         .prepare = rt5640_prepare,
2490         .set_fmt = rt5640_set_dai_fmt,
2491         .set_sysclk = rt5640_set_dai_sysclk,
2492         .set_pll = rt5640_set_dai_pll,
2493 };
2494
2495 struct snd_soc_dai_driver rt5640_dai[] = {
2496         {
2497                 .name = "rt5640-aif1",
2498                 .id = RT5640_AIF1,
2499                 .playback = {
2500                         .stream_name = "AIF1 Playback",
2501                         .channels_min = 1,
2502                         .channels_max = 2,
2503                         .rates = RT5640_STEREO_RATES,
2504                         .formats = RT5640_FORMATS,
2505                 },
2506                 .capture = {
2507                         .stream_name = "AIF1 Capture",
2508                         .channels_min = 1,
2509                         .channels_max = 2,
2510                         .rates = RT5640_STEREO_RATES,
2511                         .formats = RT5640_FORMATS,
2512                 },
2513                 .ops = &rt5640_aif_dai_ops,
2514         },
2515         {
2516                 .name = "rt5640-aif2",
2517                 .id = RT5640_AIF2,
2518                 .playback = {
2519                         .stream_name = "AIF2 Playback",
2520                         .channels_min = 1,
2521                         .channels_max = 2,
2522                         .rates = RT5640_STEREO_RATES,
2523                         .formats = RT5640_FORMATS,
2524                 },
2525                 .capture = {
2526                         .stream_name = "AIF2 Capture",
2527                         .channels_min = 1,
2528                         .channels_max = 2,
2529                         .rates = RT5640_STEREO_RATES,
2530                         .formats = RT5640_FORMATS,
2531                 },
2532                 .ops = &rt5640_aif_dai_ops,
2533         },
2534 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2535         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2536         {
2537                 .name = "rt5640-aif3",
2538                 .id = RT5640_AIF3,
2539                 .playback = {
2540                         .stream_name = "AIF3 Playback",
2541                         .channels_min = 1,
2542                         .channels_max = 2,
2543                         .rates = RT5640_STEREO_RATES,
2544                         .formats = RT5640_FORMATS,
2545                 },
2546                 .capture = {
2547                         .stream_name = "AIF3 Capture",
2548                         .channels_min = 1,
2549                         .channels_max = 2,
2550                         .rates = RT5640_STEREO_RATES,
2551                         .formats = RT5640_FORMATS,
2552                 },
2553                 .ops = &rt5640_aif_dai_ops,
2554         },
2555 #endif
2556 };
2557
2558 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2559         .probe = rt5640_probe,
2560         .remove = rt5640_remove,
2561         .suspend = rt5640_suspend,
2562         .resume = rt5640_resume,
2563         .set_bias_level = rt5640_set_bias_level,
2564         .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2565         .reg_word_size = sizeof(u16),
2566         .reg_cache_default = rt5640_reg,
2567         .volatile_register = rt5640_volatile_register,
2568         .readable_register = rt5640_readable_register,
2569         .reg_cache_step = 1,
2570         .dapm_widgets = rt5640_dapm_widgets,
2571         .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2572         .dapm_routes = rt5640_dapm_routes,
2573         .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2574 };
2575
2576 static const struct i2c_device_id rt5640_i2c_id[] = {
2577         { "rt5640", 0 },
2578         { }
2579 };
2580 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2581
2582 static int rt5640_i2c_probe(struct i2c_client *i2c,
2583                     const struct i2c_device_id *id)
2584 {
2585         struct rt5640_priv *rt5640;
2586         int ret;
2587
2588         rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2589         if (NULL == rt5640)
2590                 return -ENOMEM;
2591
2592         i2c_set_clientdata(i2c, rt5640);
2593
2594         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2595                         rt5640_dai, ARRAY_SIZE(rt5640_dai));
2596         if (ret < 0)
2597                 kfree(rt5640);
2598
2599         return ret;
2600 }
2601
2602 static __devexit int rt5640_i2c_remove(struct i2c_client *i2c)
2603 {
2604         snd_soc_unregister_codec(&i2c->dev);
2605         kfree(i2c_get_clientdata(i2c));
2606         return 0;
2607 }
2608
2609 struct i2c_driver rt5640_i2c_driver = {
2610         .driver = {
2611                 .name = "rt5640",
2612                 .owner = THIS_MODULE,
2613         },
2614         .probe = rt5640_i2c_probe,
2615         .remove   = __devexit_p(rt5640_i2c_remove),
2616         .id_table = rt5640_i2c_id,
2617 };
2618
2619 static int __init rt5640_modinit(void)
2620 {
2621         return i2c_add_driver(&rt5640_i2c_driver);
2622 }
2623 module_init(rt5640_modinit);
2624
2625 static void __exit rt5640_modexit(void)
2626 {
2627         i2c_del_driver(&rt5640_i2c_driver);
2628 }
2629 module_exit(rt5640_modexit);
2630
2631 MODULE_DESCRIPTION("ASoC RT5640 driver");
2632 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2633 MODULE_LICENSE("GPL");