asoc: alc5640 Heaphone gain boost
[linux-2.6.git] / sound / soc / codecs / rt5640.c
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 #include "rt5640.h"
28 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
30 #endif
31
32 #define RT5640_DEMO 1
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35 #define RT5639_RESET_ID 0x0008
36 #define USE_ONEBIT_DEPOP 1 /* for one bit depop */
37
38 #define CHECK_I2C_SHUTDOWN(r, c) { if (r && r->shutdown_complete) { \
39 dev_err(c->dev, "error: i2c state is 'shutdown'\n"); \
40 mutex_unlock(&r->lock); return -ENODEV; } }
41
42 #ifdef RT5640_DEMO
43 struct rt5640_init_reg {
44         u8 reg;
45         u16 val;
46 };
47
48 static struct rt5640_init_reg init_list[] = {
49         {RT5640_GEN_CTRL1       , 0x3701},/*fa[12:13] = 1'b; fa[8~10]=1; fa[0]=1 */
50         {RT5640_DEPOP_M1        , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
51         {RT5640_DEPOP_M2        , 0x3100},/* 8f[13] = 1'b */
52         {RT5640_ADDA_CLK1       , 0x1114},/* 73[2] = 1'b  */
53         {RT5640_MICBIAS         , 0x3030},/* 93[5:4] = 11'b */
54         {RT5640_PRIV_INDEX      , 0x003d},/* PR3d[12] = 1'b */
55         {RT5640_PRIV_DATA       , 0x3600},
56         {RT5640_CLS_D_OUT       , 0xa000},/* 8d[11] = 0'b */
57         {RT5640_CLS_D_OVCD      , 0x0328},//8c[8] = 1'b
58         {RT5640_PRIV_INDEX      , 0x001c},/* PR1c = 0D21'h */
59         {RT5640_PRIV_DATA       , 0x0D21},
60         {RT5640_PRIV_INDEX      , 0x001b},/* PR1B = 0D21'h */
61         {RT5640_PRIV_DATA       , 0x0000},
62         {RT5640_PRIV_INDEX      , 0x0012},/* PR12 = 0aa8'h */
63         {RT5640_PRIV_DATA       , 0x0aa8},
64         {RT5640_PRIV_INDEX      , 0x0014},/* PR14 = 0aaa'h */
65         {RT5640_PRIV_DATA       , 0x0aaa},
66         {RT5640_PRIV_INDEX      , 0x0020},/* PR20 = 6110'h */
67         {RT5640_PRIV_DATA       , 0x6110},
68         {RT5640_PRIV_INDEX      , 0x0021},/* PR21 = e0e0'h */
69         {RT5640_PRIV_DATA       , 0xe0e0},
70         {RT5640_PRIV_INDEX      , 0x0023},/* PR23 = 1804'h */
71         {RT5640_PRIV_DATA       , 0x1804},
72         /*playback*/
73         {RT5640_STO_DAC_MIXER   , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
74         {RT5640_OUT_L3_MIXER    , 0x01fe},/*DACL1 -> OUTMIXL*/
75         {RT5640_OUT_R3_MIXER    , 0x01fe},/*DACR1 -> OUTMIXR */
76         {RT5640_HP_VOL          , 0x8888},/* OUTMIX -> HPVOL */
77         {RT5640_HPO_MIXER       , 0xc000},/* HPVOL -> HPOLMIX */
78 /*      {RT5640_HPO_MIXER       , 0xa000},// DAC1 -> HPOLMIX   */
79         {RT5640_CHARGE_PUMP     , 0x0f00},
80         {RT5640_PRIV_INDEX      , 0x0090},
81         {RT5640_PRIV_DATA       , 0x2000},
82         {RT5640_PRIV_INDEX      , 0x0091},
83         {RT5640_PRIV_DATA       , 0x1000},
84         {RT5640_HP_CALIB_AMP_DET, 0x0420},
85         {RT5640_SPK_L_MIXER     , 0x0036},/* DACL1 -> SPKMIXL */
86         {RT5640_SPK_R_MIXER     , 0x0036},/* DACR1 -> SPKMIXR */
87         {RT5640_SPK_VOL         , 0x8888},/* SPKMIX -> SPKVOL */
88         {RT5640_SPO_CLSD_RATIO  , 0x0001},
89         {RT5640_SPO_L_MIXER     , 0xe800},/* SPKVOLL -> SPOLMIX */
90         {RT5640_SPO_R_MIXER     , 0x2800},/* SPKVOLR -> SPORMIX */
91 /*      {RT5640_SPO_L_MIXER     , 0xb800},//DAC -> SPOLMIX */
92 /*      {RT5640_SPO_R_MIXER     , 0x1800},//DAC -> SPORMIX */
93 /*      {RT5640_I2S1_SDP        , 0xD000},//change IIS1 and IIS2 */
94         /*record*/
95         {RT5640_IN1_IN2         , 0x5080},/*IN1 boost 40db & differential mode*/
96         {RT5640_IN3_IN4         , 0x0500},/*IN2 boost 40db & signal ended mode*/
97         {RT5640_REC_L2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXL */
98         {RT5640_REC_R2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXR */
99 /*      {RT5640_REC_L2_MIXER    , 0x006f},//Mic2 -> RECMIXL */
100 /*      {RT5640_REC_R2_MIXER    , 0x006f},//Mic2 -> RECMIXR */
101         {RT5640_STO_ADC_MIXER   , 0x3020},/* ADC -> Sto ADC mixer */
102
103 #if RT5640_DET_EXT_MIC
104         {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
105         {RT5640_GPIO_CTRL1      , 0x8400},/* set GPIO1 to IRQ */
106         {RT5640_GPIO_CTRL3      , 0x0004},/* set GPIO1 output */
107         {RT5640_IRQ_CTRL2       , 0x8000},/*set MICBIAS short current to IRQ */
108                                         /*( if sticky set regBE : 8800 ) */
109 #endif
110
111 };
112 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
113
114 static int rt5640_reg_init(struct snd_soc_codec *codec)
115 {
116         int i;
117         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
118                 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
119         return 0;
120 }
121 #endif
122
123 static int rt5640_index_sync(struct snd_soc_codec *codec)
124 {
125         int i;
126
127         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
128                 if (RT5640_PRIV_INDEX == init_list[i].reg ||
129                         RT5640_PRIV_DATA == init_list[i].reg)
130                         snd_soc_write(codec, init_list[i].reg,
131                                         init_list[i].val);
132         return 0;
133 }
134
135 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
136         [RT5640_RESET] = 0x000c,
137         [RT5640_SPK_VOL] = 0xc8c8,
138         [RT5640_HP_VOL] = 0xc8c8,
139         [RT5640_OUTPUT] = 0xc8c8,
140         [RT5640_MONO_OUT] = 0x8000,
141         [RT5640_INL_INR_VOL] = 0x0808,
142         [RT5640_DAC1_DIG_VOL] = 0xafaf,
143         [RT5640_DAC2_DIG_VOL] = 0xafaf,
144         [RT5640_ADC_DIG_VOL] = 0x2f2f,
145         [RT5640_ADC_DATA] = 0x2f2f,
146         [RT5640_STO_ADC_MIXER] = 0x7060,
147         [RT5640_MONO_ADC_MIXER] = 0x7070,
148         [RT5640_AD_DA_MIXER] = 0x8080,
149         [RT5640_STO_DAC_MIXER] = 0x5454,
150         [RT5640_MONO_DAC_MIXER] = 0x5454,
151         [RT5640_DIG_MIXER] = 0xaa00,
152         [RT5640_DSP_PATH2] = 0xa000,
153         [RT5640_REC_L2_MIXER] = 0x007f,
154         [RT5640_REC_R2_MIXER] = 0x007f,
155         [RT5640_HPO_MIXER] = 0xe000,
156         [RT5640_SPK_L_MIXER] = 0x003e,
157         [RT5640_SPK_R_MIXER] = 0x003e,
158         [RT5640_SPO_L_MIXER] = 0xf800,
159         [RT5640_SPO_R_MIXER] = 0x3800,
160         [RT5640_SPO_CLSD_RATIO] = 0x0004,
161         [RT5640_MONO_MIXER] = 0xfc00,
162         [RT5640_OUT_L3_MIXER] = 0x01ff,
163         [RT5640_OUT_R3_MIXER] = 0x01ff,
164         [RT5640_LOUT_MIXER] = 0xf000,
165         [RT5640_PWR_ANLG1] = 0x00c0,
166         [RT5640_I2S1_SDP] = 0x8000,
167         [RT5640_I2S2_SDP] = 0x8000,
168         [RT5640_I2S3_SDP] = 0x8000,
169         [RT5640_ADDA_CLK1] = 0x1110,
170         [RT5640_ADDA_CLK2] = 0x0c00,
171         [RT5640_DMIC] = 0x1d00,
172         [RT5640_ASRC_3] = 0x0008,
173         [RT5640_HP_OVCD] = 0x0600,
174         [RT5640_CLS_D_OVCD] = 0x0228,
175         [RT5640_CLS_D_OUT] = 0xa800,
176         [RT5640_DEPOP_M1] = 0x0004,
177         [RT5640_DEPOP_M2] = 0x1100,
178         [RT5640_DEPOP_M3] = 0x0646,
179         [RT5640_CHARGE_PUMP] = 0x0d00,
180         [RT5640_MICBIAS] = 0x3000,
181         [RT5640_EQ_CTRL1] = 0x2080,
182         [RT5640_DRC_AGC_1] = 0x2206,
183         [RT5640_DRC_AGC_2] = 0x1f00,
184         [RT5640_ANC_CTRL1] = 0x034b,
185         [RT5640_ANC_CTRL2] = 0x0066,
186         [RT5640_ANC_CTRL3] = 0x000b,
187         [RT5640_GPIO_CTRL1] = 0x0400,
188         [RT5640_DSP_CTRL3] = 0x2000,
189         [RT5640_BASE_BACK] = 0x0013,
190         [RT5640_MP3_PLUS1] = 0x0680,
191         [RT5640_MP3_PLUS2] = 0x1c17,
192         [RT5640_3D_HP] = 0x8c00,
193         [RT5640_ADJ_HPF] = 0x2a20,
194         [RT5640_HP_CALIB_AMP_DET] = 0x0420,
195         [RT5640_SV_ZCD1] = 0x0809,
196         [RT5640_VENDOR_ID1] = 0x10ec,
197         [RT5640_VENDOR_ID2] = 0x6231,
198 };
199
200
201 static int rt5640_reset(struct snd_soc_codec *codec)
202 {
203         return snd_soc_write(codec, RT5640_RESET, 0);
204 }
205
206 /**
207  * rt5640_index_write - Write private register.
208  * @codec: SoC audio codec device.
209  * @reg: Private register index.
210  * @value: Private register Data.
211  *
212  * Modify private register for advanced setting. It can be written through
213  * private index (0x6a) and data (0x6c) register.
214  *
215  * Returns 0 for success or negative error code.
216  */
217 static int rt5640_index_write(struct snd_soc_codec *codec,
218                 unsigned int reg, unsigned int value)
219 {
220         int ret;
221
222         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
223         if (ret < 0) {
224                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
225                 goto err;
226         }
227         ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
228         if (ret < 0) {
229                 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
230                 goto err;
231         }
232         return 0;
233
234 err:
235         return ret;
236 }
237
238 /**
239  * rt5640_index_read - Read private register.
240  * @codec: SoC audio codec device.
241  * @reg: Private register index.
242  *
243  * Read advanced setting from private register. It can be read through
244  * private index (0x6a) and data (0x6c) register.
245  *
246  * Returns private register value or negative error code.
247  */
248 static unsigned int rt5640_index_read(
249         struct snd_soc_codec *codec, unsigned int reg)
250 {
251         int ret;
252
253         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
254         if (ret < 0) {
255                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
256                 return ret;
257         }
258         return snd_soc_read(codec, RT5640_PRIV_DATA);
259 }
260
261 /**
262  * rt5640_index_update_bits - update private register bits
263  * @codec: audio codec
264  * @reg: Private register index.
265  * @mask: register mask
266  * @value: new value
267  *
268  * Writes new register value.
269  *
270  * Returns 1 for change, 0 for no change, or negative error code.
271  */
272 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
273         unsigned int reg, unsigned int mask, unsigned int value)
274 {
275         unsigned int old, new;
276         int change, ret;
277
278         ret = rt5640_index_read(codec, reg);
279         if (ret < 0) {
280                 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
281                 goto err;
282         }
283
284         old = ret;
285         new = (old & ~mask) | (value & mask);
286         change = old != new;
287         if (change) {
288                 ret = rt5640_index_write(codec, reg, new);
289                 if (ret < 0) {
290                         dev_err(codec->dev,
291                                 "Failed to write private reg: %d\n", ret);
292                         goto err;
293                 }
294         }
295         return change;
296
297 err:
298         return ret;
299 }
300
301 static int rt5640_volatile_register(
302         struct snd_soc_codec *codec, unsigned int reg)
303 {
304         switch (reg) {
305         case RT5640_RESET:
306         case RT5640_PRIV_DATA:
307         case RT5640_ASRC_5:
308         case RT5640_EQ_CTRL1:
309         case RT5640_DRC_AGC_1:
310         case RT5640_ANC_CTRL1:
311         case RT5640_IRQ_CTRL2:
312         case RT5640_INT_IRQ_ST:
313         case RT5640_DSP_CTRL2:
314         case RT5640_DSP_CTRL3:
315         case RT5640_PGM_REG_ARR1:
316         case RT5640_PGM_REG_ARR3:
317         case RT5640_VENDOR_ID:
318         case RT5640_VENDOR_ID1:
319         case RT5640_VENDOR_ID2:
320                 return 1;
321         default:
322                 return 0;
323         }
324 }
325
326 static int rt5640_readable_register(
327         struct snd_soc_codec *codec, unsigned int reg)
328 {
329         switch (reg) {
330         case RT5640_RESET:
331         case RT5640_SPK_VOL:
332         case RT5640_HP_VOL:
333         case RT5640_OUTPUT:
334         case RT5640_MONO_OUT:
335         case RT5640_IN1_IN2:
336         case RT5640_IN3_IN4:
337         case RT5640_INL_INR_VOL:
338         case RT5640_DAC1_DIG_VOL:
339         case RT5640_DAC2_DIG_VOL:
340         case RT5640_DAC2_CTRL:
341         case RT5640_ADC_DIG_VOL:
342         case RT5640_ADC_DATA:
343         case RT5640_ADC_BST_VOL:
344         case RT5640_STO_ADC_MIXER:
345         case RT5640_MONO_ADC_MIXER:
346         case RT5640_AD_DA_MIXER:
347         case RT5640_STO_DAC_MIXER:
348         case RT5640_MONO_DAC_MIXER:
349         case RT5640_DIG_MIXER:
350         case RT5640_DSP_PATH1:
351         case RT5640_DSP_PATH2:
352         case RT5640_DIG_INF_DATA:
353         case RT5640_REC_L1_MIXER:
354         case RT5640_REC_L2_MIXER:
355         case RT5640_REC_R1_MIXER:
356         case RT5640_REC_R2_MIXER:
357         case RT5640_HPO_MIXER:
358         case RT5640_SPK_L_MIXER:
359         case RT5640_SPK_R_MIXER:
360         case RT5640_SPO_L_MIXER:
361         case RT5640_SPO_R_MIXER:
362         case RT5640_SPO_CLSD_RATIO:
363         case RT5640_MONO_MIXER:
364         case RT5640_OUT_L1_MIXER:
365         case RT5640_OUT_L2_MIXER:
366         case RT5640_OUT_L3_MIXER:
367         case RT5640_OUT_R1_MIXER:
368         case RT5640_OUT_R2_MIXER:
369         case RT5640_OUT_R3_MIXER:
370         case RT5640_LOUT_MIXER:
371         case RT5640_PWR_DIG1:
372         case RT5640_PWR_DIG2:
373         case RT5640_PWR_ANLG1:
374         case RT5640_PWR_ANLG2:
375         case RT5640_PWR_MIXER:
376         case RT5640_PWR_VOL:
377         case RT5640_PRIV_INDEX:
378         case RT5640_PRIV_DATA:
379         case RT5640_I2S1_SDP:
380         case RT5640_I2S2_SDP:
381         case RT5640_I2S3_SDP:
382         case RT5640_ADDA_CLK1:
383         case RT5640_ADDA_CLK2:
384         case RT5640_DMIC:
385         case RT5640_GLB_CLK:
386         case RT5640_PLL_CTRL1:
387         case RT5640_PLL_CTRL2:
388         case RT5640_ASRC_1:
389         case RT5640_ASRC_2:
390         case RT5640_ASRC_3:
391         case RT5640_ASRC_4:
392         case RT5640_ASRC_5:
393         case RT5640_HP_OVCD:
394         case RT5640_CLS_D_OVCD:
395         case RT5640_CLS_D_OUT:
396         case RT5640_DEPOP_M1:
397         case RT5640_DEPOP_M2:
398         case RT5640_DEPOP_M3:
399         case RT5640_CHARGE_PUMP:
400         case RT5640_PV_DET_SPK_G:
401         case RT5640_MICBIAS:
402         case RT5640_EQ_CTRL1:
403         case RT5640_EQ_CTRL2:
404         case RT5640_WIND_FILTER:
405         case RT5640_DRC_AGC_1:
406         case RT5640_DRC_AGC_2:
407         case RT5640_DRC_AGC_3:
408         case RT5640_SVOL_ZC:
409         case RT5640_ANC_CTRL1:
410         case RT5640_ANC_CTRL2:
411         case RT5640_ANC_CTRL3:
412         case RT5640_JD_CTRL:
413         case RT5640_ANC_JD:
414         case RT5640_IRQ_CTRL1:
415         case RT5640_IRQ_CTRL2:
416         case RT5640_INT_IRQ_ST:
417         case RT5640_GPIO_CTRL1:
418         case RT5640_GPIO_CTRL2:
419         case RT5640_GPIO_CTRL3:
420         case RT5640_DSP_CTRL1:
421         case RT5640_DSP_CTRL2:
422         case RT5640_DSP_CTRL3:
423         case RT5640_DSP_CTRL4:
424         case RT5640_PGM_REG_ARR1:
425         case RT5640_PGM_REG_ARR2:
426         case RT5640_PGM_REG_ARR3:
427         case RT5640_PGM_REG_ARR4:
428         case RT5640_PGM_REG_ARR5:
429         case RT5640_SCB_FUNC:
430         case RT5640_SCB_CTRL:
431         case RT5640_BASE_BACK:
432         case RT5640_MP3_PLUS1:
433         case RT5640_MP3_PLUS2:
434         case RT5640_3D_HP:
435         case RT5640_ADJ_HPF:
436         case RT5640_HP_CALIB_AMP_DET:
437         case RT5640_HP_CALIB2:
438         case RT5640_SV_ZCD1:
439         case RT5640_SV_ZCD2:
440         case RT5640_GEN_CTRL1:
441         case RT5640_GEN_CTRL2:
442         case RT5640_GEN_CTRL3:
443         case RT5640_VENDOR_ID:
444         case RT5640_VENDOR_ID1:
445         case RT5640_VENDOR_ID2:
446         case RT5640_DUMMY_PR3F:
447                 return 1;
448         default:
449                 return 0;
450         }
451 }
452
453 void DC_Calibrate(struct snd_soc_codec *codec)
454 {
455         unsigned int sclk_src;
456
457         sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
458                 RT5640_SCLK_SRC_MASK;
459
460         snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
461                 RT5640_PWR_MB1, RT5640_PWR_MB1);
462         snd_soc_update_bits(codec, RT5640_DEPOP_M2,
463                 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
464         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
465                 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
466                 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
467
468         snd_soc_update_bits(codec, RT5640_GLB_CLK,
469                 RT5640_SCLK_SRC_MASK, 0x2 << RT5640_SCLK_SRC_SFT);
470
471         rt5640_index_write(codec, RT5640_HP_DCC_INT1, 0x9f00);
472         snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
473                 RT5640_PWR_MB1, 0);
474         snd_soc_update_bits(codec, RT5640_GLB_CLK,
475                 RT5640_SCLK_SRC_MASK, sclk_src);
476 }
477
478
479 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
480 {
481         int jack_type;
482         int sclk_src;
483         int reg63, reg64;
484         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
485         mutex_lock(&rt5640->lock);
486         CHECK_I2C_SHUTDOWN(rt5640, codec)
487
488         if (jack_insert) {
489                 reg63 = snd_soc_read(codec, RT5640_PWR_ANLG1);
490                 reg64 = snd_soc_read(codec, RT5640_PWR_ANLG2);
491                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
492                         snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
493                         snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
494                         snd_soc_write(codec, RT5640_GEN_CTRL1 , 0x3701);
495                 }
496                 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
497                         RT5640_SCLK_SRC_MASK;
498                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
499                         RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
500                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
501                         RT5640_PWR_LDO2, RT5640_PWR_LDO2);
502                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
503                         RT5640_PWR_MB1, RT5640_PWR_MB1);
504                 snd_soc_update_bits(codec, RT5640_MICBIAS,
505                         RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
506                         RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
507                         RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
508                         RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
509                 snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
510                         0x1, 0x1);
511                 msleep(100);
512                 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
513                         jack_type = RT5640_HEADPHO_DET;
514                 else
515                         jack_type = RT5640_HEADSET_DET;
516                 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
517                         RT5640_MB1_OC_CLR, 0);
518                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
519                         RT5640_SCLK_SRC_MASK, sclk_src);
520                 snd_soc_write(codec, RT5640_PWR_ANLG1, reg63);
521                 snd_soc_write(codec, RT5640_PWR_ANLG2, reg64);
522         } else {
523                 snd_soc_update_bits(codec, RT5640_MICBIAS,
524                         RT5640_MIC1_OVCD_MASK,
525                         RT5640_MIC1_OVCD_DIS);
526
527                 jack_type = RT5640_NO_JACK;
528         }
529
530         mutex_unlock(&rt5640->lock);
531         return jack_type;
532 }
533 EXPORT_SYMBOL(rt5640_headset_detect);
534
535 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
536 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
537 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
538 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
539 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
540
541 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
542 static unsigned int bst_tlv[] = {
543         TLV_DB_RANGE_HEAD(7),
544         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
545         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
546         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
547         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
548         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
549         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
550         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
551 };
552
553 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
554                 struct snd_ctl_elem_value *ucontrol)
555 {
556         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
557         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
558
559         ucontrol->value.integer.value[0] = rt5640->dmic_en;
560
561         return 0;
562 }
563
564 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
565                 struct snd_ctl_elem_value *ucontrol)
566 {
567         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
568         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
569         mutex_lock(&rt5640->lock);
570         CHECK_I2C_SHUTDOWN(rt5640, codec)
571
572         if (rt5640->dmic_en == ucontrol->value.integer.value[0]) {
573                 mutex_unlock(&rt5640->lock);
574                 return 0;
575         }
576
577         rt5640->dmic_en = ucontrol->value.integer.value[0];
578         switch (rt5640->dmic_en) {
579         case RT5640_DMIC_DIS:
580                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
581                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
582                         RT5640_GP4_PIN_MASK,
583                         RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
584                         RT5640_GP4_PIN_GPIO4);
585                 snd_soc_update_bits(codec, RT5640_DMIC,
586                         RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
587                         RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
588                 snd_soc_update_bits(codec, RT5640_DMIC,
589                         RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
590                         RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
591                 break;
592
593         case RT5640_DMIC1:
594                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
595                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
596                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
597                 snd_soc_update_bits(codec, RT5640_DMIC,
598                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
599                         RT5640_DMIC_1_DP_MASK,
600                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
601                         RT5640_DMIC_1_DP_IN1P);
602                 snd_soc_update_bits(codec, RT5640_DMIC,
603                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
604                 break;
605
606         case RT5640_DMIC2:
607                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
608                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
609                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
610                 snd_soc_update_bits(codec, RT5640_DMIC,
611                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
612                         RT5640_DMIC_2_DP_MASK,
613                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
614                         RT5640_DMIC_2_DP_IN1N);
615                 snd_soc_update_bits(codec, RT5640_DMIC,
616                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
617                 break;
618
619         default:
620                 mutex_unlock(&rt5640->lock);
621                 return -EINVAL;
622         }
623
624         mutex_unlock(&rt5640->lock);
625         return 0;
626 }
627
628
629 /* IN1/IN2 Input Type */
630 static const char *rt5640_input_mode[] = {
631         "Single ended", "Differential"};
632
633 static const SOC_ENUM_SINGLE_DECL(
634         rt5640_in1_mode_enum, RT5640_IN1_IN2,
635         RT5640_IN_SFT1, rt5640_input_mode);
636
637 static const SOC_ENUM_SINGLE_DECL(
638         rt5640_in2_mode_enum, RT5640_IN3_IN4,
639         RT5640_IN_SFT2, rt5640_input_mode);
640
641 /* Interface data select */
642 static const char *rt5640_data_select[] = {
643         "Normal", "left copy to right", "right copy to left", "Swap"};
644
645 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
646                                 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
647
648 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
649                                 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
650
651 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
652                                 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
653
654 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
655                                 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
656
657 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
658                                 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
659
660 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
661                                 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
662
663 /* Class D speaker gain ratio */
664 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
665         "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
666
667 static const SOC_ENUM_SINGLE_DECL(
668         rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
669         RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
670
671 /* DMIC */
672 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
673
674 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
675
676
677
678 #ifdef RT5640_REG_RW
679 #define REGVAL_MAX 0xffff
680 static unsigned int regctl_addr;
681 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
682                         struct snd_ctl_elem_info *uinfo) {
683         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
684         uinfo->count = 2;
685         uinfo->value.integer.min = 0;
686         uinfo->value.integer.max = REGVAL_MAX;
687         return 0;
688 }
689
690 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
691                         struct snd_ctl_elem_value *ucontrol)
692 {
693         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
694         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
695         mutex_lock(&rt5640->lock);
696         CHECK_I2C_SHUTDOWN(rt5640, codec)
697
698         ucontrol->value.integer.value[0] = regctl_addr;
699         ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
700         mutex_unlock(&rt5640->lock);
701         return 0;
702 }
703
704 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
705                         struct snd_ctl_elem_value *ucontrol)
706 {
707         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
708         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
709         mutex_lock(&rt5640->lock);
710         CHECK_I2C_SHUTDOWN(rt5640, codec)
711
712         regctl_addr = ucontrol->value.integer.value[0];
713         if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
714                 snd_soc_write(codec, regctl_addr,
715                 ucontrol->value.integer.value[1]);
716         mutex_unlock(&rt5640->lock);
717         return 0;
718 }
719 #endif
720
721
722 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
723 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
724
725 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
726                 struct snd_ctl_elem_value *ucontrol)
727 {
728         struct soc_mixer_control *mc =
729                 (struct soc_mixer_control *)kcontrol->private_value;
730         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
731         unsigned int val;
732         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
733         mutex_lock(&rt5640->lock);
734         CHECK_I2C_SHUTDOWN(rt5640, codec)
735         val = snd_soc_read(codec, mc->reg);
736
737         ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
738                 ((val & RT5640_L_VOL_MASK) >> mc->shift);
739         ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
740                 (val & RT5640_R_VOL_MASK);
741
742         mutex_unlock(&rt5640->lock);
743         return 0;
744 }
745
746 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
747                 struct snd_ctl_elem_value *ucontrol)
748 {
749         struct soc_mixer_control *mc =
750                 (struct soc_mixer_control *)kcontrol->private_value;
751         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
752         unsigned int val, val2;
753         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
754         int ret;
755         mutex_lock(&rt5640->lock);
756         CHECK_I2C_SHUTDOWN(rt5640, codec)
757
758         val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
759         val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
760         ret = snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
761                         RT5640_R_VOL_MASK, val << mc->shift | val2);
762         mutex_unlock(&rt5640->lock);
763         return ret;
764 }
765
766
767 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
768         /* Speaker Output Volume */
769         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
770                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
771                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
772
773         /* Headphone Output Volume */
774         SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
775                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
776
777         SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
778                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
779                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
780
781         /* OUTPUT Control */
782         SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
783                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
784         SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
785                 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
786         SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
787                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
788         /* MONO Output Control */
789         SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
790                                 RT5640_L_MUTE_SFT, 1, 1),
791         /* DAC Digital Volume */
792         SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
793                 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
794         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
795                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
796                         175, 0, dac_vol_tlv),
797         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
798                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
799                         175, 0, dac_vol_tlv),
800         /* IN1/IN2 Control */
801         SOC_ENUM("IN1 Mode Control",  rt5640_in1_mode_enum),
802         SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
803                 RT5640_BST_SFT1, 8, 0, bst_tlv),
804         SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
805         SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
806                 RT5640_BST_SFT2, 8, 0, bst_tlv),
807         /* INL/INR Volume Control */
808         SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
809                         RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
810                         31, 1, in_vol_tlv),
811         /* ADC Digital Volume Control */
812         SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
813                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
814         SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
815                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
816                         127, 0, adc_vol_tlv),
817         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
818                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
819                         127, 0, adc_vol_tlv),
820         /* ADC Boost Volume Control */
821         SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
822                         RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
823                         3, 0, adc_bst_tlv),
824         /* Class D speaker gain ratio */
825         SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
826         /* DMIC */
827         SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
828                 rt5640_dmic_get, rt5640_dmic_put),
829
830 #ifdef RT5640_REG_RW
831         {
832                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
833                 .name = "Register Control",
834                 .info = rt5640_regctl_info,
835                 .get = rt5640_regctl_get,
836                 .put = rt5640_regctl_put,
837         },
838 #endif
839 };
840
841 /**
842  * set_dmic_clk - Set parameter of dmic.
843  *
844  * @w: DAPM widget.
845  * @kcontrol: The kcontrol of this widget.
846  * @event: Event id.
847  *
848  * Choose dmic clock between 1MHz and 3MHz.
849  * It is better for clock to approximate 3MHz.
850  */
851 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
852         struct snd_kcontrol *kcontrol, int event)
853 {
854         struct snd_soc_codec *codec = w->codec;
855         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
856         int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
857         mutex_lock(&rt5640->lock);
858         CHECK_I2C_SHUTDOWN(rt5640, codec)
859
860         rate = rt5640->lrck[rt5640->aif_pu] << 8;
861         red = 3000000 * 12;
862         for (i = 0; i < ARRAY_SIZE(div); i++) {
863                 bound = div[i] * 3000000;
864                 if (rate > bound)
865                         continue;
866                 temp = bound - rate;
867                 if (temp < red) {
868                         red = temp;
869                         idx = i;
870                 }
871         }
872         if (idx < 0)
873                 dev_err(codec->dev, "Failed to set DMIC clock\n");
874         else
875                 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
876                                         idx << RT5640_DMIC_CLK_SFT);
877         mutex_unlock(&rt5640->lock);
878         return idx;
879 }
880
881 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
882                          struct snd_soc_dapm_widget *sink)
883 {
884         unsigned int val;
885         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(source->codec);
886         mutex_lock(&rt5640->lock);
887         CHECK_I2C_SHUTDOWN(rt5640, source->codec)
888
889         val = snd_soc_read(source->codec, RT5640_GLB_CLK);
890         val &= RT5640_SCLK_SRC_MASK;
891         mutex_unlock(&rt5640->lock);
892         if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
893                 return 1;
894         else
895                 return 0;
896 }
897
898 /* Digital Mixer */
899 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
900         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
901                         RT5640_M_ADC_L1_SFT, 1, 1),
902         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
903                         RT5640_M_ADC_L2_SFT, 1, 1),
904 };
905
906 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
907         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
908                         RT5640_M_ADC_R1_SFT, 1, 1),
909         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
910                         RT5640_M_ADC_R2_SFT, 1, 1),
911 };
912
913 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
914         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
915                         RT5640_M_MONO_ADC_L1_SFT, 1, 1),
916         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
917                         RT5640_M_MONO_ADC_L2_SFT, 1, 1),
918 };
919
920 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
921         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
922                         RT5640_M_MONO_ADC_R1_SFT, 1, 1),
923         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
924                         RT5640_M_MONO_ADC_R2_SFT, 1, 1),
925 };
926
927 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
928         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
929                         RT5640_M_ADCMIX_L_SFT, 1, 1),
930         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
931                         RT5640_M_IF1_DAC_L_SFT, 1, 1),
932 };
933
934 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
935         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
936                         RT5640_M_ADCMIX_R_SFT, 1, 1),
937         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
938                         RT5640_M_IF1_DAC_R_SFT, 1, 1),
939 };
940
941 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
942         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
943                         RT5640_M_DAC_L1_SFT, 1, 1),
944         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
945                         RT5640_M_DAC_L2_SFT, 1, 1),
946         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
947                         RT5640_M_ANC_DAC_L_SFT, 1, 1),
948 };
949
950 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
951         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
952                         RT5640_M_DAC_R1_SFT, 1, 1),
953         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
954                         RT5640_M_DAC_R2_SFT, 1, 1),
955         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
956                         RT5640_M_ANC_DAC_R_SFT, 1, 1),
957 };
958
959 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
960         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
961                         RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
962         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
963                         RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
964         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
965                         RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
966 };
967
968 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
969         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
970                         RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
971         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
972                         RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
973         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
974                         RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
975 };
976
977 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
978         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
979                         RT5640_M_STO_L_DAC_L_SFT, 1, 1),
980         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
981                         RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
982 };
983
984 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
985         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
986                         RT5640_M_STO_R_DAC_R_SFT, 1, 1),
987         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
988                         RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
989 };
990
991 /* Analog Input Mixer */
992 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
993         SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
994                         RT5640_M_HP_L_RM_L_SFT, 1, 1),
995         SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
996                         RT5640_M_IN_L_RM_L_SFT, 1, 1),
997         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
998                         RT5640_M_BST4_RM_L_SFT, 1, 1),
999         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
1000                         RT5640_M_BST1_RM_L_SFT, 1, 1),
1001         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
1002                         RT5640_M_OM_L_RM_L_SFT, 1, 1),
1003 };
1004
1005 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
1006         SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
1007                         RT5640_M_HP_R_RM_R_SFT, 1, 1),
1008         SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
1009                         RT5640_M_IN_R_RM_R_SFT, 1, 1),
1010         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
1011                         RT5640_M_BST4_RM_R_SFT, 1, 1),
1012         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
1013                         RT5640_M_BST1_RM_R_SFT, 1, 1),
1014         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
1015                         RT5640_M_OM_R_RM_R_SFT, 1, 1),
1016 };
1017
1018 /* Analog Output Mixer */
1019 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
1020         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
1021                         RT5640_M_RM_L_SM_L_SFT, 1, 1),
1022         SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
1023                         RT5640_M_IN_L_SM_L_SFT, 1, 1),
1024         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
1025                         RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
1026         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
1027                         RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
1028         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
1029                         RT5640_M_OM_L_SM_L_SFT, 1, 1),
1030 };
1031
1032 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
1033         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
1034                         RT5640_M_RM_R_SM_R_SFT, 1, 1),
1035         SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
1036                         RT5640_M_IN_R_SM_R_SFT, 1, 1),
1037         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
1038                         RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
1039         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
1040                         RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
1041         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
1042                         RT5640_M_OM_R_SM_R_SFT, 1, 1),
1043 };
1044
1045 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
1046         SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
1047                         RT5640_M_SM_L_OM_L_SFT, 1, 1),
1048         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
1049                         RT5640_M_BST1_OM_L_SFT, 1, 1),
1050         SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
1051                         RT5640_M_IN_L_OM_L_SFT, 1, 1),
1052         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
1053                         RT5640_M_RM_L_OM_L_SFT, 1, 1),
1054         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
1055                         RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
1056         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
1057                         RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
1058         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
1059                         RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
1060 };
1061
1062 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
1063         SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
1064                         RT5640_M_SM_L_OM_R_SFT, 1, 1),
1065         SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
1066                         RT5640_M_BST4_OM_R_SFT, 1, 1),
1067         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
1068                         RT5640_M_BST1_OM_R_SFT, 1, 1),
1069         SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
1070                         RT5640_M_IN_R_OM_R_SFT, 1, 1),
1071         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
1072                         RT5640_M_RM_R_OM_R_SFT, 1, 1),
1073         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
1074                         RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
1075         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
1076                         RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
1077         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
1078                         RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
1079 };
1080
1081 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
1082         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
1083                         RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
1084         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
1085                         RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
1086         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
1087                         RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1088         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1089                         RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1090         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1091                         RT5640_M_BST1_SPM_L_SFT, 1, 1),
1092 };
1093
1094 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1095         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1096                         RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1097         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1098                         RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1099         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1100                         RT5640_M_BST1_SPM_R_SFT, 1, 1),
1101 };
1102
1103 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1104         SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1105                         RT5640_M_DAC2_HM_SFT, 1, 1),
1106         SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1107                         RT5640_M_DAC1_HM_SFT, 1, 1),
1108         SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1109                         RT5640_M_HPVOL_HM_SFT, 1, 1),
1110 };
1111
1112 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1113         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1114                         RT5640_M_DAC_L1_LM_SFT, 1, 1),
1115         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1116                         RT5640_M_DAC_R1_LM_SFT, 1, 1),
1117         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1118                         RT5640_M_OV_L_LM_SFT, 1, 1),
1119         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1120                         RT5640_M_OV_R_LM_SFT, 1, 1),
1121 };
1122
1123 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1124         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1125                         RT5640_M_DAC_R2_MM_SFT, 1, 1),
1126         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1127                         RT5640_M_DAC_L2_MM_SFT, 1, 1),
1128         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1129                         RT5640_M_OV_R_MM_SFT, 1, 1),
1130         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1131                         RT5640_M_OV_L_MM_SFT, 1, 1),
1132         SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1133                         RT5640_M_BST1_MM_SFT, 1, 1),
1134 };
1135
1136 /* INL/R source */
1137 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1138
1139 static const SOC_ENUM_SINGLE_DECL(
1140         rt5640_inl_enum, RT5640_INL_INR_VOL,
1141         RT5640_INL_SEL_SFT, rt5640_inl_src);
1142
1143 static const struct snd_kcontrol_new rt5640_inl_mux =
1144         SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1145
1146 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1147
1148 static const SOC_ENUM_SINGLE_DECL(
1149         rt5640_inr_enum, RT5640_INL_INR_VOL,
1150         RT5640_INR_SEL_SFT, rt5640_inr_src);
1151
1152 static const struct snd_kcontrol_new rt5640_inr_mux =
1153         SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1154
1155 /* Stereo ADC source */
1156 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1157
1158 static const SOC_ENUM_SINGLE_DECL(
1159         rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1160         RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1161
1162 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1163         SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1164
1165 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1166         SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1167
1168 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1169
1170 static const SOC_ENUM_SINGLE_DECL(
1171         rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1172         RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1173
1174 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1175         SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1176
1177 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1178         SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1179
1180 /* Mono ADC source */
1181 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1182
1183 static const SOC_ENUM_SINGLE_DECL(
1184         rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1185         RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1186
1187 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1188         SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1189
1190 static const char *rt5640_mono_adc_l2_src[] = {
1191         "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1192 };
1193
1194 static const SOC_ENUM_SINGLE_DECL(
1195         rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1196         RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1197
1198 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1199         SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1200
1201 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1202
1203 static const SOC_ENUM_SINGLE_DECL(
1204         rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1205         RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1206
1207 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1208         SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1209
1210 static const char *rt5640_mono_adc_r2_src[] = {
1211         "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1212 };
1213
1214 static const SOC_ENUM_SINGLE_DECL(
1215         rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1216         RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1217
1218 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1219         SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1220
1221 /* DAC2 channel source */
1222 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1223
1224 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1225                                 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1226
1227 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1228         SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1229
1230 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1231
1232 static const SOC_ENUM_SINGLE_DECL(
1233         rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1234         RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1235
1236 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1237         SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1238
1239 /* Interface 2  ADC channel source */
1240 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1241
1242 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1243                         RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1244
1245 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1246         SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1247
1248 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1249
1250 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1251                         RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1252
1253 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1254         SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1255
1256 /* digital interface and iis interface map */
1257 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1258         "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1259         "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1260
1261 static const SOC_ENUM_SINGLE_DECL(
1262         rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1263         RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1264
1265 static const struct snd_kcontrol_new rt5640_dai_mux =
1266         SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1267
1268 /* SDI select */
1269 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1270
1271 static const SOC_ENUM_SINGLE_DECL(
1272         rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1273         RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1274
1275 static const struct snd_kcontrol_new rt5640_sdi_mux =
1276         SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1277
1278 static int spk_event(struct snd_soc_dapm_widget *w,
1279         struct snd_kcontrol *kcontrol, int event)
1280 {
1281         struct snd_soc_codec *codec = w->codec;
1282         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1283         mutex_lock(&rt5640->lock);
1284         CHECK_I2C_SHUTDOWN(rt5640, codec)
1285
1286         switch (event) {
1287         case SND_SOC_DAPM_POST_PMU:
1288                 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1289                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1290                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1291                 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1292                 break;
1293
1294         case SND_SOC_DAPM_PRE_PMD:
1295                 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1296                 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1297                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1298                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1299                 break;
1300
1301         default:
1302                 mutex_unlock(&rt5640->lock);
1303                 return 0;
1304         }
1305         mutex_unlock(&rt5640->lock);
1306         return 0;
1307 }
1308
1309 #if USE_ONEBIT_DEPOP
1310 void hp_amp_power(struct snd_soc_codec *codec, int on)
1311 {
1312         static int hp_amp_power_count;
1313 //      printk("one bit hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
1314
1315         if (on) {
1316                 if (hp_amp_power_count <= 0) {
1317                         /* depop parameters */
1318                         snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1319                                 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
1320                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1321                                 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1322                                 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
1323                         /* headphone amp power on */
1324                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1325                                 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
1326                         msleep(5);
1327                         snd_soc_update_bits(codec, RT5640_PWR_VOL,
1328                                 RT5640_PWR_HV_L | RT5640_PWR_HV_R,
1329                                 RT5640_PWR_HV_L | RT5640_PWR_HV_R);
1330                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1331                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1332                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA);
1333                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1334                                 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
1335                                 RT5640_PWR_FV1 | RT5640_PWR_FV2 );
1336                 }
1337                 hp_amp_power_count++;
1338         } else {
1339                 hp_amp_power_count--;
1340                 if (hp_amp_power_count <= 0) {
1341                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1342                                 RT5640_HP_CB_MASK, RT5640_HP_CB_PD);
1343                         msleep(30);
1344                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1345                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1346                                 0);
1347                         snd_soc_write(codec, RT5640_DEPOP_M2, 0x3100);
1348                 }
1349         }
1350 }
1351
1352 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
1353 {
1354         hp_amp_power(codec, 1);
1355         /* headphone unmute sequence */
1356         snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1357                 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
1358                 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
1359         snd_soc_update_bits(codec, RT5640_CHARGE_PUMP,
1360                 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
1361         snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1362                 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1363                 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
1364                 (RT5640_CP_FQ_24_KHZ << RT5640_CP_FQ2_SFT) |
1365                 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
1366         rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0x1c00);
1367         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1368                 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CO_MASK,
1369                 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CO_EN);
1370         msleep(5);
1371         snd_soc_update_bits(codec, RT5640_HP_VOL,
1372                 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1373         msleep(65);
1374         //snd_soc_update_bits(codec, RT5640_HP_CALIB_AMP_DET,
1375         //      RT5640_HPD_PS_MASK, RT5640_HPD_PS_EN);
1376 }
1377
1378 static void rt5640_pmd_depop(struct snd_soc_codec *codec)
1379 {
1380         snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1381                 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1382                 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ1_SFT) |
1383                 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1384                 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ3_SFT));
1385         rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0x7c00);
1386         //snd_soc_update_bits(codec, RT5640_HP_CALIB_AMP_DET,
1387         //      RT5640_HPD_PS_MASK, RT5640_HPD_PS_DIS);
1388         snd_soc_update_bits(codec, RT5640_HP_VOL,
1389                 RT5640_L_MUTE | RT5640_R_MUTE,
1390                 RT5640_L_MUTE | RT5640_R_MUTE);
1391         msleep(50);
1392         hp_amp_power(codec, 0);
1393 }
1394
1395 #else //seq
1396 void hp_amp_power(struct snd_soc_codec *codec, int on)
1397 {
1398         static int hp_amp_power_count;
1399 //      printk("hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
1400
1401         if (on) {
1402                 if (hp_amp_power_count <= 0) {
1403                         /* depop parameters */
1404                         snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1405                                 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
1406                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1407                                 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1408                                 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
1409                         /* headphone amp power on */
1410                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1411                                 RT5640_PWR_FV1 | RT5640_PWR_FV2 , 0);
1412                         snd_soc_update_bits(codec, RT5640_PWR_VOL,
1413                                 RT5640_PWR_HV_L | RT5640_PWR_HV_R,
1414                                 RT5640_PWR_HV_L | RT5640_PWR_HV_R);
1415                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1416                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM,
1417                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM);
1418                         msleep(50);
1419                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1420                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1421                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1422                         snd_soc_update_bits(codec, RT5640_CHARGE_PUMP,
1423                                 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
1424                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1425                                 RT5640_HP_CO_MASK | RT5640_HP_SG_MASK,
1426                                 RT5640_HP_CO_EN | RT5640_HP_SG_EN);
1427                 }
1428                 hp_amp_power_count++;
1429         } else {
1430                 hp_amp_power_count--;
1431                 if (hp_amp_power_count <= 0) {
1432                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1433                                 RT5640_HP_SG_MASK | RT5640_HP_L_SMT_MASK |
1434                                 RT5640_HP_R_SMT_MASK, RT5640_HP_SG_DIS |
1435                                 RT5640_HP_L_SMT_DIS | RT5640_HP_R_SMT_DIS);
1436                         /* headphone amp power down */
1437                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1438                                 RT5640_SMT_TRIG_MASK | RT5640_HP_CD_PD_MASK |
1439                                 RT5640_HP_CO_MASK | RT5640_HP_CP_MASK |
1440                                 RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1441                                 RT5640_SMT_TRIG_DIS | RT5640_HP_CD_PD_EN |
1442                                 RT5640_HP_CO_DIS | RT5640_HP_CP_PD |
1443                                 RT5640_HP_SG_EN | RT5640_HP_CB_PD);
1444                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1445                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM,
1446                                 0);
1447                 }
1448         }
1449 }
1450
1451 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
1452 {
1453         hp_amp_power(codec, 1);
1454         /* headphone unmute sequence */
1455         snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1456                 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1457                 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
1458                 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1459                 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
1460         rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0xfc00);
1461         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1462                 RT5640_SMT_TRIG_MASK, RT5640_SMT_TRIG_EN);
1463         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1464                 RT5640_RSTN_MASK, RT5640_RSTN_EN);
1465         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1466                 RT5640_RSTN_MASK | RT5640_HP_L_SMT_MASK | RT5640_HP_R_SMT_MASK,
1467                 RT5640_RSTN_DIS | RT5640_HP_L_SMT_EN | RT5640_HP_R_SMT_EN);
1468         snd_soc_update_bits(codec, RT5640_HP_VOL,
1469                 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1470         msleep(100);
1471         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1472                 RT5640_HP_SG_MASK | RT5640_HP_L_SMT_MASK |
1473                 RT5640_HP_R_SMT_MASK, RT5640_HP_SG_DIS |
1474                 RT5640_HP_L_SMT_DIS | RT5640_HP_R_SMT_DIS);
1475         msleep(20);
1476 }
1477
1478 static void rt5640_pmd_depop(struct snd_soc_codec *codec)
1479 {
1480         /* headphone mute sequence */
1481         snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1482                 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1483                 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ1_SFT) |
1484                 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1485                 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ3_SFT));
1486         rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0xfc00);
1487         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1488                 RT5640_HP_SG_MASK, RT5640_HP_SG_EN);
1489         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1490                 RT5640_RSTP_MASK, RT5640_RSTP_EN);
1491         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1492                 RT5640_RSTP_MASK | RT5640_HP_L_SMT_MASK |
1493                 RT5640_HP_R_SMT_MASK, RT5640_RSTP_DIS |
1494                 RT5640_HP_L_SMT_EN | RT5640_HP_R_SMT_EN);
1495         msleep(90);
1496         snd_soc_update_bits(codec, RT5640_HP_VOL,
1497                 RT5640_L_MUTE | RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
1498         msleep(30);
1499
1500         hp_amp_power(codec, 0);
1501 }
1502 #endif
1503
1504 static int hp_event(struct snd_soc_dapm_widget *w,
1505         struct snd_kcontrol *kcontrol, int event)
1506 {
1507         struct snd_soc_codec *codec = w->codec;
1508
1509         switch (event) {
1510         case SND_SOC_DAPM_POST_PMU:
1511                 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1512                 rt5640_pmu_depop(codec);
1513                 break;
1514
1515         case SND_SOC_DAPM_PRE_PMD:
1516                 pr_info("hp_event --SND_SOC_DAPM_PRE_PMD\n");
1517                 rt5640_pmd_depop(codec);
1518                 break;
1519
1520         default:
1521                 return 0;
1522         }
1523
1524         return 0;
1525 }
1526
1527
1528 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
1529         struct snd_kcontrol *kcontrol, int event)
1530 {
1531         struct snd_soc_codec *codec = w->codec;
1532         unsigned int val, mask;
1533         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1534         mutex_lock(&rt5640->lock);
1535         CHECK_I2C_SHUTDOWN(rt5640, codec)
1536
1537         switch (event) {
1538         case SND_SOC_DAPM_PRE_PMU:
1539                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1540                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
1541                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
1542                 snd_soc_update_bits(codec, RT5640_DMIC,
1543                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
1544                         RT5640_DMIC_1_DP_MASK,
1545                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
1546                         RT5640_DMIC_1_DP_IN1P);
1547                 snd_soc_update_bits(codec, RT5640_DMIC,
1548                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
1549         default:
1550                 mutex_unlock(&rt5640->lock);
1551                 return 0;
1552         }
1553
1554         mutex_unlock(&rt5640->lock);
1555         return 0;
1556 }
1557
1558 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
1559         struct snd_kcontrol *kcontrol, int event)
1560 {
1561         struct snd_soc_codec *codec = w->codec;
1562         unsigned int val, mask;
1563         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1564         mutex_lock(&rt5640->lock);
1565         CHECK_I2C_SHUTDOWN(rt5640, codec)
1566
1567         switch (event) {
1568         case SND_SOC_DAPM_PRE_PMU:
1569                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1570                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
1571                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
1572                 snd_soc_update_bits(codec, RT5640_DMIC,
1573                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
1574                         RT5640_DMIC_2_DP_MASK,
1575                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
1576                         RT5640_DMIC_2_DP_IN1N);
1577                 snd_soc_update_bits(codec, RT5640_DMIC,
1578                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
1579         default:
1580                 mutex_unlock(&rt5640->lock);
1581                 return 0;
1582         }
1583
1584         mutex_unlock(&rt5640->lock);
1585         return 0;
1586 }
1587
1588 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1589         SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1590                         RT5640_PWR_PLL_BIT, 0, NULL, 0),
1591         /* Input Side */
1592         /* micbias */
1593         SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1594                         RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1595         SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1596                         RT5640_PWR_MB1_BIT, 0),
1597         SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1598                         RT5640_PWR_MB2_BIT, 0),
1599         /* Input Lines */
1600
1601         SND_SOC_DAPM_INPUT("MIC1"),
1602         SND_SOC_DAPM_INPUT("MIC2"),
1603         SND_SOC_DAPM_INPUT("DMIC1"),
1604         SND_SOC_DAPM_INPUT("DMIC2"),
1605         SND_SOC_DAPM_INPUT("IN1P"),
1606         SND_SOC_DAPM_INPUT("IN1N"),
1607         SND_SOC_DAPM_INPUT("IN2P"),
1608         SND_SOC_DAPM_INPUT("IN2N"),
1609 #if 0
1610         SND_SOC_DAPM_INPUT("DMIC L1"),
1611         SND_SOC_DAPM_INPUT("DMIC R1"),
1612         SND_SOC_DAPM_INPUT("DMIC L2"),
1613         SND_SOC_DAPM_INPUT("DMIC R2"),
1614 #else
1615         SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
1616                 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1617         SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1618         SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
1619                 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1620         SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1621 #endif
1622         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1623                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1624         /* Boost */
1625         SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1626                 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1627         SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1628                 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1629         /* Input Volume */
1630         SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1631                 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1632         SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1633                 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1634         /* IN Mux */
1635         SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1636         SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1637         /* REC Mixer */
1638         SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1639                         rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1640         SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1641                         rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1642         /* ADCs */
1643         SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1644                         RT5640_PWR_ADC_L_BIT, 0),
1645         SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1646                         RT5640_PWR_ADC_R_BIT, 0),
1647         /* ADC Mux */
1648         SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1649                                 &rt5640_sto_adc_l2_mux),
1650         SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1651                                 &rt5640_sto_adc_r2_mux),
1652         SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1653                                 &rt5640_sto_adc_l1_mux),
1654         SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1655                                 &rt5640_sto_adc_r1_mux),
1656         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1657                                 &rt5640_mono_adc_l2_mux),
1658         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1659                                 &rt5640_mono_adc_l1_mux),
1660         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1661                                 &rt5640_mono_adc_r1_mux),
1662         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1663                                 &rt5640_mono_adc_r2_mux),
1664         /* ADC Mixer */
1665         SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1666                 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1667         SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1668                 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1669         SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1670                 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1671         SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1672                 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1673         SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1674                 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1675         SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1676                 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1677         SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1678                 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1679
1680         /* IF2 Mux */
1681         SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1682                                 &rt5640_if2_adc_l_mux),
1683         SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1684                                 &rt5640_if2_adc_r_mux),
1685
1686         /* Digital Interface */
1687         SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1688                 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1689         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1690         SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1691         SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1692         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1693         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1694         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1695         SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1696                 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1697         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1698         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1699         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1700         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1701         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1702         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1703         SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1704                 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1705         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1706         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1707         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1708         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1709         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1710         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1711
1712         /* Digital Interface Select */
1713         SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1714         SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1715         SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1716         SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1717         SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1718
1719         SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1720         SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1721         SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1722         SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1723         SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1724
1725         SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1726         SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1727
1728         /* Audio Interface */
1729         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1730         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1731         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1732         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1733         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1734         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1735
1736         /* Audio DSP */
1737         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1738
1739         /* ANC */
1740         SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1741
1742         /* Output Side */
1743         /* DAC mixer before sound effect  */
1744         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1745                 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1746         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1747                 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1748
1749         /* DAC2 channel Mux */
1750         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1751                                 &rt5640_dac_l2_mux),
1752         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1753                                 &rt5640_dac_r2_mux),
1754
1755         /* DAC Mixer */
1756         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1757                 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1758         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1759                 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1760         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1761                 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1762         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1763                 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1764         SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1765                 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1766         SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1767                 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1768         /* DACs */
1769         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1770                         RT5640_PWR_DAC_L1_BIT, 0),
1771         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1772                         RT5640_PWR_DAC_L2_BIT, 0),
1773         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1774                         RT5640_PWR_DAC_R1_BIT, 0),
1775         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1776                         RT5640_PWR_DAC_R2_BIT, 0),
1777         /* SPK/OUT Mixer */
1778         SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1779                 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1780         SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1781                 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1782         SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1783                 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1784         SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1785                 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1786         /* Ouput Volume */
1787         SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1788                 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1789         SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1790                 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1791         SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1792                 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1793         SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1794                 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1795         SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1796                 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1797         SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1798                 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1799         /* SPO/HPO/LOUT/Mono Mixer */
1800         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1801                 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1802         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1803                 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1804
1805         SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1806                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1807         SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1808                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1809         SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1810                 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1811         SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1812                 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1813
1814         SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1815                 RT5640_PWR_MA_BIT, 0, NULL, 0),
1816
1817         SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1818         SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1819                                         SND_SOC_DAPM_POST_PMU),
1820
1821         SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1822                 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1823
1824         SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1825                 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1826
1827         SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1828                 SND_SOC_NOPM, 0, spk_event,
1829                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1830
1831         /* Output Lines */
1832         SND_SOC_DAPM_OUTPUT("SPOLP"),
1833         SND_SOC_DAPM_OUTPUT("SPOLN"),
1834         SND_SOC_DAPM_OUTPUT("SPORP"),
1835         SND_SOC_DAPM_OUTPUT("SPORN"),
1836         SND_SOC_DAPM_OUTPUT("HPOL"),
1837         SND_SOC_DAPM_OUTPUT("HPOR"),
1838         SND_SOC_DAPM_OUTPUT("LOUTL"),
1839         SND_SOC_DAPM_OUTPUT("LOUTR"),
1840         SND_SOC_DAPM_OUTPUT("MonoP"),
1841         SND_SOC_DAPM_OUTPUT("MonoN"),
1842 };
1843
1844 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1845         {"IN1P", NULL, "LDO2"},
1846         {"IN2P", NULL, "LDO2"},
1847
1848         {"IN1P", NULL, "MIC1"},
1849         {"IN1N", NULL, "MIC1"},
1850         {"IN2P", NULL, "MIC2"},
1851         {"IN2N", NULL, "MIC2"},
1852
1853         {"DMIC L1", NULL, "DMIC1"},
1854         {"DMIC R1", NULL, "DMIC1"},
1855         {"DMIC L2", NULL, "DMIC2"},
1856         {"DMIC R2", NULL, "DMIC2"},
1857
1858         {"BST1", NULL, "IN1P"},
1859         {"BST1", NULL, "IN1N"},
1860         {"BST2", NULL, "IN2P"},
1861         {"BST2", NULL, "IN2N"},
1862
1863         {"INL VOL", NULL, "IN2P"},
1864         {"INR VOL", NULL, "IN2N"},
1865
1866         {"RECMIXL", "HPOL Switch", "HPOL"},
1867         {"RECMIXL", "INL Switch", "INL VOL"},
1868         {"RECMIXL", "BST2 Switch", "BST2"},
1869         {"RECMIXL", "BST1 Switch", "BST1"},
1870         {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1871
1872         {"RECMIXR", "HPOR Switch", "HPOR"},
1873         {"RECMIXR", "INR Switch", "INR VOL"},
1874         {"RECMIXR", "BST2 Switch", "BST2"},
1875         {"RECMIXR", "BST1 Switch", "BST1"},
1876         {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1877
1878         {"ADC L", NULL, "RECMIXL"},
1879         {"ADC R", NULL, "RECMIXR"},
1880
1881         {"DMIC L1", NULL, "DMIC CLK"},
1882         {"DMIC L2", NULL, "DMIC CLK"},
1883
1884         {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1885         {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1886         {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1887         {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1888         {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1889
1890         {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1891         {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1892         {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1893         {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1894         {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1895
1896         {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1897         {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1898         {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1899         {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1900         {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1901
1902         {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1903         {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1904         {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1905         {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1906         {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1907
1908         {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1909         {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1910         {"Stereo ADC MIXL", NULL, "stereo filter"},
1911         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1912
1913         {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1914         {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1915         {"Stereo ADC MIXR", NULL, "stereo filter"},
1916         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1917
1918         {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1919         {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1920         {"Mono ADC MIXL", NULL, "mono left filter"},
1921         {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1922
1923         {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1924         {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1925         {"Mono ADC MIXR", NULL, "mono right filter"},
1926         {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1927
1928         {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1929         {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1930
1931         {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1932         {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1933         {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1934         {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1935         {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1936         {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1937
1938         {"IF1 ADC", NULL, "I2S1"},
1939         {"IF1 ADC", NULL, "IF1 ADC L"},
1940         {"IF1 ADC", NULL, "IF1 ADC R"},
1941         {"IF2 ADC", NULL, "I2S2"},
1942         {"IF2 ADC", NULL, "IF2 ADC L"},
1943         {"IF2 ADC", NULL, "IF2 ADC R"},
1944         {"IF3 ADC", NULL, "I2S3"},
1945         {"IF3 ADC", NULL, "IF3 ADC L"},
1946         {"IF3 ADC", NULL, "IF3 ADC R"},
1947
1948         {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1949         {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1950         {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1951         {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1952         {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1953         {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1954         {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1955         {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1956         {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1957         {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1958
1959         {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1960         {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1961         {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1962         {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1963         {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1964         {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1965         {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1966         {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1967         {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1968         {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1969
1970         {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1971         {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1972         {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1973         {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1974         {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1975         {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1976         {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1977         {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1978
1979         {"AIF1TX", NULL, "DAI1 TX Mux"},
1980         {"AIF1TX", NULL, "SDI1 TX Mux"},
1981         {"AIF2TX", NULL, "DAI2 TX Mux"},
1982         {"AIF2TX", NULL, "SDI2 TX Mux"},
1983         {"AIF3TX", NULL, "DAI3 TX Mux"},
1984
1985         {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1986         {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1987         {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1988         {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1989         {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1990         {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1991         {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1992         {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1993
1994         {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1995         {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1996         {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1997         {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
1998         {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
1999         {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
2000         {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
2001         {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
2002
2003         {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
2004         {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
2005         {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
2006         {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
2007         {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
2008         {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
2009         {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
2010         {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
2011
2012         {"IF1 DAC", NULL, "I2S1"},
2013         {"IF1 DAC", NULL, "DAI1 RX Mux"},
2014         {"IF2 DAC", NULL, "I2S2"},
2015         {"IF2 DAC", NULL, "DAI2 RX Mux"},
2016         {"IF3 DAC", NULL, "I2S3"},
2017         {"IF3 DAC", NULL, "DAI3 RX Mux"},
2018
2019         {"IF1 DAC L", NULL, "IF1 DAC"},
2020         {"IF1 DAC R", NULL, "IF1 DAC"},
2021         {"IF2 DAC L", NULL, "IF2 DAC"},
2022         {"IF2 DAC R", NULL, "IF2 DAC"},
2023         {"IF3 DAC L", NULL, "IF3 DAC"},
2024         {"IF3 DAC R", NULL, "IF3 DAC"},
2025
2026         {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
2027         {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
2028         {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
2029         {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
2030
2031         {"ANC", NULL, "Stereo ADC MIXL"},
2032         {"ANC", NULL, "Stereo ADC MIXR"},
2033
2034         {"Audio DSP", NULL, "DAC MIXL"},
2035         {"Audio DSP", NULL, "DAC MIXR"},
2036
2037         {"DAC L2 Mux", "IF2", "IF2 DAC L"},
2038         {"DAC L2 Mux", "IF3", "IF3 DAC L"},
2039         {"DAC L2 Mux", "Base L/R", "Audio DSP"},
2040
2041         {"DAC R2 Mux", "IF2", "IF2 DAC R"},
2042         {"DAC R2 Mux", "IF3", "IF3 DAC R"},
2043
2044         {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
2045         {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2046         {"Stereo DAC MIXL", "ANC Switch", "ANC"},
2047         {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
2048         {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2049         {"Stereo DAC MIXR", "ANC Switch", "ANC"},
2050
2051         {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
2052         {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2053         {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
2054         {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
2055         {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2056         {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
2057
2058         {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
2059         {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2060         {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
2061         {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2062
2063         {"DAC L1", NULL, "Stereo DAC MIXL"},
2064         {"DAC L1", NULL, "PLL1", check_sysclk1_source},
2065         {"DAC R1", NULL, "Stereo DAC MIXR"},
2066         {"DAC R1", NULL, "PLL1", check_sysclk1_source},
2067         {"DAC L2", NULL, "Mono DAC MIXL"},
2068         {"DAC L2", NULL, "PLL1", check_sysclk1_source},
2069         {"DAC R2", NULL, "Mono DAC MIXR"},
2070         {"DAC R2", NULL, "PLL1", check_sysclk1_source},
2071
2072         {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
2073         {"SPK MIXL", "INL Switch", "INL VOL"},
2074         {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
2075         {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
2076         {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
2077         {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
2078         {"SPK MIXR", "INR Switch", "INR VOL"},
2079         {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
2080         {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
2081         {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
2082
2083         {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
2084         {"OUT MIXL", "BST1 Switch", "BST1"},
2085         {"OUT MIXL", "INL Switch", "INL VOL"},
2086         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
2087         {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
2088         {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
2089         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
2090
2091         {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
2092         {"OUT MIXR", "BST2 Switch", "BST2"},
2093         {"OUT MIXR", "BST1 Switch", "BST1"},
2094         {"OUT MIXR", "INR Switch", "INR VOL"},
2095         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
2096         {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
2097         {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
2098         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
2099
2100         {"SPKVOL L", NULL, "SPK MIXL"},
2101         {"SPKVOL R", NULL, "SPK MIXR"},
2102         {"HPOVOL L", NULL, "OUT MIXL"},
2103         {"HPOVOL R", NULL, "OUT MIXR"},
2104         {"OUTVOL L", NULL, "OUT MIXL"},
2105         {"OUTVOL R", NULL, "OUT MIXR"},
2106
2107         {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
2108         {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
2109         {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
2110         {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
2111         {"SPOL MIX", "BST1 Switch", "BST1"},
2112         {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
2113         {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
2114         {"SPOR MIX", "BST1 Switch", "BST1"},
2115
2116         {"HPOL MIX", "DAC2 Switch", "DAC L2"},
2117         {"HPOL MIX", "DAC1 Switch", "DAC L1"},
2118         {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
2119         {"HPOR MIX", "DAC2 Switch", "DAC R2"},
2120         {"HPOR MIX", "DAC1 Switch", "DAC R1"},
2121         {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
2122
2123         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
2124         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
2125         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
2126         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
2127
2128         {"Mono MIX", "DAC R2 Switch", "DAC R2"},
2129         {"Mono MIX", "DAC L2 Switch", "DAC L2"},
2130         {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
2131         {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
2132         {"Mono MIX", "BST1 Switch", "BST1"},
2133
2134         {"HP L amp", NULL, "HPOL MIX"},
2135         {"HP R amp", NULL, "HPOR MIX"},
2136
2137 /*      {"HP L amp", NULL, "Improve HP amp drv"},
2138         {"HP R amp", NULL, "Improve HP amp drv"}, */
2139
2140         {"SPOLP", NULL, "SPOL MIX"},
2141         {"SPOLN", NULL, "SPOL MIX"},
2142         {"SPORP", NULL, "SPOR MIX"},
2143         {"SPORN", NULL, "SPOR MIX"},
2144
2145         {"SPOLP", NULL, "Improve SPK amp drv"},
2146         {"SPOLN", NULL, "Improve SPK amp drv"},
2147         {"SPORP", NULL, "Improve SPK amp drv"},
2148         {"SPORN", NULL, "Improve SPK amp drv"},
2149
2150         {"HPOL", NULL, "Improve HP amp drv"},
2151         {"HPOR", NULL, "Improve HP amp drv"},
2152
2153         {"HPOL", NULL, "HP L amp"},
2154         {"HPOR", NULL, "HP R amp"},
2155         {"LOUTL", NULL, "LOUT MIX"},
2156         {"LOUTR", NULL, "LOUT MIX"},
2157         {"MonoP", NULL, "Mono MIX"},
2158         {"MonoN", NULL, "Mono MIX"},
2159         {"MonoP", NULL, "Improve mono amp drv"},
2160 };
2161
2162 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
2163 {
2164         int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
2165
2166         if (codec == NULL)
2167                 return -EINVAL;
2168
2169         val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
2170         switch (dai_id) {
2171         case RT5640_AIF1:
2172                 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
2173                         val == RT5640_IF_113)
2174                         ret |= RT5640_U_IF1;
2175                 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
2176                         val == RT5640_IF_113)
2177                         ret |= RT5640_U_IF2;
2178                 if (val == RT5640_IF_321 || val == RT5640_IF_231)
2179                         ret |= RT5640_U_IF3;
2180                 break;
2181
2182         case RT5640_AIF2:
2183                 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
2184                         val == RT5640_IF_223)
2185                         ret |= RT5640_U_IF1;
2186                 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
2187                         val == RT5640_IF_223)
2188                         ret |= RT5640_U_IF2;
2189                 if (val == RT5640_IF_132 || val == RT5640_IF_312)
2190                         ret |= RT5640_U_IF3;
2191                 break;
2192
2193 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2194         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2195         case RT5640_AIF3:
2196                 if (val == RT5640_IF_312 || val == RT5640_IF_321)
2197                         ret |= RT5640_U_IF1;
2198                 if (val == RT5640_IF_132 || val == RT5640_IF_231)
2199                         ret |= RT5640_U_IF2;
2200                 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
2201                         val == RT5640_IF_113 || val == RT5640_IF_223)
2202                         ret |= RT5640_U_IF3;
2203                 break;
2204 #endif
2205
2206         default:
2207                 ret = -EINVAL;
2208                 break;
2209         }
2210
2211         return ret;
2212 }
2213
2214 static int get_clk_info(int sclk, int rate)
2215 {
2216         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
2217
2218         if (sclk <= 0 || rate <= 0)
2219                 return -EINVAL;
2220
2221         rate = rate << 8;
2222         for (i = 0; i < ARRAY_SIZE(pd); i++)
2223                 if (sclk == rate * pd[i])
2224                         return i;
2225
2226         return -EINVAL;
2227 }
2228
2229 static int rt5640_hw_params(struct snd_pcm_substream *substream,
2230         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2231 {
2232         struct snd_soc_pcm_runtime *rtd = substream->private_data;
2233         struct snd_soc_codec *codec = rtd->codec;
2234         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2235         unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
2236         int pre_div, bclk_ms, frame_size;
2237         mutex_lock(&rt5640->lock);
2238         CHECK_I2C_SHUTDOWN(rt5640, codec)
2239
2240         rt5640->lrck[dai->id] = params_rate(params);
2241         pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
2242         if (pre_div < 0) {
2243                 dev_err(codec->dev, "Unsupported clock setting\n");
2244                 mutex_unlock(&rt5640->lock);
2245                 return -EINVAL;
2246         }
2247         frame_size = snd_soc_params_to_frame_size(params);
2248         if (frame_size < 0) {
2249                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2250                 mutex_unlock(&rt5640->lock);
2251                 return -EINVAL;
2252         }
2253         bclk_ms = frame_size > 32 ? 1 : 0;
2254         rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
2255
2256         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2257                 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
2258         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2259                                 bclk_ms, pre_div, dai->id);
2260
2261         switch (params_format(params)) {
2262         case SNDRV_PCM_FORMAT_S16_LE:
2263                 break;
2264         case SNDRV_PCM_FORMAT_S20_3LE:
2265                 val_len |= RT5640_I2S_DL_20;
2266                 break;
2267         case SNDRV_PCM_FORMAT_S24_LE:
2268                 val_len |= RT5640_I2S_DL_24;
2269                 break;
2270         case SNDRV_PCM_FORMAT_S8:
2271                 val_len |= RT5640_I2S_DL_8;
2272                 break;
2273         default:
2274                 mutex_unlock(&rt5640->lock);
2275                 return -EINVAL;
2276         }
2277
2278         dai_sel = get_sdp_info(codec, dai->id);
2279         if (dai_sel < 0) {
2280                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2281                 mutex_unlock(&rt5640->lock);
2282                 return -EINVAL;
2283         }
2284         if (dai_sel & RT5640_U_IF1) {
2285                 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
2286                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
2287                         pre_div << RT5640_I2S_PD1_SFT;
2288                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2289                         RT5640_I2S_DL_MASK, val_len);
2290                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2291         }
2292         if (dai_sel & RT5640_U_IF2) {
2293                 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
2294                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
2295                         pre_div << RT5640_I2S_PD2_SFT;
2296                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2297                         RT5640_I2S_DL_MASK, val_len);
2298                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2299         }
2300 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2301         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2302         if (dai_sel & RT5640_U_IF3) {
2303                 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
2304                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
2305                         pre_div << RT5640_I2S_PD3_SFT;
2306                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2307                         RT5640_I2S_DL_MASK, val_len);
2308                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2309         }
2310 #endif
2311         mutex_unlock(&rt5640->lock);
2312         return 0;
2313 }
2314
2315 static int rt5640_prepare(struct snd_pcm_substream *substream,
2316                                 struct snd_soc_dai *dai)
2317 {
2318         struct snd_soc_pcm_runtime *rtd = substream->private_data;
2319         struct snd_soc_codec *codec = rtd->codec;
2320         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2321
2322         rt5640->aif_pu = dai->id;
2323         return 0;
2324 }
2325
2326 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2327 {
2328         struct snd_soc_codec *codec = dai->codec;
2329         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2330         unsigned int reg_val = 0, dai_sel;
2331         mutex_lock(&rt5640->lock);
2332         CHECK_I2C_SHUTDOWN(rt5640, codec)
2333
2334         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2335         case SND_SOC_DAIFMT_CBM_CFM:
2336                 rt5640->master[dai->id] = 1;
2337                 break;
2338         case SND_SOC_DAIFMT_CBS_CFS:
2339                 reg_val |= RT5640_I2S_MS_S;
2340                 rt5640->master[dai->id] = 0;
2341                 break;
2342         default:
2343                 mutex_unlock(&rt5640->lock);
2344                 return -EINVAL;
2345         }
2346
2347         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2348         case SND_SOC_DAIFMT_NB_NF:
2349                 break;
2350         case SND_SOC_DAIFMT_IB_NF:
2351                 reg_val |= RT5640_I2S_BP_INV;
2352                 break;
2353         default:
2354                 mutex_unlock(&rt5640->lock);
2355                 return -EINVAL;
2356         }
2357
2358         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2359         case SND_SOC_DAIFMT_I2S:
2360                 break;
2361         case SND_SOC_DAIFMT_LEFT_J:
2362                 reg_val |= RT5640_I2S_DF_LEFT;
2363                 break;
2364         case SND_SOC_DAIFMT_DSP_A:
2365                 reg_val |= RT5640_I2S_DF_PCM_A;
2366                 break;
2367         case SND_SOC_DAIFMT_DSP_B:
2368                 reg_val  |= RT5640_I2S_DF_PCM_B;
2369                 break;
2370         default:
2371                 mutex_unlock(&rt5640->lock);
2372                 return -EINVAL;
2373         }
2374
2375         dai_sel = get_sdp_info(codec, dai->id);
2376         if (dai_sel < 0) {
2377                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2378                 mutex_unlock(&rt5640->lock);
2379                 return -EINVAL;
2380         }
2381         if (dai_sel & RT5640_U_IF1) {
2382                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2383                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2384                         RT5640_I2S_DF_MASK, reg_val);
2385         }
2386         if (dai_sel & RT5640_U_IF2) {
2387                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2388                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2389                         RT5640_I2S_DF_MASK, reg_val);
2390         }
2391 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2392         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2393         if (dai_sel & RT5640_U_IF3) {
2394                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2395                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2396                         RT5640_I2S_DF_MASK, reg_val);
2397         }
2398 #endif
2399         mutex_unlock(&rt5640->lock);
2400         return 0;
2401 }
2402
2403 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2404                 int clk_id, unsigned int freq, int dir)
2405 {
2406         struct snd_soc_codec *codec = dai->codec;
2407         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2408         unsigned int reg_val = 0;
2409         mutex_lock(&rt5640->lock);
2410         CHECK_I2C_SHUTDOWN(rt5640, codec)
2411
2412         if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src) {
2413                 mutex_unlock(&rt5640->lock);
2414                 return 0;
2415         }
2416
2417         switch (clk_id) {
2418         case RT5640_SCLK_S_MCLK:
2419                 reg_val |= RT5640_SCLK_SRC_MCLK;
2420                 break;
2421         case RT5640_SCLK_S_PLL1:
2422                 reg_val |= RT5640_SCLK_SRC_PLL1;
2423                 break;
2424         case RT5640_SCLK_S_PLL1_TK:
2425                 reg_val |= RT5640_SCLK_SRC_PLL1T;
2426                 break;
2427         case RT5640_SCLK_S_RCCLK:
2428                 reg_val |= RT5640_SCLK_SRC_RCCLK;
2429                 break;
2430         default:
2431                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2432                 mutex_unlock(&rt5640->lock);
2433                 return -EINVAL;
2434         }
2435         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2436                 RT5640_SCLK_SRC_MASK, reg_val);
2437         rt5640->sysclk = freq;
2438         rt5640->sysclk_src = clk_id;
2439
2440         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2441         mutex_unlock(&rt5640->lock);
2442         return 0;
2443 }
2444
2445 /**
2446  * rt5640_pll_calc - Calcualte PLL M/N/K code.
2447  * @freq_in: external clock provided to codec.
2448  * @freq_out: target clock which codec works on.
2449  * @pll_code: Pointer to structure with M, N, K and bypass flag.
2450  *
2451  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2452  * which make calculation more efficiently.
2453  *
2454  * Returns 0 for success or negative error code.
2455  */
2456 static int rt5640_pll_calc(const unsigned int freq_in,
2457         const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2458 {
2459         int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2460         int n, m, red, n_t, m_t, in_t, out_t, red_t = abs(freq_out - freq_in);
2461         bool bypass = false;
2462
2463         if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2464                 return -EINVAL;
2465
2466         for (n_t = 0; n_t <= max_n; n_t++) {
2467                 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
2468                 if (in_t < 0)
2469                         continue;
2470                 if (in_t == freq_out) {
2471                         bypass = true;
2472                         n = n_t;
2473                         goto code_find;
2474                 }
2475                 for (m_t = 0; m_t <= max_m; m_t++) {
2476                         out_t = in_t / (m_t + 2);
2477                         red = abs(out_t - freq_out);
2478                         if (red < red_t) {
2479                                 n = n_t;
2480                                 m = m_t;
2481                                 if (red == 0)
2482                                         goto code_find;
2483                                 red_t = red;
2484                         }
2485                 }
2486         }
2487         pr_debug("Only get approximation about PLL\n");
2488
2489 code_find:
2490
2491         pll_code->m_bp = bypass;
2492         pll_code->m_code = m;
2493         pll_code->n_code = n;
2494         pll_code->k_code = 2;
2495         return 0;
2496 }
2497
2498 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2499                         unsigned int freq_in, unsigned int freq_out)
2500 {
2501         struct snd_soc_codec *codec = dai->codec;
2502         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2503         struct rt5640_pll_code pll_code;
2504         int ret, dai_sel;
2505         mutex_lock(&rt5640->lock);
2506         CHECK_I2C_SHUTDOWN(rt5640, codec)
2507
2508         if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2509             freq_out == rt5640->pll_out) {
2510                 mutex_unlock(&rt5640->lock);
2511                 return 0;
2512                 }
2513
2514         if (!freq_in || !freq_out) {
2515                 dev_dbg(codec->dev, "PLL disabled\n");
2516
2517                 rt5640->pll_in = 0;
2518                 rt5640->pll_out = 0;
2519                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2520                         RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2521                 mutex_unlock(&rt5640->lock);
2522                 return 0;
2523         }
2524
2525         switch (source) {
2526         case RT5640_PLL1_S_MCLK:
2527                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2528                         RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2529                 break;
2530         case RT5640_PLL1_S_BCLK1:
2531         case RT5640_PLL1_S_BCLK2:
2532 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2533         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2534         case RT5640_PLL1_S_BCLK3:
2535
2536 #endif
2537                 dai_sel = get_sdp_info(codec, dai->id);
2538                 if (dai_sel < 0) {
2539                         dev_err(codec->dev,
2540                                 "Failed to get sdp info: %d\n", dai_sel);
2541                         mutex_unlock(&rt5640->lock);
2542                         return -EINVAL;
2543                 }
2544                 if (dai_sel & RT5640_U_IF1) {
2545                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2546                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2547                 }
2548                 if (dai_sel & RT5640_U_IF2) {
2549                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2550                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2551                 }
2552                 if (dai_sel & RT5640_U_IF3) {
2553                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2554                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2555                 }
2556                 break;
2557         default:
2558                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2559                 mutex_unlock(&rt5640->lock);
2560                 return -EINVAL;
2561         }
2562
2563         ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2564         if (ret < 0) {
2565                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2566                 mutex_unlock(&rt5640->lock);
2567                 return ret;
2568         }
2569
2570         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code.m_bp,
2571                 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code);
2572
2573         snd_soc_write(codec, RT5640_PLL_CTRL1,
2574                 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2575         snd_soc_write(codec, RT5640_PLL_CTRL2,
2576                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2577                 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2578
2579         rt5640->pll_in = freq_in;
2580         rt5640->pll_out = freq_out;
2581         rt5640->pll_src = source;
2582
2583         mutex_unlock(&rt5640->lock);
2584         return 0;
2585 }
2586
2587 /**
2588  * rt5640_index_show - Dump private registers.
2589  * @dev: codec device.
2590  * @attr: device attribute.
2591  * @buf: buffer for display.
2592  *
2593  * To show non-zero values of all private registers.
2594  *
2595  * Returns buffer length.
2596  */
2597 static ssize_t rt5640_index_show(struct device *dev,
2598         struct device_attribute *attr, char *buf)
2599 {
2600         struct i2c_client *client = to_i2c_client(dev);
2601         struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2602         struct snd_soc_codec *codec = rt5640->codec;
2603         unsigned int val;
2604         int cnt = 0, i;
2605         mutex_lock(&rt5640->lock);
2606         CHECK_I2C_SHUTDOWN(rt5640, codec)
2607
2608         cnt += sprintf(buf, "RT5640 index register\n");
2609         for (i = 0; i < 0xb4; i++) {
2610                 if (cnt + 9 >= PAGE_SIZE - 1)
2611                         break;
2612                 val = rt5640_index_read(codec, i);
2613                 if (!val)
2614                         continue;
2615                 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2616         }
2617
2618         if (cnt >= PAGE_SIZE)
2619                 cnt = PAGE_SIZE - 1;
2620
2621         mutex_unlock(&rt5640->lock);
2622         return cnt;
2623 }
2624 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2625
2626 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2627                         enum snd_soc_bias_level level)
2628 {
2629         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2630         mutex_lock(&rt5640->lock);
2631         CHECK_I2C_SHUTDOWN(rt5640, codec)
2632
2633         switch (level) {
2634         case SND_SOC_BIAS_ON:
2635 #ifdef RT5640_DEMO
2636                 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2637                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2638                 snd_soc_update_bits(codec, RT5640_HP_VOL,
2639                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2640                 break;
2641 #endif
2642         case SND_SOC_BIAS_PREPARE:
2643 #ifdef RT5640_DEMO
2644                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2645                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2646                         RT5640_PWR_BG | RT5640_PWR_VREF2,
2647                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2648                         RT5640_PWR_BG | RT5640_PWR_VREF2);
2649                 msleep(100);
2650
2651                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2652                         RT5640_PWR_FV1 | RT5640_PWR_FV2,
2653                         RT5640_PWR_FV1 | RT5640_PWR_FV2);
2654
2655                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2656                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2657                         RT5640_PWR_MB1 | RT5640_PWR_MB2);
2658 #endif
2659                 break;
2660
2661         case SND_SOC_BIAS_STANDBY:
2662 #ifdef RT5640_DEMO
2663                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2664                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2665                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2666                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2667
2668                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2669                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2670                         0);
2671 #endif
2672                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2673                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2674                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2675                                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2676                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2677                                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2678                         msleep(5);
2679                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2680                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2681                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2682                         snd_soc_write(codec, RT5640_GEN_CTRL1, 0x3701);
2683                         codec->cache_only = false;
2684                         codec->cache_sync = 1;
2685                         snd_soc_cache_sync(codec);
2686                         rt5640_index_sync(codec);
2687                 }
2688                 break;
2689
2690         case SND_SOC_BIAS_OFF:
2691 #ifdef RT5640_DEMO
2692                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2693                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2694                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2695                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2696                 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2697                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2698                 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2699                         RT5640_L_MUTE, RT5640_L_MUTE);
2700 #endif
2701                 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
2702                 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
2703                 snd_soc_write(codec, RT5640_GEN_CTRL1, 0x3700);
2704                 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2705                 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2706                 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2707                 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2708                 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2709                 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2710                 break;
2711
2712         default:
2713                 break;
2714         }
2715         codec->dapm.bias_level = level;
2716
2717         mutex_unlock(&rt5640->lock);
2718         return 0;
2719 }
2720
2721 static int rt5640_probe(struct snd_soc_codec *codec)
2722 {
2723         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2724         int ret;
2725         u16 val;
2726         mutex_lock(&rt5640->lock);
2727         CHECK_I2C_SHUTDOWN(rt5640, codec)
2728
2729         codec->dapm.idle_bias_off = 1;
2730
2731         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2732         if (ret != 0) {
2733                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2734                 mutex_unlock(&rt5640->lock);
2735                 return ret;
2736         }
2737
2738         val = snd_soc_read(codec, RT5640_RESET);
2739         if ((val != rt5640_reg[RT5640_RESET]) && (val != RT5639_RESET_ID)) {
2740                 dev_err(codec->dev,
2741                         "Device with ID register %x is not rt5640/39\n", val);
2742                 mutex_unlock(&rt5640->lock);
2743                 return -ENODEV;
2744         }
2745
2746         rt5640_reset(codec);
2747         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2748                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2749                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2750                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2751                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2752         msleep(10);
2753         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2754                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2755                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2756         /* DMIC */
2757         if (rt5640->dmic_en == RT5640_DMIC1) {
2758                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2759                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2760                 snd_soc_update_bits(codec, RT5640_DMIC,
2761                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2762                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2763         } else if (rt5640->dmic_en == RT5640_DMIC2) {
2764                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2765                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2766                 snd_soc_update_bits(codec, RT5640_DMIC,
2767                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2768                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2769         }
2770
2771 #ifdef RT5640_DEMO
2772         rt5640_reg_init(codec);
2773 #endif
2774
2775 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
2776         rt5640_register_dsp(codec);
2777 #endif
2778
2779         DC_Calibrate(codec);
2780
2781         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2782
2783         snd_soc_add_codec_controls(codec, rt5640_snd_controls,
2784                 ARRAY_SIZE(rt5640_snd_controls));
2785
2786         rt5640->codec = codec;
2787         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2788         if (ret != 0) {
2789                 dev_err(codec->dev,
2790                         "Failed to create index_reg sysfs files: %d\n", ret);
2791                 mutex_unlock(&rt5640->lock);
2792                 return ret;
2793         }
2794
2795         mutex_unlock(&rt5640->lock);
2796         return 0;
2797 }
2798
2799 static int rt5640_remove(struct snd_soc_codec *codec)
2800 {
2801         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2802
2803         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2804         mutex_lock(&rt5640->lock);
2805         CHECK_I2C_SHUTDOWN(rt5640, codec)
2806         rt5640_reset(codec);
2807         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2808
2809         mutex_unlock(&rt5640->lock);
2810         return 0;
2811 }
2812 #ifdef CONFIG_PM
2813 static int rt5640_suspend(struct snd_soc_codec *codec, pm_message_t state)
2814 {
2815         rt5640_reset(codec);
2816         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2817         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2818
2819         return 0;
2820 }
2821
2822 static int rt5640_resume(struct snd_soc_codec *codec)
2823 {
2824         int ret = 0 ;
2825
2826         codec->cache_sync = 1;
2827         ret = snd_soc_cache_sync(codec);
2828         if (ret) {
2829                 dev_err(codec->dev,"Failed to sync cache: %d\n", ret);
2830                 return ret;
2831         }
2832         rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2833
2834         return 0;
2835 }
2836 #else
2837 #define rt5640_suspend NULL
2838 #define rt5640_resume NULL
2839 #endif
2840
2841 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2842 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2843                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2844
2845 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2846         .hw_params = rt5640_hw_params,
2847         .prepare = rt5640_prepare,
2848         .set_fmt = rt5640_set_dai_fmt,
2849         .set_sysclk = rt5640_set_dai_sysclk,
2850         .set_pll = rt5640_set_dai_pll,
2851 };
2852
2853 struct snd_soc_dai_driver rt5640_dai[] = {
2854         {
2855                 .name = "rt5640-aif1",
2856                 .id = RT5640_AIF1,
2857                 .playback = {
2858                         .stream_name = "AIF1 Playback",
2859                         .channels_min = 1,
2860                         .channels_max = 2,
2861                         .rates = RT5640_STEREO_RATES,
2862                         .formats = RT5640_FORMATS,
2863                 },
2864                 .capture = {
2865                         .stream_name = "AIF1 Capture",
2866                         .channels_min = 1,
2867                         .channels_max = 2,
2868                         .rates = RT5640_STEREO_RATES,
2869                         .formats = RT5640_FORMATS,
2870                 },
2871                 .ops = &rt5640_aif_dai_ops,
2872         },
2873         {
2874                 .name = "rt5640-aif2",
2875                 .id = RT5640_AIF2,
2876                 .playback = {
2877                         .stream_name = "AIF2 Playback",
2878                         .channels_min = 1,
2879                         .channels_max = 2,
2880                         .rates = RT5640_STEREO_RATES,
2881                         .formats = RT5640_FORMATS,
2882                 },
2883                 .capture = {
2884                         .stream_name = "AIF2 Capture",
2885                         .channels_min = 1,
2886                         .channels_max = 2,
2887                         .rates = RT5640_STEREO_RATES,
2888                         .formats = RT5640_FORMATS,
2889                 },
2890                 .ops = &rt5640_aif_dai_ops,
2891         },
2892 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2893         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2894         {
2895                 .name = "rt5640-aif3",
2896                 .id = RT5640_AIF3,
2897                 .playback = {
2898                         .stream_name = "AIF3 Playback",
2899                         .channels_min = 1,
2900                         .channels_max = 2,
2901                         .rates = RT5640_STEREO_RATES,
2902                         .formats = RT5640_FORMATS,
2903                 },
2904                 .capture = {
2905                         .stream_name = "AIF3 Capture",
2906                         .channels_min = 1,
2907                         .channels_max = 2,
2908                         .rates = RT5640_STEREO_RATES,
2909                         .formats = RT5640_FORMATS,
2910                 },
2911                 .ops = &rt5640_aif_dai_ops,
2912         },
2913 #endif
2914 };
2915
2916 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2917         .probe = rt5640_probe,
2918         .remove = rt5640_remove,
2919         .suspend = rt5640_suspend,
2920         .resume = rt5640_resume,
2921         .set_bias_level = rt5640_set_bias_level,
2922         .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2923         .reg_word_size = sizeof(u16),
2924         .reg_cache_default = rt5640_reg,
2925         .volatile_register = rt5640_volatile_register,
2926         .readable_register = rt5640_readable_register,
2927         .reg_cache_step = 1,
2928         .dapm_widgets = rt5640_dapm_widgets,
2929         .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2930         .dapm_routes = rt5640_dapm_routes,
2931         .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2932 };
2933
2934 static const struct i2c_device_id rt5640_i2c_id[] = {
2935         { "rt5640", 0 },
2936         { }
2937 };
2938 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2939
2940 static int rt5640_i2c_probe(struct i2c_client *i2c,
2941                     const struct i2c_device_id *id)
2942 {
2943         struct rt5640_priv *rt5640;
2944         int ret;
2945
2946         rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2947         if (NULL == rt5640)
2948                 return -ENOMEM;
2949
2950         i2c_set_clientdata(i2c, rt5640);
2951         mutex_init(&rt5640->lock);
2952
2953         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2954                         rt5640_dai, ARRAY_SIZE(rt5640_dai));
2955         if (ret < 0)
2956                 kfree(rt5640);
2957
2958         return ret;
2959 }
2960
2961 static __devexit int rt5640_i2c_remove(struct i2c_client *i2c)
2962 {
2963         snd_soc_unregister_codec(&i2c->dev);
2964         kfree(i2c_get_clientdata(i2c));
2965         return 0;
2966 }
2967
2968 static void rt5640_i2c_shutdown(struct i2c_client *i2c)
2969 {
2970         struct rt5640_priv *rt5640 = i2c_get_clientdata(i2c);
2971
2972         mutex_lock(&rt5640->lock);
2973
2974         if (i2c->irq)
2975                 disable_irq(i2c->irq);
2976         rt5640->shutdown_complete = 1;
2977
2978         mutex_unlock(&rt5640->lock);
2979 }
2980
2981 struct i2c_driver rt5640_i2c_driver = {
2982         .driver = {
2983                 .name = "rt5640",
2984                 .owner = THIS_MODULE,
2985         },
2986         .probe = rt5640_i2c_probe,
2987         .remove   = __devexit_p(rt5640_i2c_remove),
2988         .id_table = rt5640_i2c_id,
2989         .shutdown = rt5640_i2c_shutdown,
2990 };
2991
2992 static int __init rt5640_modinit(void)
2993 {
2994         return i2c_add_driver(&rt5640_i2c_driver);
2995 }
2996 module_init(rt5640_modinit);
2997
2998 static void __exit rt5640_modexit(void)
2999 {
3000         i2c_del_driver(&rt5640_i2c_driver);
3001 }
3002 module_exit(rt5640_modexit);
3003
3004 MODULE_DESCRIPTION("ASoC RT5640 driver");
3005 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
3006 MODULE_LICENSE("GPL");