asoc: codecs: rt5640:Enable rt5439
[linux-2.6.git] / sound / soc / codecs / rt5640.c
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 #include "rt5640.h"
28 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
30 #endif
31
32 #define RT5640_DEMO 1
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35 #define RT5639_RESET_ID 0x0008
36
37 #ifdef RT5640_DEMO
38 struct rt5640_init_reg {
39         u8 reg;
40         u16 val;
41 };
42
43 static struct rt5640_init_reg init_list[] = {
44         {RT5640_DUMMY1          , 0x3701},/*fa[12:13] = 1'b;fa[8~10]=1;fa[0]=1*/
45         {RT5640_DEPOP_M1        , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
46         {RT5640_DEPOP_M2        , 0x3100},/* 8f[13] = 1'b */
47         {RT5640_ADDA_CLK1       , 0x1114},/* 73[2] = 1'b  */
48         {RT5640_MICBIAS         , 0x3030},/* 93[5:4] = 11'b */
49         {RT5640_PRIV_INDEX      , 0x003d},/* PR3d[12] = 1'b */
50         {RT5640_PRIV_DATA       , 0x3600},
51         {RT5640_CLS_D_OUT       , 0xa000},/* 8d[11] = 0'b */
52         {RT5640_PRIV_INDEX      , 0x001c},/* PR1c = 0D21'h */
53         {RT5640_PRIV_DATA       , 0x0D21},
54         {RT5640_PRIV_INDEX      , 0x001b},/* PR1B = 0D21'h */
55         {RT5640_PRIV_DATA       , 0x0000},
56         {RT5640_PRIV_INDEX      , 0x0012},/* PR12 = 0aa8'h */
57         {RT5640_PRIV_DATA       , 0x0aa8},
58         {RT5640_PRIV_INDEX      , 0x0014},/* PR14 = 0aaa'h */
59         {RT5640_PRIV_DATA       , 0x0aaa},
60         {RT5640_PRIV_INDEX      , 0x0020},/* PR20 = 6110'h */
61         {RT5640_PRIV_DATA       , 0x6110},
62         {RT5640_PRIV_INDEX      , 0x0021},/* PR21 = e0e0'h */
63         {RT5640_PRIV_DATA       , 0xe0e0},
64         {RT5640_PRIV_INDEX      , 0x0023},/* PR23 = 1804'h */
65         {RT5640_PRIV_DATA       , 0x1804},
66         /*playback*/
67         {RT5640_STO_DAC_MIXER   , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
68         {RT5640_OUT_L3_MIXER    , 0x01fe},/*DACL1 -> OUTMIXL*/
69         {RT5640_OUT_R3_MIXER    , 0x01fe},/*DACR1 -> OUTMIXR */
70         {RT5640_HP_VOL          , 0x8888},/* OUTMIX -> HPVOL */
71         {RT5640_HPO_MIXER       , 0xc000},/* HPVOL -> HPOLMIX */
72 /*      {RT5640_HPO_MIXER       , 0xa000},// DAC1 -> HPOLMIX   */
73         {RT5640_SPK_L_MIXER     , 0x0036},/* DACL1 -> SPKMIXL */
74         {RT5640_SPK_R_MIXER     , 0x0036},/* DACR1 -> SPKMIXR */
75         {RT5640_SPK_VOL         , 0x8888},/* SPKMIX -> SPKVOL */
76         {RT5640_SPO_L_MIXER     , 0xe800},/* SPKVOLL -> SPOLMIX */
77         {RT5640_SPO_R_MIXER     , 0x2800},/* SPKVOLR -> SPORMIX */
78 /*      {RT5640_SPO_L_MIXER     , 0xb800},//DAC -> SPOLMIX */
79 /*      {RT5640_SPO_R_MIXER     , 0x1800},//DAC -> SPORMIX */
80 /*      {RT5640_I2S1_SDP        , 0xD000},//change IIS1 and IIS2 */
81         /*record*/
82         {RT5640_IN1_IN2         , 0x5080},/*IN1 boost 40db & differential mode*/
83         {RT5640_IN3_IN4         , 0x0500},/*IN2 boost 40db & signal ended mode*/
84         {RT5640_REC_L2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXL */
85         {RT5640_REC_R2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXR */
86 /*      {RT5640_REC_L2_MIXER    , 0x006f},//Mic2 -> RECMIXL */
87 /*      {RT5640_REC_R2_MIXER    , 0x006f},//Mic2 -> RECMIXR */
88         {RT5640_STO_ADC_MIXER   , 0x3020},/* ADC -> Sto ADC mixer */
89
90 #if RT5640_DET_EXT_MIC
91         {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
92         {RT5640_GPIO_CTRL1      , 0x8400},/* set GPIO1 to IRQ */
93         {RT5640_GPIO_CTRL3      , 0x0004},/* set GPIO1 output */
94         {RT5640_IRQ_CTRL2       , 0x8000},/*set MICBIAS short current to IRQ */
95                                         /*( if sticky set regBE : 8800 ) */
96 #endif
97
98 };
99 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
100
101 static int rt5640_reg_init(struct snd_soc_codec *codec)
102 {
103         int i;
104         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
105                 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
106         return 0;
107 }
108 #endif
109
110 static int rt5640_index_sync(struct snd_soc_codec *codec)
111 {
112         int i;
113
114         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
115                 if (RT5640_PRIV_INDEX == init_list[i].reg ||
116                         RT5640_PRIV_DATA == init_list[i].reg)
117                         snd_soc_write(codec, init_list[i].reg,
118                                         init_list[i].val);
119         return 0;
120 }
121
122 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
123         [RT5640_RESET] = 0x000c,
124         [RT5640_SPK_VOL] = 0xc8c8,
125         [RT5640_HP_VOL] = 0xc8c8,
126         [RT5640_OUTPUT] = 0xc8c8,
127         [RT5640_MONO_OUT] = 0x8000,
128         [RT5640_INL_INR_VOL] = 0x0808,
129         [RT5640_DAC1_DIG_VOL] = 0xafaf,
130         [RT5640_DAC2_DIG_VOL] = 0xafaf,
131         [RT5640_ADC_DIG_VOL] = 0x2f2f,
132         [RT5640_ADC_DATA] = 0x2f2f,
133         [RT5640_STO_ADC_MIXER] = 0x7060,
134         [RT5640_MONO_ADC_MIXER] = 0x7070,
135         [RT5640_AD_DA_MIXER] = 0x8080,
136         [RT5640_STO_DAC_MIXER] = 0x5454,
137         [RT5640_MONO_DAC_MIXER] = 0x5454,
138         [RT5640_DIG_MIXER] = 0xaa00,
139         [RT5640_DSP_PATH2] = 0xa000,
140         [RT5640_REC_L2_MIXER] = 0x007f,
141         [RT5640_REC_R2_MIXER] = 0x007f,
142         [RT5640_HPO_MIXER] = 0xe000,
143         [RT5640_SPK_L_MIXER] = 0x003e,
144         [RT5640_SPK_R_MIXER] = 0x003e,
145         [RT5640_SPO_L_MIXER] = 0xf800,
146         [RT5640_SPO_R_MIXER] = 0x3800,
147         [RT5640_SPO_CLSD_RATIO] = 0x0004,
148         [RT5640_MONO_MIXER] = 0xfc00,
149         [RT5640_OUT_L3_MIXER] = 0x01ff,
150         [RT5640_OUT_R3_MIXER] = 0x01ff,
151         [RT5640_LOUT_MIXER] = 0xf000,
152         [RT5640_PWR_ANLG1] = 0x00c0,
153         [RT5640_I2S1_SDP] = 0x8000,
154         [RT5640_I2S2_SDP] = 0x8000,
155         [RT5640_I2S3_SDP] = 0x8000,
156         [RT5640_ADDA_CLK1] = 0x1110,
157         [RT5640_ADDA_CLK2] = 0x0c00,
158         [RT5640_DMIC] = 0x1d00,
159         [RT5640_ASRC_3] = 0x0008,
160         [RT5640_HP_OVCD] = 0x0600,
161         [RT5640_CLS_D_OVCD] = 0x0228,
162         [RT5640_CLS_D_OUT] = 0xa800,
163         [RT5640_DEPOP_M1] = 0x0004,
164         [RT5640_DEPOP_M2] = 0x1100,
165         [RT5640_DEPOP_M3] = 0x0646,
166         [RT5640_CHARGE_PUMP] = 0x0c00,
167         [RT5640_MICBIAS] = 0x3000,
168         [RT5640_EQ_CTRL1] = 0x2080,
169         [RT5640_DRC_AGC_1] = 0x2206,
170         [RT5640_DRC_AGC_2] = 0x1f00,
171         [RT5640_ANC_CTRL1] = 0x034b,
172         [RT5640_ANC_CTRL2] = 0x0066,
173         [RT5640_ANC_CTRL3] = 0x000b,
174         [RT5640_GPIO_CTRL1] = 0x0400,
175         [RT5640_DSP_CTRL3] = 0x2000,
176         [RT5640_BASE_BACK] = 0x0013,
177         [RT5640_MP3_PLUS1] = 0x0680,
178         [RT5640_MP3_PLUS2] = 0x1c17,
179         [RT5640_3D_HP] = 0x8c00,
180         [RT5640_ADJ_HPF] = 0x2a20,
181         [RT5640_HP_CALIB_AMP_DET] = 0x0400,
182         [RT5640_SV_ZCD1] = 0x0809,
183         [RT5640_VENDOR_ID1] = 0x10ec,
184         [RT5640_VENDOR_ID2] = 0x6231,
185 };
186
187 static int rt5640_reset(struct snd_soc_codec *codec)
188 {
189         return snd_soc_write(codec, RT5640_RESET, 0);
190 }
191
192 /**
193  * rt5640_index_write - Write private register.
194  * @codec: SoC audio codec device.
195  * @reg: Private register index.
196  * @value: Private register Data.
197  *
198  * Modify private register for advanced setting. It can be written through
199  * private index (0x6a) and data (0x6c) register.
200  *
201  * Returns 0 for success or negative error code.
202  */
203 static int rt5640_index_write(struct snd_soc_codec *codec,
204                 unsigned int reg, unsigned int value)
205 {
206         int ret;
207
208         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
209         if (ret < 0) {
210                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
211                 goto err;
212         }
213         ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
214         if (ret < 0) {
215                 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
216                 goto err;
217         }
218         return 0;
219
220 err:
221         return ret;
222 }
223
224 /**
225  * rt5640_index_read - Read private register.
226  * @codec: SoC audio codec device.
227  * @reg: Private register index.
228  *
229  * Read advanced setting from private register. It can be read through
230  * private index (0x6a) and data (0x6c) register.
231  *
232  * Returns private register value or negative error code.
233  */
234 static unsigned int rt5640_index_read(
235         struct snd_soc_codec *codec, unsigned int reg)
236 {
237         int ret;
238
239         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
240         if (ret < 0) {
241                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
242                 return ret;
243         }
244         return snd_soc_read(codec, RT5640_PRIV_DATA);
245 }
246
247 /**
248  * rt5640_index_update_bits - update private register bits
249  * @codec: audio codec
250  * @reg: Private register index.
251  * @mask: register mask
252  * @value: new value
253  *
254  * Writes new register value.
255  *
256  * Returns 1 for change, 0 for no change, or negative error code.
257  */
258 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
259         unsigned int reg, unsigned int mask, unsigned int value)
260 {
261         unsigned int old, new;
262         int change, ret;
263
264         ret = rt5640_index_read(codec, reg);
265         if (ret < 0) {
266                 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
267                 goto err;
268         }
269
270         old = ret;
271         new = (old & ~mask) | (value & mask);
272         change = old != new;
273         if (change) {
274                 ret = rt5640_index_write(codec, reg, new);
275                 if (ret < 0) {
276                         dev_err(codec->dev,
277                                 "Failed to write private reg: %d\n", ret);
278                         goto err;
279                 }
280         }
281         return change;
282
283 err:
284         return ret;
285 }
286
287 static int rt5640_volatile_register(
288         struct snd_soc_codec *codec, unsigned int reg)
289 {
290         switch (reg) {
291         case RT5640_RESET:
292         case RT5640_PRIV_DATA:
293         case RT5640_ASRC_5:
294         case RT5640_EQ_CTRL1:
295         case RT5640_DRC_AGC_1:
296         case RT5640_ANC_CTRL1:
297         case RT5640_IRQ_CTRL2:
298         case RT5640_INT_IRQ_ST:
299         case RT5640_DSP_CTRL2:
300         case RT5640_DSP_CTRL3:
301         case RT5640_PGM_REG_ARR1:
302         case RT5640_PGM_REG_ARR3:
303                 return 1;
304         default:
305                 return 0;
306         }
307 }
308
309 static int rt5640_readable_register(
310         struct snd_soc_codec *codec, unsigned int reg)
311 {
312         switch (reg) {
313         case RT5640_RESET:
314         case RT5640_SPK_VOL:
315         case RT5640_HP_VOL:
316         case RT5640_OUTPUT:
317         case RT5640_MONO_OUT:
318         case RT5640_IN1_IN2:
319         case RT5640_IN3_IN4:
320         case RT5640_INL_INR_VOL:
321         case RT5640_DAC1_DIG_VOL:
322         case RT5640_DAC2_DIG_VOL:
323         case RT5640_DAC2_CTRL:
324         case RT5640_ADC_DIG_VOL:
325         case RT5640_ADC_DATA:
326         case RT5640_ADC_BST_VOL:
327         case RT5640_STO_ADC_MIXER:
328         case RT5640_MONO_ADC_MIXER:
329         case RT5640_AD_DA_MIXER:
330         case RT5640_STO_DAC_MIXER:
331         case RT5640_MONO_DAC_MIXER:
332         case RT5640_DIG_MIXER:
333         case RT5640_DSP_PATH1:
334         case RT5640_DSP_PATH2:
335         case RT5640_DIG_INF_DATA:
336         case RT5640_REC_L1_MIXER:
337         case RT5640_REC_L2_MIXER:
338         case RT5640_REC_R1_MIXER:
339         case RT5640_REC_R2_MIXER:
340         case RT5640_HPO_MIXER:
341         case RT5640_SPK_L_MIXER:
342         case RT5640_SPK_R_MIXER:
343         case RT5640_SPO_L_MIXER:
344         case RT5640_SPO_R_MIXER:
345         case RT5640_SPO_CLSD_RATIO:
346         case RT5640_MONO_MIXER:
347         case RT5640_OUT_L1_MIXER:
348         case RT5640_OUT_L2_MIXER:
349         case RT5640_OUT_L3_MIXER:
350         case RT5640_OUT_R1_MIXER:
351         case RT5640_OUT_R2_MIXER:
352         case RT5640_OUT_R3_MIXER:
353         case RT5640_LOUT_MIXER:
354         case RT5640_PWR_DIG1:
355         case RT5640_PWR_DIG2:
356         case RT5640_PWR_ANLG1:
357         case RT5640_PWR_ANLG2:
358         case RT5640_PWR_MIXER:
359         case RT5640_PWR_VOL:
360         case RT5640_PRIV_INDEX:
361         case RT5640_PRIV_DATA:
362         case RT5640_I2S1_SDP:
363         case RT5640_I2S2_SDP:
364         case RT5640_I2S3_SDP:
365         case RT5640_ADDA_CLK1:
366         case RT5640_ADDA_CLK2:
367         case RT5640_DMIC:
368         case RT5640_GLB_CLK:
369         case RT5640_PLL_CTRL1:
370         case RT5640_PLL_CTRL2:
371         case RT5640_ASRC_1:
372         case RT5640_ASRC_2:
373         case RT5640_ASRC_3:
374         case RT5640_ASRC_4:
375         case RT5640_ASRC_5:
376         case RT5640_HP_OVCD:
377         case RT5640_CLS_D_OVCD:
378         case RT5640_CLS_D_OUT:
379         case RT5640_DEPOP_M1:
380         case RT5640_DEPOP_M2:
381         case RT5640_DEPOP_M3:
382         case RT5640_CHARGE_PUMP:
383         case RT5640_PV_DET_SPK_G:
384         case RT5640_MICBIAS:
385         case RT5640_EQ_CTRL1:
386         case RT5640_EQ_CTRL2:
387         case RT5640_WIND_FILTER:
388         case RT5640_DRC_AGC_1:
389         case RT5640_DRC_AGC_2:
390         case RT5640_DRC_AGC_3:
391         case RT5640_SVOL_ZC:
392         case RT5640_ANC_CTRL1:
393         case RT5640_ANC_CTRL2:
394         case RT5640_ANC_CTRL3:
395         case RT5640_JD_CTRL:
396         case RT5640_ANC_JD:
397         case RT5640_IRQ_CTRL1:
398         case RT5640_IRQ_CTRL2:
399         case RT5640_INT_IRQ_ST:
400         case RT5640_GPIO_CTRL1:
401         case RT5640_GPIO_CTRL2:
402         case RT5640_GPIO_CTRL3:
403         case RT5640_DSP_CTRL1:
404         case RT5640_DSP_CTRL2:
405         case RT5640_DSP_CTRL3:
406         case RT5640_DSP_CTRL4:
407         case RT5640_PGM_REG_ARR1:
408         case RT5640_PGM_REG_ARR2:
409         case RT5640_PGM_REG_ARR3:
410         case RT5640_PGM_REG_ARR4:
411         case RT5640_PGM_REG_ARR5:
412         case RT5640_SCB_FUNC:
413         case RT5640_SCB_CTRL:
414         case RT5640_BASE_BACK:
415         case RT5640_MP3_PLUS1:
416         case RT5640_MP3_PLUS2:
417         case RT5640_3D_HP:
418         case RT5640_ADJ_HPF:
419         case RT5640_HP_CALIB_AMP_DET:
420         case RT5640_HP_CALIB2:
421         case RT5640_SV_ZCD1:
422         case RT5640_SV_ZCD2:
423         case RT5640_DUMMY1:
424         case RT5640_DUMMY2:
425         case RT5640_DUMMY3:
426         case RT5640_VENDOR_ID:
427         case RT5640_VENDOR_ID1:
428         case RT5640_VENDOR_ID2:
429                 return 1;
430         default:
431                 return 0;
432         }
433 }
434
435 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
436 {
437         int jack_type;
438         int sclk_src;
439
440         if (jack_insert) {
441                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
442                         snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
443                         snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
444                         snd_soc_write(codec, RT5640_DUMMY1 , 0x3701);
445                 }
446                 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
447                         RT5640_SCLK_SRC_MASK;
448                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
449                         RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
450                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
451                         RT5640_PWR_LDO2, RT5640_PWR_LDO2);
452                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
453                         RT5640_PWR_MB1, RT5640_PWR_MB1);
454                 snd_soc_update_bits(codec, RT5640_MICBIAS,
455                         RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
456                         RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
457                         RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
458                         RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
459                 snd_soc_update_bits(codec, RT5640_DUMMY1,
460                         0x1, 0x1);
461                 msleep(150);
462                 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
463                         jack_type = RT5640_HEADPHO_DET;
464                 else
465                         jack_type = RT5640_HEADSET_DET;
466                 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
467                         RT5640_MB1_OC_CLR, 0);
468                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
469                         RT5640_SCLK_SRC_MASK, sclk_src);
470         } else {
471                 snd_soc_update_bits(codec, RT5640_MICBIAS,
472                         RT5640_MIC1_OVCD_MASK,
473                         RT5640_MIC1_OVCD_DIS);
474
475                 jack_type = RT5640_NO_JACK;
476         }
477
478         return jack_type;
479 }
480 EXPORT_SYMBOL(rt5640_headset_detect);
481
482 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
483 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
484 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
485 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
486 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
487
488 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
489 static unsigned int bst_tlv[] = {
490         TLV_DB_RANGE_HEAD(7),
491         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
492         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
493         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
494         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
495         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
496         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
497         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
498 };
499
500 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
501                 struct snd_ctl_elem_value *ucontrol)
502 {
503         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
504         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
505
506         ucontrol->value.integer.value[0] = rt5640->dmic_en;
507
508         return 0;
509 }
510
511 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
512                 struct snd_ctl_elem_value *ucontrol)
513 {
514         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
515         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
516
517         if (rt5640->dmic_en == ucontrol->value.integer.value[0])
518                 return 0;
519
520         rt5640->dmic_en = ucontrol->value.integer.value[0];
521         switch (rt5640->dmic_en) {
522         case RT5640_DMIC_DIS:
523                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
524                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
525                         RT5640_GP4_PIN_MASK,
526                         RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
527                         RT5640_GP4_PIN_GPIO4);
528                 snd_soc_update_bits(codec, RT5640_DMIC,
529                         RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
530                         RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
531                 snd_soc_update_bits(codec, RT5640_DMIC,
532                         RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
533                         RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
534                 break;
535
536         case RT5640_DMIC1:
537                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
538                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
539                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
540                 snd_soc_update_bits(codec, RT5640_DMIC,
541                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
542                         RT5640_DMIC_1_DP_MASK,
543                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
544                         RT5640_DMIC_1_DP_IN1P);
545                 snd_soc_update_bits(codec, RT5640_DMIC,
546                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
547                 break;
548
549         case RT5640_DMIC2:
550                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
551                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
552                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
553                 snd_soc_update_bits(codec, RT5640_DMIC,
554                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
555                         RT5640_DMIC_2_DP_MASK,
556                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
557                         RT5640_DMIC_2_DP_IN1N);
558                 snd_soc_update_bits(codec, RT5640_DMIC,
559                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
560                 break;
561
562         default:
563                 return -EINVAL;
564         }
565
566         return 0;
567 }
568
569
570 /* IN1/IN2 Input Type */
571 static const char *rt5640_input_mode[] = {
572         "Single ended", "Differential"};
573
574 static const SOC_ENUM_SINGLE_DECL(
575         rt5640_in1_mode_enum, RT5640_IN1_IN2,
576         RT5640_IN_SFT1, rt5640_input_mode);
577
578 static const SOC_ENUM_SINGLE_DECL(
579         rt5640_in2_mode_enum, RT5640_IN3_IN4,
580         RT5640_IN_SFT2, rt5640_input_mode);
581
582 /* Interface data select */
583 static const char *rt5640_data_select[] = {
584         "Normal", "left copy to right", "right copy to left", "Swap"};
585
586 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
587                                 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
588
589 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
590                                 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
591
592 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
593                                 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
594
595 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
596                                 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
597
598 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
599                                 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
600
601 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
602                                 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
603
604 /* Class D speaker gain ratio */
605 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
606         "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
607
608 static const SOC_ENUM_SINGLE_DECL(
609         rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
610         RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
611
612 /* DMIC */
613 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
614
615 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
616
617
618
619 #ifdef RT5640_REG_RW
620 #define REGVAL_MAX 0xffff
621 static unsigned int regctl_addr;
622 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
623                         struct snd_ctl_elem_info *uinfo) {
624         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
625         uinfo->count = 2;
626         uinfo->value.integer.min = 0;
627         uinfo->value.integer.max = REGVAL_MAX;
628         return 0;
629 }
630
631 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
632                         struct snd_ctl_elem_value *ucontrol)
633 {
634         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
635         ucontrol->value.integer.value[0] = regctl_addr;
636         ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
637         return 0;
638 }
639
640 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
641                         struct snd_ctl_elem_value *ucontrol)
642 {
643         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
644         regctl_addr = ucontrol->value.integer.value[0];
645         if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
646                 snd_soc_write(codec, regctl_addr,
647                 ucontrol->value.integer.value[1]);
648         return 0;
649 }
650 #endif
651
652
653 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
654 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
655
656 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
657                 struct snd_ctl_elem_value *ucontrol)
658 {
659         struct soc_mixer_control *mc =
660                 (struct soc_mixer_control *)kcontrol->private_value;
661         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
662         unsigned int val = snd_soc_read(codec, mc->reg);
663
664         ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
665                 ((val & RT5640_L_VOL_MASK) >> mc->shift);
666         ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
667                 (val & RT5640_R_VOL_MASK);
668
669         return 0;
670 }
671
672 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
673                 struct snd_ctl_elem_value *ucontrol)
674 {
675         struct soc_mixer_control *mc =
676                 (struct soc_mixer_control *)kcontrol->private_value;
677         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
678         unsigned int val, val2;
679
680         val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
681         val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
682         return snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
683                         RT5640_R_VOL_MASK, val << mc->shift | val2);
684 }
685
686
687 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
688         /* Speaker Output Volume */
689         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
690                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
691                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
692
693         /* Headphone Output Volume */
694         SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
695                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
696
697         SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
698                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
699                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
700
701         /* OUTPUT Control */
702         SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
703                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
704         SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
705                 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
706         SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
707                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
708         /* MONO Output Control */
709         SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
710                                 RT5640_L_MUTE_SFT, 1, 1),
711         /* DAC Digital Volume */
712         SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
713                 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
714         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
715                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
716                         175, 0, dac_vol_tlv),
717         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
718                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
719                         175, 0, dac_vol_tlv),
720         /* IN1/IN2 Control */
721         SOC_ENUM("IN1 Mode Control",  rt5640_in1_mode_enum),
722         SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
723                 RT5640_BST_SFT1, 8, 0, bst_tlv),
724         SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
725         SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
726                 RT5640_BST_SFT2, 8, 0, bst_tlv),
727         /* INL/INR Volume Control */
728         SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
729                         RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
730                         31, 1, in_vol_tlv),
731         /* ADC Digital Volume Control */
732         SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
733                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
734         SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
735                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
736                         127, 0, adc_vol_tlv),
737         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
738                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
739                         127, 0, adc_vol_tlv),
740         /* ADC Boost Volume Control */
741         SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
742                         RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
743                         3, 0, adc_bst_tlv),
744         /* Class D speaker gain ratio */
745         SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
746         /* DMIC */
747         SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
748                 rt5640_dmic_get, rt5640_dmic_put),
749
750 #ifdef RT5640_REG_RW
751         {
752                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
753                 .name = "Register Control",
754                 .info = rt5640_regctl_info,
755                 .get = rt5640_regctl_get,
756                 .put = rt5640_regctl_put,
757         },
758 #endif
759 };
760
761 /**
762  * set_dmic_clk - Set parameter of dmic.
763  *
764  * @w: DAPM widget.
765  * @kcontrol: The kcontrol of this widget.
766  * @event: Event id.
767  *
768  * Choose dmic clock between 1MHz and 3MHz.
769  * It is better for clock to approximate 3MHz.
770  */
771 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
772         struct snd_kcontrol *kcontrol, int event)
773 {
774         struct snd_soc_codec *codec = w->codec;
775         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
776         int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
777
778         rate = rt5640->lrck[rt5640->aif_pu] << 8;
779         red = 3000000 * 12;
780         for (i = 0; i < ARRAY_SIZE(div); i++) {
781                 bound = div[i] * 3000000;
782                 if (rate > bound)
783                         continue;
784                 temp = bound - rate;
785                 if (temp < red) {
786                         red = temp;
787                         idx = i;
788                 }
789         }
790         if (idx < 0)
791                 dev_err(codec->dev, "Failed to set DMIC clock\n");
792         else
793                 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
794                                         idx << RT5640_DMIC_CLK_SFT);
795         return idx;
796 }
797
798 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
799                          struct snd_soc_dapm_widget *sink)
800 {
801         unsigned int val;
802
803         val = snd_soc_read(source->codec, RT5640_GLB_CLK);
804         val &= RT5640_SCLK_SRC_MASK;
805         if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
806                 return 1;
807         else
808                 return 0;
809 }
810
811 /* Digital Mixer */
812 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
813         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
814                         RT5640_M_ADC_L1_SFT, 1, 1),
815         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
816                         RT5640_M_ADC_L2_SFT, 1, 1),
817 };
818
819 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
820         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
821                         RT5640_M_ADC_R1_SFT, 1, 1),
822         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
823                         RT5640_M_ADC_R2_SFT, 1, 1),
824 };
825
826 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
827         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
828                         RT5640_M_MONO_ADC_L1_SFT, 1, 1),
829         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
830                         RT5640_M_MONO_ADC_L2_SFT, 1, 1),
831 };
832
833 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
834         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
835                         RT5640_M_MONO_ADC_R1_SFT, 1, 1),
836         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
837                         RT5640_M_MONO_ADC_R2_SFT, 1, 1),
838 };
839
840 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
841         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
842                         RT5640_M_ADCMIX_L_SFT, 1, 1),
843         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
844                         RT5640_M_IF1_DAC_L_SFT, 1, 1),
845 };
846
847 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
848         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
849                         RT5640_M_ADCMIX_R_SFT, 1, 1),
850         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
851                         RT5640_M_IF1_DAC_R_SFT, 1, 1),
852 };
853
854 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
855         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
856                         RT5640_M_DAC_L1_SFT, 1, 1),
857         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
858                         RT5640_M_DAC_L2_SFT, 1, 1),
859         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
860                         RT5640_M_ANC_DAC_L_SFT, 1, 1),
861 };
862
863 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
864         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
865                         RT5640_M_DAC_R1_SFT, 1, 1),
866         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
867                         RT5640_M_DAC_R2_SFT, 1, 1),
868         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
869                         RT5640_M_ANC_DAC_R_SFT, 1, 1),
870 };
871
872 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
873         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
874                         RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
875         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
876                         RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
877         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
878                         RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
879 };
880
881 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
882         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
883                         RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
884         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
885                         RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
886         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
887                         RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
888 };
889
890 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
891         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
892                         RT5640_M_STO_L_DAC_L_SFT, 1, 1),
893         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
894                         RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
895 };
896
897 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
898         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
899                         RT5640_M_STO_R_DAC_R_SFT, 1, 1),
900         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
901                         RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
902 };
903
904 /* Analog Input Mixer */
905 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
906         SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
907                         RT5640_M_HP_L_RM_L_SFT, 1, 1),
908         SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
909                         RT5640_M_IN_L_RM_L_SFT, 1, 1),
910         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
911                         RT5640_M_BST4_RM_L_SFT, 1, 1),
912         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
913                         RT5640_M_BST1_RM_L_SFT, 1, 1),
914         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
915                         RT5640_M_OM_L_RM_L_SFT, 1, 1),
916 };
917
918 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
919         SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
920                         RT5640_M_HP_R_RM_R_SFT, 1, 1),
921         SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
922                         RT5640_M_IN_R_RM_R_SFT, 1, 1),
923         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
924                         RT5640_M_BST4_RM_R_SFT, 1, 1),
925         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
926                         RT5640_M_BST1_RM_R_SFT, 1, 1),
927         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
928                         RT5640_M_OM_R_RM_R_SFT, 1, 1),
929 };
930
931 /* Analog Output Mixer */
932 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
933         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
934                         RT5640_M_RM_L_SM_L_SFT, 1, 1),
935         SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
936                         RT5640_M_IN_L_SM_L_SFT, 1, 1),
937         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
938                         RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
939         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
940                         RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
941         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
942                         RT5640_M_OM_L_SM_L_SFT, 1, 1),
943 };
944
945 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
946         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
947                         RT5640_M_RM_R_SM_R_SFT, 1, 1),
948         SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
949                         RT5640_M_IN_R_SM_R_SFT, 1, 1),
950         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
951                         RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
952         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
953                         RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
954         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
955                         RT5640_M_OM_R_SM_R_SFT, 1, 1),
956 };
957
958 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
959         SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
960                         RT5640_M_SM_L_OM_L_SFT, 1, 1),
961         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
962                         RT5640_M_BST1_OM_L_SFT, 1, 1),
963         SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
964                         RT5640_M_IN_L_OM_L_SFT, 1, 1),
965         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
966                         RT5640_M_RM_L_OM_L_SFT, 1, 1),
967         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
968                         RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
969         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
970                         RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
971         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
972                         RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
973 };
974
975 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
976         SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
977                         RT5640_M_SM_L_OM_R_SFT, 1, 1),
978         SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
979                         RT5640_M_BST4_OM_R_SFT, 1, 1),
980         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
981                         RT5640_M_BST1_OM_R_SFT, 1, 1),
982         SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
983                         RT5640_M_IN_R_OM_R_SFT, 1, 1),
984         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
985                         RT5640_M_RM_R_OM_R_SFT, 1, 1),
986         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
987                         RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
988         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
989                         RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
990         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
991                         RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
992 };
993
994 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
995         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
996                         RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
997         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
998                         RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
999         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
1000                         RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1001         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1002                         RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1003         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1004                         RT5640_M_BST1_SPM_L_SFT, 1, 1),
1005 };
1006
1007 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1008         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1009                         RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1010         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1011                         RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1012         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1013                         RT5640_M_BST1_SPM_R_SFT, 1, 1),
1014 };
1015
1016 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1017         SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1018                         RT5640_M_DAC2_HM_SFT, 1, 1),
1019         SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1020                         RT5640_M_DAC1_HM_SFT, 1, 1),
1021         SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1022                         RT5640_M_HPVOL_HM_SFT, 1, 1),
1023 };
1024
1025 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1026         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1027                         RT5640_M_DAC_L1_LM_SFT, 1, 1),
1028         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1029                         RT5640_M_DAC_R1_LM_SFT, 1, 1),
1030         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1031                         RT5640_M_OV_L_LM_SFT, 1, 1),
1032         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1033                         RT5640_M_OV_R_LM_SFT, 1, 1),
1034 };
1035
1036 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1037         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1038                         RT5640_M_DAC_R2_MM_SFT, 1, 1),
1039         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1040                         RT5640_M_DAC_L2_MM_SFT, 1, 1),
1041         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1042                         RT5640_M_OV_R_MM_SFT, 1, 1),
1043         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1044                         RT5640_M_OV_L_MM_SFT, 1, 1),
1045         SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1046                         RT5640_M_BST1_MM_SFT, 1, 1),
1047 };
1048
1049 /* INL/R source */
1050 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1051
1052 static const SOC_ENUM_SINGLE_DECL(
1053         rt5640_inl_enum, RT5640_INL_INR_VOL,
1054         RT5640_INL_SEL_SFT, rt5640_inl_src);
1055
1056 static const struct snd_kcontrol_new rt5640_inl_mux =
1057         SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1058
1059 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1060
1061 static const SOC_ENUM_SINGLE_DECL(
1062         rt5640_inr_enum, RT5640_INL_INR_VOL,
1063         RT5640_INR_SEL_SFT, rt5640_inr_src);
1064
1065 static const struct snd_kcontrol_new rt5640_inr_mux =
1066         SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1067
1068 /* Stereo ADC source */
1069 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1070
1071 static const SOC_ENUM_SINGLE_DECL(
1072         rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1073         RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1074
1075 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1076         SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1077
1078 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1079         SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1080
1081 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1082
1083 static const SOC_ENUM_SINGLE_DECL(
1084         rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1085         RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1086
1087 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1088         SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1089
1090 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1091         SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1092
1093 /* Mono ADC source */
1094 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1095
1096 static const SOC_ENUM_SINGLE_DECL(
1097         rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1098         RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1099
1100 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1101         SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1102
1103 static const char *rt5640_mono_adc_l2_src[] = {
1104         "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1105 };
1106
1107 static const SOC_ENUM_SINGLE_DECL(
1108         rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1109         RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1110
1111 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1112         SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1113
1114 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1115
1116 static const SOC_ENUM_SINGLE_DECL(
1117         rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1118         RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1119
1120 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1121         SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1122
1123 static const char *rt5640_mono_adc_r2_src[] = {
1124         "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1125 };
1126
1127 static const SOC_ENUM_SINGLE_DECL(
1128         rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1129         RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1130
1131 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1132         SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1133
1134 /* DAC2 channel source */
1135 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1136
1137 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1138                                 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1139
1140 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1141         SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1142
1143 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1144
1145 static const SOC_ENUM_SINGLE_DECL(
1146         rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1147         RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1148
1149 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1150         SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1151
1152 /* Interface 2  ADC channel source */
1153 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1154
1155 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1156                         RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1157
1158 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1159         SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1160
1161 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1162
1163 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1164                         RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1165
1166 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1167         SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1168
1169 /* digital interface and iis interface map */
1170 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1171         "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1172         "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1173
1174 static const SOC_ENUM_SINGLE_DECL(
1175         rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1176         RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1177
1178 static const struct snd_kcontrol_new rt5640_dai_mux =
1179         SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1180
1181 /* SDI select */
1182 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1183
1184 static const SOC_ENUM_SINGLE_DECL(
1185         rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1186         RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1187
1188 static const struct snd_kcontrol_new rt5640_sdi_mux =
1189         SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1190
1191 static int spk_event(struct snd_soc_dapm_widget *w,
1192         struct snd_kcontrol *kcontrol, int event)
1193 {
1194         struct snd_soc_codec *codec = w->codec;
1195
1196         switch (event) {
1197         case SND_SOC_DAPM_POST_PMU:
1198                 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1199                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1200                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1201                 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1202                 break;
1203
1204         case SND_SOC_DAPM_PRE_PMD:
1205                 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1206                 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1207                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1208                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1209                 break;
1210
1211         default:
1212                 return 0;
1213         }
1214         return 0;
1215 }
1216
1217 static int hp_event(struct snd_soc_dapm_widget *w,
1218         struct snd_kcontrol *kcontrol, int event)
1219 {
1220         switch (event) {
1221         case SND_SOC_DAPM_POST_PMU:
1222                 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1223                 break;
1224
1225         case SND_SOC_DAPM_PRE_PMD:
1226                 pr_info("hp_event --SND_SOC_DAPM_POST_PMD\n");
1227                 break;
1228
1229         default:
1230                 return 0;
1231         }
1232         return 0;
1233 }
1234
1235 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
1236         struct snd_kcontrol *kcontrol, int event)
1237 {
1238         struct snd_soc_codec *codec = w->codec;
1239         unsigned int val, mask;
1240
1241         switch (event) {
1242         case SND_SOC_DAPM_PRE_PMU:
1243                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1244                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
1245                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
1246                 snd_soc_update_bits(codec, RT5640_DMIC,
1247                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
1248                         RT5640_DMIC_1_DP_MASK,
1249                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
1250                         RT5640_DMIC_1_DP_IN1P);
1251                 snd_soc_update_bits(codec, RT5640_DMIC,
1252                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
1253         default:
1254                 return 0;
1255         }
1256
1257         return 0;
1258 }
1259
1260 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
1261         struct snd_kcontrol *kcontrol, int event)
1262 {
1263         struct snd_soc_codec *codec = w->codec;
1264         unsigned int val, mask;
1265
1266         switch (event) {
1267         case SND_SOC_DAPM_PRE_PMU:
1268                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1269                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
1270                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
1271                 snd_soc_update_bits(codec, RT5640_DMIC,
1272                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
1273                         RT5640_DMIC_2_DP_MASK,
1274                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
1275                         RT5640_DMIC_2_DP_IN1N);
1276                 snd_soc_update_bits(codec, RT5640_DMIC,
1277                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
1278         default:
1279                 return 0;
1280         }
1281
1282         return 0;
1283 }
1284
1285 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1286         SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1287                         RT5640_PWR_PLL_BIT, 0, NULL, 0),
1288         /* Input Side */
1289         /* micbias */
1290         SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1291                         RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1292         SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1293                         RT5640_PWR_MB1_BIT, 0),
1294         SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1295                         RT5640_PWR_MB2_BIT, 0),
1296         /* Input Lines */
1297
1298         SND_SOC_DAPM_INPUT("MIC1"),
1299         SND_SOC_DAPM_INPUT("MIC2"),
1300         SND_SOC_DAPM_INPUT("DMIC1"),
1301         SND_SOC_DAPM_INPUT("DMIC2"),
1302         SND_SOC_DAPM_INPUT("IN1P"),
1303         SND_SOC_DAPM_INPUT("IN1N"),
1304         SND_SOC_DAPM_INPUT("IN2P"),
1305         SND_SOC_DAPM_INPUT("IN2N"),
1306 #if 0
1307         SND_SOC_DAPM_INPUT("DMIC L1"),
1308         SND_SOC_DAPM_INPUT("DMIC R1"),
1309         SND_SOC_DAPM_INPUT("DMIC L2"),
1310         SND_SOC_DAPM_INPUT("DMIC R2"),
1311 #else
1312         SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
1313                 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1314         SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1315         SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
1316                 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1317         SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1318 #endif
1319         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1320                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1321         /* Boost */
1322         SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1323                 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1324         SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1325                 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1326         /* Input Volume */
1327         SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1328                 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1329         SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1330                 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1331         /* IN Mux */
1332         SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1333         SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1334         /* REC Mixer */
1335         SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1336                         rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1337         SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1338                         rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1339         /* ADCs */
1340         SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1341                         RT5640_PWR_ADC_L_BIT, 0),
1342         SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1343                         RT5640_PWR_ADC_R_BIT, 0),
1344         /* ADC Mux */
1345         SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1346                                 &rt5640_sto_adc_l2_mux),
1347         SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1348                                 &rt5640_sto_adc_r2_mux),
1349         SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1350                                 &rt5640_sto_adc_l1_mux),
1351         SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1352                                 &rt5640_sto_adc_r1_mux),
1353         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1354                                 &rt5640_mono_adc_l2_mux),
1355         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1356                                 &rt5640_mono_adc_l1_mux),
1357         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1358                                 &rt5640_mono_adc_r1_mux),
1359         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1360                                 &rt5640_mono_adc_r2_mux),
1361         /* ADC Mixer */
1362         SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1363                 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1364         SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1365                 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1366         SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1367                 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1368         SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1369                 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1370         SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1371                 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1372         SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1373                 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1374         SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1375                 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1376
1377         /* IF2 Mux */
1378         SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1379                                 &rt5640_if2_adc_l_mux),
1380         SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1381                                 &rt5640_if2_adc_r_mux),
1382
1383         /* Digital Interface */
1384         SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1385                 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1386         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1387         SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1388         SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1389         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1390         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1391         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1392         SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1393                 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1394         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1395         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1396         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1397         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1398         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1399         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1400         SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1401                 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1402         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1403         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1404         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1405         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1406         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1407         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1408
1409         /* Digital Interface Select */
1410         SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1411         SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1412         SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1413         SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1414         SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1415
1416         SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1417         SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1418         SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1419         SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1420         SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1421
1422         SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1423         SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1424
1425         /* Audio Interface */
1426         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1427         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1428         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1429         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1430         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1431         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1432
1433         /* Audio DSP */
1434         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1435
1436         /* ANC */
1437         SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1438
1439         /* Output Side */
1440         /* DAC mixer before sound effect  */
1441         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1442                 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1443         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1444                 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1445
1446         /* DAC2 channel Mux */
1447         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1448                                 &rt5640_dac_l2_mux),
1449         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1450                                 &rt5640_dac_r2_mux),
1451
1452         /* DAC Mixer */
1453         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1454                 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1455         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1456                 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1457         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1458                 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1459         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1460                 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1461         SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1462                 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1463         SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1464                 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1465         /* DACs */
1466         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1467                         RT5640_PWR_DAC_L1_BIT, 0),
1468         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1469                         RT5640_PWR_DAC_L2_BIT, 0),
1470         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1471                         RT5640_PWR_DAC_R1_BIT, 0),
1472         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1473                         RT5640_PWR_DAC_R2_BIT, 0),
1474         /* SPK/OUT Mixer */
1475         SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1476                 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1477         SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1478                 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1479         SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1480                 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1481         SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1482                 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1483         /* Ouput Volume */
1484         SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1485                 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1486         SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1487                 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1488         SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1489                 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1490         SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1491                 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1492         SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1493                 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1494         SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1495                 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1496         /* SPO/HPO/LOUT/Mono Mixer */
1497         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1498                 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1499         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1500                 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1501
1502         SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1503                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1504         SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1505                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1506         SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1507                 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1508         SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1509                 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1510
1511         SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1512                 RT5640_PWR_MA_BIT, 0, NULL, 0),
1513
1514         SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1515         SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1516                                         SND_SOC_DAPM_POST_PMU),
1517
1518         SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1519                 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1520
1521         SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1522                 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1523
1524         SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1525                 SND_SOC_NOPM, 0, spk_event,
1526                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1527
1528         /* Output Lines */
1529         SND_SOC_DAPM_OUTPUT("SPOLP"),
1530         SND_SOC_DAPM_OUTPUT("SPOLN"),
1531         SND_SOC_DAPM_OUTPUT("SPORP"),
1532         SND_SOC_DAPM_OUTPUT("SPORN"),
1533         SND_SOC_DAPM_OUTPUT("HPOL"),
1534         SND_SOC_DAPM_OUTPUT("HPOR"),
1535         SND_SOC_DAPM_OUTPUT("LOUTL"),
1536         SND_SOC_DAPM_OUTPUT("LOUTR"),
1537         SND_SOC_DAPM_OUTPUT("MonoP"),
1538         SND_SOC_DAPM_OUTPUT("MonoN"),
1539 };
1540
1541 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1542         {"IN1P", NULL, "LDO2"},
1543         {"IN2P", NULL, "LDO2"},
1544
1545         {"IN1P", NULL, "MIC1"},
1546         {"IN1N", NULL, "MIC1"},
1547         {"IN2P", NULL, "MIC2"},
1548         {"IN2N", NULL, "MIC2"},
1549
1550         {"DMIC L1", NULL, "DMIC1"},
1551         {"DMIC R1", NULL, "DMIC1"},
1552         {"DMIC L2", NULL, "DMIC2"},
1553         {"DMIC R2", NULL, "DMIC2"},
1554
1555         {"BST1", NULL, "IN1P"},
1556         {"BST1", NULL, "IN1N"},
1557         {"BST2", NULL, "IN2P"},
1558         {"BST2", NULL, "IN2N"},
1559
1560         {"INL VOL", NULL, "IN2P"},
1561         {"INR VOL", NULL, "IN2N"},
1562
1563         {"RECMIXL", "HPOL Switch", "HPOL"},
1564         {"RECMIXL", "INL Switch", "INL VOL"},
1565         {"RECMIXL", "BST2 Switch", "BST2"},
1566         {"RECMIXL", "BST1 Switch", "BST1"},
1567         {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1568
1569         {"RECMIXR", "HPOR Switch", "HPOR"},
1570         {"RECMIXR", "INR Switch", "INR VOL"},
1571         {"RECMIXR", "BST2 Switch", "BST2"},
1572         {"RECMIXR", "BST1 Switch", "BST1"},
1573         {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1574
1575         {"ADC L", NULL, "RECMIXL"},
1576         {"ADC R", NULL, "RECMIXR"},
1577
1578         {"DMIC L1", NULL, "DMIC CLK"},
1579         {"DMIC L2", NULL, "DMIC CLK"},
1580
1581         {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1582         {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1583         {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1584         {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1585         {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1586
1587         {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1588         {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1589         {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1590         {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1591         {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1592
1593         {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1594         {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1595         {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1596         {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1597         {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1598
1599         {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1600         {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1601         {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1602         {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1603         {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1604
1605         {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1606         {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1607         {"Stereo ADC MIXL", NULL, "stereo filter"},
1608         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1609
1610         {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1611         {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1612         {"Stereo ADC MIXR", NULL, "stereo filter"},
1613         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1614
1615         {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1616         {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1617         {"Mono ADC MIXL", NULL, "mono left filter"},
1618         {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1619
1620         {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1621         {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1622         {"Mono ADC MIXR", NULL, "mono right filter"},
1623         {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1624
1625         {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1626         {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1627
1628         {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1629         {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1630         {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1631         {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1632         {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1633         {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1634
1635         {"IF1 ADC", NULL, "I2S1"},
1636         {"IF1 ADC", NULL, "IF1 ADC L"},
1637         {"IF1 ADC", NULL, "IF1 ADC R"},
1638         {"IF2 ADC", NULL, "I2S2"},
1639         {"IF2 ADC", NULL, "IF2 ADC L"},
1640         {"IF2 ADC", NULL, "IF2 ADC R"},
1641         {"IF3 ADC", NULL, "I2S3"},
1642         {"IF3 ADC", NULL, "IF3 ADC L"},
1643         {"IF3 ADC", NULL, "IF3 ADC R"},
1644
1645         {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1646         {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1647         {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1648         {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1649         {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1650         {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1651         {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1652         {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1653         {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1654         {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1655
1656         {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1657         {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1658         {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1659         {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1660         {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1661         {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1662         {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1663         {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1664         {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1665         {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1666
1667         {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1668         {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1669         {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1670         {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1671         {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1672         {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1673         {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1674         {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1675
1676         {"AIF1TX", NULL, "DAI1 TX Mux"},
1677         {"AIF1TX", NULL, "SDI1 TX Mux"},
1678         {"AIF2TX", NULL, "DAI2 TX Mux"},
1679         {"AIF2TX", NULL, "SDI2 TX Mux"},
1680         {"AIF3TX", NULL, "DAI3 TX Mux"},
1681
1682         {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1683         {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1684         {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1685         {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1686         {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1687         {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1688         {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1689         {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1690
1691         {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1692         {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1693         {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1694         {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
1695         {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
1696         {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1697         {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
1698         {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
1699
1700         {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
1701         {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
1702         {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
1703         {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
1704         {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
1705         {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
1706         {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
1707         {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
1708
1709         {"IF1 DAC", NULL, "I2S1"},
1710         {"IF1 DAC", NULL, "DAI1 RX Mux"},
1711         {"IF2 DAC", NULL, "I2S2"},
1712         {"IF2 DAC", NULL, "DAI2 RX Mux"},
1713         {"IF3 DAC", NULL, "I2S3"},
1714         {"IF3 DAC", NULL, "DAI3 RX Mux"},
1715
1716         {"IF1 DAC L", NULL, "IF1 DAC"},
1717         {"IF1 DAC R", NULL, "IF1 DAC"},
1718         {"IF2 DAC L", NULL, "IF2 DAC"},
1719         {"IF2 DAC R", NULL, "IF2 DAC"},
1720         {"IF3 DAC L", NULL, "IF3 DAC"},
1721         {"IF3 DAC R", NULL, "IF3 DAC"},
1722
1723         {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1724         {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1725         {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1726         {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1727
1728         {"ANC", NULL, "Stereo ADC MIXL"},
1729         {"ANC", NULL, "Stereo ADC MIXR"},
1730
1731         {"Audio DSP", NULL, "DAC MIXL"},
1732         {"Audio DSP", NULL, "DAC MIXR"},
1733
1734         {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1735         {"DAC L2 Mux", "IF3", "IF3 DAC L"},
1736         {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1737
1738         {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1739         {"DAC R2 Mux", "IF3", "IF3 DAC R"},
1740
1741         {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1742         {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1743         {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1744         {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1745         {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1746         {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1747
1748         {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1749         {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1750         {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1751         {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1752         {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1753         {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1754
1755         {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1756         {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1757         {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1758         {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1759
1760         {"DAC L1", NULL, "Stereo DAC MIXL"},
1761         {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1762         {"DAC R1", NULL, "Stereo DAC MIXR"},
1763         {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1764         {"DAC L2", NULL, "Mono DAC MIXL"},
1765         {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1766         {"DAC R2", NULL, "Mono DAC MIXR"},
1767         {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1768
1769         {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1770         {"SPK MIXL", "INL Switch", "INL VOL"},
1771         {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1772         {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1773         {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1774         {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1775         {"SPK MIXR", "INR Switch", "INR VOL"},
1776         {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1777         {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1778         {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1779
1780         {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1781         {"OUT MIXL", "BST1 Switch", "BST1"},
1782         {"OUT MIXL", "INL Switch", "INL VOL"},
1783         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1784         {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1785         {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1786         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1787
1788         {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1789         {"OUT MIXR", "BST2 Switch", "BST2"},
1790         {"OUT MIXR", "BST1 Switch", "BST1"},
1791         {"OUT MIXR", "INR Switch", "INR VOL"},
1792         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1793         {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1794         {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1795         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1796
1797         {"SPKVOL L", NULL, "SPK MIXL"},
1798         {"SPKVOL R", NULL, "SPK MIXR"},
1799         {"HPOVOL L", NULL, "OUT MIXL"},
1800         {"HPOVOL R", NULL, "OUT MIXR"},
1801         {"OUTVOL L", NULL, "OUT MIXL"},
1802         {"OUTVOL R", NULL, "OUT MIXR"},
1803
1804         {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1805         {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1806         {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1807         {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1808         {"SPOL MIX", "BST1 Switch", "BST1"},
1809         {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1810         {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1811         {"SPOR MIX", "BST1 Switch", "BST1"},
1812
1813         {"HPOL MIX", "DAC2 Switch", "DAC L2"},
1814         {"HPOL MIX", "DAC1 Switch", "DAC L1"},
1815         {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
1816         {"HPOR MIX", "DAC2 Switch", "DAC R2"},
1817         {"HPOR MIX", "DAC1 Switch", "DAC R1"},
1818         {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
1819
1820         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1821         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1822         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1823         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1824
1825         {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1826         {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1827         {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1828         {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1829         {"Mono MIX", "BST1 Switch", "BST1"},
1830
1831         {"HP L amp", NULL, "HPOL MIX"},
1832         {"HP R amp", NULL, "HPOR MIX"},
1833
1834 /*      {"HP L amp", NULL, "Improve HP amp drv"},
1835         {"HP R amp", NULL, "Improve HP amp drv"}, */
1836
1837         {"SPOLP", NULL, "SPOL MIX"},
1838         {"SPOLN", NULL, "SPOL MIX"},
1839         {"SPORP", NULL, "SPOR MIX"},
1840         {"SPORN", NULL, "SPOR MIX"},
1841
1842         {"SPOLP", NULL, "Improve SPK amp drv"},
1843         {"SPOLN", NULL, "Improve SPK amp drv"},
1844         {"SPORP", NULL, "Improve SPK amp drv"},
1845         {"SPORN", NULL, "Improve SPK amp drv"},
1846
1847         {"HPOL", NULL, "Improve HP amp drv"},
1848         {"HPOR", NULL, "Improve HP amp drv"},
1849
1850         {"HPOL", NULL, "HP L amp"},
1851         {"HPOR", NULL, "HP R amp"},
1852         {"LOUTL", NULL, "LOUT MIX"},
1853         {"LOUTR", NULL, "LOUT MIX"},
1854         {"MonoP", NULL, "Mono MIX"},
1855         {"MonoN", NULL, "Mono MIX"},
1856         {"MonoP", NULL, "Improve mono amp drv"},
1857 };
1858
1859 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1860 {
1861         int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
1862
1863         if (codec == NULL)
1864                 return -EINVAL;
1865
1866         val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1867         switch (dai_id) {
1868         case RT5640_AIF1:
1869                 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
1870                         val == RT5640_IF_113)
1871                         ret |= RT5640_U_IF1;
1872                 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
1873                         val == RT5640_IF_113)
1874                         ret |= RT5640_U_IF2;
1875                 if (val == RT5640_IF_321 || val == RT5640_IF_231)
1876                         ret |= RT5640_U_IF3;
1877                 break;
1878
1879         case RT5640_AIF2:
1880                 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
1881                         val == RT5640_IF_223)
1882                         ret |= RT5640_U_IF1;
1883                 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
1884                         val == RT5640_IF_223)
1885                         ret |= RT5640_U_IF2;
1886                 if (val == RT5640_IF_132 || val == RT5640_IF_312)
1887                         ret |= RT5640_U_IF3;
1888                 break;
1889
1890 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
1891         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1892         case RT5640_AIF3:
1893                 if (val == RT5640_IF_312 || val == RT5640_IF_321)
1894                         ret |= RT5640_U_IF1;
1895                 if (val == RT5640_IF_132 || val == RT5640_IF_231)
1896                         ret |= RT5640_U_IF2;
1897                 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
1898                         val == RT5640_IF_113 || val == RT5640_IF_223)
1899                         ret |= RT5640_U_IF3;
1900                 break;
1901 #endif
1902
1903         default:
1904                 ret = -EINVAL;
1905                 break;
1906         }
1907
1908         return ret;
1909 }
1910
1911 static int get_clk_info(int sclk, int rate)
1912 {
1913         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1914
1915         if (sclk <= 0 || rate <= 0)
1916                 return -EINVAL;
1917
1918         rate = rate << 8;
1919         for (i = 0; i < ARRAY_SIZE(pd); i++)
1920                 if (sclk == rate * pd[i])
1921                         return i;
1922
1923         return -EINVAL;
1924 }
1925
1926 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1927         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1928 {
1929         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1930         struct snd_soc_codec *codec = rtd->codec;
1931         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1932         unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1933         int pre_div, bclk_ms, frame_size;
1934
1935         rt5640->lrck[dai->id] = params_rate(params);
1936         pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1937         if (pre_div < 0) {
1938                 dev_err(codec->dev, "Unsupported clock setting\n");
1939                 return -EINVAL;
1940         }
1941         frame_size = snd_soc_params_to_frame_size(params);
1942         if (frame_size < 0) {
1943                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1944                 return -EINVAL;
1945         }
1946         bclk_ms = frame_size > 32 ? 1 : 0;
1947         rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1948
1949         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1950                 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1951         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1952                                 bclk_ms, pre_div, dai->id);
1953
1954         switch (params_format(params)) {
1955         case SNDRV_PCM_FORMAT_S16_LE:
1956                 break;
1957         case SNDRV_PCM_FORMAT_S20_3LE:
1958                 val_len |= RT5640_I2S_DL_20;
1959                 break;
1960         case SNDRV_PCM_FORMAT_S24_LE:
1961                 val_len |= RT5640_I2S_DL_24;
1962                 break;
1963         case SNDRV_PCM_FORMAT_S8:
1964                 val_len |= RT5640_I2S_DL_8;
1965                 break;
1966         default:
1967                 return -EINVAL;
1968         }
1969
1970         dai_sel = get_sdp_info(codec, dai->id);
1971         if (dai_sel < 0) {
1972                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1973                 return -EINVAL;
1974         }
1975         if (dai_sel & RT5640_U_IF1) {
1976                 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1977                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1978                         pre_div << RT5640_I2S_PD1_SFT;
1979                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1980                         RT5640_I2S_DL_MASK, val_len);
1981                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1982         }
1983         if (dai_sel & RT5640_U_IF2) {
1984                 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1985                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1986                         pre_div << RT5640_I2S_PD2_SFT;
1987                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1988                         RT5640_I2S_DL_MASK, val_len);
1989                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1990         }
1991 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
1992         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1993         if (dai_sel & RT5640_U_IF3) {
1994                 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
1995                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
1996                         pre_div << RT5640_I2S_PD3_SFT;
1997                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
1998                         RT5640_I2S_DL_MASK, val_len);
1999                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2000         }
2001 #endif
2002         return 0;
2003 }
2004
2005 static int rt5640_prepare(struct snd_pcm_substream *substream,
2006                                 struct snd_soc_dai *dai)
2007 {
2008         struct snd_soc_pcm_runtime *rtd = substream->private_data;
2009         struct snd_soc_codec *codec = rtd->codec;
2010         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2011
2012         rt5640->aif_pu = dai->id;
2013         return 0;
2014 }
2015
2016 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2017 {
2018         struct snd_soc_codec *codec = dai->codec;
2019         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2020         unsigned int reg_val = 0, dai_sel;
2021
2022         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2023         case SND_SOC_DAIFMT_CBM_CFM:
2024                 rt5640->master[dai->id] = 1;
2025                 break;
2026         case SND_SOC_DAIFMT_CBS_CFS:
2027                 reg_val |= RT5640_I2S_MS_S;
2028                 rt5640->master[dai->id] = 0;
2029                 break;
2030         default:
2031                 return -EINVAL;
2032         }
2033
2034         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2035         case SND_SOC_DAIFMT_NB_NF:
2036                 break;
2037         case SND_SOC_DAIFMT_IB_NF:
2038                 reg_val |= RT5640_I2S_BP_INV;
2039                 break;
2040         default:
2041                 return -EINVAL;
2042         }
2043
2044         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2045         case SND_SOC_DAIFMT_I2S:
2046                 break;
2047         case SND_SOC_DAIFMT_LEFT_J:
2048                 reg_val |= RT5640_I2S_DF_LEFT;
2049                 break;
2050         case SND_SOC_DAIFMT_DSP_A:
2051                 reg_val |= RT5640_I2S_DF_PCM_A;
2052                 break;
2053         case SND_SOC_DAIFMT_DSP_B:
2054                 reg_val  |= RT5640_I2S_DF_PCM_B;
2055                 break;
2056         default:
2057                 return -EINVAL;
2058         }
2059
2060         dai_sel = get_sdp_info(codec, dai->id);
2061         if (dai_sel < 0) {
2062                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2063                 return -EINVAL;
2064         }
2065         if (dai_sel & RT5640_U_IF1) {
2066                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2067                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2068                         RT5640_I2S_DF_MASK, reg_val);
2069         }
2070         if (dai_sel & RT5640_U_IF2) {
2071                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2072                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2073                         RT5640_I2S_DF_MASK, reg_val);
2074         }
2075 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2076         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2077         if (dai_sel & RT5640_U_IF3) {
2078                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2079                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2080                         RT5640_I2S_DF_MASK, reg_val);
2081         }
2082 #endif
2083         return 0;
2084 }
2085
2086 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2087                 int clk_id, unsigned int freq, int dir)
2088 {
2089         struct snd_soc_codec *codec = dai->codec;
2090         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2091         unsigned int reg_val = 0;
2092
2093         if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
2094                 return 0;
2095
2096         switch (clk_id) {
2097         case RT5640_SCLK_S_MCLK:
2098                 reg_val |= RT5640_SCLK_SRC_MCLK;
2099                 break;
2100         case RT5640_SCLK_S_PLL1:
2101                 reg_val |= RT5640_SCLK_SRC_PLL1;
2102                 break;
2103         case RT5640_SCLK_S_PLL1_TK:
2104                 reg_val |= RT5640_SCLK_SRC_PLL1T;
2105                 break;
2106         case RT5640_SCLK_S_RCCLK:
2107                 reg_val |= RT5640_SCLK_SRC_RCCLK;
2108                 break;
2109         default:
2110                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2111                 return -EINVAL;
2112         }
2113         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2114                 RT5640_SCLK_SRC_MASK, reg_val);
2115         rt5640->sysclk = freq;
2116         rt5640->sysclk_src = clk_id;
2117
2118         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2119         return 0;
2120 }
2121
2122 /**
2123  * rt5640_pll_calc - Calcualte PLL M/N/K code.
2124  * @freq_in: external clock provided to codec.
2125  * @freq_out: target clock which codec works on.
2126  * @pll_code: Pointer to structure with M, N, K and bypass flag.
2127  *
2128  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2129  * which make calculation more efficiently.
2130  *
2131  * Returns 0 for success or negative error code.
2132  */
2133 static int rt5640_pll_calc(const unsigned int freq_in,
2134         const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2135 {
2136         int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2137         int n, m, red, n_t, m_t, in_t, out_t, red_t = abs(freq_out - freq_in);
2138         bool bypass = false;
2139
2140         if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2141                 return -EINVAL;
2142
2143         for (n_t = 0; n_t <= max_n; n_t++) {
2144                 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
2145                 if (in_t < 0)
2146                         continue;
2147                 if (in_t == freq_out) {
2148                         bypass = true;
2149                         n = n_t;
2150                         goto code_find;
2151                 }
2152                 for (m_t = 0; m_t <= max_m; m_t++) {
2153                         out_t = in_t / (m_t + 2);
2154                         red = abs(out_t - freq_out);
2155                         if (red < red_t) {
2156                                 n = n_t;
2157                                 m = m_t;
2158                                 if (red == 0)
2159                                         goto code_find;
2160                                 red_t = red;
2161                         }
2162                 }
2163         }
2164         pr_debug("Only get approximation about PLL\n");
2165
2166 code_find:
2167
2168         pll_code->m_bp = bypass;
2169         pll_code->m_code = m;
2170         pll_code->n_code = n;
2171         pll_code->k_code = 2;
2172         return 0;
2173 }
2174
2175 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2176                         unsigned int freq_in, unsigned int freq_out)
2177 {
2178         struct snd_soc_codec *codec = dai->codec;
2179         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2180         struct rt5640_pll_code pll_code;
2181         int ret, dai_sel;
2182
2183         if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2184             freq_out == rt5640->pll_out)
2185                 return 0;
2186
2187         if (!freq_in || !freq_out) {
2188                 dev_dbg(codec->dev, "PLL disabled\n");
2189
2190                 rt5640->pll_in = 0;
2191                 rt5640->pll_out = 0;
2192                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2193                         RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2194                 return 0;
2195         }
2196
2197         switch (source) {
2198         case RT5640_PLL1_S_MCLK:
2199                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2200                         RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2201                 break;
2202         case RT5640_PLL1_S_BCLK1:
2203         case RT5640_PLL1_S_BCLK2:
2204 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2205         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2206         case RT5640_PLL1_S_BCLK3:
2207
2208 #endif
2209                 dai_sel = get_sdp_info(codec, dai->id);
2210                 if (dai_sel < 0) {
2211                         dev_err(codec->dev,
2212                                 "Failed to get sdp info: %d\n", dai_sel);
2213                         return -EINVAL;
2214                 }
2215                 if (dai_sel & RT5640_U_IF1) {
2216                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2217                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2218                 }
2219                 if (dai_sel & RT5640_U_IF2) {
2220                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2221                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2222                 }
2223                 if (dai_sel & RT5640_U_IF3) {
2224                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2225                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2226                 }
2227                 break;
2228         default:
2229                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2230                 return -EINVAL;
2231         }
2232
2233         ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2234         if (ret < 0) {
2235                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2236                 return ret;
2237         }
2238
2239         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code.m_bp,
2240                 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code);
2241
2242         snd_soc_write(codec, RT5640_PLL_CTRL1,
2243                 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2244         snd_soc_write(codec, RT5640_PLL_CTRL2,
2245                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2246                 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2247
2248         rt5640->pll_in = freq_in;
2249         rt5640->pll_out = freq_out;
2250         rt5640->pll_src = source;
2251
2252         return 0;
2253 }
2254
2255 /**
2256  * rt5640_index_show - Dump private registers.
2257  * @dev: codec device.
2258  * @attr: device attribute.
2259  * @buf: buffer for display.
2260  *
2261  * To show non-zero values of all private registers.
2262  *
2263  * Returns buffer length.
2264  */
2265 static ssize_t rt5640_index_show(struct device *dev,
2266         struct device_attribute *attr, char *buf)
2267 {
2268         struct i2c_client *client = to_i2c_client(dev);
2269         struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2270         struct snd_soc_codec *codec = rt5640->codec;
2271         unsigned int val;
2272         int cnt = 0, i;
2273
2274         cnt += sprintf(buf, "RT5640 index register\n");
2275         for (i = 0; i < 0xb4; i++) {
2276                 if (cnt + 9 >= PAGE_SIZE - 1)
2277                         break;
2278                 val = rt5640_index_read(codec, i);
2279                 if (!val)
2280                         continue;
2281                 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2282         }
2283
2284         if (cnt >= PAGE_SIZE)
2285                 cnt = PAGE_SIZE - 1;
2286
2287         return cnt;
2288 }
2289 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2290
2291 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2292                         enum snd_soc_bias_level level)
2293 {
2294         switch (level) {
2295         case SND_SOC_BIAS_ON:
2296 #ifdef RT5640_DEMO
2297                 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2298                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2299                 snd_soc_update_bits(codec, RT5640_HP_VOL,
2300                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2301                 break;
2302 #endif
2303         case SND_SOC_BIAS_PREPARE:
2304 #ifdef RT5640_DEMO
2305                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2306                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2307                         RT5640_PWR_BG | RT5640_PWR_VREF2,
2308                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2309                         RT5640_PWR_BG | RT5640_PWR_VREF2);
2310                 msleep(100);
2311
2312                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2313                         RT5640_PWR_FV1 | RT5640_PWR_FV2,
2314                         RT5640_PWR_FV1 | RT5640_PWR_FV2);
2315
2316                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2317                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2318                         RT5640_PWR_MB1 | RT5640_PWR_MB2);
2319 #endif
2320                 break;
2321
2322         case SND_SOC_BIAS_STANDBY:
2323 #ifdef RT5640_DEMO
2324                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2325                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2326                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2327                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2328
2329                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2330                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2331                         0);
2332 #endif
2333                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2334                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2335                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2336                                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2337                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2338                                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2339                         msleep(10);
2340                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2341                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2342                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2343                         codec->cache_only = false;
2344                         codec->cache_sync = 1;
2345                         snd_soc_cache_sync(codec);
2346                         rt5640_index_sync(codec);
2347                 }
2348                 break;
2349
2350         case SND_SOC_BIAS_OFF:
2351 #ifdef RT5640_DEMO
2352                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2353                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2354                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2355                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2356                 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2357                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2358                 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2359                         RT5640_L_MUTE, RT5640_L_MUTE);
2360 #endif
2361                 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2362                 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2363                 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2364                 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2365                 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2366                 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2367                 break;
2368
2369         default:
2370                 break;
2371         }
2372         codec->dapm.bias_level = level;
2373
2374         return 0;
2375 }
2376
2377 static int rt5640_probe(struct snd_soc_codec *codec)
2378 {
2379         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2380         int ret;
2381         u16 val;
2382
2383         codec->dapm.idle_bias_off = 1;
2384
2385         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2386         if (ret != 0) {
2387                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2388                 return ret;
2389         }
2390
2391         val = snd_soc_read(codec, RT5640_RESET);
2392         if ((val != rt5640_reg[RT5640_RESET]) && (val != RT5639_RESET_ID)) {
2393                 dev_err(codec->dev,
2394                         "Device with ID register %x is not rt5640/39\n", val);
2395                 return -ENODEV;
2396         }
2397
2398         rt5640_reset(codec);
2399         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2400                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2401                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2402                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2403                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2404         msleep(100);
2405         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2406                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2407                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2408         /* DMIC */
2409         if (rt5640->dmic_en == RT5640_DMIC1) {
2410                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2411                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2412                 snd_soc_update_bits(codec, RT5640_DMIC,
2413                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2414                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2415         } else if (rt5640->dmic_en == RT5640_DMIC2) {
2416                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2417                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2418                 snd_soc_update_bits(codec, RT5640_DMIC,
2419                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2420                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2421         }
2422
2423 #ifdef RT5640_DEMO
2424         rt5640_reg_init(codec);
2425 #endif
2426
2427 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
2428         rt5640_register_dsp(codec);
2429 #endif
2430
2431         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2432
2433         snd_soc_add_codec_controls(codec, rt5640_snd_controls,
2434                 ARRAY_SIZE(rt5640_snd_controls));
2435
2436         rt5640->codec = codec;
2437         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2438         if (ret != 0) {
2439                 dev_err(codec->dev,
2440                         "Failed to create index_reg sysfs files: %d\n", ret);
2441                 return ret;
2442         }
2443
2444         return 0;
2445 }
2446
2447 static int rt5640_remove(struct snd_soc_codec *codec)
2448 {
2449         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2450         rt5640_reset(codec);
2451         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2452
2453         return 0;
2454 }
2455 #ifdef CONFIG_PM
2456 static int rt5640_suspend(struct snd_soc_codec *codec, pm_message_t state)
2457 {
2458         rt5640_reset(codec);
2459         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2460         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2461
2462         return 0;
2463 }
2464
2465 static int rt5640_resume(struct snd_soc_codec *codec)
2466 {
2467         int ret = 0 ;
2468
2469         codec->cache_sync = 1;
2470         ret = snd_soc_cache_sync(codec);
2471         if (ret) {
2472                 dev_err(codec->dev,"Failed to sync cache: %d\n", ret);
2473                 return ret;
2474         }
2475         rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2476
2477         return 0;
2478 }
2479 #else
2480 #define rt5640_suspend NULL
2481 #define rt5640_resume NULL
2482 #endif
2483
2484 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2485 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2486                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2487
2488 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2489         .hw_params = rt5640_hw_params,
2490         .prepare = rt5640_prepare,
2491         .set_fmt = rt5640_set_dai_fmt,
2492         .set_sysclk = rt5640_set_dai_sysclk,
2493         .set_pll = rt5640_set_dai_pll,
2494 };
2495
2496 struct snd_soc_dai_driver rt5640_dai[] = {
2497         {
2498                 .name = "rt5640-aif1",
2499                 .id = RT5640_AIF1,
2500                 .playback = {
2501                         .stream_name = "AIF1 Playback",
2502                         .channels_min = 1,
2503                         .channels_max = 2,
2504                         .rates = RT5640_STEREO_RATES,
2505                         .formats = RT5640_FORMATS,
2506                 },
2507                 .capture = {
2508                         .stream_name = "AIF1 Capture",
2509                         .channels_min = 1,
2510                         .channels_max = 2,
2511                         .rates = RT5640_STEREO_RATES,
2512                         .formats = RT5640_FORMATS,
2513                 },
2514                 .ops = &rt5640_aif_dai_ops,
2515         },
2516         {
2517                 .name = "rt5640-aif2",
2518                 .id = RT5640_AIF2,
2519                 .playback = {
2520                         .stream_name = "AIF2 Playback",
2521                         .channels_min = 1,
2522                         .channels_max = 2,
2523                         .rates = RT5640_STEREO_RATES,
2524                         .formats = RT5640_FORMATS,
2525                 },
2526                 .capture = {
2527                         .stream_name = "AIF2 Capture",
2528                         .channels_min = 1,
2529                         .channels_max = 2,
2530                         .rates = RT5640_STEREO_RATES,
2531                         .formats = RT5640_FORMATS,
2532                 },
2533                 .ops = &rt5640_aif_dai_ops,
2534         },
2535 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2536         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2537         {
2538                 .name = "rt5640-aif3",
2539                 .id = RT5640_AIF3,
2540                 .playback = {
2541                         .stream_name = "AIF3 Playback",
2542                         .channels_min = 1,
2543                         .channels_max = 2,
2544                         .rates = RT5640_STEREO_RATES,
2545                         .formats = RT5640_FORMATS,
2546                 },
2547                 .capture = {
2548                         .stream_name = "AIF3 Capture",
2549                         .channels_min = 1,
2550                         .channels_max = 2,
2551                         .rates = RT5640_STEREO_RATES,
2552                         .formats = RT5640_FORMATS,
2553                 },
2554                 .ops = &rt5640_aif_dai_ops,
2555         },
2556 #endif
2557 };
2558
2559 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2560         .probe = rt5640_probe,
2561         .remove = rt5640_remove,
2562         .suspend = rt5640_suspend,
2563         .resume = rt5640_resume,
2564         .set_bias_level = rt5640_set_bias_level,
2565         .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2566         .reg_word_size = sizeof(u16),
2567         .reg_cache_default = rt5640_reg,
2568         .volatile_register = rt5640_volatile_register,
2569         .readable_register = rt5640_readable_register,
2570         .reg_cache_step = 1,
2571         .dapm_widgets = rt5640_dapm_widgets,
2572         .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2573         .dapm_routes = rt5640_dapm_routes,
2574         .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2575 };
2576
2577 static const struct i2c_device_id rt5640_i2c_id[] = {
2578         { "rt5640", 0 },
2579         { }
2580 };
2581 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2582
2583 static int rt5640_i2c_probe(struct i2c_client *i2c,
2584                     const struct i2c_device_id *id)
2585 {
2586         struct rt5640_priv *rt5640;
2587         int ret;
2588
2589         rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2590         if (NULL == rt5640)
2591                 return -ENOMEM;
2592
2593         i2c_set_clientdata(i2c, rt5640);
2594
2595         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2596                         rt5640_dai, ARRAY_SIZE(rt5640_dai));
2597         if (ret < 0)
2598                 kfree(rt5640);
2599
2600         return ret;
2601 }
2602
2603 static __devexit int rt5640_i2c_remove(struct i2c_client *i2c)
2604 {
2605         snd_soc_unregister_codec(&i2c->dev);
2606         kfree(i2c_get_clientdata(i2c));
2607         return 0;
2608 }
2609
2610 struct i2c_driver rt5640_i2c_driver = {
2611         .driver = {
2612                 .name = "rt5640",
2613                 .owner = THIS_MODULE,
2614         },
2615         .probe = rt5640_i2c_probe,
2616         .remove   = __devexit_p(rt5640_i2c_remove),
2617         .id_table = rt5640_i2c_id,
2618 };
2619
2620 static int __init rt5640_modinit(void)
2621 {
2622         return i2c_add_driver(&rt5640_i2c_driver);
2623 }
2624 module_init(rt5640_modinit);
2625
2626 static void __exit rt5640_modexit(void)
2627 {
2628         i2c_del_driver(&rt5640_i2c_driver);
2629 }
2630 module_exit(rt5640_modexit);
2631
2632 MODULE_DESCRIPTION("ASoC RT5640 driver");
2633 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2634 MODULE_LICENSE("GPL");