asoc: codecs: rt5640: Implement i2c shutdown
[linux-2.6.git] / sound / soc / codecs / rt5640.c
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 #include "rt5640.h"
28 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
30 #endif
31
32 #define RT5640_DEMO 1
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35 #define RT5639_RESET_ID 0x0008
36
37 #define CHECK_I2C_SHUTDOWN(r, c) { if (r && r->shutdown_complete) { \
38 dev_err(c->dev, "error: i2c state is 'shutdown'\n"); \
39 mutex_unlock(&r->lock); return -ENODEV; } }
40
41 #ifdef RT5640_DEMO
42 struct rt5640_init_reg {
43         u8 reg;
44         u16 val;
45 };
46
47 static struct rt5640_init_reg init_list[] = {
48         {RT5640_DUMMY1          , 0x3701},/*fa[12:13] = 1'b;fa[8~10]=1;fa[0]=1*/
49         {RT5640_DEPOP_M1        , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
50         {RT5640_DEPOP_M2        , 0x3100},/* 8f[13] = 1'b */
51         {RT5640_ADDA_CLK1       , 0x1114},/* 73[2] = 1'b  */
52         {RT5640_MICBIAS         , 0x3030},/* 93[5:4] = 11'b */
53         {RT5640_PRIV_INDEX      , 0x003d},/* PR3d[12] = 1'b */
54         {RT5640_PRIV_DATA       , 0x3600},
55         {RT5640_CLS_D_OUT       , 0xa000},/* 8d[11] = 0'b */
56         {RT5640_PRIV_INDEX      , 0x001c},/* PR1c = 0D21'h */
57         {RT5640_PRIV_DATA       , 0x0D21},
58         {RT5640_PRIV_INDEX      , 0x001b},/* PR1B = 0D21'h */
59         {RT5640_PRIV_DATA       , 0x0000},
60         {RT5640_PRIV_INDEX      , 0x0012},/* PR12 = 0aa8'h */
61         {RT5640_PRIV_DATA       , 0x0aa8},
62         {RT5640_PRIV_INDEX      , 0x0014},/* PR14 = 0aaa'h */
63         {RT5640_PRIV_DATA       , 0x0aaa},
64         {RT5640_PRIV_INDEX      , 0x0020},/* PR20 = 6110'h */
65         {RT5640_PRIV_DATA       , 0x6110},
66         {RT5640_PRIV_INDEX      , 0x0021},/* PR21 = e0e0'h */
67         {RT5640_PRIV_DATA       , 0xe0e0},
68         {RT5640_PRIV_INDEX      , 0x0023},/* PR23 = 1804'h */
69         {RT5640_PRIV_DATA       , 0x1804},
70         /*playback*/
71         {RT5640_STO_DAC_MIXER   , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
72         {RT5640_OUT_L3_MIXER    , 0x01fe},/*DACL1 -> OUTMIXL*/
73         {RT5640_OUT_R3_MIXER    , 0x01fe},/*DACR1 -> OUTMIXR */
74         {RT5640_HP_VOL          , 0x8888},/* OUTMIX -> HPVOL */
75         {RT5640_HPO_MIXER       , 0xc000},/* HPVOL -> HPOLMIX */
76 /*      {RT5640_HPO_MIXER       , 0xa000},// DAC1 -> HPOLMIX   */
77         {RT5640_SPK_L_MIXER     , 0x0036},/* DACL1 -> SPKMIXL */
78         {RT5640_SPK_R_MIXER     , 0x0036},/* DACR1 -> SPKMIXR */
79         {RT5640_SPK_VOL         , 0x8888},/* SPKMIX -> SPKVOL */
80         {RT5640_SPO_L_MIXER     , 0xe800},/* SPKVOLL -> SPOLMIX */
81         {RT5640_SPO_R_MIXER     , 0x2800},/* SPKVOLR -> SPORMIX */
82 /*      {RT5640_SPO_L_MIXER     , 0xb800},//DAC -> SPOLMIX */
83 /*      {RT5640_SPO_R_MIXER     , 0x1800},//DAC -> SPORMIX */
84 /*      {RT5640_I2S1_SDP        , 0xD000},//change IIS1 and IIS2 */
85         /*record*/
86         {RT5640_IN1_IN2         , 0x5080},/*IN1 boost 40db & differential mode*/
87         {RT5640_IN3_IN4         , 0x0500},/*IN2 boost 40db & signal ended mode*/
88         {RT5640_REC_L2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXL */
89         {RT5640_REC_R2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXR */
90 /*      {RT5640_REC_L2_MIXER    , 0x006f},//Mic2 -> RECMIXL */
91 /*      {RT5640_REC_R2_MIXER    , 0x006f},//Mic2 -> RECMIXR */
92         {RT5640_STO_ADC_MIXER   , 0x3020},/* ADC -> Sto ADC mixer */
93
94 #if RT5640_DET_EXT_MIC
95         {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
96         {RT5640_GPIO_CTRL1      , 0x8400},/* set GPIO1 to IRQ */
97         {RT5640_GPIO_CTRL3      , 0x0004},/* set GPIO1 output */
98         {RT5640_IRQ_CTRL2       , 0x8000},/*set MICBIAS short current to IRQ */
99                                         /*( if sticky set regBE : 8800 ) */
100 #endif
101
102 };
103 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
104
105 static int rt5640_reg_init(struct snd_soc_codec *codec)
106 {
107         int i;
108         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
109                 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
110         return 0;
111 }
112 #endif
113
114 static int rt5640_index_sync(struct snd_soc_codec *codec)
115 {
116         int i;
117
118         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
119                 if (RT5640_PRIV_INDEX == init_list[i].reg ||
120                         RT5640_PRIV_DATA == init_list[i].reg)
121                         snd_soc_write(codec, init_list[i].reg,
122                                         init_list[i].val);
123         return 0;
124 }
125
126 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
127         [RT5640_RESET] = 0x000c,
128         [RT5640_SPK_VOL] = 0xc8c8,
129         [RT5640_HP_VOL] = 0xc8c8,
130         [RT5640_OUTPUT] = 0xc8c8,
131         [RT5640_MONO_OUT] = 0x8000,
132         [RT5640_INL_INR_VOL] = 0x0808,
133         [RT5640_DAC1_DIG_VOL] = 0xafaf,
134         [RT5640_DAC2_DIG_VOL] = 0xafaf,
135         [RT5640_ADC_DIG_VOL] = 0x2f2f,
136         [RT5640_ADC_DATA] = 0x2f2f,
137         [RT5640_STO_ADC_MIXER] = 0x7060,
138         [RT5640_MONO_ADC_MIXER] = 0x7070,
139         [RT5640_AD_DA_MIXER] = 0x8080,
140         [RT5640_STO_DAC_MIXER] = 0x5454,
141         [RT5640_MONO_DAC_MIXER] = 0x5454,
142         [RT5640_DIG_MIXER] = 0xaa00,
143         [RT5640_DSP_PATH2] = 0xa000,
144         [RT5640_REC_L2_MIXER] = 0x007f,
145         [RT5640_REC_R2_MIXER] = 0x007f,
146         [RT5640_HPO_MIXER] = 0xe000,
147         [RT5640_SPK_L_MIXER] = 0x003e,
148         [RT5640_SPK_R_MIXER] = 0x003e,
149         [RT5640_SPO_L_MIXER] = 0xf800,
150         [RT5640_SPO_R_MIXER] = 0x3800,
151         [RT5640_SPO_CLSD_RATIO] = 0x0004,
152         [RT5640_MONO_MIXER] = 0xfc00,
153         [RT5640_OUT_L3_MIXER] = 0x01ff,
154         [RT5640_OUT_R3_MIXER] = 0x01ff,
155         [RT5640_LOUT_MIXER] = 0xf000,
156         [RT5640_PWR_ANLG1] = 0x00c0,
157         [RT5640_I2S1_SDP] = 0x8000,
158         [RT5640_I2S2_SDP] = 0x8000,
159         [RT5640_I2S3_SDP] = 0x8000,
160         [RT5640_ADDA_CLK1] = 0x1110,
161         [RT5640_ADDA_CLK2] = 0x0c00,
162         [RT5640_DMIC] = 0x1d00,
163         [RT5640_ASRC_3] = 0x0008,
164         [RT5640_HP_OVCD] = 0x0600,
165         [RT5640_CLS_D_OVCD] = 0x0228,
166         [RT5640_CLS_D_OUT] = 0xa800,
167         [RT5640_DEPOP_M1] = 0x0004,
168         [RT5640_DEPOP_M2] = 0x1100,
169         [RT5640_DEPOP_M3] = 0x0646,
170         [RT5640_CHARGE_PUMP] = 0x0c00,
171         [RT5640_MICBIAS] = 0x3000,
172         [RT5640_EQ_CTRL1] = 0x2080,
173         [RT5640_DRC_AGC_1] = 0x2206,
174         [RT5640_DRC_AGC_2] = 0x1f00,
175         [RT5640_ANC_CTRL1] = 0x034b,
176         [RT5640_ANC_CTRL2] = 0x0066,
177         [RT5640_ANC_CTRL3] = 0x000b,
178         [RT5640_GPIO_CTRL1] = 0x0400,
179         [RT5640_DSP_CTRL3] = 0x2000,
180         [RT5640_BASE_BACK] = 0x0013,
181         [RT5640_MP3_PLUS1] = 0x0680,
182         [RT5640_MP3_PLUS2] = 0x1c17,
183         [RT5640_3D_HP] = 0x8c00,
184         [RT5640_ADJ_HPF] = 0x2a20,
185         [RT5640_HP_CALIB_AMP_DET] = 0x0400,
186         [RT5640_SV_ZCD1] = 0x0809,
187         [RT5640_VENDOR_ID1] = 0x10ec,
188         [RT5640_VENDOR_ID2] = 0x6231,
189 };
190
191 static int rt5640_reset(struct snd_soc_codec *codec)
192 {
193         return snd_soc_write(codec, RT5640_RESET, 0);
194 }
195
196 /**
197  * rt5640_index_write - Write private register.
198  * @codec: SoC audio codec device.
199  * @reg: Private register index.
200  * @value: Private register Data.
201  *
202  * Modify private register for advanced setting. It can be written through
203  * private index (0x6a) and data (0x6c) register.
204  *
205  * Returns 0 for success or negative error code.
206  */
207 static int rt5640_index_write(struct snd_soc_codec *codec,
208                 unsigned int reg, unsigned int value)
209 {
210         int ret;
211
212         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
213         if (ret < 0) {
214                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
215                 goto err;
216         }
217         ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
218         if (ret < 0) {
219                 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
220                 goto err;
221         }
222         return 0;
223
224 err:
225         return ret;
226 }
227
228 /**
229  * rt5640_index_read - Read private register.
230  * @codec: SoC audio codec device.
231  * @reg: Private register index.
232  *
233  * Read advanced setting from private register. It can be read through
234  * private index (0x6a) and data (0x6c) register.
235  *
236  * Returns private register value or negative error code.
237  */
238 static unsigned int rt5640_index_read(
239         struct snd_soc_codec *codec, unsigned int reg)
240 {
241         int ret;
242
243         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
244         if (ret < 0) {
245                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
246                 return ret;
247         }
248         return snd_soc_read(codec, RT5640_PRIV_DATA);
249 }
250
251 /**
252  * rt5640_index_update_bits - update private register bits
253  * @codec: audio codec
254  * @reg: Private register index.
255  * @mask: register mask
256  * @value: new value
257  *
258  * Writes new register value.
259  *
260  * Returns 1 for change, 0 for no change, or negative error code.
261  */
262 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
263         unsigned int reg, unsigned int mask, unsigned int value)
264 {
265         unsigned int old, new;
266         int change, ret;
267
268         ret = rt5640_index_read(codec, reg);
269         if (ret < 0) {
270                 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
271                 goto err;
272         }
273
274         old = ret;
275         new = (old & ~mask) | (value & mask);
276         change = old != new;
277         if (change) {
278                 ret = rt5640_index_write(codec, reg, new);
279                 if (ret < 0) {
280                         dev_err(codec->dev,
281                                 "Failed to write private reg: %d\n", ret);
282                         goto err;
283                 }
284         }
285         return change;
286
287 err:
288         return ret;
289 }
290
291 static int rt5640_volatile_register(
292         struct snd_soc_codec *codec, unsigned int reg)
293 {
294         switch (reg) {
295         case RT5640_RESET:
296         case RT5640_PRIV_DATA:
297         case RT5640_ASRC_5:
298         case RT5640_EQ_CTRL1:
299         case RT5640_DRC_AGC_1:
300         case RT5640_ANC_CTRL1:
301         case RT5640_IRQ_CTRL2:
302         case RT5640_INT_IRQ_ST:
303         case RT5640_DSP_CTRL2:
304         case RT5640_DSP_CTRL3:
305         case RT5640_PGM_REG_ARR1:
306         case RT5640_PGM_REG_ARR3:
307                 return 1;
308         default:
309                 return 0;
310         }
311 }
312
313 static int rt5640_readable_register(
314         struct snd_soc_codec *codec, unsigned int reg)
315 {
316         switch (reg) {
317         case RT5640_RESET:
318         case RT5640_SPK_VOL:
319         case RT5640_HP_VOL:
320         case RT5640_OUTPUT:
321         case RT5640_MONO_OUT:
322         case RT5640_IN1_IN2:
323         case RT5640_IN3_IN4:
324         case RT5640_INL_INR_VOL:
325         case RT5640_DAC1_DIG_VOL:
326         case RT5640_DAC2_DIG_VOL:
327         case RT5640_DAC2_CTRL:
328         case RT5640_ADC_DIG_VOL:
329         case RT5640_ADC_DATA:
330         case RT5640_ADC_BST_VOL:
331         case RT5640_STO_ADC_MIXER:
332         case RT5640_MONO_ADC_MIXER:
333         case RT5640_AD_DA_MIXER:
334         case RT5640_STO_DAC_MIXER:
335         case RT5640_MONO_DAC_MIXER:
336         case RT5640_DIG_MIXER:
337         case RT5640_DSP_PATH1:
338         case RT5640_DSP_PATH2:
339         case RT5640_DIG_INF_DATA:
340         case RT5640_REC_L1_MIXER:
341         case RT5640_REC_L2_MIXER:
342         case RT5640_REC_R1_MIXER:
343         case RT5640_REC_R2_MIXER:
344         case RT5640_HPO_MIXER:
345         case RT5640_SPK_L_MIXER:
346         case RT5640_SPK_R_MIXER:
347         case RT5640_SPO_L_MIXER:
348         case RT5640_SPO_R_MIXER:
349         case RT5640_SPO_CLSD_RATIO:
350         case RT5640_MONO_MIXER:
351         case RT5640_OUT_L1_MIXER:
352         case RT5640_OUT_L2_MIXER:
353         case RT5640_OUT_L3_MIXER:
354         case RT5640_OUT_R1_MIXER:
355         case RT5640_OUT_R2_MIXER:
356         case RT5640_OUT_R3_MIXER:
357         case RT5640_LOUT_MIXER:
358         case RT5640_PWR_DIG1:
359         case RT5640_PWR_DIG2:
360         case RT5640_PWR_ANLG1:
361         case RT5640_PWR_ANLG2:
362         case RT5640_PWR_MIXER:
363         case RT5640_PWR_VOL:
364         case RT5640_PRIV_INDEX:
365         case RT5640_PRIV_DATA:
366         case RT5640_I2S1_SDP:
367         case RT5640_I2S2_SDP:
368         case RT5640_I2S3_SDP:
369         case RT5640_ADDA_CLK1:
370         case RT5640_ADDA_CLK2:
371         case RT5640_DMIC:
372         case RT5640_GLB_CLK:
373         case RT5640_PLL_CTRL1:
374         case RT5640_PLL_CTRL2:
375         case RT5640_ASRC_1:
376         case RT5640_ASRC_2:
377         case RT5640_ASRC_3:
378         case RT5640_ASRC_4:
379         case RT5640_ASRC_5:
380         case RT5640_HP_OVCD:
381         case RT5640_CLS_D_OVCD:
382         case RT5640_CLS_D_OUT:
383         case RT5640_DEPOP_M1:
384         case RT5640_DEPOP_M2:
385         case RT5640_DEPOP_M3:
386         case RT5640_CHARGE_PUMP:
387         case RT5640_PV_DET_SPK_G:
388         case RT5640_MICBIAS:
389         case RT5640_EQ_CTRL1:
390         case RT5640_EQ_CTRL2:
391         case RT5640_WIND_FILTER:
392         case RT5640_DRC_AGC_1:
393         case RT5640_DRC_AGC_2:
394         case RT5640_DRC_AGC_3:
395         case RT5640_SVOL_ZC:
396         case RT5640_ANC_CTRL1:
397         case RT5640_ANC_CTRL2:
398         case RT5640_ANC_CTRL3:
399         case RT5640_JD_CTRL:
400         case RT5640_ANC_JD:
401         case RT5640_IRQ_CTRL1:
402         case RT5640_IRQ_CTRL2:
403         case RT5640_INT_IRQ_ST:
404         case RT5640_GPIO_CTRL1:
405         case RT5640_GPIO_CTRL2:
406         case RT5640_GPIO_CTRL3:
407         case RT5640_DSP_CTRL1:
408         case RT5640_DSP_CTRL2:
409         case RT5640_DSP_CTRL3:
410         case RT5640_DSP_CTRL4:
411         case RT5640_PGM_REG_ARR1:
412         case RT5640_PGM_REG_ARR2:
413         case RT5640_PGM_REG_ARR3:
414         case RT5640_PGM_REG_ARR4:
415         case RT5640_PGM_REG_ARR5:
416         case RT5640_SCB_FUNC:
417         case RT5640_SCB_CTRL:
418         case RT5640_BASE_BACK:
419         case RT5640_MP3_PLUS1:
420         case RT5640_MP3_PLUS2:
421         case RT5640_3D_HP:
422         case RT5640_ADJ_HPF:
423         case RT5640_HP_CALIB_AMP_DET:
424         case RT5640_HP_CALIB2:
425         case RT5640_SV_ZCD1:
426         case RT5640_SV_ZCD2:
427         case RT5640_DUMMY1:
428         case RT5640_DUMMY2:
429         case RT5640_DUMMY3:
430         case RT5640_VENDOR_ID:
431         case RT5640_VENDOR_ID1:
432         case RT5640_VENDOR_ID2:
433                 return 1;
434         default:
435                 return 0;
436         }
437 }
438
439 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
440 {
441         int jack_type;
442         int sclk_src;
443         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
444         mutex_lock(&rt5640->lock);
445         CHECK_I2C_SHUTDOWN(rt5640, codec)
446
447         if (jack_insert) {
448                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
449                         snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
450                         snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
451                         snd_soc_write(codec, RT5640_DUMMY1 , 0x3701);
452                 }
453                 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
454                         RT5640_SCLK_SRC_MASK;
455                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
456                         RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
457                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
458                         RT5640_PWR_LDO2, RT5640_PWR_LDO2);
459                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
460                         RT5640_PWR_MB1, RT5640_PWR_MB1);
461                 snd_soc_update_bits(codec, RT5640_MICBIAS,
462                         RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
463                         RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
464                         RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
465                         RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
466                 snd_soc_update_bits(codec, RT5640_DUMMY1,
467                         0x1, 0x1);
468                 msleep(150);
469                 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
470                         jack_type = RT5640_HEADPHO_DET;
471                 else
472                         jack_type = RT5640_HEADSET_DET;
473                 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
474                         RT5640_MB1_OC_CLR, 0);
475                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
476                         RT5640_SCLK_SRC_MASK, sclk_src);
477         } else {
478                 snd_soc_update_bits(codec, RT5640_MICBIAS,
479                         RT5640_MIC1_OVCD_MASK,
480                         RT5640_MIC1_OVCD_DIS);
481
482                 jack_type = RT5640_NO_JACK;
483         }
484
485         mutex_unlock(&rt5640->lock);
486         return jack_type;
487 }
488 EXPORT_SYMBOL(rt5640_headset_detect);
489
490 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
491 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
492 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
493 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
494 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
495
496 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
497 static unsigned int bst_tlv[] = {
498         TLV_DB_RANGE_HEAD(7),
499         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
500         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
501         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
502         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
503         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
504         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
505         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
506 };
507
508 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
509                 struct snd_ctl_elem_value *ucontrol)
510 {
511         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
512         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
513
514         ucontrol->value.integer.value[0] = rt5640->dmic_en;
515
516         return 0;
517 }
518
519 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
520                 struct snd_ctl_elem_value *ucontrol)
521 {
522         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
523         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
524         mutex_lock(&rt5640->lock);
525         CHECK_I2C_SHUTDOWN(rt5640, codec)
526
527         if (rt5640->dmic_en == ucontrol->value.integer.value[0]) {
528                 mutex_unlock(&rt5640->lock);
529                 return 0;
530         }
531
532         rt5640->dmic_en = ucontrol->value.integer.value[0];
533         switch (rt5640->dmic_en) {
534         case RT5640_DMIC_DIS:
535                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
536                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
537                         RT5640_GP4_PIN_MASK,
538                         RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
539                         RT5640_GP4_PIN_GPIO4);
540                 snd_soc_update_bits(codec, RT5640_DMIC,
541                         RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
542                         RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
543                 snd_soc_update_bits(codec, RT5640_DMIC,
544                         RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
545                         RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
546                 break;
547
548         case RT5640_DMIC1:
549                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
550                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
551                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
552                 snd_soc_update_bits(codec, RT5640_DMIC,
553                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
554                         RT5640_DMIC_1_DP_MASK,
555                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
556                         RT5640_DMIC_1_DP_IN1P);
557                 snd_soc_update_bits(codec, RT5640_DMIC,
558                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
559                 break;
560
561         case RT5640_DMIC2:
562                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
563                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
564                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
565                 snd_soc_update_bits(codec, RT5640_DMIC,
566                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
567                         RT5640_DMIC_2_DP_MASK,
568                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
569                         RT5640_DMIC_2_DP_IN1N);
570                 snd_soc_update_bits(codec, RT5640_DMIC,
571                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
572                 break;
573
574         default:
575                 mutex_unlock(&rt5640->lock);
576                 return -EINVAL;
577         }
578
579         mutex_unlock(&rt5640->lock);
580         return 0;
581 }
582
583
584 /* IN1/IN2 Input Type */
585 static const char *rt5640_input_mode[] = {
586         "Single ended", "Differential"};
587
588 static const SOC_ENUM_SINGLE_DECL(
589         rt5640_in1_mode_enum, RT5640_IN1_IN2,
590         RT5640_IN_SFT1, rt5640_input_mode);
591
592 static const SOC_ENUM_SINGLE_DECL(
593         rt5640_in2_mode_enum, RT5640_IN3_IN4,
594         RT5640_IN_SFT2, rt5640_input_mode);
595
596 /* Interface data select */
597 static const char *rt5640_data_select[] = {
598         "Normal", "left copy to right", "right copy to left", "Swap"};
599
600 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
601                                 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
602
603 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
604                                 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
605
606 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
607                                 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
608
609 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
610                                 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
611
612 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
613                                 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
614
615 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
616                                 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
617
618 /* Class D speaker gain ratio */
619 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
620         "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
621
622 static const SOC_ENUM_SINGLE_DECL(
623         rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
624         RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
625
626 /* DMIC */
627 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
628
629 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
630
631
632
633 #ifdef RT5640_REG_RW
634 #define REGVAL_MAX 0xffff
635 static unsigned int regctl_addr;
636 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
637                         struct snd_ctl_elem_info *uinfo) {
638         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
639         uinfo->count = 2;
640         uinfo->value.integer.min = 0;
641         uinfo->value.integer.max = REGVAL_MAX;
642         return 0;
643 }
644
645 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
646                         struct snd_ctl_elem_value *ucontrol)
647 {
648         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
649         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
650         mutex_lock(&rt5640->lock);
651         CHECK_I2C_SHUTDOWN(rt5640, codec)
652
653         ucontrol->value.integer.value[0] = regctl_addr;
654         ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
655         mutex_unlock(&rt5640->lock);
656         return 0;
657 }
658
659 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
660                         struct snd_ctl_elem_value *ucontrol)
661 {
662         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
663         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
664         mutex_lock(&rt5640->lock);
665         CHECK_I2C_SHUTDOWN(rt5640, codec)
666
667         regctl_addr = ucontrol->value.integer.value[0];
668         if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
669                 snd_soc_write(codec, regctl_addr,
670                 ucontrol->value.integer.value[1]);
671         mutex_unlock(&rt5640->lock);
672         return 0;
673 }
674 #endif
675
676
677 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
678 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
679
680 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
681                 struct snd_ctl_elem_value *ucontrol)
682 {
683         struct soc_mixer_control *mc =
684                 (struct soc_mixer_control *)kcontrol->private_value;
685         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
686         unsigned int val;
687         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
688         mutex_lock(&rt5640->lock);
689         CHECK_I2C_SHUTDOWN(rt5640, codec)
690         val = snd_soc_read(codec, mc->reg);
691
692         ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
693                 ((val & RT5640_L_VOL_MASK) >> mc->shift);
694         ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
695                 (val & RT5640_R_VOL_MASK);
696
697         mutex_unlock(&rt5640->lock);
698         return 0;
699 }
700
701 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
702                 struct snd_ctl_elem_value *ucontrol)
703 {
704         struct soc_mixer_control *mc =
705                 (struct soc_mixer_control *)kcontrol->private_value;
706         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
707         unsigned int val, val2;
708         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
709         int ret;
710         mutex_lock(&rt5640->lock);
711         CHECK_I2C_SHUTDOWN(rt5640, codec)
712
713         val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
714         val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
715         ret = snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
716                         RT5640_R_VOL_MASK, val << mc->shift | val2);
717         mutex_unlock(&rt5640->lock);
718         return ret;
719 }
720
721
722 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
723         /* Speaker Output Volume */
724         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
725                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
726                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
727
728         /* Headphone Output Volume */
729         SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
730                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
731
732         SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
733                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
734                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
735
736         /* OUTPUT Control */
737         SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
738                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
739         SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
740                 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
741         SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
742                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
743         /* MONO Output Control */
744         SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
745                                 RT5640_L_MUTE_SFT, 1, 1),
746         /* DAC Digital Volume */
747         SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
748                 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
749         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
750                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
751                         175, 0, dac_vol_tlv),
752         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
753                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
754                         175, 0, dac_vol_tlv),
755         /* IN1/IN2 Control */
756         SOC_ENUM("IN1 Mode Control",  rt5640_in1_mode_enum),
757         SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
758                 RT5640_BST_SFT1, 8, 0, bst_tlv),
759         SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
760         SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
761                 RT5640_BST_SFT2, 8, 0, bst_tlv),
762         /* INL/INR Volume Control */
763         SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
764                         RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
765                         31, 1, in_vol_tlv),
766         /* ADC Digital Volume Control */
767         SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
768                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
769         SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
770                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
771                         127, 0, adc_vol_tlv),
772         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
773                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
774                         127, 0, adc_vol_tlv),
775         /* ADC Boost Volume Control */
776         SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
777                         RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
778                         3, 0, adc_bst_tlv),
779         /* Class D speaker gain ratio */
780         SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
781         /* DMIC */
782         SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
783                 rt5640_dmic_get, rt5640_dmic_put),
784
785 #ifdef RT5640_REG_RW
786         {
787                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
788                 .name = "Register Control",
789                 .info = rt5640_regctl_info,
790                 .get = rt5640_regctl_get,
791                 .put = rt5640_regctl_put,
792         },
793 #endif
794 };
795
796 /**
797  * set_dmic_clk - Set parameter of dmic.
798  *
799  * @w: DAPM widget.
800  * @kcontrol: The kcontrol of this widget.
801  * @event: Event id.
802  *
803  * Choose dmic clock between 1MHz and 3MHz.
804  * It is better for clock to approximate 3MHz.
805  */
806 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
807         struct snd_kcontrol *kcontrol, int event)
808 {
809         struct snd_soc_codec *codec = w->codec;
810         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
811         int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
812         mutex_lock(&rt5640->lock);
813         CHECK_I2C_SHUTDOWN(rt5640, codec)
814
815         rate = rt5640->lrck[rt5640->aif_pu] << 8;
816         red = 3000000 * 12;
817         for (i = 0; i < ARRAY_SIZE(div); i++) {
818                 bound = div[i] * 3000000;
819                 if (rate > bound)
820                         continue;
821                 temp = bound - rate;
822                 if (temp < red) {
823                         red = temp;
824                         idx = i;
825                 }
826         }
827         if (idx < 0)
828                 dev_err(codec->dev, "Failed to set DMIC clock\n");
829         else
830                 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
831                                         idx << RT5640_DMIC_CLK_SFT);
832         mutex_unlock(&rt5640->lock);
833         return idx;
834 }
835
836 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
837                          struct snd_soc_dapm_widget *sink)
838 {
839         unsigned int val;
840         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(source->codec);
841         mutex_lock(&rt5640->lock);
842         CHECK_I2C_SHUTDOWN(rt5640, source->codec)
843
844         val = snd_soc_read(source->codec, RT5640_GLB_CLK);
845         val &= RT5640_SCLK_SRC_MASK;
846         mutex_unlock(&rt5640->lock);
847         if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
848                 return 1;
849         else
850                 return 0;
851 }
852
853 /* Digital Mixer */
854 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
855         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
856                         RT5640_M_ADC_L1_SFT, 1, 1),
857         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
858                         RT5640_M_ADC_L2_SFT, 1, 1),
859 };
860
861 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
862         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
863                         RT5640_M_ADC_R1_SFT, 1, 1),
864         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
865                         RT5640_M_ADC_R2_SFT, 1, 1),
866 };
867
868 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
869         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
870                         RT5640_M_MONO_ADC_L1_SFT, 1, 1),
871         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
872                         RT5640_M_MONO_ADC_L2_SFT, 1, 1),
873 };
874
875 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
876         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
877                         RT5640_M_MONO_ADC_R1_SFT, 1, 1),
878         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
879                         RT5640_M_MONO_ADC_R2_SFT, 1, 1),
880 };
881
882 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
883         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
884                         RT5640_M_ADCMIX_L_SFT, 1, 1),
885         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
886                         RT5640_M_IF1_DAC_L_SFT, 1, 1),
887 };
888
889 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
890         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
891                         RT5640_M_ADCMIX_R_SFT, 1, 1),
892         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
893                         RT5640_M_IF1_DAC_R_SFT, 1, 1),
894 };
895
896 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
897         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
898                         RT5640_M_DAC_L1_SFT, 1, 1),
899         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
900                         RT5640_M_DAC_L2_SFT, 1, 1),
901         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
902                         RT5640_M_ANC_DAC_L_SFT, 1, 1),
903 };
904
905 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
906         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
907                         RT5640_M_DAC_R1_SFT, 1, 1),
908         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
909                         RT5640_M_DAC_R2_SFT, 1, 1),
910         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
911                         RT5640_M_ANC_DAC_R_SFT, 1, 1),
912 };
913
914 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
915         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
916                         RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
917         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
918                         RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
919         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
920                         RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
921 };
922
923 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
924         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
925                         RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
926         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
927                         RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
928         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
929                         RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
930 };
931
932 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
933         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
934                         RT5640_M_STO_L_DAC_L_SFT, 1, 1),
935         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
936                         RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
937 };
938
939 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
940         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
941                         RT5640_M_STO_R_DAC_R_SFT, 1, 1),
942         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
943                         RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
944 };
945
946 /* Analog Input Mixer */
947 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
948         SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
949                         RT5640_M_HP_L_RM_L_SFT, 1, 1),
950         SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
951                         RT5640_M_IN_L_RM_L_SFT, 1, 1),
952         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
953                         RT5640_M_BST4_RM_L_SFT, 1, 1),
954         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
955                         RT5640_M_BST1_RM_L_SFT, 1, 1),
956         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
957                         RT5640_M_OM_L_RM_L_SFT, 1, 1),
958 };
959
960 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
961         SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
962                         RT5640_M_HP_R_RM_R_SFT, 1, 1),
963         SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
964                         RT5640_M_IN_R_RM_R_SFT, 1, 1),
965         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
966                         RT5640_M_BST4_RM_R_SFT, 1, 1),
967         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
968                         RT5640_M_BST1_RM_R_SFT, 1, 1),
969         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
970                         RT5640_M_OM_R_RM_R_SFT, 1, 1),
971 };
972
973 /* Analog Output Mixer */
974 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
975         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
976                         RT5640_M_RM_L_SM_L_SFT, 1, 1),
977         SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
978                         RT5640_M_IN_L_SM_L_SFT, 1, 1),
979         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
980                         RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
981         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
982                         RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
983         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
984                         RT5640_M_OM_L_SM_L_SFT, 1, 1),
985 };
986
987 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
988         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
989                         RT5640_M_RM_R_SM_R_SFT, 1, 1),
990         SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
991                         RT5640_M_IN_R_SM_R_SFT, 1, 1),
992         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
993                         RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
994         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
995                         RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
996         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
997                         RT5640_M_OM_R_SM_R_SFT, 1, 1),
998 };
999
1000 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
1001         SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
1002                         RT5640_M_SM_L_OM_L_SFT, 1, 1),
1003         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
1004                         RT5640_M_BST1_OM_L_SFT, 1, 1),
1005         SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
1006                         RT5640_M_IN_L_OM_L_SFT, 1, 1),
1007         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
1008                         RT5640_M_RM_L_OM_L_SFT, 1, 1),
1009         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
1010                         RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
1011         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
1012                         RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
1013         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
1014                         RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
1015 };
1016
1017 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
1018         SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
1019                         RT5640_M_SM_L_OM_R_SFT, 1, 1),
1020         SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
1021                         RT5640_M_BST4_OM_R_SFT, 1, 1),
1022         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
1023                         RT5640_M_BST1_OM_R_SFT, 1, 1),
1024         SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
1025                         RT5640_M_IN_R_OM_R_SFT, 1, 1),
1026         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
1027                         RT5640_M_RM_R_OM_R_SFT, 1, 1),
1028         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
1029                         RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
1030         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
1031                         RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
1032         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
1033                         RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
1034 };
1035
1036 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
1037         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
1038                         RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
1039         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
1040                         RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
1041         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
1042                         RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1043         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1044                         RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1045         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1046                         RT5640_M_BST1_SPM_L_SFT, 1, 1),
1047 };
1048
1049 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1050         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1051                         RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1052         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1053                         RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1054         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1055                         RT5640_M_BST1_SPM_R_SFT, 1, 1),
1056 };
1057
1058 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1059         SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1060                         RT5640_M_DAC2_HM_SFT, 1, 1),
1061         SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1062                         RT5640_M_DAC1_HM_SFT, 1, 1),
1063         SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1064                         RT5640_M_HPVOL_HM_SFT, 1, 1),
1065 };
1066
1067 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1068         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1069                         RT5640_M_DAC_L1_LM_SFT, 1, 1),
1070         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1071                         RT5640_M_DAC_R1_LM_SFT, 1, 1),
1072         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1073                         RT5640_M_OV_L_LM_SFT, 1, 1),
1074         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1075                         RT5640_M_OV_R_LM_SFT, 1, 1),
1076 };
1077
1078 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1079         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1080                         RT5640_M_DAC_R2_MM_SFT, 1, 1),
1081         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1082                         RT5640_M_DAC_L2_MM_SFT, 1, 1),
1083         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1084                         RT5640_M_OV_R_MM_SFT, 1, 1),
1085         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1086                         RT5640_M_OV_L_MM_SFT, 1, 1),
1087         SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1088                         RT5640_M_BST1_MM_SFT, 1, 1),
1089 };
1090
1091 /* INL/R source */
1092 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1093
1094 static const SOC_ENUM_SINGLE_DECL(
1095         rt5640_inl_enum, RT5640_INL_INR_VOL,
1096         RT5640_INL_SEL_SFT, rt5640_inl_src);
1097
1098 static const struct snd_kcontrol_new rt5640_inl_mux =
1099         SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1100
1101 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1102
1103 static const SOC_ENUM_SINGLE_DECL(
1104         rt5640_inr_enum, RT5640_INL_INR_VOL,
1105         RT5640_INR_SEL_SFT, rt5640_inr_src);
1106
1107 static const struct snd_kcontrol_new rt5640_inr_mux =
1108         SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1109
1110 /* Stereo ADC source */
1111 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1112
1113 static const SOC_ENUM_SINGLE_DECL(
1114         rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1115         RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1116
1117 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1118         SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1119
1120 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1121         SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1122
1123 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1124
1125 static const SOC_ENUM_SINGLE_DECL(
1126         rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1127         RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1128
1129 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1130         SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1131
1132 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1133         SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1134
1135 /* Mono ADC source */
1136 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1137
1138 static const SOC_ENUM_SINGLE_DECL(
1139         rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1140         RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1141
1142 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1143         SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1144
1145 static const char *rt5640_mono_adc_l2_src[] = {
1146         "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1147 };
1148
1149 static const SOC_ENUM_SINGLE_DECL(
1150         rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1151         RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1152
1153 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1154         SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1155
1156 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1157
1158 static const SOC_ENUM_SINGLE_DECL(
1159         rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1160         RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1161
1162 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1163         SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1164
1165 static const char *rt5640_mono_adc_r2_src[] = {
1166         "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1167 };
1168
1169 static const SOC_ENUM_SINGLE_DECL(
1170         rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1171         RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1172
1173 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1174         SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1175
1176 /* DAC2 channel source */
1177 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1178
1179 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1180                                 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1181
1182 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1183         SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1184
1185 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1186
1187 static const SOC_ENUM_SINGLE_DECL(
1188         rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1189         RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1190
1191 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1192         SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1193
1194 /* Interface 2  ADC channel source */
1195 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1196
1197 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1198                         RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1199
1200 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1201         SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1202
1203 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1204
1205 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1206                         RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1207
1208 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1209         SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1210
1211 /* digital interface and iis interface map */
1212 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1213         "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1214         "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1215
1216 static const SOC_ENUM_SINGLE_DECL(
1217         rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1218         RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1219
1220 static const struct snd_kcontrol_new rt5640_dai_mux =
1221         SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1222
1223 /* SDI select */
1224 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1225
1226 static const SOC_ENUM_SINGLE_DECL(
1227         rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1228         RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1229
1230 static const struct snd_kcontrol_new rt5640_sdi_mux =
1231         SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1232
1233 static int spk_event(struct snd_soc_dapm_widget *w,
1234         struct snd_kcontrol *kcontrol, int event)
1235 {
1236         struct snd_soc_codec *codec = w->codec;
1237         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1238         mutex_lock(&rt5640->lock);
1239         CHECK_I2C_SHUTDOWN(rt5640, codec)
1240
1241         switch (event) {
1242         case SND_SOC_DAPM_POST_PMU:
1243                 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1244                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1245                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1246                 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1247                 break;
1248
1249         case SND_SOC_DAPM_PRE_PMD:
1250                 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1251                 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1252                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1253                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1254                 break;
1255
1256         default:
1257                 mutex_unlock(&rt5640->lock);
1258                 return 0;
1259         }
1260         mutex_unlock(&rt5640->lock);
1261         return 0;
1262 }
1263
1264 static int hp_event(struct snd_soc_dapm_widget *w,
1265         struct snd_kcontrol *kcontrol, int event)
1266 {
1267         switch (event) {
1268         case SND_SOC_DAPM_POST_PMU:
1269                 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1270                 break;
1271
1272         case SND_SOC_DAPM_PRE_PMD:
1273                 pr_info("hp_event --SND_SOC_DAPM_POST_PMD\n");
1274                 break;
1275
1276         default:
1277                 return 0;
1278         }
1279         return 0;
1280 }
1281
1282 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
1283         struct snd_kcontrol *kcontrol, int event)
1284 {
1285         struct snd_soc_codec *codec = w->codec;
1286         unsigned int val, mask;
1287         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1288         mutex_lock(&rt5640->lock);
1289         CHECK_I2C_SHUTDOWN(rt5640, codec)
1290
1291         switch (event) {
1292         case SND_SOC_DAPM_PRE_PMU:
1293                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1294                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
1295                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
1296                 snd_soc_update_bits(codec, RT5640_DMIC,
1297                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
1298                         RT5640_DMIC_1_DP_MASK,
1299                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
1300                         RT5640_DMIC_1_DP_IN1P);
1301                 snd_soc_update_bits(codec, RT5640_DMIC,
1302                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
1303         default:
1304                 mutex_unlock(&rt5640->lock);
1305                 return 0;
1306         }
1307
1308         mutex_unlock(&rt5640->lock);
1309         return 0;
1310 }
1311
1312 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
1313         struct snd_kcontrol *kcontrol, int event)
1314 {
1315         struct snd_soc_codec *codec = w->codec;
1316         unsigned int val, mask;
1317         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1318         mutex_lock(&rt5640->lock);
1319         CHECK_I2C_SHUTDOWN(rt5640, codec)
1320
1321         switch (event) {
1322         case SND_SOC_DAPM_PRE_PMU:
1323                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1324                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
1325                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
1326                 snd_soc_update_bits(codec, RT5640_DMIC,
1327                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
1328                         RT5640_DMIC_2_DP_MASK,
1329                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
1330                         RT5640_DMIC_2_DP_IN1N);
1331                 snd_soc_update_bits(codec, RT5640_DMIC,
1332                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
1333         default:
1334                 mutex_unlock(&rt5640->lock);
1335                 return 0;
1336         }
1337
1338         mutex_unlock(&rt5640->lock);
1339         return 0;
1340 }
1341
1342 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1343         SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1344                         RT5640_PWR_PLL_BIT, 0, NULL, 0),
1345         /* Input Side */
1346         /* micbias */
1347         SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1348                         RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1349         SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1350                         RT5640_PWR_MB1_BIT, 0),
1351         SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1352                         RT5640_PWR_MB2_BIT, 0),
1353         /* Input Lines */
1354
1355         SND_SOC_DAPM_INPUT("MIC1"),
1356         SND_SOC_DAPM_INPUT("MIC2"),
1357         SND_SOC_DAPM_INPUT("DMIC1"),
1358         SND_SOC_DAPM_INPUT("DMIC2"),
1359         SND_SOC_DAPM_INPUT("IN1P"),
1360         SND_SOC_DAPM_INPUT("IN1N"),
1361         SND_SOC_DAPM_INPUT("IN2P"),
1362         SND_SOC_DAPM_INPUT("IN2N"),
1363 #if 0
1364         SND_SOC_DAPM_INPUT("DMIC L1"),
1365         SND_SOC_DAPM_INPUT("DMIC R1"),
1366         SND_SOC_DAPM_INPUT("DMIC L2"),
1367         SND_SOC_DAPM_INPUT("DMIC R2"),
1368 #else
1369         SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
1370                 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1371         SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1372         SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
1373                 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1374         SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1375 #endif
1376         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1377                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1378         /* Boost */
1379         SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1380                 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1381         SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1382                 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1383         /* Input Volume */
1384         SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1385                 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1386         SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1387                 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1388         /* IN Mux */
1389         SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1390         SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1391         /* REC Mixer */
1392         SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1393                         rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1394         SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1395                         rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1396         /* ADCs */
1397         SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1398                         RT5640_PWR_ADC_L_BIT, 0),
1399         SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1400                         RT5640_PWR_ADC_R_BIT, 0),
1401         /* ADC Mux */
1402         SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1403                                 &rt5640_sto_adc_l2_mux),
1404         SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1405                                 &rt5640_sto_adc_r2_mux),
1406         SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1407                                 &rt5640_sto_adc_l1_mux),
1408         SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1409                                 &rt5640_sto_adc_r1_mux),
1410         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1411                                 &rt5640_mono_adc_l2_mux),
1412         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1413                                 &rt5640_mono_adc_l1_mux),
1414         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1415                                 &rt5640_mono_adc_r1_mux),
1416         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1417                                 &rt5640_mono_adc_r2_mux),
1418         /* ADC Mixer */
1419         SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1420                 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1421         SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1422                 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1423         SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1424                 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1425         SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1426                 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1427         SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1428                 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1429         SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1430                 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1431         SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1432                 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1433
1434         /* IF2 Mux */
1435         SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1436                                 &rt5640_if2_adc_l_mux),
1437         SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1438                                 &rt5640_if2_adc_r_mux),
1439
1440         /* Digital Interface */
1441         SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1442                 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1443         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1444         SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1445         SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1446         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1447         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1448         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1449         SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1450                 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1451         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1452         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1453         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1454         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1455         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1456         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1457         SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1458                 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1459         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1460         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1461         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1462         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1463         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1464         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1465
1466         /* Digital Interface Select */
1467         SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1468         SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1469         SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1470         SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1471         SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1472
1473         SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1474         SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1475         SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1476         SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1477         SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1478
1479         SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1480         SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1481
1482         /* Audio Interface */
1483         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1484         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1485         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1486         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1487         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1488         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1489
1490         /* Audio DSP */
1491         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1492
1493         /* ANC */
1494         SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1495
1496         /* Output Side */
1497         /* DAC mixer before sound effect  */
1498         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1499                 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1500         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1501                 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1502
1503         /* DAC2 channel Mux */
1504         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1505                                 &rt5640_dac_l2_mux),
1506         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1507                                 &rt5640_dac_r2_mux),
1508
1509         /* DAC Mixer */
1510         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1511                 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1512         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1513                 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1514         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1515                 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1516         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1517                 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1518         SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1519                 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1520         SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1521                 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1522         /* DACs */
1523         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1524                         RT5640_PWR_DAC_L1_BIT, 0),
1525         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1526                         RT5640_PWR_DAC_L2_BIT, 0),
1527         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1528                         RT5640_PWR_DAC_R1_BIT, 0),
1529         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1530                         RT5640_PWR_DAC_R2_BIT, 0),
1531         /* SPK/OUT Mixer */
1532         SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1533                 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1534         SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1535                 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1536         SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1537                 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1538         SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1539                 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1540         /* Ouput Volume */
1541         SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1542                 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1543         SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1544                 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1545         SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1546                 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1547         SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1548                 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1549         SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1550                 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1551         SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1552                 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1553         /* SPO/HPO/LOUT/Mono Mixer */
1554         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1555                 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1556         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1557                 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1558
1559         SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1560                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1561         SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1562                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1563         SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1564                 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1565         SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1566                 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1567
1568         SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1569                 RT5640_PWR_MA_BIT, 0, NULL, 0),
1570
1571         SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1572         SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1573                                         SND_SOC_DAPM_POST_PMU),
1574
1575         SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1576                 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1577
1578         SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1579                 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1580
1581         SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1582                 SND_SOC_NOPM, 0, spk_event,
1583                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1584
1585         /* Output Lines */
1586         SND_SOC_DAPM_OUTPUT("SPOLP"),
1587         SND_SOC_DAPM_OUTPUT("SPOLN"),
1588         SND_SOC_DAPM_OUTPUT("SPORP"),
1589         SND_SOC_DAPM_OUTPUT("SPORN"),
1590         SND_SOC_DAPM_OUTPUT("HPOL"),
1591         SND_SOC_DAPM_OUTPUT("HPOR"),
1592         SND_SOC_DAPM_OUTPUT("LOUTL"),
1593         SND_SOC_DAPM_OUTPUT("LOUTR"),
1594         SND_SOC_DAPM_OUTPUT("MonoP"),
1595         SND_SOC_DAPM_OUTPUT("MonoN"),
1596 };
1597
1598 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1599         {"IN1P", NULL, "LDO2"},
1600         {"IN2P", NULL, "LDO2"},
1601
1602         {"IN1P", NULL, "MIC1"},
1603         {"IN1N", NULL, "MIC1"},
1604         {"IN2P", NULL, "MIC2"},
1605         {"IN2N", NULL, "MIC2"},
1606
1607         {"DMIC L1", NULL, "DMIC1"},
1608         {"DMIC R1", NULL, "DMIC1"},
1609         {"DMIC L2", NULL, "DMIC2"},
1610         {"DMIC R2", NULL, "DMIC2"},
1611
1612         {"BST1", NULL, "IN1P"},
1613         {"BST1", NULL, "IN1N"},
1614         {"BST2", NULL, "IN2P"},
1615         {"BST2", NULL, "IN2N"},
1616
1617         {"INL VOL", NULL, "IN2P"},
1618         {"INR VOL", NULL, "IN2N"},
1619
1620         {"RECMIXL", "HPOL Switch", "HPOL"},
1621         {"RECMIXL", "INL Switch", "INL VOL"},
1622         {"RECMIXL", "BST2 Switch", "BST2"},
1623         {"RECMIXL", "BST1 Switch", "BST1"},
1624         {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1625
1626         {"RECMIXR", "HPOR Switch", "HPOR"},
1627         {"RECMIXR", "INR Switch", "INR VOL"},
1628         {"RECMIXR", "BST2 Switch", "BST2"},
1629         {"RECMIXR", "BST1 Switch", "BST1"},
1630         {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1631
1632         {"ADC L", NULL, "RECMIXL"},
1633         {"ADC R", NULL, "RECMIXR"},
1634
1635         {"DMIC L1", NULL, "DMIC CLK"},
1636         {"DMIC L2", NULL, "DMIC CLK"},
1637
1638         {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1639         {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1640         {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1641         {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1642         {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1643
1644         {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1645         {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1646         {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1647         {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1648         {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1649
1650         {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1651         {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1652         {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1653         {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1654         {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1655
1656         {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1657         {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1658         {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1659         {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1660         {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1661
1662         {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1663         {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1664         {"Stereo ADC MIXL", NULL, "stereo filter"},
1665         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1666
1667         {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1668         {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1669         {"Stereo ADC MIXR", NULL, "stereo filter"},
1670         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1671
1672         {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1673         {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1674         {"Mono ADC MIXL", NULL, "mono left filter"},
1675         {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1676
1677         {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1678         {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1679         {"Mono ADC MIXR", NULL, "mono right filter"},
1680         {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1681
1682         {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1683         {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1684
1685         {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1686         {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1687         {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1688         {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1689         {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1690         {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1691
1692         {"IF1 ADC", NULL, "I2S1"},
1693         {"IF1 ADC", NULL, "IF1 ADC L"},
1694         {"IF1 ADC", NULL, "IF1 ADC R"},
1695         {"IF2 ADC", NULL, "I2S2"},
1696         {"IF2 ADC", NULL, "IF2 ADC L"},
1697         {"IF2 ADC", NULL, "IF2 ADC R"},
1698         {"IF3 ADC", NULL, "I2S3"},
1699         {"IF3 ADC", NULL, "IF3 ADC L"},
1700         {"IF3 ADC", NULL, "IF3 ADC R"},
1701
1702         {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1703         {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1704         {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1705         {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1706         {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1707         {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1708         {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1709         {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1710         {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1711         {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1712
1713         {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1714         {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1715         {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1716         {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1717         {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1718         {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1719         {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1720         {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1721         {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1722         {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1723
1724         {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1725         {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1726         {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1727         {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1728         {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1729         {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1730         {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1731         {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1732
1733         {"AIF1TX", NULL, "DAI1 TX Mux"},
1734         {"AIF1TX", NULL, "SDI1 TX Mux"},
1735         {"AIF2TX", NULL, "DAI2 TX Mux"},
1736         {"AIF2TX", NULL, "SDI2 TX Mux"},
1737         {"AIF3TX", NULL, "DAI3 TX Mux"},
1738
1739         {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1740         {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1741         {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1742         {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1743         {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1744         {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1745         {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1746         {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1747
1748         {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1749         {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1750         {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1751         {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
1752         {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
1753         {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1754         {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
1755         {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
1756
1757         {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
1758         {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
1759         {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
1760         {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
1761         {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
1762         {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
1763         {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
1764         {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
1765
1766         {"IF1 DAC", NULL, "I2S1"},
1767         {"IF1 DAC", NULL, "DAI1 RX Mux"},
1768         {"IF2 DAC", NULL, "I2S2"},
1769         {"IF2 DAC", NULL, "DAI2 RX Mux"},
1770         {"IF3 DAC", NULL, "I2S3"},
1771         {"IF3 DAC", NULL, "DAI3 RX Mux"},
1772
1773         {"IF1 DAC L", NULL, "IF1 DAC"},
1774         {"IF1 DAC R", NULL, "IF1 DAC"},
1775         {"IF2 DAC L", NULL, "IF2 DAC"},
1776         {"IF2 DAC R", NULL, "IF2 DAC"},
1777         {"IF3 DAC L", NULL, "IF3 DAC"},
1778         {"IF3 DAC R", NULL, "IF3 DAC"},
1779
1780         {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1781         {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1782         {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1783         {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1784
1785         {"ANC", NULL, "Stereo ADC MIXL"},
1786         {"ANC", NULL, "Stereo ADC MIXR"},
1787
1788         {"Audio DSP", NULL, "DAC MIXL"},
1789         {"Audio DSP", NULL, "DAC MIXR"},
1790
1791         {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1792         {"DAC L2 Mux", "IF3", "IF3 DAC L"},
1793         {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1794
1795         {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1796         {"DAC R2 Mux", "IF3", "IF3 DAC R"},
1797
1798         {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1799         {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1800         {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1801         {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1802         {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1803         {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1804
1805         {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1806         {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1807         {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1808         {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1809         {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1810         {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1811
1812         {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1813         {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1814         {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1815         {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1816
1817         {"DAC L1", NULL, "Stereo DAC MIXL"},
1818         {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1819         {"DAC R1", NULL, "Stereo DAC MIXR"},
1820         {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1821         {"DAC L2", NULL, "Mono DAC MIXL"},
1822         {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1823         {"DAC R2", NULL, "Mono DAC MIXR"},
1824         {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1825
1826         {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1827         {"SPK MIXL", "INL Switch", "INL VOL"},
1828         {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1829         {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1830         {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1831         {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1832         {"SPK MIXR", "INR Switch", "INR VOL"},
1833         {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1834         {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1835         {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1836
1837         {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1838         {"OUT MIXL", "BST1 Switch", "BST1"},
1839         {"OUT MIXL", "INL Switch", "INL VOL"},
1840         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1841         {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1842         {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1843         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1844
1845         {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1846         {"OUT MIXR", "BST2 Switch", "BST2"},
1847         {"OUT MIXR", "BST1 Switch", "BST1"},
1848         {"OUT MIXR", "INR Switch", "INR VOL"},
1849         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1850         {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1851         {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1852         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1853
1854         {"SPKVOL L", NULL, "SPK MIXL"},
1855         {"SPKVOL R", NULL, "SPK MIXR"},
1856         {"HPOVOL L", NULL, "OUT MIXL"},
1857         {"HPOVOL R", NULL, "OUT MIXR"},
1858         {"OUTVOL L", NULL, "OUT MIXL"},
1859         {"OUTVOL R", NULL, "OUT MIXR"},
1860
1861         {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1862         {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1863         {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1864         {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1865         {"SPOL MIX", "BST1 Switch", "BST1"},
1866         {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1867         {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1868         {"SPOR MIX", "BST1 Switch", "BST1"},
1869
1870         {"HPOL MIX", "DAC2 Switch", "DAC L2"},
1871         {"HPOL MIX", "DAC1 Switch", "DAC L1"},
1872         {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
1873         {"HPOR MIX", "DAC2 Switch", "DAC R2"},
1874         {"HPOR MIX", "DAC1 Switch", "DAC R1"},
1875         {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
1876
1877         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1878         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1879         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1880         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1881
1882         {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1883         {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1884         {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1885         {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1886         {"Mono MIX", "BST1 Switch", "BST1"},
1887
1888         {"HP L amp", NULL, "HPOL MIX"},
1889         {"HP R amp", NULL, "HPOR MIX"},
1890
1891 /*      {"HP L amp", NULL, "Improve HP amp drv"},
1892         {"HP R amp", NULL, "Improve HP amp drv"}, */
1893
1894         {"SPOLP", NULL, "SPOL MIX"},
1895         {"SPOLN", NULL, "SPOL MIX"},
1896         {"SPORP", NULL, "SPOR MIX"},
1897         {"SPORN", NULL, "SPOR MIX"},
1898
1899         {"SPOLP", NULL, "Improve SPK amp drv"},
1900         {"SPOLN", NULL, "Improve SPK amp drv"},
1901         {"SPORP", NULL, "Improve SPK amp drv"},
1902         {"SPORN", NULL, "Improve SPK amp drv"},
1903
1904         {"HPOL", NULL, "Improve HP amp drv"},
1905         {"HPOR", NULL, "Improve HP amp drv"},
1906
1907         {"HPOL", NULL, "HP L amp"},
1908         {"HPOR", NULL, "HP R amp"},
1909         {"LOUTL", NULL, "LOUT MIX"},
1910         {"LOUTR", NULL, "LOUT MIX"},
1911         {"MonoP", NULL, "Mono MIX"},
1912         {"MonoN", NULL, "Mono MIX"},
1913         {"MonoP", NULL, "Improve mono amp drv"},
1914 };
1915
1916 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1917 {
1918         int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
1919
1920         if (codec == NULL)
1921                 return -EINVAL;
1922
1923         val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1924         switch (dai_id) {
1925         case RT5640_AIF1:
1926                 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
1927                         val == RT5640_IF_113)
1928                         ret |= RT5640_U_IF1;
1929                 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
1930                         val == RT5640_IF_113)
1931                         ret |= RT5640_U_IF2;
1932                 if (val == RT5640_IF_321 || val == RT5640_IF_231)
1933                         ret |= RT5640_U_IF3;
1934                 break;
1935
1936         case RT5640_AIF2:
1937                 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
1938                         val == RT5640_IF_223)
1939                         ret |= RT5640_U_IF1;
1940                 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
1941                         val == RT5640_IF_223)
1942                         ret |= RT5640_U_IF2;
1943                 if (val == RT5640_IF_132 || val == RT5640_IF_312)
1944                         ret |= RT5640_U_IF3;
1945                 break;
1946
1947 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
1948         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1949         case RT5640_AIF3:
1950                 if (val == RT5640_IF_312 || val == RT5640_IF_321)
1951                         ret |= RT5640_U_IF1;
1952                 if (val == RT5640_IF_132 || val == RT5640_IF_231)
1953                         ret |= RT5640_U_IF2;
1954                 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
1955                         val == RT5640_IF_113 || val == RT5640_IF_223)
1956                         ret |= RT5640_U_IF3;
1957                 break;
1958 #endif
1959
1960         default:
1961                 ret = -EINVAL;
1962                 break;
1963         }
1964
1965         return ret;
1966 }
1967
1968 static int get_clk_info(int sclk, int rate)
1969 {
1970         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1971
1972         if (sclk <= 0 || rate <= 0)
1973                 return -EINVAL;
1974
1975         rate = rate << 8;
1976         for (i = 0; i < ARRAY_SIZE(pd); i++)
1977                 if (sclk == rate * pd[i])
1978                         return i;
1979
1980         return -EINVAL;
1981 }
1982
1983 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1984         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1985 {
1986         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1987         struct snd_soc_codec *codec = rtd->codec;
1988         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1989         unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1990         int pre_div, bclk_ms, frame_size;
1991         mutex_lock(&rt5640->lock);
1992         CHECK_I2C_SHUTDOWN(rt5640, codec)
1993
1994         rt5640->lrck[dai->id] = params_rate(params);
1995         pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1996         if (pre_div < 0) {
1997                 dev_err(codec->dev, "Unsupported clock setting\n");
1998                 mutex_unlock(&rt5640->lock);
1999                 return -EINVAL;
2000         }
2001         frame_size = snd_soc_params_to_frame_size(params);
2002         if (frame_size < 0) {
2003                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2004                 mutex_unlock(&rt5640->lock);
2005                 return -EINVAL;
2006         }
2007         bclk_ms = frame_size > 32 ? 1 : 0;
2008         rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
2009
2010         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2011                 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
2012         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2013                                 bclk_ms, pre_div, dai->id);
2014
2015         switch (params_format(params)) {
2016         case SNDRV_PCM_FORMAT_S16_LE:
2017                 break;
2018         case SNDRV_PCM_FORMAT_S20_3LE:
2019                 val_len |= RT5640_I2S_DL_20;
2020                 break;
2021         case SNDRV_PCM_FORMAT_S24_LE:
2022                 val_len |= RT5640_I2S_DL_24;
2023                 break;
2024         case SNDRV_PCM_FORMAT_S8:
2025                 val_len |= RT5640_I2S_DL_8;
2026                 break;
2027         default:
2028                 mutex_unlock(&rt5640->lock);
2029                 return -EINVAL;
2030         }
2031
2032         dai_sel = get_sdp_info(codec, dai->id);
2033         if (dai_sel < 0) {
2034                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2035                 mutex_unlock(&rt5640->lock);
2036                 return -EINVAL;
2037         }
2038         if (dai_sel & RT5640_U_IF1) {
2039                 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
2040                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
2041                         pre_div << RT5640_I2S_PD1_SFT;
2042                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2043                         RT5640_I2S_DL_MASK, val_len);
2044                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2045         }
2046         if (dai_sel & RT5640_U_IF2) {
2047                 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
2048                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
2049                         pre_div << RT5640_I2S_PD2_SFT;
2050                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2051                         RT5640_I2S_DL_MASK, val_len);
2052                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2053         }
2054 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2055         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2056         if (dai_sel & RT5640_U_IF3) {
2057                 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
2058                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
2059                         pre_div << RT5640_I2S_PD3_SFT;
2060                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2061                         RT5640_I2S_DL_MASK, val_len);
2062                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2063         }
2064 #endif
2065         mutex_unlock(&rt5640->lock);
2066         return 0;
2067 }
2068
2069 static int rt5640_prepare(struct snd_pcm_substream *substream,
2070                                 struct snd_soc_dai *dai)
2071 {
2072         struct snd_soc_pcm_runtime *rtd = substream->private_data;
2073         struct snd_soc_codec *codec = rtd->codec;
2074         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2075
2076         rt5640->aif_pu = dai->id;
2077         return 0;
2078 }
2079
2080 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2081 {
2082         struct snd_soc_codec *codec = dai->codec;
2083         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2084         unsigned int reg_val = 0, dai_sel;
2085         mutex_lock(&rt5640->lock);
2086         CHECK_I2C_SHUTDOWN(rt5640, codec)
2087
2088         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2089         case SND_SOC_DAIFMT_CBM_CFM:
2090                 rt5640->master[dai->id] = 1;
2091                 break;
2092         case SND_SOC_DAIFMT_CBS_CFS:
2093                 reg_val |= RT5640_I2S_MS_S;
2094                 rt5640->master[dai->id] = 0;
2095                 break;
2096         default:
2097                 mutex_unlock(&rt5640->lock);
2098                 return -EINVAL;
2099         }
2100
2101         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2102         case SND_SOC_DAIFMT_NB_NF:
2103                 break;
2104         case SND_SOC_DAIFMT_IB_NF:
2105                 reg_val |= RT5640_I2S_BP_INV;
2106                 break;
2107         default:
2108                 mutex_unlock(&rt5640->lock);
2109                 return -EINVAL;
2110         }
2111
2112         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2113         case SND_SOC_DAIFMT_I2S:
2114                 break;
2115         case SND_SOC_DAIFMT_LEFT_J:
2116                 reg_val |= RT5640_I2S_DF_LEFT;
2117                 break;
2118         case SND_SOC_DAIFMT_DSP_A:
2119                 reg_val |= RT5640_I2S_DF_PCM_A;
2120                 break;
2121         case SND_SOC_DAIFMT_DSP_B:
2122                 reg_val  |= RT5640_I2S_DF_PCM_B;
2123                 break;
2124         default:
2125                 mutex_unlock(&rt5640->lock);
2126                 return -EINVAL;
2127         }
2128
2129         dai_sel = get_sdp_info(codec, dai->id);
2130         if (dai_sel < 0) {
2131                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2132                 mutex_unlock(&rt5640->lock);
2133                 return -EINVAL;
2134         }
2135         if (dai_sel & RT5640_U_IF1) {
2136                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2137                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2138                         RT5640_I2S_DF_MASK, reg_val);
2139         }
2140         if (dai_sel & RT5640_U_IF2) {
2141                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2142                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2143                         RT5640_I2S_DF_MASK, reg_val);
2144         }
2145 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2146         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2147         if (dai_sel & RT5640_U_IF3) {
2148                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2149                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2150                         RT5640_I2S_DF_MASK, reg_val);
2151         }
2152 #endif
2153         mutex_unlock(&rt5640->lock);
2154         return 0;
2155 }
2156
2157 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2158                 int clk_id, unsigned int freq, int dir)
2159 {
2160         struct snd_soc_codec *codec = dai->codec;
2161         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2162         unsigned int reg_val = 0;
2163         mutex_lock(&rt5640->lock);
2164         CHECK_I2C_SHUTDOWN(rt5640, codec)
2165
2166         if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src) {
2167                 mutex_unlock(&rt5640->lock);
2168                 return 0;
2169         }
2170
2171         switch (clk_id) {
2172         case RT5640_SCLK_S_MCLK:
2173                 reg_val |= RT5640_SCLK_SRC_MCLK;
2174                 break;
2175         case RT5640_SCLK_S_PLL1:
2176                 reg_val |= RT5640_SCLK_SRC_PLL1;
2177                 break;
2178         case RT5640_SCLK_S_PLL1_TK:
2179                 reg_val |= RT5640_SCLK_SRC_PLL1T;
2180                 break;
2181         case RT5640_SCLK_S_RCCLK:
2182                 reg_val |= RT5640_SCLK_SRC_RCCLK;
2183                 break;
2184         default:
2185                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2186                 mutex_unlock(&rt5640->lock);
2187                 return -EINVAL;
2188         }
2189         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2190                 RT5640_SCLK_SRC_MASK, reg_val);
2191         rt5640->sysclk = freq;
2192         rt5640->sysclk_src = clk_id;
2193
2194         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2195         mutex_unlock(&rt5640->lock);
2196         return 0;
2197 }
2198
2199 /**
2200  * rt5640_pll_calc - Calcualte PLL M/N/K code.
2201  * @freq_in: external clock provided to codec.
2202  * @freq_out: target clock which codec works on.
2203  * @pll_code: Pointer to structure with M, N, K and bypass flag.
2204  *
2205  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2206  * which make calculation more efficiently.
2207  *
2208  * Returns 0 for success or negative error code.
2209  */
2210 static int rt5640_pll_calc(const unsigned int freq_in,
2211         const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2212 {
2213         int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2214         int n, m, red, n_t, m_t, in_t, out_t, red_t = abs(freq_out - freq_in);
2215         bool bypass = false;
2216
2217         if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2218                 return -EINVAL;
2219
2220         for (n_t = 0; n_t <= max_n; n_t++) {
2221                 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
2222                 if (in_t < 0)
2223                         continue;
2224                 if (in_t == freq_out) {
2225                         bypass = true;
2226                         n = n_t;
2227                         goto code_find;
2228                 }
2229                 for (m_t = 0; m_t <= max_m; m_t++) {
2230                         out_t = in_t / (m_t + 2);
2231                         red = abs(out_t - freq_out);
2232                         if (red < red_t) {
2233                                 n = n_t;
2234                                 m = m_t;
2235                                 if (red == 0)
2236                                         goto code_find;
2237                                 red_t = red;
2238                         }
2239                 }
2240         }
2241         pr_debug("Only get approximation about PLL\n");
2242
2243 code_find:
2244
2245         pll_code->m_bp = bypass;
2246         pll_code->m_code = m;
2247         pll_code->n_code = n;
2248         pll_code->k_code = 2;
2249         return 0;
2250 }
2251
2252 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2253                         unsigned int freq_in, unsigned int freq_out)
2254 {
2255         struct snd_soc_codec *codec = dai->codec;
2256         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2257         struct rt5640_pll_code pll_code;
2258         int ret, dai_sel;
2259         mutex_lock(&rt5640->lock);
2260         CHECK_I2C_SHUTDOWN(rt5640, codec)
2261
2262         if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2263             freq_out == rt5640->pll_out) {
2264                 mutex_unlock(&rt5640->lock);
2265                 return 0;
2266                 }
2267
2268         if (!freq_in || !freq_out) {
2269                 dev_dbg(codec->dev, "PLL disabled\n");
2270
2271                 rt5640->pll_in = 0;
2272                 rt5640->pll_out = 0;
2273                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2274                         RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2275                 mutex_unlock(&rt5640->lock);
2276                 return 0;
2277         }
2278
2279         switch (source) {
2280         case RT5640_PLL1_S_MCLK:
2281                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2282                         RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2283                 break;
2284         case RT5640_PLL1_S_BCLK1:
2285         case RT5640_PLL1_S_BCLK2:
2286 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2287         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2288         case RT5640_PLL1_S_BCLK3:
2289
2290 #endif
2291                 dai_sel = get_sdp_info(codec, dai->id);
2292                 if (dai_sel < 0) {
2293                         dev_err(codec->dev,
2294                                 "Failed to get sdp info: %d\n", dai_sel);
2295                         mutex_unlock(&rt5640->lock);
2296                         return -EINVAL;
2297                 }
2298                 if (dai_sel & RT5640_U_IF1) {
2299                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2300                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2301                 }
2302                 if (dai_sel & RT5640_U_IF2) {
2303                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2304                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2305                 }
2306                 if (dai_sel & RT5640_U_IF3) {
2307                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2308                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2309                 }
2310                 break;
2311         default:
2312                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2313                 mutex_unlock(&rt5640->lock);
2314                 return -EINVAL;
2315         }
2316
2317         ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2318         if (ret < 0) {
2319                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2320                 mutex_unlock(&rt5640->lock);
2321                 return ret;
2322         }
2323
2324         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code.m_bp,
2325                 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code);
2326
2327         snd_soc_write(codec, RT5640_PLL_CTRL1,
2328                 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2329         snd_soc_write(codec, RT5640_PLL_CTRL2,
2330                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2331                 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2332
2333         rt5640->pll_in = freq_in;
2334         rt5640->pll_out = freq_out;
2335         rt5640->pll_src = source;
2336
2337         mutex_unlock(&rt5640->lock);
2338         return 0;
2339 }
2340
2341 /**
2342  * rt5640_index_show - Dump private registers.
2343  * @dev: codec device.
2344  * @attr: device attribute.
2345  * @buf: buffer for display.
2346  *
2347  * To show non-zero values of all private registers.
2348  *
2349  * Returns buffer length.
2350  */
2351 static ssize_t rt5640_index_show(struct device *dev,
2352         struct device_attribute *attr, char *buf)
2353 {
2354         struct i2c_client *client = to_i2c_client(dev);
2355         struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2356         struct snd_soc_codec *codec = rt5640->codec;
2357         unsigned int val;
2358         int cnt = 0, i;
2359         mutex_lock(&rt5640->lock);
2360         CHECK_I2C_SHUTDOWN(rt5640, codec)
2361
2362         cnt += sprintf(buf, "RT5640 index register\n");
2363         for (i = 0; i < 0xb4; i++) {
2364                 if (cnt + 9 >= PAGE_SIZE - 1)
2365                         break;
2366                 val = rt5640_index_read(codec, i);
2367                 if (!val)
2368                         continue;
2369                 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2370         }
2371
2372         if (cnt >= PAGE_SIZE)
2373                 cnt = PAGE_SIZE - 1;
2374
2375         mutex_unlock(&rt5640->lock);
2376         return cnt;
2377 }
2378 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2379
2380 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2381                         enum snd_soc_bias_level level)
2382 {
2383         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2384         mutex_lock(&rt5640->lock);
2385         CHECK_I2C_SHUTDOWN(rt5640, codec)
2386
2387         switch (level) {
2388         case SND_SOC_BIAS_ON:
2389 #ifdef RT5640_DEMO
2390                 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2391                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2392                 snd_soc_update_bits(codec, RT5640_HP_VOL,
2393                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2394                 break;
2395 #endif
2396         case SND_SOC_BIAS_PREPARE:
2397 #ifdef RT5640_DEMO
2398                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2399                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2400                         RT5640_PWR_BG | RT5640_PWR_VREF2,
2401                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2402                         RT5640_PWR_BG | RT5640_PWR_VREF2);
2403                 msleep(100);
2404
2405                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2406                         RT5640_PWR_FV1 | RT5640_PWR_FV2,
2407                         RT5640_PWR_FV1 | RT5640_PWR_FV2);
2408
2409                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2410                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2411                         RT5640_PWR_MB1 | RT5640_PWR_MB2);
2412 #endif
2413                 break;
2414
2415         case SND_SOC_BIAS_STANDBY:
2416 #ifdef RT5640_DEMO
2417                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2418                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2419                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2420                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2421
2422                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2423                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2424                         0);
2425 #endif
2426                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2427                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2428                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2429                                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2430                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2431                                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2432                         msleep(10);
2433                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2434                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2435                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2436                         codec->cache_only = false;
2437                         codec->cache_sync = 1;
2438                         snd_soc_cache_sync(codec);
2439                         rt5640_index_sync(codec);
2440                 }
2441                 break;
2442
2443         case SND_SOC_BIAS_OFF:
2444 #ifdef RT5640_DEMO
2445                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2446                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2447                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2448                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2449                 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2450                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2451                 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2452                         RT5640_L_MUTE, RT5640_L_MUTE);
2453 #endif
2454                 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2455                 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2456                 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2457                 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2458                 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2459                 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2460                 break;
2461
2462         default:
2463                 break;
2464         }
2465         codec->dapm.bias_level = level;
2466
2467         mutex_unlock(&rt5640->lock);
2468         return 0;
2469 }
2470
2471 static int rt5640_probe(struct snd_soc_codec *codec)
2472 {
2473         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2474         int ret;
2475         u16 val;
2476         mutex_lock(&rt5640->lock);
2477         CHECK_I2C_SHUTDOWN(rt5640, codec)
2478
2479         codec->dapm.idle_bias_off = 1;
2480
2481         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2482         if (ret != 0) {
2483                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2484                 mutex_unlock(&rt5640->lock);
2485                 return ret;
2486         }
2487
2488         val = snd_soc_read(codec, RT5640_RESET);
2489         if ((val != rt5640_reg[RT5640_RESET]) && (val != RT5639_RESET_ID)) {
2490                 dev_err(codec->dev,
2491                         "Device with ID register %x is not rt5640/39\n", val);
2492                 mutex_unlock(&rt5640->lock);
2493                 return -ENODEV;
2494         }
2495
2496         rt5640_reset(codec);
2497         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2498                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2499                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2500                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2501                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2502         msleep(100);
2503         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2504                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2505                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2506         /* DMIC */
2507         if (rt5640->dmic_en == RT5640_DMIC1) {
2508                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2509                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2510                 snd_soc_update_bits(codec, RT5640_DMIC,
2511                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2512                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2513         } else if (rt5640->dmic_en == RT5640_DMIC2) {
2514                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2515                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2516                 snd_soc_update_bits(codec, RT5640_DMIC,
2517                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2518                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2519         }
2520
2521 #ifdef RT5640_DEMO
2522         rt5640_reg_init(codec);
2523 #endif
2524
2525 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
2526         rt5640_register_dsp(codec);
2527 #endif
2528
2529         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2530
2531         snd_soc_add_codec_controls(codec, rt5640_snd_controls,
2532                 ARRAY_SIZE(rt5640_snd_controls));
2533
2534         rt5640->codec = codec;
2535         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2536         if (ret != 0) {
2537                 dev_err(codec->dev,
2538                         "Failed to create index_reg sysfs files: %d\n", ret);
2539                 mutex_unlock(&rt5640->lock);
2540                 return ret;
2541         }
2542
2543         mutex_unlock(&rt5640->lock);
2544         return 0;
2545 }
2546
2547 static int rt5640_remove(struct snd_soc_codec *codec)
2548 {
2549         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2550
2551         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2552         mutex_lock(&rt5640->lock);
2553         CHECK_I2C_SHUTDOWN(rt5640, codec)
2554         rt5640_reset(codec);
2555         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2556
2557         mutex_unlock(&rt5640->lock);
2558         return 0;
2559 }
2560 #ifdef CONFIG_PM
2561 static int rt5640_suspend(struct snd_soc_codec *codec, pm_message_t state)
2562 {
2563         rt5640_reset(codec);
2564         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2565         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2566
2567         return 0;
2568 }
2569
2570 static int rt5640_resume(struct snd_soc_codec *codec)
2571 {
2572         int ret = 0 ;
2573
2574         codec->cache_sync = 1;
2575         ret = snd_soc_cache_sync(codec);
2576         if (ret) {
2577                 dev_err(codec->dev,"Failed to sync cache: %d\n", ret);
2578                 return ret;
2579         }
2580         rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2581
2582         return 0;
2583 }
2584 #else
2585 #define rt5640_suspend NULL
2586 #define rt5640_resume NULL
2587 #endif
2588
2589 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2590 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2591                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2592
2593 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2594         .hw_params = rt5640_hw_params,
2595         .prepare = rt5640_prepare,
2596         .set_fmt = rt5640_set_dai_fmt,
2597         .set_sysclk = rt5640_set_dai_sysclk,
2598         .set_pll = rt5640_set_dai_pll,
2599 };
2600
2601 struct snd_soc_dai_driver rt5640_dai[] = {
2602         {
2603                 .name = "rt5640-aif1",
2604                 .id = RT5640_AIF1,
2605                 .playback = {
2606                         .stream_name = "AIF1 Playback",
2607                         .channels_min = 1,
2608                         .channels_max = 2,
2609                         .rates = RT5640_STEREO_RATES,
2610                         .formats = RT5640_FORMATS,
2611                 },
2612                 .capture = {
2613                         .stream_name = "AIF1 Capture",
2614                         .channels_min = 1,
2615                         .channels_max = 2,
2616                         .rates = RT5640_STEREO_RATES,
2617                         .formats = RT5640_FORMATS,
2618                 },
2619                 .ops = &rt5640_aif_dai_ops,
2620         },
2621         {
2622                 .name = "rt5640-aif2",
2623                 .id = RT5640_AIF2,
2624                 .playback = {
2625                         .stream_name = "AIF2 Playback",
2626                         .channels_min = 1,
2627                         .channels_max = 2,
2628                         .rates = RT5640_STEREO_RATES,
2629                         .formats = RT5640_FORMATS,
2630                 },
2631                 .capture = {
2632                         .stream_name = "AIF2 Capture",
2633                         .channels_min = 1,
2634                         .channels_max = 2,
2635                         .rates = RT5640_STEREO_RATES,
2636                         .formats = RT5640_FORMATS,
2637                 },
2638                 .ops = &rt5640_aif_dai_ops,
2639         },
2640 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2641         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2642         {
2643                 .name = "rt5640-aif3",
2644                 .id = RT5640_AIF3,
2645                 .playback = {
2646                         .stream_name = "AIF3 Playback",
2647                         .channels_min = 1,
2648                         .channels_max = 2,
2649                         .rates = RT5640_STEREO_RATES,
2650                         .formats = RT5640_FORMATS,
2651                 },
2652                 .capture = {
2653                         .stream_name = "AIF3 Capture",
2654                         .channels_min = 1,
2655                         .channels_max = 2,
2656                         .rates = RT5640_STEREO_RATES,
2657                         .formats = RT5640_FORMATS,
2658                 },
2659                 .ops = &rt5640_aif_dai_ops,
2660         },
2661 #endif
2662 };
2663
2664 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2665         .probe = rt5640_probe,
2666         .remove = rt5640_remove,
2667         .suspend = rt5640_suspend,
2668         .resume = rt5640_resume,
2669         .set_bias_level = rt5640_set_bias_level,
2670         .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2671         .reg_word_size = sizeof(u16),
2672         .reg_cache_default = rt5640_reg,
2673         .volatile_register = rt5640_volatile_register,
2674         .readable_register = rt5640_readable_register,
2675         .reg_cache_step = 1,
2676         .dapm_widgets = rt5640_dapm_widgets,
2677         .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2678         .dapm_routes = rt5640_dapm_routes,
2679         .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2680 };
2681
2682 static const struct i2c_device_id rt5640_i2c_id[] = {
2683         { "rt5640", 0 },
2684         { }
2685 };
2686 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2687
2688 static int rt5640_i2c_probe(struct i2c_client *i2c,
2689                     const struct i2c_device_id *id)
2690 {
2691         struct rt5640_priv *rt5640;
2692         int ret;
2693
2694         rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2695         if (NULL == rt5640)
2696                 return -ENOMEM;
2697
2698         i2c_set_clientdata(i2c, rt5640);
2699         mutex_init(&rt5640->lock);
2700
2701         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2702                         rt5640_dai, ARRAY_SIZE(rt5640_dai));
2703         if (ret < 0)
2704                 kfree(rt5640);
2705
2706         return ret;
2707 }
2708
2709 static __devexit int rt5640_i2c_remove(struct i2c_client *i2c)
2710 {
2711         snd_soc_unregister_codec(&i2c->dev);
2712         kfree(i2c_get_clientdata(i2c));
2713         return 0;
2714 }
2715
2716 static void rt5640_i2c_shutdown(struct i2c_client *i2c)
2717 {
2718         struct rt5640_priv *rt5640 = i2c_get_clientdata(i2c);
2719
2720         mutex_lock(&rt5640->lock);
2721
2722         if (i2c->irq)
2723                 disable_irq(i2c->irq);
2724         rt5640->shutdown_complete = 1;
2725
2726         mutex_unlock(&rt5640->lock);
2727 }
2728
2729 struct i2c_driver rt5640_i2c_driver = {
2730         .driver = {
2731                 .name = "rt5640",
2732                 .owner = THIS_MODULE,
2733         },
2734         .probe = rt5640_i2c_probe,
2735         .remove   = __devexit_p(rt5640_i2c_remove),
2736         .id_table = rt5640_i2c_id,
2737         .shutdown = rt5640_i2c_shutdown,
2738 };
2739
2740 static int __init rt5640_modinit(void)
2741 {
2742         return i2c_add_driver(&rt5640_i2c_driver);
2743 }
2744 module_init(rt5640_modinit);
2745
2746 static void __exit rt5640_modexit(void)
2747 {
2748         i2c_del_driver(&rt5640_i2c_driver);
2749 }
2750 module_exit(rt5640_modexit);
2751
2752 MODULE_DESCRIPTION("ASoC RT5640 driver");
2753 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2754 MODULE_LICENSE("GPL");