asoc: codecs: rt5639/40: Fix false Headset detection
[linux-2.6.git] / sound / soc / codecs / rt5640.c
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 #include "rt5640.h"
28 #if (CONFIG_SND_SOC_RT5642_MODULE | CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
30 #endif
31
32 #define RT5640_DEMO 1
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35
36 #ifdef RT5640_DEMO
37 struct rt5640_init_reg {
38         u8 reg;
39         u16 val;
40 };
41
42 static struct rt5640_init_reg init_list[] = {
43         {RT5640_DUMMY1          , 0x3701},/*fa[12:13] = 1'b;fa[8~10]=1;fa[0]=1*/
44         {RT5640_DEPOP_M1        , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
45         {RT5640_DEPOP_M2        , 0x3100},/* 8f[13] = 1'b */
46         {RT5640_ADDA_CLK1       , 0x1114},/* 73[2] = 1'b  */
47         {RT5640_MICBIAS         , 0x3030},/* 93[5:4] = 11'b */
48         {RT5640_PRIV_INDEX      , 0x003d},/* PR3d[12] = 1'b */
49         {RT5640_PRIV_DATA       , 0x3600},
50         {RT5640_CLS_D_OUT       , 0xa000},/* 8d[11] = 0'b */
51         {RT5640_PRIV_INDEX      , 0x001c},/* PR1c = 0D21'h */
52         {RT5640_PRIV_DATA       , 0x0D21},
53         {RT5640_PRIV_INDEX      , 0x001b},/* PR1B = 0D21'h */
54         {RT5640_PRIV_DATA       , 0x0000},
55         {RT5640_PRIV_INDEX      , 0x0012},/* PR12 = 0aa8'h */
56         {RT5640_PRIV_DATA       , 0x0aa8},
57         {RT5640_PRIV_INDEX      , 0x0014},/* PR14 = 0aaa'h */
58         {RT5640_PRIV_DATA       , 0x0aaa},
59         {RT5640_PRIV_INDEX      , 0x0020},/* PR20 = 6110'h */
60         {RT5640_PRIV_DATA       , 0x6110},
61         {RT5640_PRIV_INDEX      , 0x0021},/* PR21 = e0e0'h */
62         {RT5640_PRIV_DATA       , 0xe0e0},
63         {RT5640_PRIV_INDEX      , 0x0023},/* PR23 = 1804'h */
64         {RT5640_PRIV_DATA       , 0x1804},
65         /*playback*/
66         {RT5640_STO_DAC_MIXER   , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
67         {RT5640_OUT_L3_MIXER    , 0x01fe},/*DACL1 -> OUTMIXL*/
68         {RT5640_OUT_R3_MIXER    , 0x01fe},/*DACR1 -> OUTMIXR */
69         {RT5640_HP_VOL          , 0x8888},/* OUTMIX -> HPVOL */
70         {RT5640_HPO_MIXER       , 0xc000},/* HPVOL -> HPOLMIX */
71 /*      {RT5640_HPO_MIXER       , 0xa000},// DAC1 -> HPOLMIX   */
72         {RT5640_SPK_L_MIXER     , 0x0036},/* DACL1 -> SPKMIXL */
73         {RT5640_SPK_R_MIXER     , 0x0036},/* DACR1 -> SPKMIXR */
74         {RT5640_SPK_VOL         , 0x8888},/* SPKMIX -> SPKVOL */
75         {RT5640_SPO_L_MIXER     , 0xe800},/* SPKVOLL -> SPOLMIX */
76         {RT5640_SPO_R_MIXER     , 0x2800},/* SPKVOLR -> SPORMIX */
77 /*      {RT5640_SPO_L_MIXER     , 0xb800},//DAC -> SPOLMIX */
78 /*      {RT5640_SPO_R_MIXER     , 0x1800},//DAC -> SPORMIX */
79 /*      {RT5640_I2S1_SDP        , 0xD000},//change IIS1 and IIS2 */
80         /*record*/
81         {RT5640_IN1_IN2         , 0x5080},/*IN1 boost 40db & differential mode*/
82         {RT5640_IN3_IN4         , 0x0500},/*IN2 boost 40db & signal ended mode*/
83         {RT5640_REC_L2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXL */
84         {RT5640_REC_R2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXR */
85 /*      {RT5640_REC_L2_MIXER    , 0x006f},//Mic2 -> RECMIXL */
86 /*      {RT5640_REC_R2_MIXER    , 0x006f},//Mic2 -> RECMIXR */
87         {RT5640_STO_ADC_MIXER   , 0x3020},/* ADC -> Sto ADC mixer */
88
89 #if RT5640_DET_EXT_MIC
90         {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
91         {RT5640_GPIO_CTRL1      , 0x8400},/* set GPIO1 to IRQ */
92         {RT5640_GPIO_CTRL3      , 0x0004},/* set GPIO1 output */
93         {RT5640_IRQ_CTRL2       , 0x8000},/*set MICBIAS short current to IRQ */
94                                         /*( if sticky set regBE : 8800 ) */
95 #endif
96
97 };
98 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
99
100 static int rt5640_reg_init(struct snd_soc_codec *codec)
101 {
102         int i;
103         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
104                 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
105         return 0;
106 }
107 #endif
108
109 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
110         [RT5640_RESET] = 0x000c,
111         [RT5640_SPK_VOL] = 0xc8c8,
112         [RT5640_HP_VOL] = 0xc8c8,
113         [RT5640_OUTPUT] = 0xc8c8,
114         [RT5640_MONO_OUT] = 0x8000,
115         [RT5640_INL_INR_VOL] = 0x0808,
116         [RT5640_DAC1_DIG_VOL] = 0xafaf,
117         [RT5640_DAC2_DIG_VOL] = 0xafaf,
118         [RT5640_ADC_DIG_VOL] = 0x2f2f,
119         [RT5640_ADC_DATA] = 0x2f2f,
120         [RT5640_STO_ADC_MIXER] = 0x7060,
121         [RT5640_MONO_ADC_MIXER] = 0x7070,
122         [RT5640_AD_DA_MIXER] = 0x8080,
123         [RT5640_STO_DAC_MIXER] = 0x5454,
124         [RT5640_MONO_DAC_MIXER] = 0x5454,
125         [RT5640_DIG_MIXER] = 0xaa00,
126         [RT5640_DSP_PATH2] = 0xa000,
127         [RT5640_REC_L2_MIXER] = 0x007f,
128         [RT5640_REC_R2_MIXER] = 0x007f,
129         [RT5640_HPO_MIXER] = 0xe000,
130         [RT5640_SPK_L_MIXER] = 0x003e,
131         [RT5640_SPK_R_MIXER] = 0x003e,
132         [RT5640_SPO_L_MIXER] = 0xf800,
133         [RT5640_SPO_R_MIXER] = 0x3800,
134         [RT5640_SPO_CLSD_RATIO] = 0x0004,
135         [RT5640_MONO_MIXER] = 0xfc00,
136         [RT5640_OUT_L3_MIXER] = 0x01ff,
137         [RT5640_OUT_R3_MIXER] = 0x01ff,
138         [RT5640_LOUT_MIXER] = 0xf000,
139         [RT5640_PWR_ANLG1] = 0x00c0,
140         [RT5640_I2S1_SDP] = 0x8000,
141         [RT5640_I2S2_SDP] = 0x8000,
142         [RT5640_I2S3_SDP] = 0x8000,
143         [RT5640_ADDA_CLK1] = 0x1110,
144         [RT5640_ADDA_CLK2] = 0x0c00,
145         [RT5640_DMIC] = 0x1d00,
146         [RT5640_ASRC_3] = 0x0008,
147         [RT5640_HP_OVCD] = 0x0600,
148         [RT5640_CLS_D_OVCD] = 0x0228,
149         [RT5640_CLS_D_OUT] = 0xa800,
150         [RT5640_DEPOP_M1] = 0x0004,
151         [RT5640_DEPOP_M2] = 0x1100,
152         [RT5640_DEPOP_M3] = 0x0646,
153         [RT5640_CHARGE_PUMP] = 0x0c00,
154         [RT5640_MICBIAS] = 0x3000,
155         [RT5640_EQ_CTRL1] = 0x2080,
156         [RT5640_DRC_AGC_1] = 0x2206,
157         [RT5640_DRC_AGC_2] = 0x1f00,
158         [RT5640_ANC_CTRL1] = 0x034b,
159         [RT5640_ANC_CTRL2] = 0x0066,
160         [RT5640_ANC_CTRL3] = 0x000b,
161         [RT5640_GPIO_CTRL1] = 0x0400,
162         [RT5640_DSP_CTRL3] = 0x2000,
163         [RT5640_BASE_BACK] = 0x0013,
164         [RT5640_MP3_PLUS1] = 0x0680,
165         [RT5640_MP3_PLUS2] = 0x1c17,
166         [RT5640_3D_HP] = 0x8c00,
167         [RT5640_ADJ_HPF] = 0x2a20,
168         [RT5640_HP_CALIB_AMP_DET] = 0x0400,
169         [RT5640_SV_ZCD1] = 0x0809,
170         [RT5640_VENDOR_ID1] = 0x10ec,
171         [RT5640_VENDOR_ID2] = 0x6231,
172 };
173
174 static int rt5640_reset(struct snd_soc_codec *codec)
175 {
176         return snd_soc_write(codec, RT5640_RESET, 0);
177 }
178
179 /**
180  * rt5640_index_write - Write private register.
181  * @codec: SoC audio codec device.
182  * @reg: Private register index.
183  * @value: Private register Data.
184  *
185  * Modify private register for advanced setting. It can be written through
186  * private index (0x6a) and data (0x6c) register.
187  *
188  * Returns 0 for success or negative error code.
189  */
190 static int rt5640_index_write(struct snd_soc_codec *codec,
191                 unsigned int reg, unsigned int value)
192 {
193         int ret;
194
195         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
196         if (ret < 0) {
197                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
198                 goto err;
199         }
200         ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
201         if (ret < 0) {
202                 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
203                 goto err;
204         }
205         return 0;
206
207 err:
208         return ret;
209 }
210
211 /**
212  * rt5640_index_read - Read private register.
213  * @codec: SoC audio codec device.
214  * @reg: Private register index.
215  *
216  * Read advanced setting from private register. It can be read through
217  * private index (0x6a) and data (0x6c) register.
218  *
219  * Returns private register value or negative error code.
220  */
221 static unsigned int rt5640_index_read(
222         struct snd_soc_codec *codec, unsigned int reg)
223 {
224         int ret;
225
226         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
227         if (ret < 0) {
228                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
229                 return ret;
230         }
231         return snd_soc_read(codec, RT5640_PRIV_DATA);
232 }
233
234 /**
235  * rt5640_index_update_bits - update private register bits
236  * @codec: audio codec
237  * @reg: Private register index.
238  * @mask: register mask
239  * @value: new value
240  *
241  * Writes new register value.
242  *
243  * Returns 1 for change, 0 for no change, or negative error code.
244  */
245 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
246         unsigned int reg, unsigned int mask, unsigned int value)
247 {
248         unsigned int old, new;
249         int change, ret;
250
251         ret = rt5640_index_read(codec, reg);
252         if (ret < 0) {
253                 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
254                 goto err;
255         }
256
257         old = ret;
258         new = (old & ~mask) | (value & mask);
259         change = old != new;
260         if (change) {
261                 ret = rt5640_index_write(codec, reg, new);
262                 if (ret < 0) {
263                         dev_err(codec->dev,
264                                 "Failed to write private reg: %d\n", ret);
265                         goto err;
266                 }
267         }
268         return change;
269
270 err:
271         return ret;
272 }
273
274 static int rt5640_volatile_register(
275         struct snd_soc_codec *codec, unsigned int reg)
276 {
277         switch (reg) {
278         case RT5640_RESET:
279         case RT5640_PRIV_DATA:
280         case RT5640_ASRC_5:
281         case RT5640_EQ_CTRL1:
282         case RT5640_DRC_AGC_1:
283         case RT5640_ANC_CTRL1:
284         case RT5640_IRQ_CTRL2:
285         case RT5640_INT_IRQ_ST:
286         case RT5640_DSP_CTRL2:
287         case RT5640_DSP_CTRL3:
288         case RT5640_PGM_REG_ARR1:
289         case RT5640_PGM_REG_ARR3:
290                 return 1;
291         default:
292                 return 0;
293         }
294 }
295
296 static int rt5640_readable_register(
297         struct snd_soc_codec *codec, unsigned int reg)
298 {
299         switch (reg) {
300         case RT5640_RESET:
301         case RT5640_SPK_VOL:
302         case RT5640_HP_VOL:
303         case RT5640_OUTPUT:
304         case RT5640_MONO_OUT:
305         case RT5640_IN1_IN2:
306         case RT5640_IN3_IN4:
307         case RT5640_INL_INR_VOL:
308         case RT5640_DAC1_DIG_VOL:
309         case RT5640_DAC2_DIG_VOL:
310         case RT5640_DAC2_CTRL:
311         case RT5640_ADC_DIG_VOL:
312         case RT5640_ADC_DATA:
313         case RT5640_ADC_BST_VOL:
314         case RT5640_STO_ADC_MIXER:
315         case RT5640_MONO_ADC_MIXER:
316         case RT5640_AD_DA_MIXER:
317         case RT5640_STO_DAC_MIXER:
318         case RT5640_MONO_DAC_MIXER:
319         case RT5640_DIG_MIXER:
320         case RT5640_DSP_PATH1:
321         case RT5640_DSP_PATH2:
322         case RT5640_DIG_INF_DATA:
323         case RT5640_REC_L1_MIXER:
324         case RT5640_REC_L2_MIXER:
325         case RT5640_REC_R1_MIXER:
326         case RT5640_REC_R2_MIXER:
327         case RT5640_HPO_MIXER:
328         case RT5640_SPK_L_MIXER:
329         case RT5640_SPK_R_MIXER:
330         case RT5640_SPO_L_MIXER:
331         case RT5640_SPO_R_MIXER:
332         case RT5640_SPO_CLSD_RATIO:
333         case RT5640_MONO_MIXER:
334         case RT5640_OUT_L1_MIXER:
335         case RT5640_OUT_L2_MIXER:
336         case RT5640_OUT_L3_MIXER:
337         case RT5640_OUT_R1_MIXER:
338         case RT5640_OUT_R2_MIXER:
339         case RT5640_OUT_R3_MIXER:
340         case RT5640_LOUT_MIXER:
341         case RT5640_PWR_DIG1:
342         case RT5640_PWR_DIG2:
343         case RT5640_PWR_ANLG1:
344         case RT5640_PWR_ANLG2:
345         case RT5640_PWR_MIXER:
346         case RT5640_PWR_VOL:
347         case RT5640_PRIV_INDEX:
348         case RT5640_PRIV_DATA:
349         case RT5640_I2S1_SDP:
350         case RT5640_I2S2_SDP:
351         case RT5640_I2S3_SDP:
352         case RT5640_ADDA_CLK1:
353         case RT5640_ADDA_CLK2:
354         case RT5640_DMIC:
355         case RT5640_GLB_CLK:
356         case RT5640_PLL_CTRL1:
357         case RT5640_PLL_CTRL2:
358         case RT5640_ASRC_1:
359         case RT5640_ASRC_2:
360         case RT5640_ASRC_3:
361         case RT5640_ASRC_4:
362         case RT5640_ASRC_5:
363         case RT5640_HP_OVCD:
364         case RT5640_CLS_D_OVCD:
365         case RT5640_CLS_D_OUT:
366         case RT5640_DEPOP_M1:
367         case RT5640_DEPOP_M2:
368         case RT5640_DEPOP_M3:
369         case RT5640_CHARGE_PUMP:
370         case RT5640_PV_DET_SPK_G:
371         case RT5640_MICBIAS:
372         case RT5640_EQ_CTRL1:
373         case RT5640_EQ_CTRL2:
374         case RT5640_WIND_FILTER:
375         case RT5640_DRC_AGC_1:
376         case RT5640_DRC_AGC_2:
377         case RT5640_DRC_AGC_3:
378         case RT5640_SVOL_ZC:
379         case RT5640_ANC_CTRL1:
380         case RT5640_ANC_CTRL2:
381         case RT5640_ANC_CTRL3:
382         case RT5640_JD_CTRL:
383         case RT5640_ANC_JD:
384         case RT5640_IRQ_CTRL1:
385         case RT5640_IRQ_CTRL2:
386         case RT5640_INT_IRQ_ST:
387         case RT5640_GPIO_CTRL1:
388         case RT5640_GPIO_CTRL2:
389         case RT5640_GPIO_CTRL3:
390         case RT5640_DSP_CTRL1:
391         case RT5640_DSP_CTRL2:
392         case RT5640_DSP_CTRL3:
393         case RT5640_DSP_CTRL4:
394         case RT5640_PGM_REG_ARR1:
395         case RT5640_PGM_REG_ARR2:
396         case RT5640_PGM_REG_ARR3:
397         case RT5640_PGM_REG_ARR4:
398         case RT5640_PGM_REG_ARR5:
399         case RT5640_SCB_FUNC:
400         case RT5640_SCB_CTRL:
401         case RT5640_BASE_BACK:
402         case RT5640_MP3_PLUS1:
403         case RT5640_MP3_PLUS2:
404         case RT5640_3D_HP:
405         case RT5640_ADJ_HPF:
406         case RT5640_HP_CALIB_AMP_DET:
407         case RT5640_HP_CALIB2:
408         case RT5640_SV_ZCD1:
409         case RT5640_SV_ZCD2:
410         case RT5640_DUMMY1:
411         case RT5640_DUMMY2:
412         case RT5640_DUMMY3:
413         case RT5640_VENDOR_ID:
414         case RT5640_VENDOR_ID1:
415         case RT5640_VENDOR_ID2:
416                 return 1;
417         default:
418                 return 0;
419         }
420 }
421
422 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
423 {
424         int jack_type;
425         int sclk_src;
426
427         if (jack_insert) {
428                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
429                         snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
430                         snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
431                         snd_soc_write(codec, RT5640_DUMMY1 , 0x3701);
432                 }
433                 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
434                         RT5640_SCLK_SRC_MASK;
435                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
436                         RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
437                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
438                         RT5640_PWR_LDO2, RT5640_PWR_LDO2);
439                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
440                         RT5640_PWR_MB1, RT5640_PWR_MB1);
441                 snd_soc_update_bits(codec, RT5640_MICBIAS,
442                         RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
443                         RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
444                         RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
445                         RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
446                 snd_soc_update_bits(codec, RT5640_DUMMY1,
447                         0x1, 0x1);
448                 msleep(100);
449                 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
450                         jack_type = RT5640_HEADPHO_DET;
451                 else
452                         jack_type = RT5640_HEADSET_DET;
453                 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
454                         RT5640_MB1_OC_CLR, 0);
455                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
456                         RT5640_SCLK_SRC_MASK, sclk_src);
457         } else {
458                 snd_soc_update_bits(codec, RT5640_MICBIAS,
459                         RT5640_MIC1_OVCD_MASK,
460                         RT5640_MIC1_OVCD_DIS);
461
462                 jack_type = RT5640_NO_JACK;
463         }
464
465         return jack_type;
466 }
467 EXPORT_SYMBOL(rt5640_headset_detect);
468
469 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
470 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
471 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
472 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
473 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
474
475 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
476 static unsigned int bst_tlv[] = {
477         TLV_DB_RANGE_HEAD(7),
478         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
479         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
480         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
481         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
482         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
483         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
484         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
485 };
486
487 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
488                 struct snd_ctl_elem_value *ucontrol)
489 {
490         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
491         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
492
493         ucontrol->value.integer.value[0] = rt5640->dmic_en;
494
495         return 0;
496 }
497
498 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
499                 struct snd_ctl_elem_value *ucontrol)
500 {
501         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
502         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
503
504         if (rt5640->dmic_en == ucontrol->value.integer.value[0])
505                 return 0;
506
507         rt5640->dmic_en = ucontrol->value.integer.value[0];
508         switch (rt5640->dmic_en) {
509         case RT5640_DMIC_DIS:
510                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
511                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
512                         RT5640_GP4_PIN_MASK,
513                         RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
514                         RT5640_GP4_PIN_GPIO4);
515                 snd_soc_update_bits(codec, RT5640_DMIC,
516                         RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
517                         RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
518                 snd_soc_update_bits(codec, RT5640_DMIC,
519                         RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
520                         RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
521                 break;
522
523         case RT5640_DMIC1:
524                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
525                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
526                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
527                 snd_soc_update_bits(codec, RT5640_DMIC,
528                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
529                         RT5640_DMIC_1_DP_MASK,
530                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
531                         RT5640_DMIC_1_DP_IN1P);
532                 snd_soc_update_bits(codec, RT5640_DMIC,
533                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
534                 break;
535
536         case RT5640_DMIC2:
537                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
538                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
539                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
540                 snd_soc_update_bits(codec, RT5640_DMIC,
541                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
542                         RT5640_DMIC_2_DP_MASK,
543                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
544                         RT5640_DMIC_2_DP_IN1N);
545                 snd_soc_update_bits(codec, RT5640_DMIC,
546                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
547                 break;
548
549         default:
550                 return -EINVAL;
551         }
552
553         return 0;
554 }
555
556
557 /* IN1/IN2 Input Type */
558 static const char *rt5640_input_mode[] = {
559         "Single ended", "Differential"};
560
561 static const SOC_ENUM_SINGLE_DECL(
562         rt5640_in1_mode_enum, RT5640_IN1_IN2,
563         RT5640_IN_SFT1, rt5640_input_mode);
564
565 static const SOC_ENUM_SINGLE_DECL(
566         rt5640_in2_mode_enum, RT5640_IN3_IN4,
567         RT5640_IN_SFT2, rt5640_input_mode);
568
569 /* Interface data select */
570 static const char *rt5640_data_select[] = {
571         "Normal", "left copy to right", "right copy to left", "Swap"};
572
573 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
574                                 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
575
576 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
577                                 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
578
579 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
580                                 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
581
582 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
583                                 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
584
585 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
586                                 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
587
588 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
589                                 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
590
591 /* Class D speaker gain ratio */
592 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
593         "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
594
595 static const SOC_ENUM_SINGLE_DECL(
596         rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
597         RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
598
599 /* DMIC */
600 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
601
602 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
603
604
605
606 #ifdef RT5640_REG_RW
607 #define REGVAL_MAX 0xffff
608 static unsigned int regctl_addr;
609 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
610                         struct snd_ctl_elem_info *uinfo) {
611         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
612         uinfo->count = 2;
613         uinfo->value.integer.min = 0;
614         uinfo->value.integer.max = REGVAL_MAX;
615         return 0;
616 }
617
618 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
619                         struct snd_ctl_elem_value *ucontrol)
620 {
621         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
622         ucontrol->value.integer.value[0] = regctl_addr;
623         ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
624         return 0;
625 }
626
627 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
628                         struct snd_ctl_elem_value *ucontrol)
629 {
630         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
631         regctl_addr = ucontrol->value.integer.value[0];
632         if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
633                 snd_soc_write(codec, regctl_addr,
634                 ucontrol->value.integer.value[1]);
635         return 0;
636 }
637 #endif
638
639
640 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
641 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
642
643 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
644                 struct snd_ctl_elem_value *ucontrol)
645 {
646         struct soc_mixer_control *mc =
647                 (struct soc_mixer_control *)kcontrol->private_value;
648         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
649         unsigned int val = snd_soc_read(codec, mc->reg);
650
651         ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
652                 ((val & RT5640_L_VOL_MASK) >> mc->shift);
653         ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
654                 (val & RT5640_R_VOL_MASK);
655
656         return 0;
657 }
658
659 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
660                 struct snd_ctl_elem_value *ucontrol)
661 {
662         struct soc_mixer_control *mc =
663                 (struct soc_mixer_control *)kcontrol->private_value;
664         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
665         unsigned int val, val2;
666
667         val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
668         val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
669         return snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
670                         RT5640_R_VOL_MASK, val << mc->shift | val2);
671 }
672
673
674 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
675         /* Speaker Output Volume */
676         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
677                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
678                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
679
680         /* Headphone Output Volume */
681         SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
682                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
683
684         SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
685                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
686                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
687
688         /* OUTPUT Control */
689         SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
690                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
691         SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
692                 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
693         SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
694                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
695         /* MONO Output Control */
696         SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
697                                 RT5640_L_MUTE_SFT, 1, 1),
698         /* DAC Digital Volume */
699         SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
700                 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
701         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
702                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
703                         175, 0, dac_vol_tlv),
704         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
705                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
706                         175, 0, dac_vol_tlv),
707         /* IN1/IN2 Control */
708         SOC_ENUM("IN1 Mode Control",  rt5640_in1_mode_enum),
709         SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
710                 RT5640_BST_SFT1, 8, 0, bst_tlv),
711         SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
712         SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
713                 RT5640_BST_SFT2, 8, 0, bst_tlv),
714         /* INL/INR Volume Control */
715         SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
716                         RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
717                         31, 1, in_vol_tlv),
718         /* ADC Digital Volume Control */
719         SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
720                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
721         SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
722                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
723                         127, 0, adc_vol_tlv),
724         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
725                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
726                         127, 0, adc_vol_tlv),
727         /* ADC Boost Volume Control */
728         SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
729                         RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
730                         3, 0, adc_bst_tlv),
731         /* Class D speaker gain ratio */
732         SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
733         /* DMIC */
734         SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
735                 rt5640_dmic_get, rt5640_dmic_put),
736
737 #ifdef RT5640_REG_RW
738         {
739                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
740                 .name = "Register Control",
741                 .info = rt5640_regctl_info,
742                 .get = rt5640_regctl_get,
743                 .put = rt5640_regctl_put,
744         },
745 #endif
746 };
747
748 /**
749  * set_dmic_clk - Set parameter of dmic.
750  *
751  * @w: DAPM widget.
752  * @kcontrol: The kcontrol of this widget.
753  * @event: Event id.
754  *
755  * Choose dmic clock between 1MHz and 3MHz.
756  * It is better for clock to approximate 3MHz.
757  */
758 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
759         struct snd_kcontrol *kcontrol, int event)
760 {
761         struct snd_soc_codec *codec = w->codec;
762         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
763         int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
764
765         rate = rt5640->lrck[rt5640->aif_pu] << 8;
766         red = 3000000 * 12;
767         for (i = 0; i < ARRAY_SIZE(div); i++) {
768                 bound = div[i] * 3000000;
769                 if (rate > bound)
770                         continue;
771                 temp = bound - rate;
772                 if (temp < red) {
773                         red = temp;
774                         idx = i;
775                 }
776         }
777         if (idx < 0)
778                 dev_err(codec->dev, "Failed to set DMIC clock\n");
779         else
780                 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
781                                         idx << RT5640_DMIC_CLK_SFT);
782         return idx;
783 }
784
785 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
786                          struct snd_soc_dapm_widget *sink)
787 {
788         unsigned int val;
789
790         val = snd_soc_read(source->codec, RT5640_GLB_CLK);
791         val &= RT5640_SCLK_SRC_MASK;
792         if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
793                 return 1;
794         else
795                 return 0;
796 }
797
798 /* Digital Mixer */
799 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
800         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
801                         RT5640_M_ADC_L1_SFT, 1, 1),
802         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
803                         RT5640_M_ADC_L2_SFT, 1, 1),
804 };
805
806 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
807         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
808                         RT5640_M_ADC_R1_SFT, 1, 1),
809         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
810                         RT5640_M_ADC_R2_SFT, 1, 1),
811 };
812
813 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
814         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
815                         RT5640_M_MONO_ADC_L1_SFT, 1, 1),
816         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
817                         RT5640_M_MONO_ADC_L2_SFT, 1, 1),
818 };
819
820 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
821         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
822                         RT5640_M_MONO_ADC_R1_SFT, 1, 1),
823         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
824                         RT5640_M_MONO_ADC_R2_SFT, 1, 1),
825 };
826
827 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
828         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
829                         RT5640_M_ADCMIX_L_SFT, 1, 1),
830         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
831                         RT5640_M_IF1_DAC_L_SFT, 1, 1),
832 };
833
834 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
835         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
836                         RT5640_M_ADCMIX_R_SFT, 1, 1),
837         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
838                         RT5640_M_IF1_DAC_R_SFT, 1, 1),
839 };
840
841 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
842         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
843                         RT5640_M_DAC_L1_SFT, 1, 1),
844         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
845                         RT5640_M_DAC_L2_SFT, 1, 1),
846         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
847                         RT5640_M_ANC_DAC_L_SFT, 1, 1),
848 };
849
850 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
851         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
852                         RT5640_M_DAC_R1_SFT, 1, 1),
853         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
854                         RT5640_M_DAC_R2_SFT, 1, 1),
855         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
856                         RT5640_M_ANC_DAC_R_SFT, 1, 1),
857 };
858
859 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
860         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
861                         RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
862         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
863                         RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
864         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
865                         RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
866 };
867
868 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
869         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
870                         RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
871         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
872                         RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
873         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
874                         RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
875 };
876
877 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
878         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
879                         RT5640_M_STO_L_DAC_L_SFT, 1, 1),
880         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
881                         RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
882 };
883
884 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
885         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
886                         RT5640_M_STO_R_DAC_R_SFT, 1, 1),
887         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
888                         RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
889 };
890
891 /* Analog Input Mixer */
892 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
893         SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
894                         RT5640_M_HP_L_RM_L_SFT, 1, 1),
895         SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
896                         RT5640_M_IN_L_RM_L_SFT, 1, 1),
897         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
898                         RT5640_M_BST4_RM_L_SFT, 1, 1),
899         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
900                         RT5640_M_BST1_RM_L_SFT, 1, 1),
901         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
902                         RT5640_M_OM_L_RM_L_SFT, 1, 1),
903 };
904
905 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
906         SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
907                         RT5640_M_HP_R_RM_R_SFT, 1, 1),
908         SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
909                         RT5640_M_IN_R_RM_R_SFT, 1, 1),
910         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
911                         RT5640_M_BST4_RM_R_SFT, 1, 1),
912         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
913                         RT5640_M_BST1_RM_R_SFT, 1, 1),
914         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
915                         RT5640_M_OM_R_RM_R_SFT, 1, 1),
916 };
917
918 /* Analog Output Mixer */
919 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
920         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
921                         RT5640_M_RM_L_SM_L_SFT, 1, 1),
922         SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
923                         RT5640_M_IN_L_SM_L_SFT, 1, 1),
924         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
925                         RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
926         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
927                         RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
928         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
929                         RT5640_M_OM_L_SM_L_SFT, 1, 1),
930 };
931
932 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
933         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
934                         RT5640_M_RM_R_SM_R_SFT, 1, 1),
935         SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
936                         RT5640_M_IN_R_SM_R_SFT, 1, 1),
937         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
938                         RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
939         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
940                         RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
941         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
942                         RT5640_M_OM_R_SM_R_SFT, 1, 1),
943 };
944
945 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
946         SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
947                         RT5640_M_SM_L_OM_L_SFT, 1, 1),
948         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
949                         RT5640_M_BST1_OM_L_SFT, 1, 1),
950         SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
951                         RT5640_M_IN_L_OM_L_SFT, 1, 1),
952         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
953                         RT5640_M_RM_L_OM_L_SFT, 1, 1),
954         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
955                         RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
956         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
957                         RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
958         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
959                         RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
960 };
961
962 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
963         SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
964                         RT5640_M_SM_L_OM_R_SFT, 1, 1),
965         SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
966                         RT5640_M_BST4_OM_R_SFT, 1, 1),
967         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
968                         RT5640_M_BST1_OM_R_SFT, 1, 1),
969         SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
970                         RT5640_M_IN_R_OM_R_SFT, 1, 1),
971         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
972                         RT5640_M_RM_R_OM_R_SFT, 1, 1),
973         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
974                         RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
975         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
976                         RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
977         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
978                         RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
979 };
980
981 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
982         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
983                         RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
984         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
985                         RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
986         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
987                         RT5640_M_SV_R_SPM_L_SFT, 1, 1),
988         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
989                         RT5640_M_SV_L_SPM_L_SFT, 1, 1),
990         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
991                         RT5640_M_BST1_SPM_L_SFT, 1, 1),
992 };
993
994 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
995         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
996                         RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
997         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
998                         RT5640_M_SV_R_SPM_R_SFT, 1, 1),
999         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1000                         RT5640_M_BST1_SPM_R_SFT, 1, 1),
1001 };
1002
1003 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1004         SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1005                         RT5640_M_DAC2_HM_SFT, 1, 1),
1006         SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1007                         RT5640_M_DAC1_HM_SFT, 1, 1),
1008         SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1009                         RT5640_M_HPVOL_HM_SFT, 1, 1),
1010 };
1011
1012 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1013         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1014                         RT5640_M_DAC_L1_LM_SFT, 1, 1),
1015         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1016                         RT5640_M_DAC_R1_LM_SFT, 1, 1),
1017         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1018                         RT5640_M_OV_L_LM_SFT, 1, 1),
1019         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1020                         RT5640_M_OV_R_LM_SFT, 1, 1),
1021 };
1022
1023 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1024         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1025                         RT5640_M_DAC_R2_MM_SFT, 1, 1),
1026         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1027                         RT5640_M_DAC_L2_MM_SFT, 1, 1),
1028         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1029                         RT5640_M_OV_R_MM_SFT, 1, 1),
1030         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1031                         RT5640_M_OV_L_MM_SFT, 1, 1),
1032         SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1033                         RT5640_M_BST1_MM_SFT, 1, 1),
1034 };
1035
1036 /* INL/R source */
1037 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1038
1039 static const SOC_ENUM_SINGLE_DECL(
1040         rt5640_inl_enum, RT5640_INL_INR_VOL,
1041         RT5640_INL_SEL_SFT, rt5640_inl_src);
1042
1043 static const struct snd_kcontrol_new rt5640_inl_mux =
1044         SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1045
1046 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1047
1048 static const SOC_ENUM_SINGLE_DECL(
1049         rt5640_inr_enum, RT5640_INL_INR_VOL,
1050         RT5640_INR_SEL_SFT, rt5640_inr_src);
1051
1052 static const struct snd_kcontrol_new rt5640_inr_mux =
1053         SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1054
1055 /* Stereo ADC source */
1056 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1057
1058 static const SOC_ENUM_SINGLE_DECL(
1059         rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1060         RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1061
1062 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1063         SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1064
1065 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1066         SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1067
1068 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1069
1070 static const SOC_ENUM_SINGLE_DECL(
1071         rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1072         RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1073
1074 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1075         SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1076
1077 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1078         SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1079
1080 /* Mono ADC source */
1081 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1082
1083 static const SOC_ENUM_SINGLE_DECL(
1084         rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1085         RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1086
1087 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1088         SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1089
1090 static const char *rt5640_mono_adc_l2_src[] = {
1091         "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1092 };
1093
1094 static const SOC_ENUM_SINGLE_DECL(
1095         rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1096         RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1097
1098 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1099         SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1100
1101 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1102
1103 static const SOC_ENUM_SINGLE_DECL(
1104         rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1105         RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1106
1107 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1108         SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1109
1110 static const char *rt5640_mono_adc_r2_src[] = {
1111         "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1112 };
1113
1114 static const SOC_ENUM_SINGLE_DECL(
1115         rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1116         RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1117
1118 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1119         SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1120
1121 /* DAC2 channel source */
1122 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1123
1124 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1125                                 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1126
1127 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1128         SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1129
1130 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1131
1132 static const SOC_ENUM_SINGLE_DECL(
1133         rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1134         RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1135
1136 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1137         SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1138
1139 /* Interface 2  ADC channel source */
1140 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1141
1142 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1143                         RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1144
1145 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1146         SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1147
1148 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1149
1150 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1151                         RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1152
1153 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1154         SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1155
1156 /* digital interface and iis interface map */
1157 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1158         "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1159         "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1160
1161 static const SOC_ENUM_SINGLE_DECL(
1162         rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1163         RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1164
1165 static const struct snd_kcontrol_new rt5640_dai_mux =
1166         SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1167
1168 /* SDI select */
1169 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1170
1171 static const SOC_ENUM_SINGLE_DECL(
1172         rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1173         RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1174
1175 static const struct snd_kcontrol_new rt5640_sdi_mux =
1176         SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1177
1178 static int spk_event(struct snd_soc_dapm_widget *w,
1179         struct snd_kcontrol *kcontrol, int event)
1180 {
1181         struct snd_soc_codec *codec = w->codec;
1182         static unsigned int spkl_out_enable;
1183         static unsigned int spkr_out_enable;
1184
1185         switch (event) {
1186         case SND_SOC_DAPM_POST_PMU:
1187                 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1188                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1189                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1190                 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1191                 break;
1192
1193         case SND_SOC_DAPM_PRE_PMD:
1194                 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1195                 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1196                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1197                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1198                 break;
1199
1200         default:
1201                 return 0;
1202         }
1203         return 0;
1204 }
1205
1206 static int hp_event(struct snd_soc_dapm_widget *w,
1207         struct snd_kcontrol *kcontrol, int event)
1208 {
1209         struct snd_soc_codec *codec = w->codec;
1210         static unsigned int hp_out_enable;
1211
1212         switch (event) {
1213         case SND_SOC_DAPM_POST_PMU:
1214                 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1215                 break;
1216
1217         case SND_SOC_DAPM_PRE_PMD:
1218                 pr_info("hp_event --SND_SOC_DAPM_POST_PMD\n");
1219                 break;
1220
1221         default:
1222                 return 0;
1223         }
1224         return 0;
1225 }
1226
1227 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1228         SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1229                         RT5640_PWR_PLL_BIT, 0, NULL, 0),
1230         /* Input Side */
1231         /* micbias */
1232         SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1233                         RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1234         SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1235                         RT5640_PWR_MB1_BIT, 0),
1236         SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1237                         RT5640_PWR_MB2_BIT, 0),
1238         /* Input Lines */
1239
1240         SND_SOC_DAPM_INPUT("MIC1"),
1241         SND_SOC_DAPM_INPUT("MIC2"),
1242         SND_SOC_DAPM_INPUT("DMIC1"),
1243         SND_SOC_DAPM_INPUT("DMIC2"),
1244         SND_SOC_DAPM_INPUT("IN1P"),
1245         SND_SOC_DAPM_INPUT("IN1N"),
1246         SND_SOC_DAPM_INPUT("IN2P"),
1247         SND_SOC_DAPM_INPUT("IN2N"),
1248         SND_SOC_DAPM_INPUT("DMIC L1"),
1249         SND_SOC_DAPM_INPUT("DMIC R1"),
1250         SND_SOC_DAPM_INPUT("DMIC L2"),
1251         SND_SOC_DAPM_INPUT("DMIC R2"),
1252         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1253                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1254         /* Boost */
1255         SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1256                 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1257         SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1258                 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1259         /* Input Volume */
1260         SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1261                 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1262         SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1263                 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1264         /* IN Mux */
1265         SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1266         SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1267         /* REC Mixer */
1268         SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1269                         rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1270         SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1271                         rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1272         /* ADCs */
1273         SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1274                         RT5640_PWR_ADC_L_BIT, 0),
1275         SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1276                         RT5640_PWR_ADC_R_BIT, 0),
1277         /* ADC Mux */
1278         SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1279                                 &rt5640_sto_adc_l2_mux),
1280         SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1281                                 &rt5640_sto_adc_r2_mux),
1282         SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1283                                 &rt5640_sto_adc_l1_mux),
1284         SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1285                                 &rt5640_sto_adc_r1_mux),
1286         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1287                                 &rt5640_mono_adc_l2_mux),
1288         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1289                                 &rt5640_mono_adc_l1_mux),
1290         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1291                                 &rt5640_mono_adc_r1_mux),
1292         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1293                                 &rt5640_mono_adc_r2_mux),
1294         /* ADC Mixer */
1295         SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1296                 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1297         SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1298                 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1299         SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1300                 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1301         SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1302                 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1303         SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1304                 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1305         SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1306                 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1307         SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1308                 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1309
1310         /* IF2 Mux */
1311         SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1312                                 &rt5640_if2_adc_l_mux),
1313         SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1314                                 &rt5640_if2_adc_r_mux),
1315
1316         /* Digital Interface */
1317         SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1318                 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1319         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1320         SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1321         SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1322         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1323         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1324         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1325         SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1326                 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1327         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1328         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1329         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1330         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1331         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1332         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1333         SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1334                 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1335         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1336         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1337         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1338         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1339         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1340         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1341
1342         /* Digital Interface Select */
1343         SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1344         SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1345         SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1346         SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1347         SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1348
1349         SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1350         SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1351         SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1352         SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1353         SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1354
1355         SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1356         SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1357
1358         /* Audio Interface */
1359         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1360         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1361         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1362         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1363         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1364         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1365
1366         /* Audio DSP */
1367         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1368
1369         /* ANC */
1370         SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1371
1372         /* Output Side */
1373         /* DAC mixer before sound effect  */
1374         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1375                 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1376         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1377                 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1378
1379         /* DAC2 channel Mux */
1380         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1381                                 &rt5640_dac_l2_mux),
1382         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1383                                 &rt5640_dac_r2_mux),
1384
1385         /* DAC Mixer */
1386         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1387                 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1388         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1389                 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1390         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1391                 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1392         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1393                 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1394         SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1395                 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1396         SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1397                 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1398         /* DACs */
1399         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1400                         RT5640_PWR_DAC_L1_BIT, 0),
1401         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1402                         RT5640_PWR_DAC_L2_BIT, 0),
1403         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1404                         RT5640_PWR_DAC_R1_BIT, 0),
1405         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1406                         RT5640_PWR_DAC_R2_BIT, 0),
1407         /* SPK/OUT Mixer */
1408         SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1409                 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1410         SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1411                 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1412         SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1413                 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1414         SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1415                 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1416         /* Ouput Volume */
1417         SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1418                 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1419         SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1420                 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1421         SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1422                 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1423         SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1424                 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1425         SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1426                 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1427         SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1428                 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1429         /* SPO/HPO/LOUT/Mono Mixer */
1430         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1431                 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1432         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1433                 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1434
1435         SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1436                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1437         SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1438                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1439         SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1440                 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1441         SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1442                 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1443
1444         SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1445                 RT5640_PWR_MA_BIT, 0, NULL, 0),
1446
1447         SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1448         SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1449                                         SND_SOC_DAPM_POST_PMU),
1450
1451         SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1452                 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1453
1454         SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1455                 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1456
1457         SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1458                 SND_SOC_NOPM, 0, spk_event,
1459                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1460
1461         /* Output Lines */
1462         SND_SOC_DAPM_OUTPUT("SPOLP"),
1463         SND_SOC_DAPM_OUTPUT("SPOLN"),
1464         SND_SOC_DAPM_OUTPUT("SPORP"),
1465         SND_SOC_DAPM_OUTPUT("SPORN"),
1466         SND_SOC_DAPM_OUTPUT("HPOL"),
1467         SND_SOC_DAPM_OUTPUT("HPOR"),
1468         SND_SOC_DAPM_OUTPUT("LOUTL"),
1469         SND_SOC_DAPM_OUTPUT("LOUTR"),
1470         SND_SOC_DAPM_OUTPUT("MonoP"),
1471         SND_SOC_DAPM_OUTPUT("MonoN"),
1472 };
1473
1474 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1475         {"IN1P", NULL, "LDO2"},
1476         {"IN2P", NULL, "LDO2"},
1477
1478         {"IN1P", NULL, "MIC1"},
1479         {"IN1N", NULL, "MIC1"},
1480         {"IN2P", NULL, "MIC2"},
1481         {"IN2N", NULL, "MIC2"},
1482
1483         {"DMIC L1", NULL, "DMIC1"},
1484         {"DMIC R1", NULL, "DMIC1"},
1485         {"DMIC L2", NULL, "DMIC2"},
1486         {"DMIC R2", NULL, "DMIC2"},
1487
1488         {"BST1", NULL, "IN1P"},
1489         {"BST1", NULL, "IN1N"},
1490         {"BST2", NULL, "IN2P"},
1491         {"BST2", NULL, "IN2N"},
1492
1493         {"INL VOL", NULL, "IN2P"},
1494         {"INR VOL", NULL, "IN2N"},
1495
1496         {"RECMIXL", "HPOL Switch", "HPOL"},
1497         {"RECMIXL", "INL Switch", "INL VOL"},
1498         {"RECMIXL", "BST2 Switch", "BST2"},
1499         {"RECMIXL", "BST1 Switch", "BST1"},
1500         {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1501
1502         {"RECMIXR", "HPOR Switch", "HPOR"},
1503         {"RECMIXR", "INR Switch", "INR VOL"},
1504         {"RECMIXR", "BST2 Switch", "BST2"},
1505         {"RECMIXR", "BST1 Switch", "BST1"},
1506         {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1507
1508         {"ADC L", NULL, "RECMIXL"},
1509         {"ADC R", NULL, "RECMIXR"},
1510
1511         {"DMIC L1", NULL, "DMIC CLK"},
1512         {"DMIC L2", NULL, "DMIC CLK"},
1513
1514         {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1515         {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1516         {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1517         {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1518         {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1519
1520         {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1521         {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1522         {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1523         {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1524         {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1525
1526         {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1527         {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1528         {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1529         {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1530         {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1531
1532         {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1533         {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1534         {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1535         {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1536         {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1537
1538         {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1539         {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1540         {"Stereo ADC MIXL", NULL, "stereo filter"},
1541         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1542
1543         {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1544         {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1545         {"Stereo ADC MIXR", NULL, "stereo filter"},
1546         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1547
1548         {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1549         {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1550         {"Mono ADC MIXL", NULL, "mono left filter"},
1551         {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1552
1553         {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1554         {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1555         {"Mono ADC MIXR", NULL, "mono right filter"},
1556         {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1557
1558         {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1559         {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1560
1561         {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1562         {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1563         {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1564         {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1565         {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1566         {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1567
1568         {"IF1 ADC", NULL, "I2S1"},
1569         {"IF1 ADC", NULL, "IF1 ADC L"},
1570         {"IF1 ADC", NULL, "IF1 ADC R"},
1571         {"IF2 ADC", NULL, "I2S2"},
1572         {"IF2 ADC", NULL, "IF2 ADC L"},
1573         {"IF2 ADC", NULL, "IF2 ADC R"},
1574         {"IF3 ADC", NULL, "I2S3"},
1575         {"IF3 ADC", NULL, "IF3 ADC L"},
1576         {"IF3 ADC", NULL, "IF3 ADC R"},
1577
1578         {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1579         {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1580         {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1581         {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1582         {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1583         {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1584         {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1585         {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1586         {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1587         {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1588
1589         {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1590         {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1591         {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1592         {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1593         {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1594         {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1595         {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1596         {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1597         {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1598         {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1599
1600         {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1601         {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1602         {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1603         {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1604         {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1605         {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1606         {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1607         {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1608
1609         {"AIF1TX", NULL, "DAI1 TX Mux"},
1610         {"AIF1TX", NULL, "SDI1 TX Mux"},
1611         {"AIF2TX", NULL, "DAI2 TX Mux"},
1612         {"AIF2TX", NULL, "SDI2 TX Mux"},
1613         {"AIF3TX", NULL, "DAI3 TX Mux"},
1614
1615         {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1616         {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1617         {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1618         {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1619         {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1620         {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1621         {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1622         {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1623
1624         {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1625         {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1626         {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1627         {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
1628         {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
1629         {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1630         {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
1631         {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
1632
1633         {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
1634         {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
1635         {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
1636         {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
1637         {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
1638         {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
1639         {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
1640         {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
1641
1642         {"IF1 DAC", NULL, "I2S1"},
1643         {"IF1 DAC", NULL, "DAI1 RX Mux"},
1644         {"IF2 DAC", NULL, "I2S2"},
1645         {"IF2 DAC", NULL, "DAI2 RX Mux"},
1646         {"IF3 DAC", NULL, "I2S3"},
1647         {"IF3 DAC", NULL, "DAI3 RX Mux"},
1648
1649         {"IF1 DAC L", NULL, "IF1 DAC"},
1650         {"IF1 DAC R", NULL, "IF1 DAC"},
1651         {"IF2 DAC L", NULL, "IF2 DAC"},
1652         {"IF2 DAC R", NULL, "IF2 DAC"},
1653         {"IF3 DAC L", NULL, "IF3 DAC"},
1654         {"IF3 DAC R", NULL, "IF3 DAC"},
1655
1656         {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1657         {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1658         {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1659         {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1660
1661         {"ANC", NULL, "Stereo ADC MIXL"},
1662         {"ANC", NULL, "Stereo ADC MIXR"},
1663
1664         {"Audio DSP", NULL, "DAC MIXL"},
1665         {"Audio DSP", NULL, "DAC MIXR"},
1666
1667         {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1668         {"DAC L2 Mux", "IF3", "IF3 DAC L"},
1669         {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1670
1671         {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1672         {"DAC R2 Mux", "IF3", "IF3 DAC R"},
1673
1674         {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1675         {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1676         {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1677         {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1678         {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1679         {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1680
1681         {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1682         {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1683         {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1684         {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1685         {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1686         {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1687
1688         {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1689         {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1690         {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1691         {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1692
1693         {"DAC L1", NULL, "Stereo DAC MIXL"},
1694         {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1695         {"DAC R1", NULL, "Stereo DAC MIXR"},
1696         {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1697         {"DAC L2", NULL, "Mono DAC MIXL"},
1698         {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1699         {"DAC R2", NULL, "Mono DAC MIXR"},
1700         {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1701
1702         {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1703         {"SPK MIXL", "INL Switch", "INL VOL"},
1704         {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1705         {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1706         {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1707         {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1708         {"SPK MIXR", "INR Switch", "INR VOL"},
1709         {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1710         {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1711         {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1712
1713         {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1714         {"OUT MIXL", "BST1 Switch", "BST1"},
1715         {"OUT MIXL", "INL Switch", "INL VOL"},
1716         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1717         {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1718         {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1719         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1720
1721         {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1722         {"OUT MIXR", "BST2 Switch", "BST2"},
1723         {"OUT MIXR", "BST1 Switch", "BST1"},
1724         {"OUT MIXR", "INR Switch", "INR VOL"},
1725         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1726         {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1727         {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1728         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1729
1730         {"SPKVOL L", NULL, "SPK MIXL"},
1731         {"SPKVOL R", NULL, "SPK MIXR"},
1732         {"HPOVOL L", NULL, "OUT MIXL"},
1733         {"HPOVOL R", NULL, "OUT MIXR"},
1734         {"OUTVOL L", NULL, "OUT MIXL"},
1735         {"OUTVOL R", NULL, "OUT MIXR"},
1736
1737         {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1738         {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1739         {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1740         {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1741         {"SPOL MIX", "BST1 Switch", "BST1"},
1742         {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1743         {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1744         {"SPOR MIX", "BST1 Switch", "BST1"},
1745
1746         {"HPOL MIX", "DAC2 Switch", "DAC L2"},
1747         {"HPOL MIX", "DAC1 Switch", "DAC L1"},
1748         {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
1749         {"HPOR MIX", "DAC2 Switch", "DAC R2"},
1750         {"HPOR MIX", "DAC1 Switch", "DAC R1"},
1751         {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
1752
1753         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1754         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1755         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1756         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1757
1758         {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1759         {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1760         {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1761         {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1762         {"Mono MIX", "BST1 Switch", "BST1"},
1763
1764         {"HP L amp", NULL, "HPOL MIX"},
1765         {"HP R amp", NULL, "HPOR MIX"},
1766
1767 /*      {"HP L amp", NULL, "Improve HP amp drv"},
1768         {"HP R amp", NULL, "Improve HP amp drv"}, */
1769
1770         {"SPOLP", NULL, "SPOL MIX"},
1771         {"SPOLN", NULL, "SPOL MIX"},
1772         {"SPORP", NULL, "SPOR MIX"},
1773         {"SPORN", NULL, "SPOR MIX"},
1774
1775         {"SPOLP", NULL, "Improve SPK amp drv"},
1776         {"SPOLN", NULL, "Improve SPK amp drv"},
1777         {"SPORP", NULL, "Improve SPK amp drv"},
1778         {"SPORN", NULL, "Improve SPK amp drv"},
1779
1780         {"HPOL", NULL, "Improve HP amp drv"},
1781         {"HPOR", NULL, "Improve HP amp drv"},
1782
1783         {"HPOL", NULL, "HP L amp"},
1784         {"HPOR", NULL, "HP R amp"},
1785         {"LOUTL", NULL, "LOUT MIX"},
1786         {"LOUTR", NULL, "LOUT MIX"},
1787         {"MonoP", NULL, "Mono MIX"},
1788         {"MonoN", NULL, "Mono MIX"},
1789         {"MonoP", NULL, "Improve mono amp drv"},
1790 };
1791
1792 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1793 {
1794         int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
1795
1796         if (codec == NULL)
1797                 return -EINVAL;
1798
1799         val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1800         switch (dai_id) {
1801         case RT5640_AIF1:
1802                 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
1803                         val == RT5640_IF_113)
1804                         ret |= RT5640_U_IF1;
1805                 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
1806                         val == RT5640_IF_113)
1807                         ret |= RT5640_U_IF2;
1808                 if (val == RT5640_IF_321 || val == RT5640_IF_231)
1809                         ret |= RT5640_U_IF3;
1810                 break;
1811
1812         case RT5640_AIF2:
1813                 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
1814                         val == RT5640_IF_223)
1815                         ret |= RT5640_U_IF1;
1816                 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
1817                         val == RT5640_IF_223)
1818                         ret |= RT5640_U_IF2;
1819                 if (val == RT5640_IF_132 || val == RT5640_IF_312)
1820                         ret |= RT5640_U_IF3;
1821                 break;
1822
1823 #if (CONFIG_SND_SOC_RT5643_MODULE | CONFIG_SND_SOC_RT5643 | \
1824                         CONFIG_SND_SOC_RT5646_MODULE | CONFIG_SND_SOC_RT5646)
1825
1826         case RT5640_AIF3:
1827                 if (val == RT5640_IF_312 || val == RT5640_IF_321)
1828                         ret |= RT5640_U_IF1;
1829                 if (val == RT5640_IF_132 || val == RT5640_IF_231)
1830                         ret |= RT5640_U_IF2;
1831                 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
1832                         val == RT5640_IF_113 || val == RT5640_IF_223)
1833                         ret |= RT5640_U_IF3;
1834                 break;
1835 #endif
1836
1837         default:
1838                 ret = -EINVAL;
1839                 break;
1840         }
1841
1842         return ret;
1843 }
1844
1845 static int get_clk_info(int sclk, int rate)
1846 {
1847         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1848
1849         if (sclk <= 0 || rate <= 0)
1850                 return -EINVAL;
1851
1852         rate = rate << 8;
1853         for (i = 0; i < ARRAY_SIZE(pd); i++)
1854                 if (sclk == rate * pd[i])
1855                         return i;
1856
1857         return -EINVAL;
1858 }
1859
1860 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1861         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1862 {
1863         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1864         struct snd_soc_codec *codec = rtd->codec;
1865         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1866         unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1867         int pre_div, bclk_ms, frame_size;
1868
1869         rt5640->lrck[dai->id] = params_rate(params);
1870         pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1871         if (pre_div < 0) {
1872                 dev_err(codec->dev, "Unsupported clock setting\n");
1873                 return -EINVAL;
1874         }
1875         frame_size = snd_soc_params_to_frame_size(params);
1876         if (frame_size < 0) {
1877                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1878                 return -EINVAL;
1879         }
1880         bclk_ms = frame_size > 32 ? 1 : 0;
1881         rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1882
1883         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1884                 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1885         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1886                                 bclk_ms, pre_div, dai->id);
1887
1888         switch (params_format(params)) {
1889         case SNDRV_PCM_FORMAT_S16_LE:
1890                 break;
1891         case SNDRV_PCM_FORMAT_S20_3LE:
1892                 val_len |= RT5640_I2S_DL_20;
1893                 break;
1894         case SNDRV_PCM_FORMAT_S24_LE:
1895                 val_len |= RT5640_I2S_DL_24;
1896                 break;
1897         case SNDRV_PCM_FORMAT_S8:
1898                 val_len |= RT5640_I2S_DL_8;
1899                 break;
1900         default:
1901                 return -EINVAL;
1902         }
1903
1904         dai_sel = get_sdp_info(codec, dai->id);
1905         if (dai_sel < 0) {
1906                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1907                 return -EINVAL;
1908         }
1909         if (dai_sel & RT5640_U_IF1) {
1910                 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1911                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1912                         pre_div << RT5640_I2S_PD1_SFT;
1913                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1914                         RT5640_I2S_DL_MASK, val_len);
1915                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1916         }
1917         if (dai_sel & RT5640_U_IF2) {
1918                 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1919                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1920                         pre_div << RT5640_I2S_PD2_SFT;
1921                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1922                         RT5640_I2S_DL_MASK, val_len);
1923                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1924         }
1925 #if (CONFIG_SND_SOC_RT5643_MODULE | CONFIG_SND_SOC_RT5643 | \
1926                         CONFIG_SND_SOC_RT5646_MODULE | CONFIG_SND_SOC_RT5646)
1927         if (dai_sel & RT5640_U_IF3) {
1928                 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
1929                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
1930                         pre_div << RT5640_I2S_PD3_SFT;
1931                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
1932                         RT5640_I2S_DL_MASK, val_len);
1933                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1934         }
1935 #endif
1936         return 0;
1937 }
1938
1939 static int rt5640_prepare(struct snd_pcm_substream *substream,
1940                                 struct snd_soc_dai *dai)
1941 {
1942         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1943         struct snd_soc_codec *codec = rtd->codec;
1944         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1945
1946         rt5640->aif_pu = dai->id;
1947         return 0;
1948 }
1949
1950 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1951 {
1952         struct snd_soc_codec *codec = dai->codec;
1953         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1954         unsigned int reg_val = 0, dai_sel;
1955
1956         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1957         case SND_SOC_DAIFMT_CBM_CFM:
1958                 rt5640->master[dai->id] = 1;
1959                 break;
1960         case SND_SOC_DAIFMT_CBS_CFS:
1961                 reg_val |= RT5640_I2S_MS_S;
1962                 rt5640->master[dai->id] = 0;
1963                 break;
1964         default:
1965                 return -EINVAL;
1966         }
1967
1968         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1969         case SND_SOC_DAIFMT_NB_NF:
1970                 break;
1971         case SND_SOC_DAIFMT_IB_NF:
1972                 reg_val |= RT5640_I2S_BP_INV;
1973                 break;
1974         default:
1975                 return -EINVAL;
1976         }
1977
1978         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1979         case SND_SOC_DAIFMT_I2S:
1980                 break;
1981         case SND_SOC_DAIFMT_LEFT_J:
1982                 reg_val |= RT5640_I2S_DF_LEFT;
1983                 break;
1984         case SND_SOC_DAIFMT_DSP_A:
1985                 reg_val |= RT5640_I2S_DF_PCM_A;
1986                 break;
1987         case SND_SOC_DAIFMT_DSP_B:
1988                 reg_val  |= RT5640_I2S_DF_PCM_B;
1989                 break;
1990         default:
1991                 return -EINVAL;
1992         }
1993
1994         dai_sel = get_sdp_info(codec, dai->id);
1995         if (dai_sel < 0) {
1996                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1997                 return -EINVAL;
1998         }
1999         if (dai_sel & RT5640_U_IF1) {
2000                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2001                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2002                         RT5640_I2S_DF_MASK, reg_val);
2003         }
2004         if (dai_sel & RT5640_U_IF2) {
2005                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2006                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2007                         RT5640_I2S_DF_MASK, reg_val);
2008         }
2009 #if (CONFIG_SND_SOC_RT5643_MODULE | CONFIG_SND_SOC_RT5643 | \
2010                         CONFIG_SND_SOC_RT5646_MODULE | CONFIG_SND_SOC_RT5646)
2011         if (dai_sel & RT5640_U_IF3) {
2012                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2013                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2014                         RT5640_I2S_DF_MASK, reg_val);
2015         }
2016 #endif
2017         return 0;
2018 }
2019
2020 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2021                 int clk_id, unsigned int freq, int dir)
2022 {
2023         struct snd_soc_codec *codec = dai->codec;
2024         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2025         unsigned int reg_val = 0;
2026
2027         if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
2028                 return 0;
2029
2030         switch (clk_id) {
2031         case RT5640_SCLK_S_MCLK:
2032                 reg_val |= RT5640_SCLK_SRC_MCLK;
2033                 break;
2034         case RT5640_SCLK_S_PLL1:
2035                 reg_val |= RT5640_SCLK_SRC_PLL1;
2036                 break;
2037         case RT5640_SCLK_S_PLL1_TK:
2038                 reg_val |= RT5640_SCLK_SRC_PLL1T;
2039                 break;
2040         case RT5640_SCLK_S_RCCLK:
2041                 reg_val |= RT5640_SCLK_SRC_RCCLK;
2042                 break;
2043         default:
2044                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2045                 return -EINVAL;
2046         }
2047         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2048                 RT5640_SCLK_SRC_MASK, reg_val);
2049         rt5640->sysclk = freq;
2050         rt5640->sysclk_src = clk_id;
2051
2052         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2053         return 0;
2054 }
2055
2056 /**
2057  * rt5640_pll_calc - Calcualte PLL M/N/K code.
2058  * @freq_in: external clock provided to codec.
2059  * @freq_out: target clock which codec works on.
2060  * @pll_code: Pointer to structure with M, N, K and bypass flag.
2061  *
2062  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2063  * which make calculation more efficiently.
2064  *
2065  * Returns 0 for success or negative error code.
2066  */
2067 static int rt5640_pll_calc(const unsigned int freq_in,
2068         const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2069 {
2070         int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2071         int n, m, red, n_t, m_t, in_t, out_t, red_t = abs(freq_out - freq_in);
2072         bool bypass = false;
2073
2074         if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2075                 return -EINVAL;
2076
2077         for (n_t = 0; n_t <= max_n; n_t++) {
2078                 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
2079                 if (in_t < 0)
2080                         continue;
2081                 if (in_t == freq_out) {
2082                         bypass = true;
2083                         n = n_t;
2084                         goto code_find;
2085                 }
2086                 for (m_t = 0; m_t <= max_m; m_t++) {
2087                         out_t = in_t / (m_t + 2);
2088                         red = abs(out_t - freq_out);
2089                         if (red < red_t) {
2090                                 n = n_t;
2091                                 m = m_t;
2092                                 if (red == 0)
2093                                         goto code_find;
2094                                 red_t = red;
2095                         }
2096                 }
2097         }
2098         pr_debug("Only get approximation about PLL\n");
2099
2100 code_find:
2101
2102         pll_code->m_bp = bypass;
2103         pll_code->m_code = m;
2104         pll_code->n_code = n;
2105         pll_code->k_code = 2;
2106         return 0;
2107 }
2108
2109 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2110                         unsigned int freq_in, unsigned int freq_out)
2111 {
2112         struct snd_soc_codec *codec = dai->codec;
2113         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2114         struct rt5640_pll_code pll_code;
2115         int ret, dai_sel;
2116
2117         if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2118             freq_out == rt5640->pll_out)
2119                 return 0;
2120
2121         if (!freq_in || !freq_out) {
2122                 dev_dbg(codec->dev, "PLL disabled\n");
2123
2124                 rt5640->pll_in = 0;
2125                 rt5640->pll_out = 0;
2126                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2127                         RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2128                 return 0;
2129         }
2130
2131         switch (source) {
2132         case RT5640_PLL1_S_MCLK:
2133                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2134                         RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2135                 break;
2136         case RT5640_PLL1_S_BCLK1:
2137         case RT5640_PLL1_S_BCLK2:
2138
2139 #if (CONFIG_SND_SOC_RT5643_MODULE | CONFIG_SND_SOC_RT5643 | \
2140                         CONFIG_SND_SOC_RT5646_MODULE | CONFIG_SND_SOC_RT5646)
2141
2142         case RT5640_PLL1_S_BCLK3:
2143
2144 #endif
2145                 dai_sel = get_sdp_info(codec, dai->id);
2146                 if (dai_sel < 0) {
2147                         dev_err(codec->dev,
2148                                 "Failed to get sdp info: %d\n", dai_sel);
2149                         return -EINVAL;
2150                 }
2151                 if (dai_sel & RT5640_U_IF1) {
2152                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2153                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2154                 }
2155                 if (dai_sel & RT5640_U_IF2) {
2156                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2157                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2158                 }
2159                 if (dai_sel & RT5640_U_IF3) {
2160                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2161                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2162                 }
2163                 break;
2164         default:
2165                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2166                 return -EINVAL;
2167         }
2168
2169         ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2170         if (ret < 0) {
2171                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2172                 return ret;
2173         }
2174
2175         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code.m_bp,
2176                 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code);
2177
2178         snd_soc_write(codec, RT5640_PLL_CTRL1,
2179                 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2180         snd_soc_write(codec, RT5640_PLL_CTRL2,
2181                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2182                 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2183
2184         rt5640->pll_in = freq_in;
2185         rt5640->pll_out = freq_out;
2186         rt5640->pll_src = source;
2187
2188         return 0;
2189 }
2190
2191 /**
2192  * rt5640_index_show - Dump private registers.
2193  * @dev: codec device.
2194  * @attr: device attribute.
2195  * @buf: buffer for display.
2196  *
2197  * To show non-zero values of all private registers.
2198  *
2199  * Returns buffer length.
2200  */
2201 static ssize_t rt5640_index_show(struct device *dev,
2202         struct device_attribute *attr, char *buf)
2203 {
2204         struct i2c_client *client = to_i2c_client(dev);
2205         struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2206         struct snd_soc_codec *codec = rt5640->codec;
2207         unsigned int val;
2208         int cnt = 0, i;
2209
2210         cnt += sprintf(buf, "RT5640 index register\n");
2211         for (i = 0; i < 0xb4; i++) {
2212                 if (cnt + 9 >= PAGE_SIZE - 1)
2213                         break;
2214                 val = rt5640_index_read(codec, i);
2215                 if (!val)
2216                         continue;
2217                 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2218         }
2219
2220         if (cnt >= PAGE_SIZE)
2221                 cnt = PAGE_SIZE - 1;
2222
2223         return cnt;
2224 }
2225 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2226
2227 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2228                         enum snd_soc_bias_level level)
2229 {
2230         switch (level) {
2231         case SND_SOC_BIAS_ON:
2232 #ifdef RT5640_DEMO
2233                 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2234                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2235                 snd_soc_update_bits(codec, RT5640_HP_VOL,
2236                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2237                 break;
2238 #endif
2239         case SND_SOC_BIAS_PREPARE:
2240 #ifdef RT5640_DEMO
2241                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2242                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2243                         RT5640_PWR_BG | RT5640_PWR_VREF2,
2244                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2245                         RT5640_PWR_BG | RT5640_PWR_VREF2);
2246                 msleep(100);
2247
2248                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2249                         RT5640_PWR_FV1 | RT5640_PWR_FV2,
2250                         RT5640_PWR_FV1 | RT5640_PWR_FV2);
2251
2252                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2253                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2254                         RT5640_PWR_MB1 | RT5640_PWR_MB2);
2255 #endif
2256                 break;
2257
2258         case SND_SOC_BIAS_STANDBY:
2259 #ifdef RT5640_DEMO
2260                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2261                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2262                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2263                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2264
2265                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2266                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2267                         0);
2268 #endif
2269                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2270                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2271                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2272                                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2273                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2274                                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2275                         msleep(10);
2276                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2277                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2278                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2279                         codec->cache_only = false;
2280                         snd_soc_cache_sync(codec);
2281                 }
2282                 break;
2283
2284         case SND_SOC_BIAS_OFF:
2285 #ifdef RT5640_DEMO
2286                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2287                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2288                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2289                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2290                 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2291                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2292                 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2293                         RT5640_L_MUTE, RT5640_L_MUTE);
2294 #endif
2295                 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2296                 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2297                 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2298                 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2299                 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2300                 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2301                 break;
2302
2303         default:
2304                 break;
2305         }
2306         codec->dapm.bias_level = level;
2307
2308         return 0;
2309 }
2310
2311 static int rt5640_probe(struct snd_soc_codec *codec)
2312 {
2313         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2314         int ret;
2315         u16 val;
2316
2317         codec->dapm.idle_bias_off = 1;
2318
2319         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2320         if (ret != 0) {
2321                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2322                 return ret;
2323         }
2324
2325         val = snd_soc_read(codec, RT5640_RESET);
2326         if (val != rt5640_reg[RT5640_RESET]) {
2327                 dev_err(codec->dev,
2328                         "Device with ID register %x is not a rt5640\n", val);
2329                 return -ENODEV;
2330         }
2331
2332         rt5640_reset(codec);
2333         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2334                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2335                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2336                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2337                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2338         msleep(100);
2339         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2340                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2341                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2342         /* DMIC */
2343         if (rt5640->dmic_en == RT5640_DMIC1) {
2344                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2345                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2346                 snd_soc_update_bits(codec, RT5640_DMIC,
2347                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2348                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2349         } else if (rt5640->dmic_en == RT5640_DMIC2) {
2350                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2351                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2352                 snd_soc_update_bits(codec, RT5640_DMIC,
2353                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2354                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2355         }
2356
2357 #ifdef RT5640_DEMO
2358         rt5640_reg_init(codec);
2359 #endif
2360
2361
2362 #if (CONFIG_SND_SOC_RT5642_MODULE | CONFIG_SND_SOC_RT5642)
2363         rt5640_register_dsp(codec);
2364 #endif
2365
2366         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2367
2368         snd_soc_add_controls(codec, rt5640_snd_controls,
2369                 ARRAY_SIZE(rt5640_snd_controls));
2370
2371         rt5640->codec = codec;
2372         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2373         if (ret != 0) {
2374                 dev_err(codec->dev,
2375                         "Failed to create index_reg sysfs files: %d\n", ret);
2376                 return ret;
2377         }
2378
2379         return 0;
2380 }
2381
2382 static int rt5640_remove(struct snd_soc_codec *codec)
2383 {
2384         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2385         rt5640_reset(codec);
2386         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2387
2388         return 0;
2389 }
2390 #ifdef CONFIG_PM
2391 static int rt5640_suspend(struct snd_soc_codec *codec, pm_message_t state)
2392 {
2393         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2394         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2395
2396         return 0;
2397 }
2398
2399 static int rt5640_resume(struct snd_soc_codec *codec)
2400 {
2401         rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2402
2403         return 0;
2404 }
2405 #else
2406 #define rt5640_suspend NULL
2407 #define rt5640_resume NULL
2408 #endif
2409
2410 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2411 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2412                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2413
2414 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2415         .hw_params = rt5640_hw_params,
2416         .prepare = rt5640_prepare,
2417         .set_fmt = rt5640_set_dai_fmt,
2418         .set_sysclk = rt5640_set_dai_sysclk,
2419         .set_pll = rt5640_set_dai_pll,
2420 };
2421
2422 struct snd_soc_dai_driver rt5640_dai[] = {
2423         {
2424                 .name = "rt5640-aif1",
2425                 .id = RT5640_AIF1,
2426                 .playback = {
2427                         .stream_name = "AIF1 Playback",
2428                         .channels_min = 1,
2429                         .channels_max = 2,
2430                         .rates = RT5640_STEREO_RATES,
2431                         .formats = RT5640_FORMATS,
2432                 },
2433                 .capture = {
2434                         .stream_name = "AIF1 Capture",
2435                         .channels_min = 1,
2436                         .channels_max = 2,
2437                         .rates = RT5640_STEREO_RATES,
2438                         .formats = RT5640_FORMATS,
2439                 },
2440                 .ops = &rt5640_aif_dai_ops,
2441         },
2442         {
2443                 .name = "rt5640-aif2",
2444                 .id = RT5640_AIF2,
2445                 .playback = {
2446                         .stream_name = "AIF2 Playback",
2447                         .channels_min = 1,
2448                         .channels_max = 2,
2449                         .rates = RT5640_STEREO_RATES,
2450                         .formats = RT5640_FORMATS,
2451                 },
2452                 .capture = {
2453                         .stream_name = "AIF2 Capture",
2454                         .channels_min = 1,
2455                         .channels_max = 2,
2456                         .rates = RT5640_STEREO_RATES,
2457                         .formats = RT5640_FORMATS,
2458                 },
2459                 .ops = &rt5640_aif_dai_ops,
2460         },
2461 #if (CONFIG_SND_SOC_RT5643_MODULE | CONFIG_SND_SOC_RT5643 | \
2462                         CONFIG_SND_SOC_RT5646_MODULE | CONFIG_SND_SOC_RT5646)
2463         {
2464                 .name = "rt5640-aif3",
2465                 .id = RT5640_AIF3,
2466                 .playback = {
2467                         .stream_name = "AIF3 Playback",
2468                         .channels_min = 1,
2469                         .channels_max = 2,
2470                         .rates = RT5640_STEREO_RATES,
2471                         .formats = RT5640_FORMATS,
2472                 },
2473                 .capture = {
2474                         .stream_name = "AIF3 Capture",
2475                         .channels_min = 1,
2476                         .channels_max = 2,
2477                         .rates = RT5640_STEREO_RATES,
2478                         .formats = RT5640_FORMATS,
2479                 },
2480                 .ops = &rt5640_aif_dai_ops,
2481         },
2482 #endif
2483 };
2484
2485 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2486         .probe = rt5640_probe,
2487         .remove = rt5640_remove,
2488         .suspend = rt5640_suspend,
2489         .resume = rt5640_resume,
2490         .set_bias_level = rt5640_set_bias_level,
2491         .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2492         .reg_word_size = sizeof(u16),
2493         .reg_cache_default = rt5640_reg,
2494         .volatile_register = rt5640_volatile_register,
2495         .readable_register = rt5640_readable_register,
2496         .reg_cache_step = 1,
2497         .dapm_widgets = rt5640_dapm_widgets,
2498         .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2499         .dapm_routes = rt5640_dapm_routes,
2500         .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2501 };
2502
2503 static const struct i2c_device_id rt5640_i2c_id[] = {
2504         { "rt5640", 0 },
2505         { }
2506 };
2507 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2508
2509 static int rt5640_i2c_probe(struct i2c_client *i2c,
2510                     const struct i2c_device_id *id)
2511 {
2512         struct rt5640_priv *rt5640;
2513         int ret;
2514
2515         rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2516         if (NULL == rt5640)
2517                 return -ENOMEM;
2518
2519         i2c_set_clientdata(i2c, rt5640);
2520
2521         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2522                         rt5640_dai, ARRAY_SIZE(rt5640_dai));
2523         if (ret < 0)
2524                 kfree(rt5640);
2525
2526         return ret;
2527 }
2528
2529 static __devexit int rt5640_i2c_remove(struct i2c_client *i2c)
2530 {
2531         snd_soc_unregister_codec(&i2c->dev);
2532         kfree(i2c_get_clientdata(i2c));
2533         return 0;
2534 }
2535
2536 struct i2c_driver rt5640_i2c_driver = {
2537         .driver = {
2538                 .name = "rt5640",
2539                 .owner = THIS_MODULE,
2540         },
2541         .probe = rt5640_i2c_probe,
2542         .remove   = __devexit_p(rt5640_i2c_remove),
2543         .id_table = rt5640_i2c_id,
2544 };
2545
2546 static int __init rt5640_modinit(void)
2547 {
2548         return i2c_add_driver(&rt5640_i2c_driver);
2549 }
2550 module_init(rt5640_modinit);
2551
2552 static void __exit rt5640_modexit(void)
2553 {
2554         i2c_del_driver(&rt5640_i2c_driver);
2555 }
2556 module_exit(rt5640_modexit);
2557
2558 MODULE_DESCRIPTION("ASoC RT5640 driver");
2559 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2560 MODULE_LICENSE("GPL");