asoc: alc5640: Mic noise gate
[linux-2.6.git] / sound / soc / codecs / rt5640.c
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 #include "rt5640.h"
28 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
30 #endif
31
32 #define RT5640_DEMO 1
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35 #define RT5639_RESET_ID 0x0008
36 #define USE_ONEBIT_DEPOP 1 /* for one bit depop */
37
38 #define CHECK_I2C_SHUTDOWN(r, c) { if (r && r->shutdown_complete) { \
39 dev_err(c->dev, "error: i2c state is 'shutdown'\n"); \
40 mutex_unlock(&r->lock); return -ENODEV; } }
41
42 #ifdef RT5640_DEMO
43 struct rt5640_init_reg {
44         u8 reg;
45         u16 val;
46 };
47
48 static struct rt5640_init_reg init_list[] = {
49         {RT5640_GEN_CTRL1       , 0x3701},/*fa[12:13] = 1'b; fa[8~10]=1; fa[0]=1 */
50         {RT5640_DEPOP_M1        , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
51         {RT5640_DEPOP_M2        , 0x3100},/* 8f[13] = 1'b */
52         {RT5640_ADDA_CLK1       , 0x1114},/* 73[2] = 1'b  */
53         {RT5640_MICBIAS         , 0x3030},/* 93[5:4] = 11'b */
54         {RT5640_PRIV_INDEX      , 0x003d},/* PR3d[12] = 1'b */
55         {RT5640_PRIV_DATA       , 0x3600},
56         {RT5640_CLS_D_OUT       , 0xa000},/* 8d[11] = 0'b */
57         {RT5640_CLS_D_OVCD      , 0x0328},//8c[8] = 1'b
58         {RT5640_PRIV_INDEX      , 0x001c},/* PR1c = 0D21'h */
59         {RT5640_PRIV_DATA       , 0x0D21},
60         {RT5640_PRIV_INDEX      , 0x001b},/* PR1B = 0D21'h */
61         {RT5640_PRIV_DATA       , 0x0000},
62         {RT5640_PRIV_INDEX      , 0x0012},/* PR12 = 0aa8'h */
63         {RT5640_PRIV_DATA       , 0x0aa8},
64         {RT5640_PRIV_INDEX      , 0x0014},/* PR14 = 0aaa'h */
65         {RT5640_PRIV_DATA       , 0x0aaa},
66         {RT5640_PRIV_INDEX      , 0x0020},/* PR20 = 6110'h */
67         {RT5640_PRIV_DATA       , 0x6110},
68         {RT5640_PRIV_INDEX      , 0x0021},/* PR21 = e0e0'h */
69         {RT5640_PRIV_DATA       , 0xe0e0},
70         {RT5640_PRIV_INDEX      , 0x0023},/* PR23 = 1804'h */
71         {RT5640_PRIV_DATA       , 0x1804},
72         {RT5640_PRIV_INDEX      , 0x006e},/* PR6E = 1804'h */
73         {RT5640_PRIV_DATA       , 0x3219},
74         /*playback*/
75         {RT5640_STO_DAC_MIXER   , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
76         {RT5640_OUT_L3_MIXER    , 0x01fe},/*DACL1 -> OUTMIXL*/
77         {RT5640_OUT_R3_MIXER    , 0x01fe},/*DACR1 -> OUTMIXR */
78         {RT5640_HP_VOL          , 0x8888},/* OUTMIX -> HPVOL */
79         {RT5640_HPO_MIXER       , 0xc000},/* HPVOL -> HPOLMIX */
80 /*      {RT5640_HPO_MIXER       , 0xa000},// DAC1 -> HPOLMIX   */
81         {RT5640_CHARGE_PUMP     , 0x0f00},
82         {RT5640_PRIV_INDEX      , 0x0090},
83         {RT5640_PRIV_DATA       , 0x2000},
84         {RT5640_PRIV_INDEX      , 0x0091},
85         {RT5640_PRIV_DATA       , 0x1000},
86         {RT5640_HP_CALIB_AMP_DET, 0x0420},
87         {RT5640_SPK_L_MIXER     , 0x0036},/* DACL1 -> SPKMIXL */
88         {RT5640_SPK_R_MIXER     , 0x0036},/* DACR1 -> SPKMIXR */
89         {RT5640_SPK_VOL         , 0x8888},/* SPKMIX -> SPKVOL */
90         {RT5640_SPO_CLSD_RATIO  , 0x0001},
91         {RT5640_SPO_L_MIXER     , 0xe800},/* SPKVOLL -> SPOLMIX */
92         {RT5640_SPO_R_MIXER     , 0x2800},/* SPKVOLR -> SPORMIX */
93 /*      {RT5640_SPO_L_MIXER     , 0xb800},//DAC -> SPOLMIX */
94 /*      {RT5640_SPO_R_MIXER     , 0x1800},//DAC -> SPORMIX */
95 /*      {RT5640_I2S1_SDP        , 0xD000},//change IIS1 and IIS2 */
96         /*record*/
97         {RT5640_IN1_IN2         , 0x5080},/*IN1 boost 40db & differential mode*/
98         {RT5640_IN3_IN4         , 0x0500},/*IN2 boost 40db & signal ended mode*/
99         {RT5640_REC_L2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXL */
100         {RT5640_REC_R2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXR */
101 /*      {RT5640_REC_L2_MIXER    , 0x006f},//Mic2 -> RECMIXL */
102 /*      {RT5640_REC_R2_MIXER    , 0x006f},//Mic2 -> RECMIXR */
103         {RT5640_STO_ADC_MIXER   , 0x3020},/* ADC -> Sto ADC mixer */
104
105 #if RT5640_DET_EXT_MIC
106         {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
107         {RT5640_GPIO_CTRL1      , 0x8400},/* set GPIO1 to IRQ */
108         {RT5640_GPIO_CTRL3      , 0x0004},/* set GPIO1 output */
109         {RT5640_IRQ_CTRL2       , 0x8000},/*set MICBIAS short current to IRQ */
110                                         /*( if sticky set regBE : 8800 ) */
111 #endif
112
113 };
114 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
115
116 static int rt5640_reg_init(struct snd_soc_codec *codec)
117 {
118         int i;
119         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
120                 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
121         return 0;
122 }
123 #endif
124
125 static int rt5640_index_sync(struct snd_soc_codec *codec)
126 {
127         int i;
128
129         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
130                 if (RT5640_PRIV_INDEX == init_list[i].reg ||
131                         RT5640_PRIV_DATA == init_list[i].reg)
132                         snd_soc_write(codec, init_list[i].reg,
133                                         init_list[i].val);
134         return 0;
135 }
136
137 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
138         [RT5640_RESET] = 0x000c,
139         [RT5640_SPK_VOL] = 0xc8c8,
140         [RT5640_HP_VOL] = 0xc8c8,
141         [RT5640_OUTPUT] = 0xc8c8,
142         [RT5640_MONO_OUT] = 0x8000,
143         [RT5640_INL_INR_VOL] = 0x0808,
144         [RT5640_DAC1_DIG_VOL] = 0xafaf,
145         [RT5640_DAC2_DIG_VOL] = 0xafaf,
146         [RT5640_ADC_DIG_VOL] = 0x2f2f,
147         [RT5640_ADC_DATA] = 0x2f2f,
148         [RT5640_STO_ADC_MIXER] = 0x7060,
149         [RT5640_MONO_ADC_MIXER] = 0x7070,
150         [RT5640_AD_DA_MIXER] = 0x8080,
151         [RT5640_STO_DAC_MIXER] = 0x5454,
152         [RT5640_MONO_DAC_MIXER] = 0x5454,
153         [RT5640_DIG_MIXER] = 0xaa00,
154         [RT5640_DSP_PATH2] = 0xa000,
155         [RT5640_REC_L2_MIXER] = 0x007f,
156         [RT5640_REC_R2_MIXER] = 0x007f,
157         [RT5640_HPO_MIXER] = 0xe000,
158         [RT5640_SPK_L_MIXER] = 0x003e,
159         [RT5640_SPK_R_MIXER] = 0x003e,
160         [RT5640_SPO_L_MIXER] = 0xf800,
161         [RT5640_SPO_R_MIXER] = 0x3800,
162         [RT5640_SPO_CLSD_RATIO] = 0x0004,
163         [RT5640_MONO_MIXER] = 0xfc00,
164         [RT5640_OUT_L3_MIXER] = 0x01ff,
165         [RT5640_OUT_R3_MIXER] = 0x01ff,
166         [RT5640_LOUT_MIXER] = 0xf000,
167         [RT5640_PWR_ANLG1] = 0x00c0,
168         [RT5640_I2S1_SDP] = 0x8000,
169         [RT5640_I2S2_SDP] = 0x8000,
170         [RT5640_I2S3_SDP] = 0x8000,
171         [RT5640_ADDA_CLK1] = 0x1110,
172         [RT5640_ADDA_CLK2] = 0x0c00,
173         [RT5640_DMIC] = 0x1d00,
174         [RT5640_ASRC_3] = 0x0008,
175         [RT5640_HP_OVCD] = 0x0600,
176         [RT5640_CLS_D_OVCD] = 0x0228,
177         [RT5640_CLS_D_OUT] = 0xa800,
178         [RT5640_DEPOP_M1] = 0x0004,
179         [RT5640_DEPOP_M2] = 0x1100,
180         [RT5640_DEPOP_M3] = 0x0646,
181         [RT5640_CHARGE_PUMP] = 0x0d00,
182         [RT5640_MICBIAS] = 0x3000,
183         [RT5640_EQ_CTRL1] = 0x2080,
184         [RT5640_DRC_AGC_1] = 0xe206,
185         [RT5640_DRC_AGC_2] = 0x1f00,
186         [RT5640_DRC_AGC_3] = 0x0040,
187         [RT5640_ANC_CTRL1] = 0x034b,
188         [RT5640_ANC_CTRL2] = 0x0066,
189         [RT5640_ANC_CTRL3] = 0x000b,
190         [RT5640_GPIO_CTRL1] = 0x0400,
191         [RT5640_DSP_CTRL3] = 0x2000,
192         [RT5640_BASE_BACK] = 0x0013,
193         [RT5640_MP3_PLUS1] = 0x0680,
194         [RT5640_MP3_PLUS2] = 0x1c17,
195         [RT5640_3D_HP] = 0x8c00,
196         [RT5640_ADJ_HPF] = 0xaa20,
197         [RT5640_HP_CALIB_AMP_DET] = 0x0420,
198         [RT5640_SV_ZCD1] = 0x0809,
199         [RT5640_VENDOR_ID1] = 0x10ec,
200         [RT5640_VENDOR_ID2] = 0x6231,
201 };
202
203
204 static int rt5640_reset(struct snd_soc_codec *codec)
205 {
206         return snd_soc_write(codec, RT5640_RESET, 0);
207 }
208
209 /**
210  * rt5640_index_write - Write private register.
211  * @codec: SoC audio codec device.
212  * @reg: Private register index.
213  * @value: Private register Data.
214  *
215  * Modify private register for advanced setting. It can be written through
216  * private index (0x6a) and data (0x6c) register.
217  *
218  * Returns 0 for success or negative error code.
219  */
220 static int rt5640_index_write(struct snd_soc_codec *codec,
221                 unsigned int reg, unsigned int value)
222 {
223         int ret;
224
225         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
226         if (ret < 0) {
227                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
228                 goto err;
229         }
230         ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
231         if (ret < 0) {
232                 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
233                 goto err;
234         }
235         return 0;
236
237 err:
238         return ret;
239 }
240
241 /**
242  * rt5640_index_read - Read private register.
243  * @codec: SoC audio codec device.
244  * @reg: Private register index.
245  *
246  * Read advanced setting from private register. It can be read through
247  * private index (0x6a) and data (0x6c) register.
248  *
249  * Returns private register value or negative error code.
250  */
251 static unsigned int rt5640_index_read(
252         struct snd_soc_codec *codec, unsigned int reg)
253 {
254         int ret;
255
256         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
257         if (ret < 0) {
258                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
259                 return ret;
260         }
261         return snd_soc_read(codec, RT5640_PRIV_DATA);
262 }
263
264 /**
265  * rt5640_index_update_bits - update private register bits
266  * @codec: audio codec
267  * @reg: Private register index.
268  * @mask: register mask
269  * @value: new value
270  *
271  * Writes new register value.
272  *
273  * Returns 1 for change, 0 for no change, or negative error code.
274  */
275 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
276         unsigned int reg, unsigned int mask, unsigned int value)
277 {
278         unsigned int old, new;
279         int change, ret;
280
281         ret = rt5640_index_read(codec, reg);
282         if (ret < 0) {
283                 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
284                 goto err;
285         }
286
287         old = ret;
288         new = (old & ~mask) | (value & mask);
289         change = old != new;
290         if (change) {
291                 ret = rt5640_index_write(codec, reg, new);
292                 if (ret < 0) {
293                         dev_err(codec->dev,
294                                 "Failed to write private reg: %d\n", ret);
295                         goto err;
296                 }
297         }
298         return change;
299
300 err:
301         return ret;
302 }
303
304 static int rt5640_volatile_register(
305         struct snd_soc_codec *codec, unsigned int reg)
306 {
307         switch (reg) {
308         case RT5640_RESET:
309         case RT5640_PRIV_DATA:
310         case RT5640_ASRC_5:
311         case RT5640_EQ_CTRL1:
312         case RT5640_DRC_AGC_1:
313         case RT5640_ANC_CTRL1:
314         case RT5640_IRQ_CTRL2:
315         case RT5640_INT_IRQ_ST:
316         case RT5640_DSP_CTRL2:
317         case RT5640_DSP_CTRL3:
318         case RT5640_PGM_REG_ARR1:
319         case RT5640_PGM_REG_ARR3:
320         case RT5640_VENDOR_ID:
321         case RT5640_VENDOR_ID1:
322         case RT5640_VENDOR_ID2:
323                 return 1;
324         default:
325                 return 0;
326         }
327 }
328
329 static int rt5640_readable_register(
330         struct snd_soc_codec *codec, unsigned int reg)
331 {
332         switch (reg) {
333         case RT5640_RESET:
334         case RT5640_SPK_VOL:
335         case RT5640_HP_VOL:
336         case RT5640_OUTPUT:
337         case RT5640_MONO_OUT:
338         case RT5640_IN1_IN2:
339         case RT5640_IN3_IN4:
340         case RT5640_INL_INR_VOL:
341         case RT5640_DAC1_DIG_VOL:
342         case RT5640_DAC2_DIG_VOL:
343         case RT5640_DAC2_CTRL:
344         case RT5640_ADC_DIG_VOL:
345         case RT5640_ADC_DATA:
346         case RT5640_ADC_BST_VOL:
347         case RT5640_STO_ADC_MIXER:
348         case RT5640_MONO_ADC_MIXER:
349         case RT5640_AD_DA_MIXER:
350         case RT5640_STO_DAC_MIXER:
351         case RT5640_MONO_DAC_MIXER:
352         case RT5640_DIG_MIXER:
353         case RT5640_DSP_PATH1:
354         case RT5640_DSP_PATH2:
355         case RT5640_DIG_INF_DATA:
356         case RT5640_REC_L1_MIXER:
357         case RT5640_REC_L2_MIXER:
358         case RT5640_REC_R1_MIXER:
359         case RT5640_REC_R2_MIXER:
360         case RT5640_HPO_MIXER:
361         case RT5640_SPK_L_MIXER:
362         case RT5640_SPK_R_MIXER:
363         case RT5640_SPO_L_MIXER:
364         case RT5640_SPO_R_MIXER:
365         case RT5640_SPO_CLSD_RATIO:
366         case RT5640_MONO_MIXER:
367         case RT5640_OUT_L1_MIXER:
368         case RT5640_OUT_L2_MIXER:
369         case RT5640_OUT_L3_MIXER:
370         case RT5640_OUT_R1_MIXER:
371         case RT5640_OUT_R2_MIXER:
372         case RT5640_OUT_R3_MIXER:
373         case RT5640_LOUT_MIXER:
374         case RT5640_PWR_DIG1:
375         case RT5640_PWR_DIG2:
376         case RT5640_PWR_ANLG1:
377         case RT5640_PWR_ANLG2:
378         case RT5640_PWR_MIXER:
379         case RT5640_PWR_VOL:
380         case RT5640_PRIV_INDEX:
381         case RT5640_PRIV_DATA:
382         case RT5640_I2S1_SDP:
383         case RT5640_I2S2_SDP:
384         case RT5640_I2S3_SDP:
385         case RT5640_ADDA_CLK1:
386         case RT5640_ADDA_CLK2:
387         case RT5640_DMIC:
388         case RT5640_GLB_CLK:
389         case RT5640_PLL_CTRL1:
390         case RT5640_PLL_CTRL2:
391         case RT5640_ASRC_1:
392         case RT5640_ASRC_2:
393         case RT5640_ASRC_3:
394         case RT5640_ASRC_4:
395         case RT5640_ASRC_5:
396         case RT5640_HP_OVCD:
397         case RT5640_CLS_D_OVCD:
398         case RT5640_CLS_D_OUT:
399         case RT5640_DEPOP_M1:
400         case RT5640_DEPOP_M2:
401         case RT5640_DEPOP_M3:
402         case RT5640_CHARGE_PUMP:
403         case RT5640_PV_DET_SPK_G:
404         case RT5640_MICBIAS:
405         case RT5640_EQ_CTRL1:
406         case RT5640_EQ_CTRL2:
407         case RT5640_WIND_FILTER:
408         case RT5640_DRC_AGC_1:
409         case RT5640_DRC_AGC_2:
410         case RT5640_DRC_AGC_3:
411         case RT5640_SVOL_ZC:
412         case RT5640_ANC_CTRL1:
413         case RT5640_ANC_CTRL2:
414         case RT5640_ANC_CTRL3:
415         case RT5640_JD_CTRL:
416         case RT5640_ANC_JD:
417         case RT5640_IRQ_CTRL1:
418         case RT5640_IRQ_CTRL2:
419         case RT5640_INT_IRQ_ST:
420         case RT5640_GPIO_CTRL1:
421         case RT5640_GPIO_CTRL2:
422         case RT5640_GPIO_CTRL3:
423         case RT5640_DSP_CTRL1:
424         case RT5640_DSP_CTRL2:
425         case RT5640_DSP_CTRL3:
426         case RT5640_DSP_CTRL4:
427         case RT5640_PGM_REG_ARR1:
428         case RT5640_PGM_REG_ARR2:
429         case RT5640_PGM_REG_ARR3:
430         case RT5640_PGM_REG_ARR4:
431         case RT5640_PGM_REG_ARR5:
432         case RT5640_SCB_FUNC:
433         case RT5640_SCB_CTRL:
434         case RT5640_BASE_BACK:
435         case RT5640_MP3_PLUS1:
436         case RT5640_MP3_PLUS2:
437         case RT5640_3D_HP:
438         case RT5640_ADJ_HPF:
439         case RT5640_HP_CALIB_AMP_DET:
440         case RT5640_HP_CALIB2:
441         case RT5640_SV_ZCD1:
442         case RT5640_SV_ZCD2:
443         case RT5640_GEN_CTRL1:
444         case RT5640_GEN_CTRL2:
445         case RT5640_GEN_CTRL3:
446         case RT5640_VENDOR_ID:
447         case RT5640_VENDOR_ID1:
448         case RT5640_VENDOR_ID2:
449         case RT5640_DUMMY_PR3F:
450                 return 1;
451         default:
452                 return 0;
453         }
454 }
455
456 void DC_Calibrate(struct snd_soc_codec *codec)
457 {
458         unsigned int sclk_src;
459
460         sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
461                 RT5640_SCLK_SRC_MASK;
462
463         snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
464                 RT5640_PWR_MB1, RT5640_PWR_MB1);
465         snd_soc_update_bits(codec, RT5640_DEPOP_M2,
466                 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
467         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
468                 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
469                 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
470
471         snd_soc_update_bits(codec, RT5640_GLB_CLK,
472                 RT5640_SCLK_SRC_MASK, 0x2 << RT5640_SCLK_SRC_SFT);
473
474         rt5640_index_write(codec, RT5640_HP_DCC_INT1, 0x9f00);
475         snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
476                 RT5640_PWR_MB1, 0);
477         snd_soc_update_bits(codec, RT5640_GLB_CLK,
478                 RT5640_SCLK_SRC_MASK, sclk_src);
479 }
480
481
482 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
483 {
484         int jack_type;
485         int sclk_src;
486         int reg63, reg64;
487         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
488         mutex_lock(&rt5640->lock);
489         CHECK_I2C_SHUTDOWN(rt5640, codec)
490
491         if (jack_insert) {
492                 reg63 = snd_soc_read(codec, RT5640_PWR_ANLG1);
493                 reg64 = snd_soc_read(codec, RT5640_PWR_ANLG2);
494                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
495                         snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
496                         snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
497                         snd_soc_write(codec, RT5640_GEN_CTRL1 , 0x3701);
498                 }
499                 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
500                         RT5640_SCLK_SRC_MASK;
501                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
502                         RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
503                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
504                         RT5640_PWR_LDO2, RT5640_PWR_LDO2);
505                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
506                         RT5640_PWR_MB1, RT5640_PWR_MB1);
507                 snd_soc_update_bits(codec, RT5640_MICBIAS,
508                         RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
509                         RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
510                         RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
511                         RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
512                 snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
513                         0x1, 0x1);
514                 msleep(100);
515                 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
516                         jack_type = RT5640_HEADPHO_DET;
517                 else
518                         jack_type = RT5640_HEADSET_DET;
519                 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
520                         RT5640_MB1_OC_CLR, 0);
521                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
522                         RT5640_SCLK_SRC_MASK, sclk_src);
523                 snd_soc_write(codec, RT5640_PWR_ANLG1, reg63);
524                 snd_soc_write(codec, RT5640_PWR_ANLG2, reg64);
525         } else {
526                 snd_soc_update_bits(codec, RT5640_MICBIAS,
527                         RT5640_MIC1_OVCD_MASK,
528                         RT5640_MIC1_OVCD_DIS);
529
530                 jack_type = RT5640_NO_JACK;
531         }
532
533         mutex_unlock(&rt5640->lock);
534         return jack_type;
535 }
536 EXPORT_SYMBOL(rt5640_headset_detect);
537
538 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
539 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
540 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
541 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
542 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
543
544 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
545 static unsigned int bst_tlv[] = {
546         TLV_DB_RANGE_HEAD(7),
547         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
548         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
549         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
550         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
551         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
552         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
553         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
554 };
555
556 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
557                 struct snd_ctl_elem_value *ucontrol)
558 {
559         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
560         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
561
562         ucontrol->value.integer.value[0] = rt5640->dmic_en;
563
564         return 0;
565 }
566
567 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
568                 struct snd_ctl_elem_value *ucontrol)
569 {
570         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
571         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
572         mutex_lock(&rt5640->lock);
573         CHECK_I2C_SHUTDOWN(rt5640, codec)
574
575         if (rt5640->dmic_en == ucontrol->value.integer.value[0]) {
576                 mutex_unlock(&rt5640->lock);
577                 return 0;
578         }
579
580         rt5640->dmic_en = ucontrol->value.integer.value[0];
581         switch (rt5640->dmic_en) {
582         case RT5640_DMIC_DIS:
583                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
584                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
585                         RT5640_GP4_PIN_MASK,
586                         RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
587                         RT5640_GP4_PIN_GPIO4);
588                 snd_soc_update_bits(codec, RT5640_DMIC,
589                         RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
590                         RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
591                 snd_soc_update_bits(codec, RT5640_DMIC,
592                         RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
593                         RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
594                 break;
595
596         case RT5640_DMIC1:
597                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
598                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
599                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
600                 snd_soc_update_bits(codec, RT5640_DMIC,
601                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
602                         RT5640_DMIC_1_DP_MASK,
603                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
604                         RT5640_DMIC_1_DP_IN1P);
605                 snd_soc_update_bits(codec, RT5640_DMIC,
606                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
607                 break;
608
609         case RT5640_DMIC2:
610                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
611                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
612                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
613                 snd_soc_update_bits(codec, RT5640_DMIC,
614                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
615                         RT5640_DMIC_2_DP_MASK,
616                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
617                         RT5640_DMIC_2_DP_IN1N);
618                 snd_soc_update_bits(codec, RT5640_DMIC,
619                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
620                 break;
621
622         default:
623                 mutex_unlock(&rt5640->lock);
624                 return -EINVAL;
625         }
626
627         mutex_unlock(&rt5640->lock);
628         return 0;
629 }
630
631
632 /* IN1/IN2 Input Type */
633 static const char *rt5640_input_mode[] = {
634         "Single ended", "Differential"};
635
636 static const SOC_ENUM_SINGLE_DECL(
637         rt5640_in1_mode_enum, RT5640_IN1_IN2,
638         RT5640_IN_SFT1, rt5640_input_mode);
639
640 static const SOC_ENUM_SINGLE_DECL(
641         rt5640_in2_mode_enum, RT5640_IN3_IN4,
642         RT5640_IN_SFT2, rt5640_input_mode);
643
644 /* Interface data select */
645 static const char *rt5640_data_select[] = {
646         "Normal", "left copy to right", "right copy to left", "Swap"};
647
648 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
649                                 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
650
651 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
652                                 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
653
654 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
655                                 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
656
657 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
658                                 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
659
660 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
661                                 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
662
663 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
664                                 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
665
666 /* Class D speaker gain ratio */
667 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
668         "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
669
670 static const SOC_ENUM_SINGLE_DECL(
671         rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
672         RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
673
674 /* DMIC */
675 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
676
677 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
678
679
680
681 #ifdef RT5640_REG_RW
682 #define REGVAL_MAX 0xffff
683 static unsigned int regctl_addr;
684 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
685                         struct snd_ctl_elem_info *uinfo) {
686         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
687         uinfo->count = 2;
688         uinfo->value.integer.min = 0;
689         uinfo->value.integer.max = REGVAL_MAX;
690         return 0;
691 }
692
693 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
694                         struct snd_ctl_elem_value *ucontrol)
695 {
696         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
697         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
698         mutex_lock(&rt5640->lock);
699         CHECK_I2C_SHUTDOWN(rt5640, codec)
700
701         ucontrol->value.integer.value[0] = regctl_addr;
702         ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
703         mutex_unlock(&rt5640->lock);
704         return 0;
705 }
706
707 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
708                         struct snd_ctl_elem_value *ucontrol)
709 {
710         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
711         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
712         mutex_lock(&rt5640->lock);
713         CHECK_I2C_SHUTDOWN(rt5640, codec)
714
715         regctl_addr = ucontrol->value.integer.value[0];
716         if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
717                 snd_soc_write(codec, regctl_addr,
718                 ucontrol->value.integer.value[1]);
719         mutex_unlock(&rt5640->lock);
720         return 0;
721 }
722 #endif
723
724
725 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
726 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
727
728 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
729                 struct snd_ctl_elem_value *ucontrol)
730 {
731         struct soc_mixer_control *mc =
732                 (struct soc_mixer_control *)kcontrol->private_value;
733         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
734         unsigned int val;
735         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
736         mutex_lock(&rt5640->lock);
737         CHECK_I2C_SHUTDOWN(rt5640, codec)
738         val = snd_soc_read(codec, mc->reg);
739
740         ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
741                 ((val & RT5640_L_VOL_MASK) >> mc->shift);
742         ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
743                 (val & RT5640_R_VOL_MASK);
744
745         mutex_unlock(&rt5640->lock);
746         return 0;
747 }
748
749 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
750                 struct snd_ctl_elem_value *ucontrol)
751 {
752         struct soc_mixer_control *mc =
753                 (struct soc_mixer_control *)kcontrol->private_value;
754         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
755         unsigned int val, val2;
756         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
757         int ret;
758         mutex_lock(&rt5640->lock);
759         CHECK_I2C_SHUTDOWN(rt5640, codec)
760
761         val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
762         val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
763         ret = snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
764                         RT5640_R_VOL_MASK, val << mc->shift | val2);
765         mutex_unlock(&rt5640->lock);
766         return ret;
767 }
768
769
770 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
771         /* Speaker Output Volume */
772         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
773                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
774                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
775
776         /* Headphone Output Volume */
777         SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
778                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
779
780         SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
781                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
782                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
783
784         /* OUTPUT Control */
785         SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
786                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
787         SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
788                 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
789         SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
790                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
791         /* MONO Output Control */
792         SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
793                                 RT5640_L_MUTE_SFT, 1, 1),
794         /* DAC Digital Volume */
795         SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
796                 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
797         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
798                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
799                         175, 0, dac_vol_tlv),
800         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
801                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
802                         175, 0, dac_vol_tlv),
803         /* IN1/IN2 Control */
804         SOC_ENUM("IN1 Mode Control",  rt5640_in1_mode_enum),
805         SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
806                 RT5640_BST_SFT1, 8, 0, bst_tlv),
807         SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
808         SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
809                 RT5640_BST_SFT2, 8, 0, bst_tlv),
810         /* INL/INR Volume Control */
811         SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
812                         RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
813                         31, 1, in_vol_tlv),
814         /* ADC Digital Volume Control */
815         SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
816                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
817         SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
818                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
819                         127, 0, adc_vol_tlv),
820         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
821                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
822                         127, 0, adc_vol_tlv),
823         /* ADC Boost Volume Control */
824         SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
825                         RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
826                         3, 0, adc_bst_tlv),
827         /* Class D speaker gain ratio */
828         SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
829         /* DMIC */
830         SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
831                 rt5640_dmic_get, rt5640_dmic_put),
832
833 #ifdef RT5640_REG_RW
834         {
835                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
836                 .name = "Register Control",
837                 .info = rt5640_regctl_info,
838                 .get = rt5640_regctl_get,
839                 .put = rt5640_regctl_put,
840         },
841 #endif
842 };
843
844 /**
845  * set_dmic_clk - Set parameter of dmic.
846  *
847  * @w: DAPM widget.
848  * @kcontrol: The kcontrol of this widget.
849  * @event: Event id.
850  *
851  * Choose dmic clock between 1MHz and 3MHz.
852  * It is better for clock to approximate 3MHz.
853  */
854 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
855         struct snd_kcontrol *kcontrol, int event)
856 {
857         struct snd_soc_codec *codec = w->codec;
858         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
859         int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
860         mutex_lock(&rt5640->lock);
861         CHECK_I2C_SHUTDOWN(rt5640, codec)
862
863         rate = rt5640->lrck[rt5640->aif_pu] << 8;
864         red = 3000000 * 12;
865         for (i = 0; i < ARRAY_SIZE(div); i++) {
866                 bound = div[i] * 3000000;
867                 if (rate > bound)
868                         continue;
869                 temp = bound - rate;
870                 if (temp < red) {
871                         red = temp;
872                         idx = i;
873                 }
874         }
875         if (idx < 0)
876                 dev_err(codec->dev, "Failed to set DMIC clock\n");
877         else
878                 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
879                                         idx << RT5640_DMIC_CLK_SFT);
880         mutex_unlock(&rt5640->lock);
881         return idx;
882 }
883
884 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
885                          struct snd_soc_dapm_widget *sink)
886 {
887         unsigned int val;
888         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(source->codec);
889         mutex_lock(&rt5640->lock);
890         CHECK_I2C_SHUTDOWN(rt5640, source->codec)
891
892         val = snd_soc_read(source->codec, RT5640_GLB_CLK);
893         val &= RT5640_SCLK_SRC_MASK;
894         mutex_unlock(&rt5640->lock);
895         if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
896                 return 1;
897         else
898                 return 0;
899 }
900
901 /* Digital Mixer */
902 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
903         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
904                         RT5640_M_ADC_L1_SFT, 1, 1),
905         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
906                         RT5640_M_ADC_L2_SFT, 1, 1),
907 };
908
909 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
910         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
911                         RT5640_M_ADC_R1_SFT, 1, 1),
912         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
913                         RT5640_M_ADC_R2_SFT, 1, 1),
914 };
915
916 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
917         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
918                         RT5640_M_MONO_ADC_L1_SFT, 1, 1),
919         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
920                         RT5640_M_MONO_ADC_L2_SFT, 1, 1),
921 };
922
923 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
924         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
925                         RT5640_M_MONO_ADC_R1_SFT, 1, 1),
926         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
927                         RT5640_M_MONO_ADC_R2_SFT, 1, 1),
928 };
929
930 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
931         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
932                         RT5640_M_ADCMIX_L_SFT, 1, 1),
933         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
934                         RT5640_M_IF1_DAC_L_SFT, 1, 1),
935 };
936
937 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
938         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
939                         RT5640_M_ADCMIX_R_SFT, 1, 1),
940         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
941                         RT5640_M_IF1_DAC_R_SFT, 1, 1),
942 };
943
944 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
945         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
946                         RT5640_M_DAC_L1_SFT, 1, 1),
947         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
948                         RT5640_M_DAC_L2_SFT, 1, 1),
949         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
950                         RT5640_M_ANC_DAC_L_SFT, 1, 1),
951 };
952
953 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
954         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
955                         RT5640_M_DAC_R1_SFT, 1, 1),
956         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
957                         RT5640_M_DAC_R2_SFT, 1, 1),
958         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
959                         RT5640_M_ANC_DAC_R_SFT, 1, 1),
960 };
961
962 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
963         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
964                         RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
965         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
966                         RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
967         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
968                         RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
969 };
970
971 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
972         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
973                         RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
974         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
975                         RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
976         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
977                         RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
978 };
979
980 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
981         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
982                         RT5640_M_STO_L_DAC_L_SFT, 1, 1),
983         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
984                         RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
985 };
986
987 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
988         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
989                         RT5640_M_STO_R_DAC_R_SFT, 1, 1),
990         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
991                         RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
992 };
993
994 /* Analog Input Mixer */
995 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
996         SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
997                         RT5640_M_HP_L_RM_L_SFT, 1, 1),
998         SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
999                         RT5640_M_IN_L_RM_L_SFT, 1, 1),
1000         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
1001                         RT5640_M_BST4_RM_L_SFT, 1, 1),
1002         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
1003                         RT5640_M_BST1_RM_L_SFT, 1, 1),
1004         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
1005                         RT5640_M_OM_L_RM_L_SFT, 1, 1),
1006 };
1007
1008 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
1009         SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
1010                         RT5640_M_HP_R_RM_R_SFT, 1, 1),
1011         SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
1012                         RT5640_M_IN_R_RM_R_SFT, 1, 1),
1013         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
1014                         RT5640_M_BST4_RM_R_SFT, 1, 1),
1015         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
1016                         RT5640_M_BST1_RM_R_SFT, 1, 1),
1017         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
1018                         RT5640_M_OM_R_RM_R_SFT, 1, 1),
1019 };
1020
1021 /* Analog Output Mixer */
1022 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
1023         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
1024                         RT5640_M_RM_L_SM_L_SFT, 1, 1),
1025         SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
1026                         RT5640_M_IN_L_SM_L_SFT, 1, 1),
1027         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
1028                         RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
1029         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
1030                         RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
1031         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
1032                         RT5640_M_OM_L_SM_L_SFT, 1, 1),
1033 };
1034
1035 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
1036         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
1037                         RT5640_M_RM_R_SM_R_SFT, 1, 1),
1038         SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
1039                         RT5640_M_IN_R_SM_R_SFT, 1, 1),
1040         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
1041                         RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
1042         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
1043                         RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
1044         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
1045                         RT5640_M_OM_R_SM_R_SFT, 1, 1),
1046 };
1047
1048 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
1049         SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
1050                         RT5640_M_SM_L_OM_L_SFT, 1, 1),
1051         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
1052                         RT5640_M_BST1_OM_L_SFT, 1, 1),
1053         SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
1054                         RT5640_M_IN_L_OM_L_SFT, 1, 1),
1055         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
1056                         RT5640_M_RM_L_OM_L_SFT, 1, 1),
1057         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
1058                         RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
1059         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
1060                         RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
1061         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
1062                         RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
1063 };
1064
1065 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
1066         SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
1067                         RT5640_M_SM_L_OM_R_SFT, 1, 1),
1068         SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
1069                         RT5640_M_BST4_OM_R_SFT, 1, 1),
1070         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
1071                         RT5640_M_BST1_OM_R_SFT, 1, 1),
1072         SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
1073                         RT5640_M_IN_R_OM_R_SFT, 1, 1),
1074         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
1075                         RT5640_M_RM_R_OM_R_SFT, 1, 1),
1076         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
1077                         RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
1078         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
1079                         RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
1080         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
1081                         RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
1082 };
1083
1084 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
1085         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
1086                         RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
1087         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
1088                         RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
1089         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
1090                         RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1091         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1092                         RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1093         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1094                         RT5640_M_BST1_SPM_L_SFT, 1, 1),
1095 };
1096
1097 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1098         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1099                         RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1100         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1101                         RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1102         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1103                         RT5640_M_BST1_SPM_R_SFT, 1, 1),
1104 };
1105
1106 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1107         SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1108                         RT5640_M_DAC2_HM_SFT, 1, 1),
1109         SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1110                         RT5640_M_DAC1_HM_SFT, 1, 1),
1111         SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1112                         RT5640_M_HPVOL_HM_SFT, 1, 1),
1113 };
1114
1115 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1116         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1117                         RT5640_M_DAC_L1_LM_SFT, 1, 1),
1118         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1119                         RT5640_M_DAC_R1_LM_SFT, 1, 1),
1120         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1121                         RT5640_M_OV_L_LM_SFT, 1, 1),
1122         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1123                         RT5640_M_OV_R_LM_SFT, 1, 1),
1124 };
1125
1126 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1127         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1128                         RT5640_M_DAC_R2_MM_SFT, 1, 1),
1129         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1130                         RT5640_M_DAC_L2_MM_SFT, 1, 1),
1131         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1132                         RT5640_M_OV_R_MM_SFT, 1, 1),
1133         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1134                         RT5640_M_OV_L_MM_SFT, 1, 1),
1135         SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1136                         RT5640_M_BST1_MM_SFT, 1, 1),
1137 };
1138
1139 /* INL/R source */
1140 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1141
1142 static const SOC_ENUM_SINGLE_DECL(
1143         rt5640_inl_enum, RT5640_INL_INR_VOL,
1144         RT5640_INL_SEL_SFT, rt5640_inl_src);
1145
1146 static const struct snd_kcontrol_new rt5640_inl_mux =
1147         SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1148
1149 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1150
1151 static const SOC_ENUM_SINGLE_DECL(
1152         rt5640_inr_enum, RT5640_INL_INR_VOL,
1153         RT5640_INR_SEL_SFT, rt5640_inr_src);
1154
1155 static const struct snd_kcontrol_new rt5640_inr_mux =
1156         SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1157
1158 /* Stereo ADC source */
1159 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1160
1161 static const SOC_ENUM_SINGLE_DECL(
1162         rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1163         RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1164
1165 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1166         SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1167
1168 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1169         SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1170
1171 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1172
1173 static const SOC_ENUM_SINGLE_DECL(
1174         rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1175         RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1176
1177 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1178         SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1179
1180 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1181         SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1182
1183 /* Mono ADC source */
1184 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1185
1186 static const SOC_ENUM_SINGLE_DECL(
1187         rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1188         RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1189
1190 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1191         SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1192
1193 static const char *rt5640_mono_adc_l2_src[] = {
1194         "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1195 };
1196
1197 static const SOC_ENUM_SINGLE_DECL(
1198         rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1199         RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1200
1201 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1202         SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1203
1204 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1205
1206 static const SOC_ENUM_SINGLE_DECL(
1207         rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1208         RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1209
1210 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1211         SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1212
1213 static const char *rt5640_mono_adc_r2_src[] = {
1214         "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1215 };
1216
1217 static const SOC_ENUM_SINGLE_DECL(
1218         rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1219         RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1220
1221 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1222         SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1223
1224 /* DAC2 channel source */
1225 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1226
1227 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1228                                 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1229
1230 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1231         SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1232
1233 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1234
1235 static const SOC_ENUM_SINGLE_DECL(
1236         rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1237         RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1238
1239 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1240         SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1241
1242 /* Interface 2  ADC channel source */
1243 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1244
1245 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1246                         RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1247
1248 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1249         SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1250
1251 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1252
1253 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1254                         RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1255
1256 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1257         SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1258
1259 /* digital interface and iis interface map */
1260 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1261         "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1262         "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1263
1264 static const SOC_ENUM_SINGLE_DECL(
1265         rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1266         RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1267
1268 static const struct snd_kcontrol_new rt5640_dai_mux =
1269         SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1270
1271 /* SDI select */
1272 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1273
1274 static const SOC_ENUM_SINGLE_DECL(
1275         rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1276         RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1277
1278 static const struct snd_kcontrol_new rt5640_sdi_mux =
1279         SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1280
1281 static int spk_event(struct snd_soc_dapm_widget *w,
1282         struct snd_kcontrol *kcontrol, int event)
1283 {
1284         struct snd_soc_codec *codec = w->codec;
1285         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1286         mutex_lock(&rt5640->lock);
1287         CHECK_I2C_SHUTDOWN(rt5640, codec)
1288
1289         switch (event) {
1290         case SND_SOC_DAPM_POST_PMU:
1291                 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1292                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1293                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1294                 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1295                 break;
1296
1297         case SND_SOC_DAPM_PRE_PMD:
1298                 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1299                 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1300                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1301                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1302                 break;
1303
1304         default:
1305                 mutex_unlock(&rt5640->lock);
1306                 return 0;
1307         }
1308         mutex_unlock(&rt5640->lock);
1309         return 0;
1310 }
1311
1312 #if USE_ONEBIT_DEPOP
1313 void hp_amp_power(struct snd_soc_codec *codec, int on)
1314 {
1315         static int hp_amp_power_count;
1316 //      printk("one bit hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
1317
1318         if (on) {
1319                 if (hp_amp_power_count <= 0) {
1320                         /* depop parameters */
1321                         snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1322                                 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
1323                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1324                                 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1325                                 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
1326                         /* headphone amp power on */
1327                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1328                                 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
1329                         msleep(5);
1330                         snd_soc_update_bits(codec, RT5640_PWR_VOL,
1331                                 RT5640_PWR_HV_L | RT5640_PWR_HV_R,
1332                                 RT5640_PWR_HV_L | RT5640_PWR_HV_R);
1333                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1334                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1335                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA);
1336                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1337                                 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
1338                                 RT5640_PWR_FV1 | RT5640_PWR_FV2 );
1339                 }
1340                 hp_amp_power_count++;
1341         } else {
1342                 hp_amp_power_count--;
1343                 if (hp_amp_power_count <= 0) {
1344                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1345                                 RT5640_HP_CB_MASK, RT5640_HP_CB_PD);
1346                         msleep(30);
1347                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1348                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1349                                 0);
1350                         snd_soc_write(codec, RT5640_DEPOP_M2, 0x3100);
1351                 }
1352         }
1353 }
1354
1355 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
1356 {
1357         hp_amp_power(codec, 1);
1358         /* headphone unmute sequence */
1359         snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1360                 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
1361                 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
1362         snd_soc_update_bits(codec, RT5640_CHARGE_PUMP,
1363                 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
1364         snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1365                 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1366                 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
1367                 (RT5640_CP_FQ_24_KHZ << RT5640_CP_FQ2_SFT) |
1368                 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
1369         rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0x1c00);
1370         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1371                 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CO_MASK,
1372                 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CO_EN);
1373         msleep(5);
1374         snd_soc_update_bits(codec, RT5640_HP_VOL,
1375                 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1376         msleep(65);
1377         //snd_soc_update_bits(codec, RT5640_HP_CALIB_AMP_DET,
1378         //      RT5640_HPD_PS_MASK, RT5640_HPD_PS_EN);
1379 }
1380
1381 static void rt5640_pmd_depop(struct snd_soc_codec *codec)
1382 {
1383         snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1384                 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1385                 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ1_SFT) |
1386                 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1387                 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ3_SFT));
1388         rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0x7c00);
1389         //snd_soc_update_bits(codec, RT5640_HP_CALIB_AMP_DET,
1390         //      RT5640_HPD_PS_MASK, RT5640_HPD_PS_DIS);
1391         snd_soc_update_bits(codec, RT5640_HP_VOL,
1392                 RT5640_L_MUTE | RT5640_R_MUTE,
1393                 RT5640_L_MUTE | RT5640_R_MUTE);
1394         msleep(50);
1395         hp_amp_power(codec, 0);
1396 }
1397
1398 #else //seq
1399 void hp_amp_power(struct snd_soc_codec *codec, int on)
1400 {
1401         static int hp_amp_power_count;
1402 //      printk("hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
1403
1404         if (on) {
1405                 if (hp_amp_power_count <= 0) {
1406                         /* depop parameters */
1407                         snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1408                                 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
1409                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1410                                 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1411                                 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
1412                         /* headphone amp power on */
1413                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1414                                 RT5640_PWR_FV1 | RT5640_PWR_FV2 , 0);
1415                         snd_soc_update_bits(codec, RT5640_PWR_VOL,
1416                                 RT5640_PWR_HV_L | RT5640_PWR_HV_R,
1417                                 RT5640_PWR_HV_L | RT5640_PWR_HV_R);
1418                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1419                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM,
1420                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM);
1421                         msleep(50);
1422                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1423                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1424                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1425                         snd_soc_update_bits(codec, RT5640_CHARGE_PUMP,
1426                                 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
1427                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1428                                 RT5640_HP_CO_MASK | RT5640_HP_SG_MASK,
1429                                 RT5640_HP_CO_EN | RT5640_HP_SG_EN);
1430                 }
1431                 hp_amp_power_count++;
1432         } else {
1433                 hp_amp_power_count--;
1434                 if (hp_amp_power_count <= 0) {
1435                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1436                                 RT5640_HP_SG_MASK | RT5640_HP_L_SMT_MASK |
1437                                 RT5640_HP_R_SMT_MASK, RT5640_HP_SG_DIS |
1438                                 RT5640_HP_L_SMT_DIS | RT5640_HP_R_SMT_DIS);
1439                         /* headphone amp power down */
1440                         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1441                                 RT5640_SMT_TRIG_MASK | RT5640_HP_CD_PD_MASK |
1442                                 RT5640_HP_CO_MASK | RT5640_HP_CP_MASK |
1443                                 RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1444                                 RT5640_SMT_TRIG_DIS | RT5640_HP_CD_PD_EN |
1445                                 RT5640_HP_CO_DIS | RT5640_HP_CP_PD |
1446                                 RT5640_HP_SG_EN | RT5640_HP_CB_PD);
1447                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1448                                 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM,
1449                                 0);
1450                 }
1451         }
1452 }
1453
1454 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
1455 {
1456         hp_amp_power(codec, 1);
1457         /* headphone unmute sequence */
1458         snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1459                 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1460                 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
1461                 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1462                 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
1463         rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0xfc00);
1464         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1465                 RT5640_SMT_TRIG_MASK, RT5640_SMT_TRIG_EN);
1466         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1467                 RT5640_RSTN_MASK, RT5640_RSTN_EN);
1468         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1469                 RT5640_RSTN_MASK | RT5640_HP_L_SMT_MASK | RT5640_HP_R_SMT_MASK,
1470                 RT5640_RSTN_DIS | RT5640_HP_L_SMT_EN | RT5640_HP_R_SMT_EN);
1471         snd_soc_update_bits(codec, RT5640_HP_VOL,
1472                 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1473         msleep(100);
1474         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1475                 RT5640_HP_SG_MASK | RT5640_HP_L_SMT_MASK |
1476                 RT5640_HP_R_SMT_MASK, RT5640_HP_SG_DIS |
1477                 RT5640_HP_L_SMT_DIS | RT5640_HP_R_SMT_DIS);
1478         msleep(20);
1479 }
1480
1481 static void rt5640_pmd_depop(struct snd_soc_codec *codec)
1482 {
1483         /* headphone mute sequence */
1484         snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1485                 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1486                 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ1_SFT) |
1487                 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1488                 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ3_SFT));
1489         rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0xfc00);
1490         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1491                 RT5640_HP_SG_MASK, RT5640_HP_SG_EN);
1492         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1493                 RT5640_RSTP_MASK, RT5640_RSTP_EN);
1494         snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1495                 RT5640_RSTP_MASK | RT5640_HP_L_SMT_MASK |
1496                 RT5640_HP_R_SMT_MASK, RT5640_RSTP_DIS |
1497                 RT5640_HP_L_SMT_EN | RT5640_HP_R_SMT_EN);
1498         msleep(90);
1499         snd_soc_update_bits(codec, RT5640_HP_VOL,
1500                 RT5640_L_MUTE | RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
1501         msleep(30);
1502
1503         hp_amp_power(codec, 0);
1504 }
1505 #endif
1506
1507 static int hp_event(struct snd_soc_dapm_widget *w,
1508         struct snd_kcontrol *kcontrol, int event)
1509 {
1510         struct snd_soc_codec *codec = w->codec;
1511
1512         switch (event) {
1513         case SND_SOC_DAPM_POST_PMU:
1514                 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1515                 rt5640_pmu_depop(codec);
1516                 break;
1517
1518         case SND_SOC_DAPM_PRE_PMD:
1519                 pr_info("hp_event --SND_SOC_DAPM_PRE_PMD\n");
1520                 rt5640_pmd_depop(codec);
1521                 break;
1522
1523         default:
1524                 return 0;
1525         }
1526
1527         return 0;
1528 }
1529
1530
1531 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
1532         struct snd_kcontrol *kcontrol, int event)
1533 {
1534         struct snd_soc_codec *codec = w->codec;
1535         unsigned int val, mask;
1536         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1537         mutex_lock(&rt5640->lock);
1538         CHECK_I2C_SHUTDOWN(rt5640, codec)
1539
1540         switch (event) {
1541         case SND_SOC_DAPM_PRE_PMU:
1542                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1543                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
1544                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
1545                 snd_soc_update_bits(codec, RT5640_DMIC,
1546                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
1547                         RT5640_DMIC_1_DP_MASK,
1548                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
1549                         RT5640_DMIC_1_DP_IN1P);
1550                 snd_soc_update_bits(codec, RT5640_DMIC,
1551                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
1552         default:
1553                 mutex_unlock(&rt5640->lock);
1554                 return 0;
1555         }
1556
1557         mutex_unlock(&rt5640->lock);
1558         return 0;
1559 }
1560
1561 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
1562         struct snd_kcontrol *kcontrol, int event)
1563 {
1564         struct snd_soc_codec *codec = w->codec;
1565         unsigned int val, mask;
1566         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1567         mutex_lock(&rt5640->lock);
1568         CHECK_I2C_SHUTDOWN(rt5640, codec)
1569
1570         switch (event) {
1571         case SND_SOC_DAPM_PRE_PMU:
1572                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1573                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
1574                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
1575                 snd_soc_update_bits(codec, RT5640_DMIC,
1576                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
1577                         RT5640_DMIC_2_DP_MASK,
1578                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
1579                         RT5640_DMIC_2_DP_IN1N);
1580                 snd_soc_update_bits(codec, RT5640_DMIC,
1581                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
1582         default:
1583                 mutex_unlock(&rt5640->lock);
1584                 return 0;
1585         }
1586
1587         mutex_unlock(&rt5640->lock);
1588         return 0;
1589 }
1590
1591 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1592         SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1593                         RT5640_PWR_PLL_BIT, 0, NULL, 0),
1594         /* Input Side */
1595         /* micbias */
1596         SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1597                         RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1598         SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1599                         RT5640_PWR_MB1_BIT, 0),
1600         SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1601                         RT5640_PWR_MB2_BIT, 0),
1602         /* Input Lines */
1603
1604         SND_SOC_DAPM_INPUT("MIC1"),
1605         SND_SOC_DAPM_INPUT("MIC2"),
1606         SND_SOC_DAPM_INPUT("DMIC1"),
1607         SND_SOC_DAPM_INPUT("DMIC2"),
1608         SND_SOC_DAPM_INPUT("IN1P"),
1609         SND_SOC_DAPM_INPUT("IN1N"),
1610         SND_SOC_DAPM_INPUT("IN2P"),
1611         SND_SOC_DAPM_INPUT("IN2N"),
1612 #if 0
1613         SND_SOC_DAPM_INPUT("DMIC L1"),
1614         SND_SOC_DAPM_INPUT("DMIC R1"),
1615         SND_SOC_DAPM_INPUT("DMIC L2"),
1616         SND_SOC_DAPM_INPUT("DMIC R2"),
1617 #else
1618         SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
1619                 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1620         SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1621         SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
1622                 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1623         SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1624 #endif
1625         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1626                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1627         /* Boost */
1628         SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1629                 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1630         SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1631                 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1632         /* Input Volume */
1633         SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1634                 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1635         SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1636                 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1637         /* IN Mux */
1638         SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1639         SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1640         /* REC Mixer */
1641         SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1642                         rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1643         SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1644                         rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1645         /* ADCs */
1646         SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1647                         RT5640_PWR_ADC_L_BIT, 0),
1648         SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1649                         RT5640_PWR_ADC_R_BIT, 0),
1650         /* ADC Mux */
1651         SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1652                                 &rt5640_sto_adc_l2_mux),
1653         SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1654                                 &rt5640_sto_adc_r2_mux),
1655         SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1656                                 &rt5640_sto_adc_l1_mux),
1657         SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1658                                 &rt5640_sto_adc_r1_mux),
1659         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1660                                 &rt5640_mono_adc_l2_mux),
1661         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1662                                 &rt5640_mono_adc_l1_mux),
1663         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1664                                 &rt5640_mono_adc_r1_mux),
1665         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1666                                 &rt5640_mono_adc_r2_mux),
1667         /* ADC Mixer */
1668         SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1669                 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1670         SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1671                 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1672         SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1673                 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1674         SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1675                 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1676         SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1677                 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1678         SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1679                 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1680         SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1681                 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1682
1683         /* IF2 Mux */
1684         SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1685                                 &rt5640_if2_adc_l_mux),
1686         SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1687                                 &rt5640_if2_adc_r_mux),
1688
1689         /* Digital Interface */
1690         SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1691                 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1692         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1693         SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1694         SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1695         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1696         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1697         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1698         SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1699                 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1700         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1701         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1702         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1703         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1704         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1705         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1706         SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1707                 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1708         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1709         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1710         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1711         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1712         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1713         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1714
1715         /* Digital Interface Select */
1716         SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1717         SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1718         SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1719         SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1720         SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1721
1722         SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1723         SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1724         SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1725         SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1726         SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1727
1728         SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1729         SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1730
1731         /* Audio Interface */
1732         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1733         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1734         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1735         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1736         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1737         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1738
1739         /* Audio DSP */
1740         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1741
1742         /* ANC */
1743         SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1744
1745         /* Output Side */
1746         /* DAC mixer before sound effect  */
1747         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1748                 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1749         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1750                 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1751
1752         /* DAC2 channel Mux */
1753         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1754                                 &rt5640_dac_l2_mux),
1755         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1756                                 &rt5640_dac_r2_mux),
1757
1758         /* DAC Mixer */
1759         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1760                 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1761         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1762                 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1763         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1764                 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1765         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1766                 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1767         SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1768                 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1769         SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1770                 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1771         /* DACs */
1772         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1773                         RT5640_PWR_DAC_L1_BIT, 0),
1774         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1775                         RT5640_PWR_DAC_L2_BIT, 0),
1776         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1777                         RT5640_PWR_DAC_R1_BIT, 0),
1778         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1779                         RT5640_PWR_DAC_R2_BIT, 0),
1780         /* SPK/OUT Mixer */
1781         SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1782                 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1783         SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1784                 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1785         SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1786                 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1787         SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1788                 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1789         /* Ouput Volume */
1790         SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1791                 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1792         SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1793                 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1794         SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1795                 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1796         SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1797                 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1798         SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1799                 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1800         SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1801                 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1802         /* SPO/HPO/LOUT/Mono Mixer */
1803         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1804                 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1805         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1806                 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1807
1808         SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1809                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1810         SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1811                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1812         SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1813                 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1814         SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1815                 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1816
1817         SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1818                 RT5640_PWR_MA_BIT, 0, NULL, 0),
1819
1820         SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1821         SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1822                                         SND_SOC_DAPM_POST_PMU),
1823
1824         SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1825                 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1826
1827         SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1828                 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1829
1830         SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1831                 SND_SOC_NOPM, 0, spk_event,
1832                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1833
1834         /* Output Lines */
1835         SND_SOC_DAPM_OUTPUT("SPOLP"),
1836         SND_SOC_DAPM_OUTPUT("SPOLN"),
1837         SND_SOC_DAPM_OUTPUT("SPORP"),
1838         SND_SOC_DAPM_OUTPUT("SPORN"),
1839         SND_SOC_DAPM_OUTPUT("HPOL"),
1840         SND_SOC_DAPM_OUTPUT("HPOR"),
1841         SND_SOC_DAPM_OUTPUT("LOUTL"),
1842         SND_SOC_DAPM_OUTPUT("LOUTR"),
1843         SND_SOC_DAPM_OUTPUT("MonoP"),
1844         SND_SOC_DAPM_OUTPUT("MonoN"),
1845 };
1846
1847 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1848         {"IN1P", NULL, "LDO2"},
1849         {"IN2P", NULL, "LDO2"},
1850
1851         {"IN1P", NULL, "MIC1"},
1852         {"IN1N", NULL, "MIC1"},
1853         {"IN2P", NULL, "MIC2"},
1854         {"IN2N", NULL, "MIC2"},
1855
1856         {"DMIC L1", NULL, "DMIC1"},
1857         {"DMIC R1", NULL, "DMIC1"},
1858         {"DMIC L2", NULL, "DMIC2"},
1859         {"DMIC R2", NULL, "DMIC2"},
1860
1861         {"BST1", NULL, "IN1P"},
1862         {"BST1", NULL, "IN1N"},
1863         {"BST2", NULL, "IN2P"},
1864         {"BST2", NULL, "IN2N"},
1865
1866         {"INL VOL", NULL, "IN2P"},
1867         {"INR VOL", NULL, "IN2N"},
1868
1869         {"RECMIXL", "HPOL Switch", "HPOL"},
1870         {"RECMIXL", "INL Switch", "INL VOL"},
1871         {"RECMIXL", "BST2 Switch", "BST2"},
1872         {"RECMIXL", "BST1 Switch", "BST1"},
1873         {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1874
1875         {"RECMIXR", "HPOR Switch", "HPOR"},
1876         {"RECMIXR", "INR Switch", "INR VOL"},
1877         {"RECMIXR", "BST2 Switch", "BST2"},
1878         {"RECMIXR", "BST1 Switch", "BST1"},
1879         {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1880
1881         {"ADC L", NULL, "RECMIXL"},
1882         {"ADC R", NULL, "RECMIXR"},
1883
1884         {"DMIC L1", NULL, "DMIC CLK"},
1885         {"DMIC L2", NULL, "DMIC CLK"},
1886
1887         {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1888         {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1889         {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1890         {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1891         {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1892
1893         {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1894         {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1895         {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1896         {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1897         {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1898
1899         {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1900         {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1901         {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1902         {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1903         {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1904
1905         {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1906         {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1907         {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1908         {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1909         {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1910
1911         {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1912         {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1913         {"Stereo ADC MIXL", NULL, "stereo filter"},
1914         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1915
1916         {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1917         {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1918         {"Stereo ADC MIXR", NULL, "stereo filter"},
1919         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1920
1921         {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1922         {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1923         {"Mono ADC MIXL", NULL, "mono left filter"},
1924         {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1925
1926         {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1927         {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1928         {"Mono ADC MIXR", NULL, "mono right filter"},
1929         {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1930
1931         {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1932         {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1933
1934         {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1935         {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1936         {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1937         {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1938         {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1939         {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1940
1941         {"IF1 ADC", NULL, "I2S1"},
1942         {"IF1 ADC", NULL, "IF1 ADC L"},
1943         {"IF1 ADC", NULL, "IF1 ADC R"},
1944         {"IF2 ADC", NULL, "I2S2"},
1945         {"IF2 ADC", NULL, "IF2 ADC L"},
1946         {"IF2 ADC", NULL, "IF2 ADC R"},
1947         {"IF3 ADC", NULL, "I2S3"},
1948         {"IF3 ADC", NULL, "IF3 ADC L"},
1949         {"IF3 ADC", NULL, "IF3 ADC R"},
1950
1951         {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1952         {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1953         {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1954         {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1955         {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1956         {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1957         {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1958         {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1959         {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1960         {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1961
1962         {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1963         {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1964         {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1965         {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1966         {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1967         {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1968         {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1969         {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1970         {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1971         {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1972
1973         {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1974         {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1975         {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1976         {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1977         {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1978         {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1979         {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1980         {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1981
1982         {"AIF1TX", NULL, "DAI1 TX Mux"},
1983         {"AIF1TX", NULL, "SDI1 TX Mux"},
1984         {"AIF2TX", NULL, "DAI2 TX Mux"},
1985         {"AIF2TX", NULL, "SDI2 TX Mux"},
1986         {"AIF3TX", NULL, "DAI3 TX Mux"},
1987
1988         {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1989         {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1990         {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1991         {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1992         {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1993         {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1994         {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1995         {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1996
1997         {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1998         {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1999         {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
2000         {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
2001         {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
2002         {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
2003         {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
2004         {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
2005
2006         {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
2007         {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
2008         {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
2009         {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
2010         {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
2011         {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
2012         {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
2013         {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
2014
2015         {"IF1 DAC", NULL, "I2S1"},
2016         {"IF1 DAC", NULL, "DAI1 RX Mux"},
2017         {"IF2 DAC", NULL, "I2S2"},
2018         {"IF2 DAC", NULL, "DAI2 RX Mux"},
2019         {"IF3 DAC", NULL, "I2S3"},
2020         {"IF3 DAC", NULL, "DAI3 RX Mux"},
2021
2022         {"IF1 DAC L", NULL, "IF1 DAC"},
2023         {"IF1 DAC R", NULL, "IF1 DAC"},
2024         {"IF2 DAC L", NULL, "IF2 DAC"},
2025         {"IF2 DAC R", NULL, "IF2 DAC"},
2026         {"IF3 DAC L", NULL, "IF3 DAC"},
2027         {"IF3 DAC R", NULL, "IF3 DAC"},
2028
2029         {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
2030         {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
2031         {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
2032         {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
2033
2034         {"ANC", NULL, "Stereo ADC MIXL"},
2035         {"ANC", NULL, "Stereo ADC MIXR"},
2036
2037         {"Audio DSP", NULL, "DAC MIXL"},
2038         {"Audio DSP", NULL, "DAC MIXR"},
2039
2040         {"DAC L2 Mux", "IF2", "IF2 DAC L"},
2041         {"DAC L2 Mux", "IF3", "IF3 DAC L"},
2042         {"DAC L2 Mux", "Base L/R", "Audio DSP"},
2043
2044         {"DAC R2 Mux", "IF2", "IF2 DAC R"},
2045         {"DAC R2 Mux", "IF3", "IF3 DAC R"},
2046
2047         {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
2048         {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2049         {"Stereo DAC MIXL", "ANC Switch", "ANC"},
2050         {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
2051         {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2052         {"Stereo DAC MIXR", "ANC Switch", "ANC"},
2053
2054         {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
2055         {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2056         {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
2057         {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
2058         {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2059         {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
2060
2061         {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
2062         {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2063         {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
2064         {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2065
2066         {"DAC L1", NULL, "Stereo DAC MIXL"},
2067         {"DAC L1", NULL, "PLL1", check_sysclk1_source},
2068         {"DAC R1", NULL, "Stereo DAC MIXR"},
2069         {"DAC R1", NULL, "PLL1", check_sysclk1_source},
2070         {"DAC L2", NULL, "Mono DAC MIXL"},
2071         {"DAC L2", NULL, "PLL1", check_sysclk1_source},
2072         {"DAC R2", NULL, "Mono DAC MIXR"},
2073         {"DAC R2", NULL, "PLL1", check_sysclk1_source},
2074
2075         {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
2076         {"SPK MIXL", "INL Switch", "INL VOL"},
2077         {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
2078         {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
2079         {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
2080         {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
2081         {"SPK MIXR", "INR Switch", "INR VOL"},
2082         {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
2083         {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
2084         {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
2085
2086         {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
2087         {"OUT MIXL", "BST1 Switch", "BST1"},
2088         {"OUT MIXL", "INL Switch", "INL VOL"},
2089         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
2090         {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
2091         {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
2092         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
2093
2094         {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
2095         {"OUT MIXR", "BST2 Switch", "BST2"},
2096         {"OUT MIXR", "BST1 Switch", "BST1"},
2097         {"OUT MIXR", "INR Switch", "INR VOL"},
2098         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
2099         {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
2100         {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
2101         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
2102
2103         {"SPKVOL L", NULL, "SPK MIXL"},
2104         {"SPKVOL R", NULL, "SPK MIXR"},
2105         {"HPOVOL L", NULL, "OUT MIXL"},
2106         {"HPOVOL R", NULL, "OUT MIXR"},
2107         {"OUTVOL L", NULL, "OUT MIXL"},
2108         {"OUTVOL R", NULL, "OUT MIXR"},
2109
2110         {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
2111         {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
2112         {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
2113         {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
2114         {"SPOL MIX", "BST1 Switch", "BST1"},
2115         {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
2116         {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
2117         {"SPOR MIX", "BST1 Switch", "BST1"},
2118
2119         {"HPOL MIX", "DAC2 Switch", "DAC L2"},
2120         {"HPOL MIX", "DAC1 Switch", "DAC L1"},
2121         {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
2122         {"HPOR MIX", "DAC2 Switch", "DAC R2"},
2123         {"HPOR MIX", "DAC1 Switch", "DAC R1"},
2124         {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
2125
2126         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
2127         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
2128         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
2129         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
2130
2131         {"Mono MIX", "DAC R2 Switch", "DAC R2"},
2132         {"Mono MIX", "DAC L2 Switch", "DAC L2"},
2133         {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
2134         {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
2135         {"Mono MIX", "BST1 Switch", "BST1"},
2136
2137         {"HP L amp", NULL, "HPOL MIX"},
2138         {"HP R amp", NULL, "HPOR MIX"},
2139
2140 /*      {"HP L amp", NULL, "Improve HP amp drv"},
2141         {"HP R amp", NULL, "Improve HP amp drv"}, */
2142
2143         {"SPOLP", NULL, "SPOL MIX"},
2144         {"SPOLN", NULL, "SPOL MIX"},
2145         {"SPORP", NULL, "SPOR MIX"},
2146         {"SPORN", NULL, "SPOR MIX"},
2147
2148         {"SPOLP", NULL, "Improve SPK amp drv"},
2149         {"SPOLN", NULL, "Improve SPK amp drv"},
2150         {"SPORP", NULL, "Improve SPK amp drv"},
2151         {"SPORN", NULL, "Improve SPK amp drv"},
2152
2153         {"HPOL", NULL, "Improve HP amp drv"},
2154         {"HPOR", NULL, "Improve HP amp drv"},
2155
2156         {"HPOL", NULL, "HP L amp"},
2157         {"HPOR", NULL, "HP R amp"},
2158         {"LOUTL", NULL, "LOUT MIX"},
2159         {"LOUTR", NULL, "LOUT MIX"},
2160         {"MonoP", NULL, "Mono MIX"},
2161         {"MonoN", NULL, "Mono MIX"},
2162         {"MonoP", NULL, "Improve mono amp drv"},
2163 };
2164
2165 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
2166 {
2167         int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
2168
2169         if (codec == NULL)
2170                 return -EINVAL;
2171
2172         val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
2173         switch (dai_id) {
2174         case RT5640_AIF1:
2175                 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
2176                         val == RT5640_IF_113)
2177                         ret |= RT5640_U_IF1;
2178                 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
2179                         val == RT5640_IF_113)
2180                         ret |= RT5640_U_IF2;
2181                 if (val == RT5640_IF_321 || val == RT5640_IF_231)
2182                         ret |= RT5640_U_IF3;
2183                 break;
2184
2185         case RT5640_AIF2:
2186                 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
2187                         val == RT5640_IF_223)
2188                         ret |= RT5640_U_IF1;
2189                 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
2190                         val == RT5640_IF_223)
2191                         ret |= RT5640_U_IF2;
2192                 if (val == RT5640_IF_132 || val == RT5640_IF_312)
2193                         ret |= RT5640_U_IF3;
2194                 break;
2195
2196 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2197         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2198         case RT5640_AIF3:
2199                 if (val == RT5640_IF_312 || val == RT5640_IF_321)
2200                         ret |= RT5640_U_IF1;
2201                 if (val == RT5640_IF_132 || val == RT5640_IF_231)
2202                         ret |= RT5640_U_IF2;
2203                 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
2204                         val == RT5640_IF_113 || val == RT5640_IF_223)
2205                         ret |= RT5640_U_IF3;
2206                 break;
2207 #endif
2208
2209         default:
2210                 ret = -EINVAL;
2211                 break;
2212         }
2213
2214         return ret;
2215 }
2216
2217 static int get_clk_info(int sclk, int rate)
2218 {
2219         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
2220
2221         if (sclk <= 0 || rate <= 0)
2222                 return -EINVAL;
2223
2224         rate = rate << 8;
2225         for (i = 0; i < ARRAY_SIZE(pd); i++)
2226                 if (sclk == rate * pd[i])
2227                         return i;
2228
2229         return -EINVAL;
2230 }
2231
2232 static int rt5640_hw_params(struct snd_pcm_substream *substream,
2233         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2234 {
2235         struct snd_soc_pcm_runtime *rtd = substream->private_data;
2236         struct snd_soc_codec *codec = rtd->codec;
2237         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2238         unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
2239         int pre_div, bclk_ms, frame_size;
2240         mutex_lock(&rt5640->lock);
2241         CHECK_I2C_SHUTDOWN(rt5640, codec)
2242
2243         rt5640->lrck[dai->id] = params_rate(params);
2244         pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
2245         if (pre_div < 0) {
2246                 dev_err(codec->dev, "Unsupported clock setting\n");
2247                 mutex_unlock(&rt5640->lock);
2248                 return -EINVAL;
2249         }
2250         frame_size = snd_soc_params_to_frame_size(params);
2251         if (frame_size < 0) {
2252                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2253                 mutex_unlock(&rt5640->lock);
2254                 return -EINVAL;
2255         }
2256         bclk_ms = frame_size > 32 ? 1 : 0;
2257         rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
2258
2259         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2260                 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
2261         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2262                                 bclk_ms, pre_div, dai->id);
2263
2264         switch (params_format(params)) {
2265         case SNDRV_PCM_FORMAT_S16_LE:
2266                 break;
2267         case SNDRV_PCM_FORMAT_S20_3LE:
2268                 val_len |= RT5640_I2S_DL_20;
2269                 break;
2270         case SNDRV_PCM_FORMAT_S24_LE:
2271                 val_len |= RT5640_I2S_DL_24;
2272                 break;
2273         case SNDRV_PCM_FORMAT_S8:
2274                 val_len |= RT5640_I2S_DL_8;
2275                 break;
2276         default:
2277                 mutex_unlock(&rt5640->lock);
2278                 return -EINVAL;
2279         }
2280
2281         dai_sel = get_sdp_info(codec, dai->id);
2282         if (dai_sel < 0) {
2283                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2284                 mutex_unlock(&rt5640->lock);
2285                 return -EINVAL;
2286         }
2287         if (dai_sel & RT5640_U_IF1) {
2288                 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
2289                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
2290                         pre_div << RT5640_I2S_PD1_SFT;
2291                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2292                         RT5640_I2S_DL_MASK, val_len);
2293                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2294         }
2295         if (dai_sel & RT5640_U_IF2) {
2296                 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
2297                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
2298                         pre_div << RT5640_I2S_PD2_SFT;
2299                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2300                         RT5640_I2S_DL_MASK, val_len);
2301                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2302         }
2303 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2304         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2305         if (dai_sel & RT5640_U_IF3) {
2306                 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
2307                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
2308                         pre_div << RT5640_I2S_PD3_SFT;
2309                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2310                         RT5640_I2S_DL_MASK, val_len);
2311                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2312         }
2313 #endif
2314         mutex_unlock(&rt5640->lock);
2315         return 0;
2316 }
2317
2318 static int rt5640_prepare(struct snd_pcm_substream *substream,
2319                                 struct snd_soc_dai *dai)
2320 {
2321         struct snd_soc_pcm_runtime *rtd = substream->private_data;
2322         struct snd_soc_codec *codec = rtd->codec;
2323         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2324
2325         rt5640->aif_pu = dai->id;
2326         return 0;
2327 }
2328
2329 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2330 {
2331         struct snd_soc_codec *codec = dai->codec;
2332         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2333         unsigned int reg_val = 0, dai_sel;
2334         mutex_lock(&rt5640->lock);
2335         CHECK_I2C_SHUTDOWN(rt5640, codec)
2336
2337         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2338         case SND_SOC_DAIFMT_CBM_CFM:
2339                 rt5640->master[dai->id] = 1;
2340                 break;
2341         case SND_SOC_DAIFMT_CBS_CFS:
2342                 reg_val |= RT5640_I2S_MS_S;
2343                 rt5640->master[dai->id] = 0;
2344                 break;
2345         default:
2346                 mutex_unlock(&rt5640->lock);
2347                 return -EINVAL;
2348         }
2349
2350         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2351         case SND_SOC_DAIFMT_NB_NF:
2352                 break;
2353         case SND_SOC_DAIFMT_IB_NF:
2354                 reg_val |= RT5640_I2S_BP_INV;
2355                 break;
2356         default:
2357                 mutex_unlock(&rt5640->lock);
2358                 return -EINVAL;
2359         }
2360
2361         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2362         case SND_SOC_DAIFMT_I2S:
2363                 break;
2364         case SND_SOC_DAIFMT_LEFT_J:
2365                 reg_val |= RT5640_I2S_DF_LEFT;
2366                 break;
2367         case SND_SOC_DAIFMT_DSP_A:
2368                 reg_val |= RT5640_I2S_DF_PCM_A;
2369                 break;
2370         case SND_SOC_DAIFMT_DSP_B:
2371                 reg_val  |= RT5640_I2S_DF_PCM_B;
2372                 break;
2373         default:
2374                 mutex_unlock(&rt5640->lock);
2375                 return -EINVAL;
2376         }
2377
2378         dai_sel = get_sdp_info(codec, dai->id);
2379         if (dai_sel < 0) {
2380                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2381                 mutex_unlock(&rt5640->lock);
2382                 return -EINVAL;
2383         }
2384         if (dai_sel & RT5640_U_IF1) {
2385                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2386                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2387                         RT5640_I2S_DF_MASK, reg_val);
2388         }
2389         if (dai_sel & RT5640_U_IF2) {
2390                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2391                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2392                         RT5640_I2S_DF_MASK, reg_val);
2393         }
2394 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2395         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2396         if (dai_sel & RT5640_U_IF3) {
2397                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2398                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2399                         RT5640_I2S_DF_MASK, reg_val);
2400         }
2401 #endif
2402         mutex_unlock(&rt5640->lock);
2403         return 0;
2404 }
2405
2406 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2407                 int clk_id, unsigned int freq, int dir)
2408 {
2409         struct snd_soc_codec *codec = dai->codec;
2410         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2411         unsigned int reg_val = 0;
2412         mutex_lock(&rt5640->lock);
2413         CHECK_I2C_SHUTDOWN(rt5640, codec)
2414
2415         if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src) {
2416                 mutex_unlock(&rt5640->lock);
2417                 return 0;
2418         }
2419
2420         switch (clk_id) {
2421         case RT5640_SCLK_S_MCLK:
2422                 reg_val |= RT5640_SCLK_SRC_MCLK;
2423                 break;
2424         case RT5640_SCLK_S_PLL1:
2425                 reg_val |= RT5640_SCLK_SRC_PLL1;
2426                 break;
2427         case RT5640_SCLK_S_PLL1_TK:
2428                 reg_val |= RT5640_SCLK_SRC_PLL1T;
2429                 break;
2430         case RT5640_SCLK_S_RCCLK:
2431                 reg_val |= RT5640_SCLK_SRC_RCCLK;
2432                 break;
2433         default:
2434                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2435                 mutex_unlock(&rt5640->lock);
2436                 return -EINVAL;
2437         }
2438         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2439                 RT5640_SCLK_SRC_MASK, reg_val);
2440         rt5640->sysclk = freq;
2441         rt5640->sysclk_src = clk_id;
2442
2443         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2444         mutex_unlock(&rt5640->lock);
2445         return 0;
2446 }
2447
2448 /**
2449  * rt5640_pll_calc - Calcualte PLL M/N/K code.
2450  * @freq_in: external clock provided to codec.
2451  * @freq_out: target clock which codec works on.
2452  * @pll_code: Pointer to structure with M, N, K and bypass flag.
2453  *
2454  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2455  * which make calculation more efficiently.
2456  *
2457  * Returns 0 for success or negative error code.
2458  */
2459 static int rt5640_pll_calc(const unsigned int freq_in,
2460         const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2461 {
2462         int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2463         int n, m, red, n_t, m_t, in_t, out_t, red_t = abs(freq_out - freq_in);
2464         bool bypass = false;
2465
2466         if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2467                 return -EINVAL;
2468
2469         for (n_t = 0; n_t <= max_n; n_t++) {
2470                 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
2471                 if (in_t < 0)
2472                         continue;
2473                 if (in_t == freq_out) {
2474                         bypass = true;
2475                         n = n_t;
2476                         goto code_find;
2477                 }
2478                 for (m_t = 0; m_t <= max_m; m_t++) {
2479                         out_t = in_t / (m_t + 2);
2480                         red = abs(out_t - freq_out);
2481                         if (red < red_t) {
2482                                 n = n_t;
2483                                 m = m_t;
2484                                 if (red == 0)
2485                                         goto code_find;
2486                                 red_t = red;
2487                         }
2488                 }
2489         }
2490         pr_debug("Only get approximation about PLL\n");
2491
2492 code_find:
2493
2494         pll_code->m_bp = bypass;
2495         pll_code->m_code = m;
2496         pll_code->n_code = n;
2497         pll_code->k_code = 2;
2498         return 0;
2499 }
2500
2501 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2502                         unsigned int freq_in, unsigned int freq_out)
2503 {
2504         struct snd_soc_codec *codec = dai->codec;
2505         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2506         struct rt5640_pll_code pll_code;
2507         int ret, dai_sel;
2508         mutex_lock(&rt5640->lock);
2509         CHECK_I2C_SHUTDOWN(rt5640, codec)
2510
2511         if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2512             freq_out == rt5640->pll_out) {
2513                 mutex_unlock(&rt5640->lock);
2514                 return 0;
2515                 }
2516
2517         if (!freq_in || !freq_out) {
2518                 dev_dbg(codec->dev, "PLL disabled\n");
2519
2520                 rt5640->pll_in = 0;
2521                 rt5640->pll_out = 0;
2522                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2523                         RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2524                 mutex_unlock(&rt5640->lock);
2525                 return 0;
2526         }
2527
2528         switch (source) {
2529         case RT5640_PLL1_S_MCLK:
2530                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2531                         RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2532                 break;
2533         case RT5640_PLL1_S_BCLK1:
2534         case RT5640_PLL1_S_BCLK2:
2535 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2536         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2537         case RT5640_PLL1_S_BCLK3:
2538
2539 #endif
2540                 dai_sel = get_sdp_info(codec, dai->id);
2541                 if (dai_sel < 0) {
2542                         dev_err(codec->dev,
2543                                 "Failed to get sdp info: %d\n", dai_sel);
2544                         mutex_unlock(&rt5640->lock);
2545                         return -EINVAL;
2546                 }
2547                 if (dai_sel & RT5640_U_IF1) {
2548                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2549                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2550                 }
2551                 if (dai_sel & RT5640_U_IF2) {
2552                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2553                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2554                 }
2555                 if (dai_sel & RT5640_U_IF3) {
2556                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2557                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2558                 }
2559                 break;
2560         default:
2561                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2562                 mutex_unlock(&rt5640->lock);
2563                 return -EINVAL;
2564         }
2565
2566         ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2567         if (ret < 0) {
2568                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2569                 mutex_unlock(&rt5640->lock);
2570                 return ret;
2571         }
2572
2573         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code.m_bp,
2574                 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code);
2575
2576         snd_soc_write(codec, RT5640_PLL_CTRL1,
2577                 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2578         snd_soc_write(codec, RT5640_PLL_CTRL2,
2579                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2580                 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2581
2582         rt5640->pll_in = freq_in;
2583         rt5640->pll_out = freq_out;
2584         rt5640->pll_src = source;
2585
2586         mutex_unlock(&rt5640->lock);
2587         return 0;
2588 }
2589
2590 /**
2591  * rt5640_index_show - Dump private registers.
2592  * @dev: codec device.
2593  * @attr: device attribute.
2594  * @buf: buffer for display.
2595  *
2596  * To show non-zero values of all private registers.
2597  *
2598  * Returns buffer length.
2599  */
2600 static ssize_t rt5640_index_show(struct device *dev,
2601         struct device_attribute *attr, char *buf)
2602 {
2603         struct i2c_client *client = to_i2c_client(dev);
2604         struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2605         struct snd_soc_codec *codec = rt5640->codec;
2606         unsigned int val;
2607         int cnt = 0, i;
2608         mutex_lock(&rt5640->lock);
2609         CHECK_I2C_SHUTDOWN(rt5640, codec)
2610
2611         cnt += sprintf(buf, "RT5640 index register\n");
2612         for (i = 0; i < 0xb4; i++) {
2613                 if (cnt + 9 >= PAGE_SIZE - 1)
2614                         break;
2615                 val = rt5640_index_read(codec, i);
2616                 if (!val)
2617                         continue;
2618                 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2619         }
2620
2621         if (cnt >= PAGE_SIZE)
2622                 cnt = PAGE_SIZE - 1;
2623
2624         mutex_unlock(&rt5640->lock);
2625         return cnt;
2626 }
2627 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2628
2629 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2630                         enum snd_soc_bias_level level)
2631 {
2632         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2633         mutex_lock(&rt5640->lock);
2634         CHECK_I2C_SHUTDOWN(rt5640, codec)
2635
2636         switch (level) {
2637         case SND_SOC_BIAS_ON:
2638 #ifdef RT5640_DEMO
2639                 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2640                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2641                 snd_soc_update_bits(codec, RT5640_HP_VOL,
2642                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2643                 break;
2644 #endif
2645         case SND_SOC_BIAS_PREPARE:
2646 #ifdef RT5640_DEMO
2647                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2648                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2649                         RT5640_PWR_BG | RT5640_PWR_VREF2,
2650                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2651                         RT5640_PWR_BG | RT5640_PWR_VREF2);
2652                 msleep(100);
2653
2654                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2655                         RT5640_PWR_FV1 | RT5640_PWR_FV2,
2656                         RT5640_PWR_FV1 | RT5640_PWR_FV2);
2657
2658                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2659                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2660                         RT5640_PWR_MB1 | RT5640_PWR_MB2);
2661 #endif
2662                 break;
2663
2664         case SND_SOC_BIAS_STANDBY:
2665 #ifdef RT5640_DEMO
2666                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2667                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2668                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2669                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2670
2671                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2672                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2673                         0);
2674 #endif
2675                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2676                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2677                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2678                                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2679                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2680                                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2681                         msleep(5);
2682                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2683                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2684                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2685                         snd_soc_write(codec, RT5640_GEN_CTRL1, 0x3701);
2686                         codec->cache_only = false;
2687                         codec->cache_sync = 1;
2688                         snd_soc_cache_sync(codec);
2689                         rt5640_index_sync(codec);
2690                 }
2691                 break;
2692
2693         case SND_SOC_BIAS_OFF:
2694 #ifdef RT5640_DEMO
2695                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2696                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2697                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2698                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2699                 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2700                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2701                 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2702                         RT5640_L_MUTE, RT5640_L_MUTE);
2703 #endif
2704                 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
2705                 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
2706                 snd_soc_write(codec, RT5640_GEN_CTRL1, 0x3700);
2707                 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2708                 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2709                 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2710                 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2711                 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2712                 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2713                 break;
2714
2715         default:
2716                 break;
2717         }
2718         codec->dapm.bias_level = level;
2719
2720         mutex_unlock(&rt5640->lock);
2721         return 0;
2722 }
2723
2724 static int rt5640_probe(struct snd_soc_codec *codec)
2725 {
2726         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2727         int ret;
2728         u16 val;
2729         mutex_lock(&rt5640->lock);
2730         CHECK_I2C_SHUTDOWN(rt5640, codec)
2731
2732         codec->dapm.idle_bias_off = 1;
2733
2734         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2735         if (ret != 0) {
2736                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2737                 mutex_unlock(&rt5640->lock);
2738                 return ret;
2739         }
2740
2741         val = snd_soc_read(codec, RT5640_RESET);
2742         if ((val != rt5640_reg[RT5640_RESET]) && (val != RT5639_RESET_ID)) {
2743                 dev_err(codec->dev,
2744                         "Device with ID register %x is not rt5640/39\n", val);
2745                 mutex_unlock(&rt5640->lock);
2746                 return -ENODEV;
2747         }
2748
2749         rt5640_reset(codec);
2750         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2751                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2752                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2753                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2754                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2755         msleep(10);
2756         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2757                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2758                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2759         /* DMIC */
2760         if (rt5640->dmic_en == RT5640_DMIC1) {
2761                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2762                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2763                 snd_soc_update_bits(codec, RT5640_DMIC,
2764                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2765                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2766         } else if (rt5640->dmic_en == RT5640_DMIC2) {
2767                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2768                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2769                 snd_soc_update_bits(codec, RT5640_DMIC,
2770                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2771                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2772         }
2773
2774 #ifdef RT5640_DEMO
2775         rt5640_reg_init(codec);
2776 #endif
2777
2778 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
2779         rt5640_register_dsp(codec);
2780 #endif
2781
2782         DC_Calibrate(codec);
2783
2784         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2785
2786         snd_soc_add_codec_controls(codec, rt5640_snd_controls,
2787                 ARRAY_SIZE(rt5640_snd_controls));
2788
2789         rt5640->codec = codec;
2790         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2791         if (ret != 0) {
2792                 dev_err(codec->dev,
2793                         "Failed to create index_reg sysfs files: %d\n", ret);
2794                 mutex_unlock(&rt5640->lock);
2795                 return ret;
2796         }
2797
2798         mutex_unlock(&rt5640->lock);
2799         return 0;
2800 }
2801
2802 static int rt5640_remove(struct snd_soc_codec *codec)
2803 {
2804         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2805
2806         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2807         mutex_lock(&rt5640->lock);
2808         CHECK_I2C_SHUTDOWN(rt5640, codec)
2809         rt5640_reset(codec);
2810         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2811
2812         mutex_unlock(&rt5640->lock);
2813         return 0;
2814 }
2815 #ifdef CONFIG_PM
2816 static int rt5640_suspend(struct snd_soc_codec *codec, pm_message_t state)
2817 {
2818         rt5640_reset(codec);
2819         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2820         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2821
2822         return 0;
2823 }
2824
2825 static int rt5640_resume(struct snd_soc_codec *codec)
2826 {
2827         int ret = 0 ;
2828
2829         codec->cache_sync = 1;
2830         ret = snd_soc_cache_sync(codec);
2831         if (ret) {
2832                 dev_err(codec->dev,"Failed to sync cache: %d\n", ret);
2833                 return ret;
2834         }
2835         rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2836
2837         return 0;
2838 }
2839 #else
2840 #define rt5640_suspend NULL
2841 #define rt5640_resume NULL
2842 #endif
2843
2844 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2845 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2846                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2847
2848 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2849         .hw_params = rt5640_hw_params,
2850         .prepare = rt5640_prepare,
2851         .set_fmt = rt5640_set_dai_fmt,
2852         .set_sysclk = rt5640_set_dai_sysclk,
2853         .set_pll = rt5640_set_dai_pll,
2854 };
2855
2856 struct snd_soc_dai_driver rt5640_dai[] = {
2857         {
2858                 .name = "rt5640-aif1",
2859                 .id = RT5640_AIF1,
2860                 .playback = {
2861                         .stream_name = "AIF1 Playback",
2862                         .channels_min = 1,
2863                         .channels_max = 2,
2864                         .rates = RT5640_STEREO_RATES,
2865                         .formats = RT5640_FORMATS,
2866                 },
2867                 .capture = {
2868                         .stream_name = "AIF1 Capture",
2869                         .channels_min = 1,
2870                         .channels_max = 2,
2871                         .rates = RT5640_STEREO_RATES,
2872                         .formats = RT5640_FORMATS,
2873                 },
2874                 .ops = &rt5640_aif_dai_ops,
2875         },
2876         {
2877                 .name = "rt5640-aif2",
2878                 .id = RT5640_AIF2,
2879                 .playback = {
2880                         .stream_name = "AIF2 Playback",
2881                         .channels_min = 1,
2882                         .channels_max = 2,
2883                         .rates = RT5640_STEREO_RATES,
2884                         .formats = RT5640_FORMATS,
2885                 },
2886                 .capture = {
2887                         .stream_name = "AIF2 Capture",
2888                         .channels_min = 1,
2889                         .channels_max = 2,
2890                         .rates = RT5640_STEREO_RATES,
2891                         .formats = RT5640_FORMATS,
2892                 },
2893                 .ops = &rt5640_aif_dai_ops,
2894         },
2895 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2896         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2897         {
2898                 .name = "rt5640-aif3",
2899                 .id = RT5640_AIF3,
2900                 .playback = {
2901                         .stream_name = "AIF3 Playback",
2902                         .channels_min = 1,
2903                         .channels_max = 2,
2904                         .rates = RT5640_STEREO_RATES,
2905                         .formats = RT5640_FORMATS,
2906                 },
2907                 .capture = {
2908                         .stream_name = "AIF3 Capture",
2909                         .channels_min = 1,
2910                         .channels_max = 2,
2911                         .rates = RT5640_STEREO_RATES,
2912                         .formats = RT5640_FORMATS,
2913                 },
2914                 .ops = &rt5640_aif_dai_ops,
2915         },
2916 #endif
2917 };
2918
2919 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2920         .probe = rt5640_probe,
2921         .remove = rt5640_remove,
2922         .suspend = rt5640_suspend,
2923         .resume = rt5640_resume,
2924         .set_bias_level = rt5640_set_bias_level,
2925         .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2926         .reg_word_size = sizeof(u16),
2927         .reg_cache_default = rt5640_reg,
2928         .volatile_register = rt5640_volatile_register,
2929         .readable_register = rt5640_readable_register,
2930         .reg_cache_step = 1,
2931         .dapm_widgets = rt5640_dapm_widgets,
2932         .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2933         .dapm_routes = rt5640_dapm_routes,
2934         .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2935 };
2936
2937 static const struct i2c_device_id rt5640_i2c_id[] = {
2938         { "rt5640", 0 },
2939         { }
2940 };
2941 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2942
2943 static int rt5640_i2c_probe(struct i2c_client *i2c,
2944                     const struct i2c_device_id *id)
2945 {
2946         struct rt5640_priv *rt5640;
2947         int ret;
2948
2949         rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2950         if (NULL == rt5640)
2951                 return -ENOMEM;
2952
2953         i2c_set_clientdata(i2c, rt5640);
2954         mutex_init(&rt5640->lock);
2955
2956         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2957                         rt5640_dai, ARRAY_SIZE(rt5640_dai));
2958         if (ret < 0)
2959                 kfree(rt5640);
2960
2961         return ret;
2962 }
2963
2964 static __devexit int rt5640_i2c_remove(struct i2c_client *i2c)
2965 {
2966         snd_soc_unregister_codec(&i2c->dev);
2967         kfree(i2c_get_clientdata(i2c));
2968         return 0;
2969 }
2970
2971 static void rt5640_i2c_shutdown(struct i2c_client *i2c)
2972 {
2973         struct rt5640_priv *rt5640 = i2c_get_clientdata(i2c);
2974
2975         mutex_lock(&rt5640->lock);
2976
2977         if (i2c->irq)
2978                 disable_irq(i2c->irq);
2979         rt5640->shutdown_complete = 1;
2980
2981         mutex_unlock(&rt5640->lock);
2982 }
2983
2984 struct i2c_driver rt5640_i2c_driver = {
2985         .driver = {
2986                 .name = "rt5640",
2987                 .owner = THIS_MODULE,
2988         },
2989         .probe = rt5640_i2c_probe,
2990         .remove   = __devexit_p(rt5640_i2c_remove),
2991         .id_table = rt5640_i2c_id,
2992         .shutdown = rt5640_i2c_shutdown,
2993 };
2994
2995 static int __init rt5640_modinit(void)
2996 {
2997         return i2c_add_driver(&rt5640_i2c_driver);
2998 }
2999 module_init(rt5640_modinit);
3000
3001 static void __exit rt5640_modexit(void)
3002 {
3003         i2c_del_driver(&rt5640_i2c_driver);
3004 }
3005 module_exit(rt5640_modexit);
3006
3007 MODULE_DESCRIPTION("ASoC RT5640 driver");
3008 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
3009 MODULE_LICENSE("GPL");