22cc413e8efc4b338bfef198ba9ecd13c9f52f37
[linux-2.6.git] / sound / soc / codecs / rt5640.c
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 #include "rt5640.h"
28 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
30 #endif
31
32 #define RT5640_DEMO 1
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35
36 #ifdef RT5640_DEMO
37 struct rt5640_init_reg {
38         u8 reg;
39         u16 val;
40 };
41
42 static struct rt5640_init_reg init_list[] = {
43         {RT5640_DUMMY1          , 0x3701},/*fa[12:13] = 1'b;fa[8~10]=1;fa[0]=1*/
44         {RT5640_DEPOP_M1        , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
45         {RT5640_DEPOP_M2        , 0x3100},/* 8f[13] = 1'b */
46         {RT5640_ADDA_CLK1       , 0x1114},/* 73[2] = 1'b  */
47         {RT5640_MICBIAS         , 0x3030},/* 93[5:4] = 11'b */
48         {RT5640_PRIV_INDEX      , 0x003d},/* PR3d[12] = 1'b */
49         {RT5640_PRIV_DATA       , 0x3600},
50         {RT5640_CLS_D_OUT       , 0xa000},/* 8d[11] = 0'b */
51         {RT5640_PRIV_INDEX      , 0x001c},/* PR1c = 0D21'h */
52         {RT5640_PRIV_DATA       , 0x0D21},
53         {RT5640_PRIV_INDEX      , 0x001b},/* PR1B = 0D21'h */
54         {RT5640_PRIV_DATA       , 0x0000},
55         {RT5640_PRIV_INDEX      , 0x0012},/* PR12 = 0aa8'h */
56         {RT5640_PRIV_DATA       , 0x0aa8},
57         {RT5640_PRIV_INDEX      , 0x0014},/* PR14 = 0aaa'h */
58         {RT5640_PRIV_DATA       , 0x0aaa},
59         {RT5640_PRIV_INDEX      , 0x0020},/* PR20 = 6110'h */
60         {RT5640_PRIV_DATA       , 0x6110},
61         {RT5640_PRIV_INDEX      , 0x0021},/* PR21 = e0e0'h */
62         {RT5640_PRIV_DATA       , 0xe0e0},
63         {RT5640_PRIV_INDEX      , 0x0023},/* PR23 = 1804'h */
64         {RT5640_PRIV_DATA       , 0x1804},
65         /*playback*/
66         {RT5640_STO_DAC_MIXER   , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
67         {RT5640_OUT_L3_MIXER    , 0x01fe},/*DACL1 -> OUTMIXL*/
68         {RT5640_OUT_R3_MIXER    , 0x01fe},/*DACR1 -> OUTMIXR */
69         {RT5640_HP_VOL          , 0x8888},/* OUTMIX -> HPVOL */
70         {RT5640_HPO_MIXER       , 0xc000},/* HPVOL -> HPOLMIX */
71 /*      {RT5640_HPO_MIXER       , 0xa000},// DAC1 -> HPOLMIX   */
72         {RT5640_SPK_L_MIXER     , 0x0036},/* DACL1 -> SPKMIXL */
73         {RT5640_SPK_R_MIXER     , 0x0036},/* DACR1 -> SPKMIXR */
74         {RT5640_SPK_VOL         , 0x8888},/* SPKMIX -> SPKVOL */
75         {RT5640_SPO_L_MIXER     , 0xe800},/* SPKVOLL -> SPOLMIX */
76         {RT5640_SPO_R_MIXER     , 0x2800},/* SPKVOLR -> SPORMIX */
77 /*      {RT5640_SPO_L_MIXER     , 0xb800},//DAC -> SPOLMIX */
78 /*      {RT5640_SPO_R_MIXER     , 0x1800},//DAC -> SPORMIX */
79 /*      {RT5640_I2S1_SDP        , 0xD000},//change IIS1 and IIS2 */
80         /*record*/
81         {RT5640_IN1_IN2         , 0x5080},/*IN1 boost 40db & differential mode*/
82         {RT5640_IN3_IN4         , 0x0500},/*IN2 boost 40db & signal ended mode*/
83         {RT5640_REC_L2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXL */
84         {RT5640_REC_R2_MIXER    , 0x005f},/* enable Mic1 -> RECMIXR */
85 /*      {RT5640_REC_L2_MIXER    , 0x006f},//Mic2 -> RECMIXL */
86 /*      {RT5640_REC_R2_MIXER    , 0x006f},//Mic2 -> RECMIXR */
87         {RT5640_STO_ADC_MIXER   , 0x3020},/* ADC -> Sto ADC mixer */
88
89 #if RT5640_DET_EXT_MIC
90         {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
91         {RT5640_GPIO_CTRL1      , 0x8400},/* set GPIO1 to IRQ */
92         {RT5640_GPIO_CTRL3      , 0x0004},/* set GPIO1 output */
93         {RT5640_IRQ_CTRL2       , 0x8000},/*set MICBIAS short current to IRQ */
94                                         /*( if sticky set regBE : 8800 ) */
95 #endif
96
97 };
98 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
99
100 static int rt5640_reg_init(struct snd_soc_codec *codec)
101 {
102         int i;
103         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
104                 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
105         return 0;
106 }
107 #endif
108
109 static int rt5640_index_sync(struct snd_soc_codec *codec)
110 {
111         int i;
112
113         for (i = 0; i < RT5640_INIT_REG_LEN; i++)
114                 if (RT5640_PRIV_INDEX == init_list[i].reg ||
115                         RT5640_PRIV_DATA == init_list[i].reg)
116                         snd_soc_write(codec, init_list[i].reg,
117                                         init_list[i].val);
118         return 0;
119 }
120
121 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
122         [RT5640_RESET] = 0x000c,
123         [RT5640_SPK_VOL] = 0xc8c8,
124         [RT5640_HP_VOL] = 0xc8c8,
125         [RT5640_OUTPUT] = 0xc8c8,
126         [RT5640_MONO_OUT] = 0x8000,
127         [RT5640_INL_INR_VOL] = 0x0808,
128         [RT5640_DAC1_DIG_VOL] = 0xafaf,
129         [RT5640_DAC2_DIG_VOL] = 0xafaf,
130         [RT5640_ADC_DIG_VOL] = 0x2f2f,
131         [RT5640_ADC_DATA] = 0x2f2f,
132         [RT5640_STO_ADC_MIXER] = 0x7060,
133         [RT5640_MONO_ADC_MIXER] = 0x7070,
134         [RT5640_AD_DA_MIXER] = 0x8080,
135         [RT5640_STO_DAC_MIXER] = 0x5454,
136         [RT5640_MONO_DAC_MIXER] = 0x5454,
137         [RT5640_DIG_MIXER] = 0xaa00,
138         [RT5640_DSP_PATH2] = 0xa000,
139         [RT5640_REC_L2_MIXER] = 0x007f,
140         [RT5640_REC_R2_MIXER] = 0x007f,
141         [RT5640_HPO_MIXER] = 0xe000,
142         [RT5640_SPK_L_MIXER] = 0x003e,
143         [RT5640_SPK_R_MIXER] = 0x003e,
144         [RT5640_SPO_L_MIXER] = 0xf800,
145         [RT5640_SPO_R_MIXER] = 0x3800,
146         [RT5640_SPO_CLSD_RATIO] = 0x0004,
147         [RT5640_MONO_MIXER] = 0xfc00,
148         [RT5640_OUT_L3_MIXER] = 0x01ff,
149         [RT5640_OUT_R3_MIXER] = 0x01ff,
150         [RT5640_LOUT_MIXER] = 0xf000,
151         [RT5640_PWR_ANLG1] = 0x00c0,
152         [RT5640_I2S1_SDP] = 0x8000,
153         [RT5640_I2S2_SDP] = 0x8000,
154         [RT5640_I2S3_SDP] = 0x8000,
155         [RT5640_ADDA_CLK1] = 0x1110,
156         [RT5640_ADDA_CLK2] = 0x0c00,
157         [RT5640_DMIC] = 0x1d00,
158         [RT5640_ASRC_3] = 0x0008,
159         [RT5640_HP_OVCD] = 0x0600,
160         [RT5640_CLS_D_OVCD] = 0x0228,
161         [RT5640_CLS_D_OUT] = 0xa800,
162         [RT5640_DEPOP_M1] = 0x0004,
163         [RT5640_DEPOP_M2] = 0x1100,
164         [RT5640_DEPOP_M3] = 0x0646,
165         [RT5640_CHARGE_PUMP] = 0x0c00,
166         [RT5640_MICBIAS] = 0x3000,
167         [RT5640_EQ_CTRL1] = 0x2080,
168         [RT5640_DRC_AGC_1] = 0x2206,
169         [RT5640_DRC_AGC_2] = 0x1f00,
170         [RT5640_ANC_CTRL1] = 0x034b,
171         [RT5640_ANC_CTRL2] = 0x0066,
172         [RT5640_ANC_CTRL3] = 0x000b,
173         [RT5640_GPIO_CTRL1] = 0x0400,
174         [RT5640_DSP_CTRL3] = 0x2000,
175         [RT5640_BASE_BACK] = 0x0013,
176         [RT5640_MP3_PLUS1] = 0x0680,
177         [RT5640_MP3_PLUS2] = 0x1c17,
178         [RT5640_3D_HP] = 0x8c00,
179         [RT5640_ADJ_HPF] = 0x2a20,
180         [RT5640_HP_CALIB_AMP_DET] = 0x0400,
181         [RT5640_SV_ZCD1] = 0x0809,
182         [RT5640_VENDOR_ID1] = 0x10ec,
183         [RT5640_VENDOR_ID2] = 0x6231,
184 };
185
186 static int rt5640_reset(struct snd_soc_codec *codec)
187 {
188         return snd_soc_write(codec, RT5640_RESET, 0);
189 }
190
191 /**
192  * rt5640_index_write - Write private register.
193  * @codec: SoC audio codec device.
194  * @reg: Private register index.
195  * @value: Private register Data.
196  *
197  * Modify private register for advanced setting. It can be written through
198  * private index (0x6a) and data (0x6c) register.
199  *
200  * Returns 0 for success or negative error code.
201  */
202 static int rt5640_index_write(struct snd_soc_codec *codec,
203                 unsigned int reg, unsigned int value)
204 {
205         int ret;
206
207         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
208         if (ret < 0) {
209                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
210                 goto err;
211         }
212         ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
213         if (ret < 0) {
214                 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
215                 goto err;
216         }
217         return 0;
218
219 err:
220         return ret;
221 }
222
223 /**
224  * rt5640_index_read - Read private register.
225  * @codec: SoC audio codec device.
226  * @reg: Private register index.
227  *
228  * Read advanced setting from private register. It can be read through
229  * private index (0x6a) and data (0x6c) register.
230  *
231  * Returns private register value or negative error code.
232  */
233 static unsigned int rt5640_index_read(
234         struct snd_soc_codec *codec, unsigned int reg)
235 {
236         int ret;
237
238         ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
239         if (ret < 0) {
240                 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
241                 return ret;
242         }
243         return snd_soc_read(codec, RT5640_PRIV_DATA);
244 }
245
246 /**
247  * rt5640_index_update_bits - update private register bits
248  * @codec: audio codec
249  * @reg: Private register index.
250  * @mask: register mask
251  * @value: new value
252  *
253  * Writes new register value.
254  *
255  * Returns 1 for change, 0 for no change, or negative error code.
256  */
257 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
258         unsigned int reg, unsigned int mask, unsigned int value)
259 {
260         unsigned int old, new;
261         int change, ret;
262
263         ret = rt5640_index_read(codec, reg);
264         if (ret < 0) {
265                 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
266                 goto err;
267         }
268
269         old = ret;
270         new = (old & ~mask) | (value & mask);
271         change = old != new;
272         if (change) {
273                 ret = rt5640_index_write(codec, reg, new);
274                 if (ret < 0) {
275                         dev_err(codec->dev,
276                                 "Failed to write private reg: %d\n", ret);
277                         goto err;
278                 }
279         }
280         return change;
281
282 err:
283         return ret;
284 }
285
286 static int rt5640_volatile_register(
287         struct snd_soc_codec *codec, unsigned int reg)
288 {
289         switch (reg) {
290         case RT5640_RESET:
291         case RT5640_PRIV_DATA:
292         case RT5640_ASRC_5:
293         case RT5640_EQ_CTRL1:
294         case RT5640_DRC_AGC_1:
295         case RT5640_ANC_CTRL1:
296         case RT5640_IRQ_CTRL2:
297         case RT5640_INT_IRQ_ST:
298         case RT5640_DSP_CTRL2:
299         case RT5640_DSP_CTRL3:
300         case RT5640_PGM_REG_ARR1:
301         case RT5640_PGM_REG_ARR3:
302                 return 1;
303         default:
304                 return 0;
305         }
306 }
307
308 static int rt5640_readable_register(
309         struct snd_soc_codec *codec, unsigned int reg)
310 {
311         switch (reg) {
312         case RT5640_RESET:
313         case RT5640_SPK_VOL:
314         case RT5640_HP_VOL:
315         case RT5640_OUTPUT:
316         case RT5640_MONO_OUT:
317         case RT5640_IN1_IN2:
318         case RT5640_IN3_IN4:
319         case RT5640_INL_INR_VOL:
320         case RT5640_DAC1_DIG_VOL:
321         case RT5640_DAC2_DIG_VOL:
322         case RT5640_DAC2_CTRL:
323         case RT5640_ADC_DIG_VOL:
324         case RT5640_ADC_DATA:
325         case RT5640_ADC_BST_VOL:
326         case RT5640_STO_ADC_MIXER:
327         case RT5640_MONO_ADC_MIXER:
328         case RT5640_AD_DA_MIXER:
329         case RT5640_STO_DAC_MIXER:
330         case RT5640_MONO_DAC_MIXER:
331         case RT5640_DIG_MIXER:
332         case RT5640_DSP_PATH1:
333         case RT5640_DSP_PATH2:
334         case RT5640_DIG_INF_DATA:
335         case RT5640_REC_L1_MIXER:
336         case RT5640_REC_L2_MIXER:
337         case RT5640_REC_R1_MIXER:
338         case RT5640_REC_R2_MIXER:
339         case RT5640_HPO_MIXER:
340         case RT5640_SPK_L_MIXER:
341         case RT5640_SPK_R_MIXER:
342         case RT5640_SPO_L_MIXER:
343         case RT5640_SPO_R_MIXER:
344         case RT5640_SPO_CLSD_RATIO:
345         case RT5640_MONO_MIXER:
346         case RT5640_OUT_L1_MIXER:
347         case RT5640_OUT_L2_MIXER:
348         case RT5640_OUT_L3_MIXER:
349         case RT5640_OUT_R1_MIXER:
350         case RT5640_OUT_R2_MIXER:
351         case RT5640_OUT_R3_MIXER:
352         case RT5640_LOUT_MIXER:
353         case RT5640_PWR_DIG1:
354         case RT5640_PWR_DIG2:
355         case RT5640_PWR_ANLG1:
356         case RT5640_PWR_ANLG2:
357         case RT5640_PWR_MIXER:
358         case RT5640_PWR_VOL:
359         case RT5640_PRIV_INDEX:
360         case RT5640_PRIV_DATA:
361         case RT5640_I2S1_SDP:
362         case RT5640_I2S2_SDP:
363         case RT5640_I2S3_SDP:
364         case RT5640_ADDA_CLK1:
365         case RT5640_ADDA_CLK2:
366         case RT5640_DMIC:
367         case RT5640_GLB_CLK:
368         case RT5640_PLL_CTRL1:
369         case RT5640_PLL_CTRL2:
370         case RT5640_ASRC_1:
371         case RT5640_ASRC_2:
372         case RT5640_ASRC_3:
373         case RT5640_ASRC_4:
374         case RT5640_ASRC_5:
375         case RT5640_HP_OVCD:
376         case RT5640_CLS_D_OVCD:
377         case RT5640_CLS_D_OUT:
378         case RT5640_DEPOP_M1:
379         case RT5640_DEPOP_M2:
380         case RT5640_DEPOP_M3:
381         case RT5640_CHARGE_PUMP:
382         case RT5640_PV_DET_SPK_G:
383         case RT5640_MICBIAS:
384         case RT5640_EQ_CTRL1:
385         case RT5640_EQ_CTRL2:
386         case RT5640_WIND_FILTER:
387         case RT5640_DRC_AGC_1:
388         case RT5640_DRC_AGC_2:
389         case RT5640_DRC_AGC_3:
390         case RT5640_SVOL_ZC:
391         case RT5640_ANC_CTRL1:
392         case RT5640_ANC_CTRL2:
393         case RT5640_ANC_CTRL3:
394         case RT5640_JD_CTRL:
395         case RT5640_ANC_JD:
396         case RT5640_IRQ_CTRL1:
397         case RT5640_IRQ_CTRL2:
398         case RT5640_INT_IRQ_ST:
399         case RT5640_GPIO_CTRL1:
400         case RT5640_GPIO_CTRL2:
401         case RT5640_GPIO_CTRL3:
402         case RT5640_DSP_CTRL1:
403         case RT5640_DSP_CTRL2:
404         case RT5640_DSP_CTRL3:
405         case RT5640_DSP_CTRL4:
406         case RT5640_PGM_REG_ARR1:
407         case RT5640_PGM_REG_ARR2:
408         case RT5640_PGM_REG_ARR3:
409         case RT5640_PGM_REG_ARR4:
410         case RT5640_PGM_REG_ARR5:
411         case RT5640_SCB_FUNC:
412         case RT5640_SCB_CTRL:
413         case RT5640_BASE_BACK:
414         case RT5640_MP3_PLUS1:
415         case RT5640_MP3_PLUS2:
416         case RT5640_3D_HP:
417         case RT5640_ADJ_HPF:
418         case RT5640_HP_CALIB_AMP_DET:
419         case RT5640_HP_CALIB2:
420         case RT5640_SV_ZCD1:
421         case RT5640_SV_ZCD2:
422         case RT5640_DUMMY1:
423         case RT5640_DUMMY2:
424         case RT5640_DUMMY3:
425         case RT5640_VENDOR_ID:
426         case RT5640_VENDOR_ID1:
427         case RT5640_VENDOR_ID2:
428                 return 1;
429         default:
430                 return 0;
431         }
432 }
433
434 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
435 {
436         int jack_type;
437         int sclk_src;
438
439         if (jack_insert) {
440                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
441                         snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
442                         snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
443                         snd_soc_write(codec, RT5640_DUMMY1 , 0x3701);
444                 }
445                 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
446                         RT5640_SCLK_SRC_MASK;
447                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
448                         RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
449                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
450                         RT5640_PWR_LDO2, RT5640_PWR_LDO2);
451                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
452                         RT5640_PWR_MB1, RT5640_PWR_MB1);
453                 snd_soc_update_bits(codec, RT5640_MICBIAS,
454                         RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
455                         RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
456                         RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
457                         RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
458                 snd_soc_update_bits(codec, RT5640_DUMMY1,
459                         0x1, 0x1);
460                 msleep(100);
461                 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
462                         jack_type = RT5640_HEADPHO_DET;
463                 else
464                         jack_type = RT5640_HEADSET_DET;
465                 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
466                         RT5640_MB1_OC_CLR, 0);
467                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
468                         RT5640_SCLK_SRC_MASK, sclk_src);
469         } else {
470                 snd_soc_update_bits(codec, RT5640_MICBIAS,
471                         RT5640_MIC1_OVCD_MASK,
472                         RT5640_MIC1_OVCD_DIS);
473
474                 jack_type = RT5640_NO_JACK;
475         }
476
477         return jack_type;
478 }
479 EXPORT_SYMBOL(rt5640_headset_detect);
480
481 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
482 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
483 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
484 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
485 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
486
487 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
488 static unsigned int bst_tlv[] = {
489         TLV_DB_RANGE_HEAD(7),
490         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
491         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
492         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
493         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
494         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
495         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
496         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
497 };
498
499 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
500                 struct snd_ctl_elem_value *ucontrol)
501 {
502         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
503         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
504
505         ucontrol->value.integer.value[0] = rt5640->dmic_en;
506
507         return 0;
508 }
509
510 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
511                 struct snd_ctl_elem_value *ucontrol)
512 {
513         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
514         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
515
516         if (rt5640->dmic_en == ucontrol->value.integer.value[0])
517                 return 0;
518
519         rt5640->dmic_en = ucontrol->value.integer.value[0];
520         switch (rt5640->dmic_en) {
521         case RT5640_DMIC_DIS:
522                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
523                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
524                         RT5640_GP4_PIN_MASK,
525                         RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
526                         RT5640_GP4_PIN_GPIO4);
527                 snd_soc_update_bits(codec, RT5640_DMIC,
528                         RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
529                         RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
530                 snd_soc_update_bits(codec, RT5640_DMIC,
531                         RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
532                         RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
533                 break;
534
535         case RT5640_DMIC1:
536                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
537                         RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
538                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
539                 snd_soc_update_bits(codec, RT5640_DMIC,
540                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
541                         RT5640_DMIC_1_DP_MASK,
542                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
543                         RT5640_DMIC_1_DP_IN1P);
544                 snd_soc_update_bits(codec, RT5640_DMIC,
545                         RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
546                 break;
547
548         case RT5640_DMIC2:
549                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
550                         RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
551                         RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
552                 snd_soc_update_bits(codec, RT5640_DMIC,
553                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
554                         RT5640_DMIC_2_DP_MASK,
555                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
556                         RT5640_DMIC_2_DP_IN1N);
557                 snd_soc_update_bits(codec, RT5640_DMIC,
558                         RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
559                 break;
560
561         default:
562                 return -EINVAL;
563         }
564
565         return 0;
566 }
567
568
569 /* IN1/IN2 Input Type */
570 static const char *rt5640_input_mode[] = {
571         "Single ended", "Differential"};
572
573 static const SOC_ENUM_SINGLE_DECL(
574         rt5640_in1_mode_enum, RT5640_IN1_IN2,
575         RT5640_IN_SFT1, rt5640_input_mode);
576
577 static const SOC_ENUM_SINGLE_DECL(
578         rt5640_in2_mode_enum, RT5640_IN3_IN4,
579         RT5640_IN_SFT2, rt5640_input_mode);
580
581 /* Interface data select */
582 static const char *rt5640_data_select[] = {
583         "Normal", "left copy to right", "right copy to left", "Swap"};
584
585 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
586                                 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
587
588 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
589                                 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
590
591 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
592                                 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
593
594 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
595                                 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
596
597 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
598                                 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
599
600 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
601                                 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
602
603 /* Class D speaker gain ratio */
604 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
605         "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
606
607 static const SOC_ENUM_SINGLE_DECL(
608         rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
609         RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
610
611 /* DMIC */
612 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
613
614 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
615
616
617
618 #ifdef RT5640_REG_RW
619 #define REGVAL_MAX 0xffff
620 static unsigned int regctl_addr;
621 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
622                         struct snd_ctl_elem_info *uinfo) {
623         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
624         uinfo->count = 2;
625         uinfo->value.integer.min = 0;
626         uinfo->value.integer.max = REGVAL_MAX;
627         return 0;
628 }
629
630 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
631                         struct snd_ctl_elem_value *ucontrol)
632 {
633         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
634         ucontrol->value.integer.value[0] = regctl_addr;
635         ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
636         return 0;
637 }
638
639 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
640                         struct snd_ctl_elem_value *ucontrol)
641 {
642         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
643         regctl_addr = ucontrol->value.integer.value[0];
644         if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
645                 snd_soc_write(codec, regctl_addr,
646                 ucontrol->value.integer.value[1]);
647         return 0;
648 }
649 #endif
650
651
652 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
653 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
654
655 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
656                 struct snd_ctl_elem_value *ucontrol)
657 {
658         struct soc_mixer_control *mc =
659                 (struct soc_mixer_control *)kcontrol->private_value;
660         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
661         unsigned int val = snd_soc_read(codec, mc->reg);
662
663         ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
664                 ((val & RT5640_L_VOL_MASK) >> mc->shift);
665         ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
666                 (val & RT5640_R_VOL_MASK);
667
668         return 0;
669 }
670
671 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
672                 struct snd_ctl_elem_value *ucontrol)
673 {
674         struct soc_mixer_control *mc =
675                 (struct soc_mixer_control *)kcontrol->private_value;
676         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
677         unsigned int val, val2;
678
679         val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
680         val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
681         return snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
682                         RT5640_R_VOL_MASK, val << mc->shift | val2);
683 }
684
685
686 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
687         /* Speaker Output Volume */
688         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
689                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
690                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
691
692         /* Headphone Output Volume */
693         SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
694                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
695
696         SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
697                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
698                 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
699
700         /* OUTPUT Control */
701         SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
702                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
703         SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
704                 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
705         SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
706                 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
707         /* MONO Output Control */
708         SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
709                                 RT5640_L_MUTE_SFT, 1, 1),
710         /* DAC Digital Volume */
711         SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
712                 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
713         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
714                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
715                         175, 0, dac_vol_tlv),
716         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
717                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
718                         175, 0, dac_vol_tlv),
719         /* IN1/IN2 Control */
720         SOC_ENUM("IN1 Mode Control",  rt5640_in1_mode_enum),
721         SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
722                 RT5640_BST_SFT1, 8, 0, bst_tlv),
723         SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
724         SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
725                 RT5640_BST_SFT2, 8, 0, bst_tlv),
726         /* INL/INR Volume Control */
727         SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
728                         RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
729                         31, 1, in_vol_tlv),
730         /* ADC Digital Volume Control */
731         SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
732                 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
733         SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
734                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
735                         127, 0, adc_vol_tlv),
736         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
737                         RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
738                         127, 0, adc_vol_tlv),
739         /* ADC Boost Volume Control */
740         SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
741                         RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
742                         3, 0, adc_bst_tlv),
743         /* Class D speaker gain ratio */
744         SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
745         /* DMIC */
746         SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
747                 rt5640_dmic_get, rt5640_dmic_put),
748
749 #ifdef RT5640_REG_RW
750         {
751                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
752                 .name = "Register Control",
753                 .info = rt5640_regctl_info,
754                 .get = rt5640_regctl_get,
755                 .put = rt5640_regctl_put,
756         },
757 #endif
758 };
759
760 /**
761  * set_dmic_clk - Set parameter of dmic.
762  *
763  * @w: DAPM widget.
764  * @kcontrol: The kcontrol of this widget.
765  * @event: Event id.
766  *
767  * Choose dmic clock between 1MHz and 3MHz.
768  * It is better for clock to approximate 3MHz.
769  */
770 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
771         struct snd_kcontrol *kcontrol, int event)
772 {
773         struct snd_soc_codec *codec = w->codec;
774         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
775         int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
776
777         rate = rt5640->lrck[rt5640->aif_pu] << 8;
778         red = 3000000 * 12;
779         for (i = 0; i < ARRAY_SIZE(div); i++) {
780                 bound = div[i] * 3000000;
781                 if (rate > bound)
782                         continue;
783                 temp = bound - rate;
784                 if (temp < red) {
785                         red = temp;
786                         idx = i;
787                 }
788         }
789         if (idx < 0)
790                 dev_err(codec->dev, "Failed to set DMIC clock\n");
791         else
792                 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
793                                         idx << RT5640_DMIC_CLK_SFT);
794         return idx;
795 }
796
797 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
798                          struct snd_soc_dapm_widget *sink)
799 {
800         unsigned int val;
801
802         val = snd_soc_read(source->codec, RT5640_GLB_CLK);
803         val &= RT5640_SCLK_SRC_MASK;
804         if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
805                 return 1;
806         else
807                 return 0;
808 }
809
810 /* Digital Mixer */
811 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
812         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
813                         RT5640_M_ADC_L1_SFT, 1, 1),
814         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
815                         RT5640_M_ADC_L2_SFT, 1, 1),
816 };
817
818 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
819         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
820                         RT5640_M_ADC_R1_SFT, 1, 1),
821         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
822                         RT5640_M_ADC_R2_SFT, 1, 1),
823 };
824
825 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
826         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
827                         RT5640_M_MONO_ADC_L1_SFT, 1, 1),
828         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
829                         RT5640_M_MONO_ADC_L2_SFT, 1, 1),
830 };
831
832 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
833         SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
834                         RT5640_M_MONO_ADC_R1_SFT, 1, 1),
835         SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
836                         RT5640_M_MONO_ADC_R2_SFT, 1, 1),
837 };
838
839 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
840         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
841                         RT5640_M_ADCMIX_L_SFT, 1, 1),
842         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
843                         RT5640_M_IF1_DAC_L_SFT, 1, 1),
844 };
845
846 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
847         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
848                         RT5640_M_ADCMIX_R_SFT, 1, 1),
849         SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
850                         RT5640_M_IF1_DAC_R_SFT, 1, 1),
851 };
852
853 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
854         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
855                         RT5640_M_DAC_L1_SFT, 1, 1),
856         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
857                         RT5640_M_DAC_L2_SFT, 1, 1),
858         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
859                         RT5640_M_ANC_DAC_L_SFT, 1, 1),
860 };
861
862 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
863         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
864                         RT5640_M_DAC_R1_SFT, 1, 1),
865         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
866                         RT5640_M_DAC_R2_SFT, 1, 1),
867         SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
868                         RT5640_M_ANC_DAC_R_SFT, 1, 1),
869 };
870
871 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
872         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
873                         RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
874         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
875                         RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
876         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
877                         RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
878 };
879
880 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
881         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
882                         RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
883         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
884                         RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
885         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
886                         RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
887 };
888
889 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
890         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
891                         RT5640_M_STO_L_DAC_L_SFT, 1, 1),
892         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
893                         RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
894 };
895
896 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
897         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
898                         RT5640_M_STO_R_DAC_R_SFT, 1, 1),
899         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
900                         RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
901 };
902
903 /* Analog Input Mixer */
904 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
905         SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
906                         RT5640_M_HP_L_RM_L_SFT, 1, 1),
907         SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
908                         RT5640_M_IN_L_RM_L_SFT, 1, 1),
909         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
910                         RT5640_M_BST4_RM_L_SFT, 1, 1),
911         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
912                         RT5640_M_BST1_RM_L_SFT, 1, 1),
913         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
914                         RT5640_M_OM_L_RM_L_SFT, 1, 1),
915 };
916
917 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
918         SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
919                         RT5640_M_HP_R_RM_R_SFT, 1, 1),
920         SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
921                         RT5640_M_IN_R_RM_R_SFT, 1, 1),
922         SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
923                         RT5640_M_BST4_RM_R_SFT, 1, 1),
924         SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
925                         RT5640_M_BST1_RM_R_SFT, 1, 1),
926         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
927                         RT5640_M_OM_R_RM_R_SFT, 1, 1),
928 };
929
930 /* Analog Output Mixer */
931 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
932         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
933                         RT5640_M_RM_L_SM_L_SFT, 1, 1),
934         SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
935                         RT5640_M_IN_L_SM_L_SFT, 1, 1),
936         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
937                         RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
938         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
939                         RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
940         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
941                         RT5640_M_OM_L_SM_L_SFT, 1, 1),
942 };
943
944 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
945         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
946                         RT5640_M_RM_R_SM_R_SFT, 1, 1),
947         SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
948                         RT5640_M_IN_R_SM_R_SFT, 1, 1),
949         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
950                         RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
951         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
952                         RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
953         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
954                         RT5640_M_OM_R_SM_R_SFT, 1, 1),
955 };
956
957 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
958         SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
959                         RT5640_M_SM_L_OM_L_SFT, 1, 1),
960         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
961                         RT5640_M_BST1_OM_L_SFT, 1, 1),
962         SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
963                         RT5640_M_IN_L_OM_L_SFT, 1, 1),
964         SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
965                         RT5640_M_RM_L_OM_L_SFT, 1, 1),
966         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
967                         RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
968         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
969                         RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
970         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
971                         RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
972 };
973
974 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
975         SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
976                         RT5640_M_SM_L_OM_R_SFT, 1, 1),
977         SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
978                         RT5640_M_BST4_OM_R_SFT, 1, 1),
979         SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
980                         RT5640_M_BST1_OM_R_SFT, 1, 1),
981         SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
982                         RT5640_M_IN_R_OM_R_SFT, 1, 1),
983         SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
984                         RT5640_M_RM_R_OM_R_SFT, 1, 1),
985         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
986                         RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
987         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
988                         RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
989         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
990                         RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
991 };
992
993 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
994         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
995                         RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
996         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
997                         RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
998         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
999                         RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1000         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1001                         RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1002         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1003                         RT5640_M_BST1_SPM_L_SFT, 1, 1),
1004 };
1005
1006 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1007         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1008                         RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1009         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1010                         RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1011         SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1012                         RT5640_M_BST1_SPM_R_SFT, 1, 1),
1013 };
1014
1015 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1016         SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1017                         RT5640_M_DAC2_HM_SFT, 1, 1),
1018         SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1019                         RT5640_M_DAC1_HM_SFT, 1, 1),
1020         SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1021                         RT5640_M_HPVOL_HM_SFT, 1, 1),
1022 };
1023
1024 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1025         SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1026                         RT5640_M_DAC_L1_LM_SFT, 1, 1),
1027         SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1028                         RT5640_M_DAC_R1_LM_SFT, 1, 1),
1029         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1030                         RT5640_M_OV_L_LM_SFT, 1, 1),
1031         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1032                         RT5640_M_OV_R_LM_SFT, 1, 1),
1033 };
1034
1035 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1036         SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1037                         RT5640_M_DAC_R2_MM_SFT, 1, 1),
1038         SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1039                         RT5640_M_DAC_L2_MM_SFT, 1, 1),
1040         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1041                         RT5640_M_OV_R_MM_SFT, 1, 1),
1042         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1043                         RT5640_M_OV_L_MM_SFT, 1, 1),
1044         SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1045                         RT5640_M_BST1_MM_SFT, 1, 1),
1046 };
1047
1048 /* INL/R source */
1049 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1050
1051 static const SOC_ENUM_SINGLE_DECL(
1052         rt5640_inl_enum, RT5640_INL_INR_VOL,
1053         RT5640_INL_SEL_SFT, rt5640_inl_src);
1054
1055 static const struct snd_kcontrol_new rt5640_inl_mux =
1056         SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1057
1058 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1059
1060 static const SOC_ENUM_SINGLE_DECL(
1061         rt5640_inr_enum, RT5640_INL_INR_VOL,
1062         RT5640_INR_SEL_SFT, rt5640_inr_src);
1063
1064 static const struct snd_kcontrol_new rt5640_inr_mux =
1065         SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1066
1067 /* Stereo ADC source */
1068 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1069
1070 static const SOC_ENUM_SINGLE_DECL(
1071         rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1072         RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1073
1074 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1075         SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1076
1077 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1078         SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1079
1080 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1081
1082 static const SOC_ENUM_SINGLE_DECL(
1083         rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1084         RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1085
1086 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1087         SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1088
1089 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1090         SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1091
1092 /* Mono ADC source */
1093 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1094
1095 static const SOC_ENUM_SINGLE_DECL(
1096         rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1097         RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1098
1099 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1100         SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1101
1102 static const char *rt5640_mono_adc_l2_src[] = {
1103         "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1104 };
1105
1106 static const SOC_ENUM_SINGLE_DECL(
1107         rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1108         RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1109
1110 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1111         SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1112
1113 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1114
1115 static const SOC_ENUM_SINGLE_DECL(
1116         rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1117         RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1118
1119 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1120         SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1121
1122 static const char *rt5640_mono_adc_r2_src[] = {
1123         "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1124 };
1125
1126 static const SOC_ENUM_SINGLE_DECL(
1127         rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1128         RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1129
1130 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1131         SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1132
1133 /* DAC2 channel source */
1134 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1135
1136 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1137                                 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1138
1139 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1140         SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1141
1142 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1143
1144 static const SOC_ENUM_SINGLE_DECL(
1145         rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1146         RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1147
1148 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1149         SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1150
1151 /* Interface 2  ADC channel source */
1152 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1153
1154 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1155                         RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1156
1157 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1158         SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1159
1160 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1161
1162 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1163                         RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1164
1165 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1166         SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1167
1168 /* digital interface and iis interface map */
1169 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1170         "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1171         "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1172
1173 static const SOC_ENUM_SINGLE_DECL(
1174         rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1175         RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1176
1177 static const struct snd_kcontrol_new rt5640_dai_mux =
1178         SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1179
1180 /* SDI select */
1181 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1182
1183 static const SOC_ENUM_SINGLE_DECL(
1184         rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1185         RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1186
1187 static const struct snd_kcontrol_new rt5640_sdi_mux =
1188         SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1189
1190 static int spk_event(struct snd_soc_dapm_widget *w,
1191         struct snd_kcontrol *kcontrol, int event)
1192 {
1193         struct snd_soc_codec *codec = w->codec;
1194
1195         switch (event) {
1196         case SND_SOC_DAPM_POST_PMU:
1197                 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1198                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1199                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1200                 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1201                 break;
1202
1203         case SND_SOC_DAPM_PRE_PMD:
1204                 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1205                 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1206                 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1207                 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1208                 break;
1209
1210         default:
1211                 return 0;
1212         }
1213         return 0;
1214 }
1215
1216 static int hp_event(struct snd_soc_dapm_widget *w,
1217         struct snd_kcontrol *kcontrol, int event)
1218 {
1219         switch (event) {
1220         case SND_SOC_DAPM_POST_PMU:
1221                 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1222                 break;
1223
1224         case SND_SOC_DAPM_PRE_PMD:
1225                 pr_info("hp_event --SND_SOC_DAPM_POST_PMD\n");
1226                 break;
1227
1228         default:
1229                 return 0;
1230         }
1231         return 0;
1232 }
1233
1234 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1235         SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1236                         RT5640_PWR_PLL_BIT, 0, NULL, 0),
1237         /* Input Side */
1238         /* micbias */
1239         SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1240                         RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1241         SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1242                         RT5640_PWR_MB1_BIT, 0),
1243         SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1244                         RT5640_PWR_MB2_BIT, 0),
1245         /* Input Lines */
1246
1247         SND_SOC_DAPM_INPUT("MIC1"),
1248         SND_SOC_DAPM_INPUT("MIC2"),
1249         SND_SOC_DAPM_INPUT("DMIC1"),
1250         SND_SOC_DAPM_INPUT("DMIC2"),
1251         SND_SOC_DAPM_INPUT("IN1P"),
1252         SND_SOC_DAPM_INPUT("IN1N"),
1253         SND_SOC_DAPM_INPUT("IN2P"),
1254         SND_SOC_DAPM_INPUT("IN2N"),
1255         SND_SOC_DAPM_INPUT("DMIC L1"),
1256         SND_SOC_DAPM_INPUT("DMIC R1"),
1257         SND_SOC_DAPM_INPUT("DMIC L2"),
1258         SND_SOC_DAPM_INPUT("DMIC R2"),
1259         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1260                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1261         /* Boost */
1262         SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1263                 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1264         SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1265                 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1266         /* Input Volume */
1267         SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1268                 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1269         SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1270                 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1271         /* IN Mux */
1272         SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1273         SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1274         /* REC Mixer */
1275         SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1276                         rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1277         SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1278                         rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1279         /* ADCs */
1280         SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1281                         RT5640_PWR_ADC_L_BIT, 0),
1282         SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1283                         RT5640_PWR_ADC_R_BIT, 0),
1284         /* ADC Mux */
1285         SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1286                                 &rt5640_sto_adc_l2_mux),
1287         SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1288                                 &rt5640_sto_adc_r2_mux),
1289         SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1290                                 &rt5640_sto_adc_l1_mux),
1291         SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1292                                 &rt5640_sto_adc_r1_mux),
1293         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1294                                 &rt5640_mono_adc_l2_mux),
1295         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1296                                 &rt5640_mono_adc_l1_mux),
1297         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1298                                 &rt5640_mono_adc_r1_mux),
1299         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1300                                 &rt5640_mono_adc_r2_mux),
1301         /* ADC Mixer */
1302         SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1303                 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1304         SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1305                 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1306         SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1307                 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1308         SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1309                 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1310         SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1311                 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1312         SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1313                 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1314         SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1315                 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1316
1317         /* IF2 Mux */
1318         SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1319                                 &rt5640_if2_adc_l_mux),
1320         SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1321                                 &rt5640_if2_adc_r_mux),
1322
1323         /* Digital Interface */
1324         SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1325                 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1326         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1327         SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1328         SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1329         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1330         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1331         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1332         SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1333                 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1334         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1335         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1336         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1337         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1338         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1339         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1340         SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1341                 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1342         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1343         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1344         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1345         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1346         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1347         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1348
1349         /* Digital Interface Select */
1350         SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1351         SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1352         SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1353         SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1354         SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1355
1356         SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1357         SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1358         SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1359         SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1360         SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1361
1362         SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1363         SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1364
1365         /* Audio Interface */
1366         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1367         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1368         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1369         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1370         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1371         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1372
1373         /* Audio DSP */
1374         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1375
1376         /* ANC */
1377         SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1378
1379         /* Output Side */
1380         /* DAC mixer before sound effect  */
1381         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1382                 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1383         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1384                 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1385
1386         /* DAC2 channel Mux */
1387         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1388                                 &rt5640_dac_l2_mux),
1389         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1390                                 &rt5640_dac_r2_mux),
1391
1392         /* DAC Mixer */
1393         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1394                 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1395         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1396                 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1397         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1398                 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1399         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1400                 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1401         SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1402                 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1403         SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1404                 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1405         /* DACs */
1406         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1407                         RT5640_PWR_DAC_L1_BIT, 0),
1408         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1409                         RT5640_PWR_DAC_L2_BIT, 0),
1410         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1411                         RT5640_PWR_DAC_R1_BIT, 0),
1412         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1413                         RT5640_PWR_DAC_R2_BIT, 0),
1414         /* SPK/OUT Mixer */
1415         SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1416                 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1417         SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1418                 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1419         SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1420                 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1421         SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1422                 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1423         /* Ouput Volume */
1424         SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1425                 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1426         SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1427                 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1428         SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1429                 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1430         SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1431                 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1432         SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1433                 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1434         SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1435                 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1436         /* SPO/HPO/LOUT/Mono Mixer */
1437         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1438                 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1439         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1440                 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1441
1442         SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1443                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1444         SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1445                 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1446         SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1447                 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1448         SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1449                 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1450
1451         SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1452                 RT5640_PWR_MA_BIT, 0, NULL, 0),
1453
1454         SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1455         SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1456                                         SND_SOC_DAPM_POST_PMU),
1457
1458         SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1459                 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1460
1461         SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1462                 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1463
1464         SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1465                 SND_SOC_NOPM, 0, spk_event,
1466                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1467
1468         /* Output Lines */
1469         SND_SOC_DAPM_OUTPUT("SPOLP"),
1470         SND_SOC_DAPM_OUTPUT("SPOLN"),
1471         SND_SOC_DAPM_OUTPUT("SPORP"),
1472         SND_SOC_DAPM_OUTPUT("SPORN"),
1473         SND_SOC_DAPM_OUTPUT("HPOL"),
1474         SND_SOC_DAPM_OUTPUT("HPOR"),
1475         SND_SOC_DAPM_OUTPUT("LOUTL"),
1476         SND_SOC_DAPM_OUTPUT("LOUTR"),
1477         SND_SOC_DAPM_OUTPUT("MonoP"),
1478         SND_SOC_DAPM_OUTPUT("MonoN"),
1479 };
1480
1481 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1482         {"IN1P", NULL, "LDO2"},
1483         {"IN2P", NULL, "LDO2"},
1484
1485         {"IN1P", NULL, "MIC1"},
1486         {"IN1N", NULL, "MIC1"},
1487         {"IN2P", NULL, "MIC2"},
1488         {"IN2N", NULL, "MIC2"},
1489
1490         {"DMIC L1", NULL, "DMIC1"},
1491         {"DMIC R1", NULL, "DMIC1"},
1492         {"DMIC L2", NULL, "DMIC2"},
1493         {"DMIC R2", NULL, "DMIC2"},
1494
1495         {"BST1", NULL, "IN1P"},
1496         {"BST1", NULL, "IN1N"},
1497         {"BST2", NULL, "IN2P"},
1498         {"BST2", NULL, "IN2N"},
1499
1500         {"INL VOL", NULL, "IN2P"},
1501         {"INR VOL", NULL, "IN2N"},
1502
1503         {"RECMIXL", "HPOL Switch", "HPOL"},
1504         {"RECMIXL", "INL Switch", "INL VOL"},
1505         {"RECMIXL", "BST2 Switch", "BST2"},
1506         {"RECMIXL", "BST1 Switch", "BST1"},
1507         {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1508
1509         {"RECMIXR", "HPOR Switch", "HPOR"},
1510         {"RECMIXR", "INR Switch", "INR VOL"},
1511         {"RECMIXR", "BST2 Switch", "BST2"},
1512         {"RECMIXR", "BST1 Switch", "BST1"},
1513         {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1514
1515         {"ADC L", NULL, "RECMIXL"},
1516         {"ADC R", NULL, "RECMIXR"},
1517
1518         {"DMIC L1", NULL, "DMIC CLK"},
1519         {"DMIC L2", NULL, "DMIC CLK"},
1520
1521         {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1522         {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1523         {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1524         {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1525         {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1526
1527         {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1528         {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1529         {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1530         {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1531         {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1532
1533         {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1534         {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1535         {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1536         {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1537         {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1538
1539         {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1540         {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1541         {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1542         {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1543         {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1544
1545         {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1546         {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1547         {"Stereo ADC MIXL", NULL, "stereo filter"},
1548         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1549
1550         {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1551         {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1552         {"Stereo ADC MIXR", NULL, "stereo filter"},
1553         {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1554
1555         {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1556         {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1557         {"Mono ADC MIXL", NULL, "mono left filter"},
1558         {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1559
1560         {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1561         {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1562         {"Mono ADC MIXR", NULL, "mono right filter"},
1563         {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1564
1565         {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1566         {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1567
1568         {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1569         {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1570         {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1571         {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1572         {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1573         {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1574
1575         {"IF1 ADC", NULL, "I2S1"},
1576         {"IF1 ADC", NULL, "IF1 ADC L"},
1577         {"IF1 ADC", NULL, "IF1 ADC R"},
1578         {"IF2 ADC", NULL, "I2S2"},
1579         {"IF2 ADC", NULL, "IF2 ADC L"},
1580         {"IF2 ADC", NULL, "IF2 ADC R"},
1581         {"IF3 ADC", NULL, "I2S3"},
1582         {"IF3 ADC", NULL, "IF3 ADC L"},
1583         {"IF3 ADC", NULL, "IF3 ADC R"},
1584
1585         {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1586         {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1587         {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1588         {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1589         {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1590         {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1591         {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1592         {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1593         {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1594         {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1595
1596         {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1597         {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1598         {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1599         {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1600         {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1601         {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1602         {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1603         {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1604         {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1605         {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1606
1607         {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1608         {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1609         {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1610         {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1611         {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1612         {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1613         {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1614         {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1615
1616         {"AIF1TX", NULL, "DAI1 TX Mux"},
1617         {"AIF1TX", NULL, "SDI1 TX Mux"},
1618         {"AIF2TX", NULL, "DAI2 TX Mux"},
1619         {"AIF2TX", NULL, "SDI2 TX Mux"},
1620         {"AIF3TX", NULL, "DAI3 TX Mux"},
1621
1622         {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1623         {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1624         {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1625         {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1626         {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1627         {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1628         {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1629         {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1630
1631         {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1632         {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1633         {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1634         {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
1635         {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
1636         {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1637         {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
1638         {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
1639
1640         {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
1641         {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
1642         {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
1643         {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
1644         {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
1645         {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
1646         {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
1647         {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
1648
1649         {"IF1 DAC", NULL, "I2S1"},
1650         {"IF1 DAC", NULL, "DAI1 RX Mux"},
1651         {"IF2 DAC", NULL, "I2S2"},
1652         {"IF2 DAC", NULL, "DAI2 RX Mux"},
1653         {"IF3 DAC", NULL, "I2S3"},
1654         {"IF3 DAC", NULL, "DAI3 RX Mux"},
1655
1656         {"IF1 DAC L", NULL, "IF1 DAC"},
1657         {"IF1 DAC R", NULL, "IF1 DAC"},
1658         {"IF2 DAC L", NULL, "IF2 DAC"},
1659         {"IF2 DAC R", NULL, "IF2 DAC"},
1660         {"IF3 DAC L", NULL, "IF3 DAC"},
1661         {"IF3 DAC R", NULL, "IF3 DAC"},
1662
1663         {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1664         {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1665         {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1666         {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1667
1668         {"ANC", NULL, "Stereo ADC MIXL"},
1669         {"ANC", NULL, "Stereo ADC MIXR"},
1670
1671         {"Audio DSP", NULL, "DAC MIXL"},
1672         {"Audio DSP", NULL, "DAC MIXR"},
1673
1674         {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1675         {"DAC L2 Mux", "IF3", "IF3 DAC L"},
1676         {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1677
1678         {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1679         {"DAC R2 Mux", "IF3", "IF3 DAC R"},
1680
1681         {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1682         {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1683         {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1684         {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1685         {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1686         {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1687
1688         {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1689         {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1690         {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1691         {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1692         {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1693         {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1694
1695         {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1696         {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1697         {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1698         {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1699
1700         {"DAC L1", NULL, "Stereo DAC MIXL"},
1701         {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1702         {"DAC R1", NULL, "Stereo DAC MIXR"},
1703         {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1704         {"DAC L2", NULL, "Mono DAC MIXL"},
1705         {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1706         {"DAC R2", NULL, "Mono DAC MIXR"},
1707         {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1708
1709         {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1710         {"SPK MIXL", "INL Switch", "INL VOL"},
1711         {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1712         {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1713         {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1714         {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1715         {"SPK MIXR", "INR Switch", "INR VOL"},
1716         {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1717         {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1718         {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1719
1720         {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1721         {"OUT MIXL", "BST1 Switch", "BST1"},
1722         {"OUT MIXL", "INL Switch", "INL VOL"},
1723         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1724         {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1725         {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1726         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1727
1728         {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1729         {"OUT MIXR", "BST2 Switch", "BST2"},
1730         {"OUT MIXR", "BST1 Switch", "BST1"},
1731         {"OUT MIXR", "INR Switch", "INR VOL"},
1732         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1733         {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1734         {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1735         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1736
1737         {"SPKVOL L", NULL, "SPK MIXL"},
1738         {"SPKVOL R", NULL, "SPK MIXR"},
1739         {"HPOVOL L", NULL, "OUT MIXL"},
1740         {"HPOVOL R", NULL, "OUT MIXR"},
1741         {"OUTVOL L", NULL, "OUT MIXL"},
1742         {"OUTVOL R", NULL, "OUT MIXR"},
1743
1744         {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1745         {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1746         {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1747         {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1748         {"SPOL MIX", "BST1 Switch", "BST1"},
1749         {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1750         {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1751         {"SPOR MIX", "BST1 Switch", "BST1"},
1752
1753         {"HPOL MIX", "DAC2 Switch", "DAC L2"},
1754         {"HPOL MIX", "DAC1 Switch", "DAC L1"},
1755         {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
1756         {"HPOR MIX", "DAC2 Switch", "DAC R2"},
1757         {"HPOR MIX", "DAC1 Switch", "DAC R1"},
1758         {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
1759
1760         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1761         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1762         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1763         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1764
1765         {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1766         {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1767         {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1768         {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1769         {"Mono MIX", "BST1 Switch", "BST1"},
1770
1771         {"HP L amp", NULL, "HPOL MIX"},
1772         {"HP R amp", NULL, "HPOR MIX"},
1773
1774 /*      {"HP L amp", NULL, "Improve HP amp drv"},
1775         {"HP R amp", NULL, "Improve HP amp drv"}, */
1776
1777         {"SPOLP", NULL, "SPOL MIX"},
1778         {"SPOLN", NULL, "SPOL MIX"},
1779         {"SPORP", NULL, "SPOR MIX"},
1780         {"SPORN", NULL, "SPOR MIX"},
1781
1782         {"SPOLP", NULL, "Improve SPK amp drv"},
1783         {"SPOLN", NULL, "Improve SPK amp drv"},
1784         {"SPORP", NULL, "Improve SPK amp drv"},
1785         {"SPORN", NULL, "Improve SPK amp drv"},
1786
1787         {"HPOL", NULL, "Improve HP amp drv"},
1788         {"HPOR", NULL, "Improve HP amp drv"},
1789
1790         {"HPOL", NULL, "HP L amp"},
1791         {"HPOR", NULL, "HP R amp"},
1792         {"LOUTL", NULL, "LOUT MIX"},
1793         {"LOUTR", NULL, "LOUT MIX"},
1794         {"MonoP", NULL, "Mono MIX"},
1795         {"MonoN", NULL, "Mono MIX"},
1796         {"MonoP", NULL, "Improve mono amp drv"},
1797 };
1798
1799 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1800 {
1801         int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
1802
1803         if (codec == NULL)
1804                 return -EINVAL;
1805
1806         val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1807         switch (dai_id) {
1808         case RT5640_AIF1:
1809                 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
1810                         val == RT5640_IF_113)
1811                         ret |= RT5640_U_IF1;
1812                 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
1813                         val == RT5640_IF_113)
1814                         ret |= RT5640_U_IF2;
1815                 if (val == RT5640_IF_321 || val == RT5640_IF_231)
1816                         ret |= RT5640_U_IF3;
1817                 break;
1818
1819         case RT5640_AIF2:
1820                 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
1821                         val == RT5640_IF_223)
1822                         ret |= RT5640_U_IF1;
1823                 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
1824                         val == RT5640_IF_223)
1825                         ret |= RT5640_U_IF2;
1826                 if (val == RT5640_IF_132 || val == RT5640_IF_312)
1827                         ret |= RT5640_U_IF3;
1828                 break;
1829
1830 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
1831         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1832         case RT5640_AIF3:
1833                 if (val == RT5640_IF_312 || val == RT5640_IF_321)
1834                         ret |= RT5640_U_IF1;
1835                 if (val == RT5640_IF_132 || val == RT5640_IF_231)
1836                         ret |= RT5640_U_IF2;
1837                 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
1838                         val == RT5640_IF_113 || val == RT5640_IF_223)
1839                         ret |= RT5640_U_IF3;
1840                 break;
1841 #endif
1842
1843         default:
1844                 ret = -EINVAL;
1845                 break;
1846         }
1847
1848         return ret;
1849 }
1850
1851 static int get_clk_info(int sclk, int rate)
1852 {
1853         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1854
1855         if (sclk <= 0 || rate <= 0)
1856                 return -EINVAL;
1857
1858         rate = rate << 8;
1859         for (i = 0; i < ARRAY_SIZE(pd); i++)
1860                 if (sclk == rate * pd[i])
1861                         return i;
1862
1863         return -EINVAL;
1864 }
1865
1866 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1867         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1868 {
1869         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1870         struct snd_soc_codec *codec = rtd->codec;
1871         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1872         unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1873         int pre_div, bclk_ms, frame_size;
1874
1875         rt5640->lrck[dai->id] = params_rate(params);
1876         pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1877         if (pre_div < 0) {
1878                 dev_err(codec->dev, "Unsupported clock setting\n");
1879                 return -EINVAL;
1880         }
1881         frame_size = snd_soc_params_to_frame_size(params);
1882         if (frame_size < 0) {
1883                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1884                 return -EINVAL;
1885         }
1886         bclk_ms = frame_size > 32 ? 1 : 0;
1887         rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1888
1889         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1890                 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1891         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1892                                 bclk_ms, pre_div, dai->id);
1893
1894         switch (params_format(params)) {
1895         case SNDRV_PCM_FORMAT_S16_LE:
1896                 break;
1897         case SNDRV_PCM_FORMAT_S20_3LE:
1898                 val_len |= RT5640_I2S_DL_20;
1899                 break;
1900         case SNDRV_PCM_FORMAT_S24_LE:
1901                 val_len |= RT5640_I2S_DL_24;
1902                 break;
1903         case SNDRV_PCM_FORMAT_S8:
1904                 val_len |= RT5640_I2S_DL_8;
1905                 break;
1906         default:
1907                 return -EINVAL;
1908         }
1909
1910         dai_sel = get_sdp_info(codec, dai->id);
1911         if (dai_sel < 0) {
1912                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1913                 return -EINVAL;
1914         }
1915         if (dai_sel & RT5640_U_IF1) {
1916                 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1917                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1918                         pre_div << RT5640_I2S_PD1_SFT;
1919                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1920                         RT5640_I2S_DL_MASK, val_len);
1921                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1922         }
1923         if (dai_sel & RT5640_U_IF2) {
1924                 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1925                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1926                         pre_div << RT5640_I2S_PD2_SFT;
1927                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1928                         RT5640_I2S_DL_MASK, val_len);
1929                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1930         }
1931 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
1932         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1933         if (dai_sel & RT5640_U_IF3) {
1934                 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
1935                 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
1936                         pre_div << RT5640_I2S_PD3_SFT;
1937                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
1938                         RT5640_I2S_DL_MASK, val_len);
1939                 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1940         }
1941 #endif
1942         return 0;
1943 }
1944
1945 static int rt5640_prepare(struct snd_pcm_substream *substream,
1946                                 struct snd_soc_dai *dai)
1947 {
1948         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1949         struct snd_soc_codec *codec = rtd->codec;
1950         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1951
1952         rt5640->aif_pu = dai->id;
1953         return 0;
1954 }
1955
1956 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1957 {
1958         struct snd_soc_codec *codec = dai->codec;
1959         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1960         unsigned int reg_val = 0, dai_sel;
1961
1962         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1963         case SND_SOC_DAIFMT_CBM_CFM:
1964                 rt5640->master[dai->id] = 1;
1965                 break;
1966         case SND_SOC_DAIFMT_CBS_CFS:
1967                 reg_val |= RT5640_I2S_MS_S;
1968                 rt5640->master[dai->id] = 0;
1969                 break;
1970         default:
1971                 return -EINVAL;
1972         }
1973
1974         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1975         case SND_SOC_DAIFMT_NB_NF:
1976                 break;
1977         case SND_SOC_DAIFMT_IB_NF:
1978                 reg_val |= RT5640_I2S_BP_INV;
1979                 break;
1980         default:
1981                 return -EINVAL;
1982         }
1983
1984         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1985         case SND_SOC_DAIFMT_I2S:
1986                 break;
1987         case SND_SOC_DAIFMT_LEFT_J:
1988                 reg_val |= RT5640_I2S_DF_LEFT;
1989                 break;
1990         case SND_SOC_DAIFMT_DSP_A:
1991                 reg_val |= RT5640_I2S_DF_PCM_A;
1992                 break;
1993         case SND_SOC_DAIFMT_DSP_B:
1994                 reg_val  |= RT5640_I2S_DF_PCM_B;
1995                 break;
1996         default:
1997                 return -EINVAL;
1998         }
1999
2000         dai_sel = get_sdp_info(codec, dai->id);
2001         if (dai_sel < 0) {
2002                 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2003                 return -EINVAL;
2004         }
2005         if (dai_sel & RT5640_U_IF1) {
2006                 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2007                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2008                         RT5640_I2S_DF_MASK, reg_val);
2009         }
2010         if (dai_sel & RT5640_U_IF2) {
2011                 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2012                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2013                         RT5640_I2S_DF_MASK, reg_val);
2014         }
2015 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2016         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2017         if (dai_sel & RT5640_U_IF3) {
2018                 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2019                         RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2020                         RT5640_I2S_DF_MASK, reg_val);
2021         }
2022 #endif
2023         return 0;
2024 }
2025
2026 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2027                 int clk_id, unsigned int freq, int dir)
2028 {
2029         struct snd_soc_codec *codec = dai->codec;
2030         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2031         unsigned int reg_val = 0;
2032
2033         if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
2034                 return 0;
2035
2036         switch (clk_id) {
2037         case RT5640_SCLK_S_MCLK:
2038                 reg_val |= RT5640_SCLK_SRC_MCLK;
2039                 break;
2040         case RT5640_SCLK_S_PLL1:
2041                 reg_val |= RT5640_SCLK_SRC_PLL1;
2042                 break;
2043         case RT5640_SCLK_S_PLL1_TK:
2044                 reg_val |= RT5640_SCLK_SRC_PLL1T;
2045                 break;
2046         case RT5640_SCLK_S_RCCLK:
2047                 reg_val |= RT5640_SCLK_SRC_RCCLK;
2048                 break;
2049         default:
2050                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2051                 return -EINVAL;
2052         }
2053         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2054                 RT5640_SCLK_SRC_MASK, reg_val);
2055         rt5640->sysclk = freq;
2056         rt5640->sysclk_src = clk_id;
2057
2058         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2059         return 0;
2060 }
2061
2062 /**
2063  * rt5640_pll_calc - Calcualte PLL M/N/K code.
2064  * @freq_in: external clock provided to codec.
2065  * @freq_out: target clock which codec works on.
2066  * @pll_code: Pointer to structure with M, N, K and bypass flag.
2067  *
2068  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2069  * which make calculation more efficiently.
2070  *
2071  * Returns 0 for success or negative error code.
2072  */
2073 static int rt5640_pll_calc(const unsigned int freq_in,
2074         const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2075 {
2076         int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2077         int n, m, red, n_t, m_t, in_t, out_t, red_t = abs(freq_out - freq_in);
2078         bool bypass = false;
2079
2080         if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2081                 return -EINVAL;
2082
2083         for (n_t = 0; n_t <= max_n; n_t++) {
2084                 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
2085                 if (in_t < 0)
2086                         continue;
2087                 if (in_t == freq_out) {
2088                         bypass = true;
2089                         n = n_t;
2090                         goto code_find;
2091                 }
2092                 for (m_t = 0; m_t <= max_m; m_t++) {
2093                         out_t = in_t / (m_t + 2);
2094                         red = abs(out_t - freq_out);
2095                         if (red < red_t) {
2096                                 n = n_t;
2097                                 m = m_t;
2098                                 if (red == 0)
2099                                         goto code_find;
2100                                 red_t = red;
2101                         }
2102                 }
2103         }
2104         pr_debug("Only get approximation about PLL\n");
2105
2106 code_find:
2107
2108         pll_code->m_bp = bypass;
2109         pll_code->m_code = m;
2110         pll_code->n_code = n;
2111         pll_code->k_code = 2;
2112         return 0;
2113 }
2114
2115 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2116                         unsigned int freq_in, unsigned int freq_out)
2117 {
2118         struct snd_soc_codec *codec = dai->codec;
2119         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2120         struct rt5640_pll_code pll_code;
2121         int ret, dai_sel;
2122
2123         if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2124             freq_out == rt5640->pll_out)
2125                 return 0;
2126
2127         if (!freq_in || !freq_out) {
2128                 dev_dbg(codec->dev, "PLL disabled\n");
2129
2130                 rt5640->pll_in = 0;
2131                 rt5640->pll_out = 0;
2132                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2133                         RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2134                 return 0;
2135         }
2136
2137         switch (source) {
2138         case RT5640_PLL1_S_MCLK:
2139                 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2140                         RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2141                 break;
2142         case RT5640_PLL1_S_BCLK1:
2143         case RT5640_PLL1_S_BCLK2:
2144 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2145         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2146         case RT5640_PLL1_S_BCLK3:
2147
2148 #endif
2149                 dai_sel = get_sdp_info(codec, dai->id);
2150                 if (dai_sel < 0) {
2151                         dev_err(codec->dev,
2152                                 "Failed to get sdp info: %d\n", dai_sel);
2153                         return -EINVAL;
2154                 }
2155                 if (dai_sel & RT5640_U_IF1) {
2156                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2157                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2158                 }
2159                 if (dai_sel & RT5640_U_IF2) {
2160                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2161                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2162                 }
2163                 if (dai_sel & RT5640_U_IF3) {
2164                         snd_soc_update_bits(codec, RT5640_GLB_CLK,
2165                                 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2166                 }
2167                 break;
2168         default:
2169                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2170                 return -EINVAL;
2171         }
2172
2173         ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2174         if (ret < 0) {
2175                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2176                 return ret;
2177         }
2178
2179         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code.m_bp,
2180                 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code);
2181
2182         snd_soc_write(codec, RT5640_PLL_CTRL1,
2183                 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2184         snd_soc_write(codec, RT5640_PLL_CTRL2,
2185                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2186                 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2187
2188         rt5640->pll_in = freq_in;
2189         rt5640->pll_out = freq_out;
2190         rt5640->pll_src = source;
2191
2192         return 0;
2193 }
2194
2195 /**
2196  * rt5640_index_show - Dump private registers.
2197  * @dev: codec device.
2198  * @attr: device attribute.
2199  * @buf: buffer for display.
2200  *
2201  * To show non-zero values of all private registers.
2202  *
2203  * Returns buffer length.
2204  */
2205 static ssize_t rt5640_index_show(struct device *dev,
2206         struct device_attribute *attr, char *buf)
2207 {
2208         struct i2c_client *client = to_i2c_client(dev);
2209         struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2210         struct snd_soc_codec *codec = rt5640->codec;
2211         unsigned int val;
2212         int cnt = 0, i;
2213
2214         cnt += sprintf(buf, "RT5640 index register\n");
2215         for (i = 0; i < 0xb4; i++) {
2216                 if (cnt + 9 >= PAGE_SIZE - 1)
2217                         break;
2218                 val = rt5640_index_read(codec, i);
2219                 if (!val)
2220                         continue;
2221                 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2222         }
2223
2224         if (cnt >= PAGE_SIZE)
2225                 cnt = PAGE_SIZE - 1;
2226
2227         return cnt;
2228 }
2229 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2230
2231 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2232                         enum snd_soc_bias_level level)
2233 {
2234         switch (level) {
2235         case SND_SOC_BIAS_ON:
2236 #ifdef RT5640_DEMO
2237                 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2238                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2239                 snd_soc_update_bits(codec, RT5640_HP_VOL,
2240                         RT5640_L_MUTE | RT5640_R_MUTE, 0);
2241                 break;
2242 #endif
2243         case SND_SOC_BIAS_PREPARE:
2244 #ifdef RT5640_DEMO
2245                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2246                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2247                         RT5640_PWR_BG | RT5640_PWR_VREF2,
2248                         RT5640_PWR_VREF1 | RT5640_PWR_MB |
2249                         RT5640_PWR_BG | RT5640_PWR_VREF2);
2250                 msleep(100);
2251
2252                 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2253                         RT5640_PWR_FV1 | RT5640_PWR_FV2,
2254                         RT5640_PWR_FV1 | RT5640_PWR_FV2);
2255
2256                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2257                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2258                         RT5640_PWR_MB1 | RT5640_PWR_MB2);
2259 #endif
2260                 break;
2261
2262         case SND_SOC_BIAS_STANDBY:
2263 #ifdef RT5640_DEMO
2264                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2265                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2266                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2267                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2268
2269                 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2270                         RT5640_PWR_MB1 | RT5640_PWR_MB2,
2271                         0);
2272 #endif
2273                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2274                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2275                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2276                                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2277                                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2278                                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2279                         msleep(10);
2280                         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2281                                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2282                                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2283                         codec->cache_only = false;
2284                         codec->cache_sync = 1;
2285                         snd_soc_cache_sync(codec);
2286                         rt5640_index_sync(codec);
2287                 }
2288                 break;
2289
2290         case SND_SOC_BIAS_OFF:
2291 #ifdef RT5640_DEMO
2292                 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2293                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2294                 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2295                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2296                 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2297                         RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2298                 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2299                         RT5640_L_MUTE, RT5640_L_MUTE);
2300 #endif
2301                 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2302                 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2303                 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2304                 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2305                 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2306                 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2307                 break;
2308
2309         default:
2310                 break;
2311         }
2312         codec->dapm.bias_level = level;
2313
2314         return 0;
2315 }
2316
2317 static int rt5640_probe(struct snd_soc_codec *codec)
2318 {
2319         struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2320         int ret;
2321         u16 val;
2322
2323         codec->dapm.idle_bias_off = 1;
2324
2325         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2326         if (ret != 0) {
2327                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2328                 return ret;
2329         }
2330
2331         val = snd_soc_read(codec, RT5640_RESET);
2332         if (val != rt5640_reg[RT5640_RESET]) {
2333                 dev_err(codec->dev,
2334                         "Device with ID register %x is not a rt5640\n", val);
2335                 return -ENODEV;
2336         }
2337
2338         rt5640_reset(codec);
2339         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2340                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2341                 RT5640_PWR_BG | RT5640_PWR_VREF2,
2342                 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2343                 RT5640_PWR_BG | RT5640_PWR_VREF2);
2344         msleep(100);
2345         snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2346                 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2347                 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2348         /* DMIC */
2349         if (rt5640->dmic_en == RT5640_DMIC1) {
2350                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2351                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2352                 snd_soc_update_bits(codec, RT5640_DMIC,
2353                         RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2354                         RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2355         } else if (rt5640->dmic_en == RT5640_DMIC2) {
2356                 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2357                         RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2358                 snd_soc_update_bits(codec, RT5640_DMIC,
2359                         RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2360                         RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2361         }
2362
2363 #ifdef RT5640_DEMO
2364         rt5640_reg_init(codec);
2365 #endif
2366
2367 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
2368         rt5640_register_dsp(codec);
2369 #endif
2370
2371         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2372
2373         snd_soc_add_codec_controls(codec, rt5640_snd_controls,
2374                 ARRAY_SIZE(rt5640_snd_controls));
2375
2376         rt5640->codec = codec;
2377         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2378         if (ret != 0) {
2379                 dev_err(codec->dev,
2380                         "Failed to create index_reg sysfs files: %d\n", ret);
2381                 return ret;
2382         }
2383
2384         return 0;
2385 }
2386
2387 static int rt5640_remove(struct snd_soc_codec *codec)
2388 {
2389         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2390         rt5640_reset(codec);
2391         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2392
2393         return 0;
2394 }
2395 #ifdef CONFIG_PM
2396 static int rt5640_suspend(struct snd_soc_codec *codec, pm_message_t state)
2397 {
2398         rt5640_reset(codec);
2399         rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2400         snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2401
2402         return 0;
2403 }
2404
2405 static int rt5640_resume(struct snd_soc_codec *codec)
2406 {
2407         int ret = 0 ;
2408
2409         codec->cache_sync = 1;
2410         ret = snd_soc_cache_sync(codec);
2411         if (ret) {
2412                 dev_err(codec->dev,"Failed to sync cache: %d\n", ret);
2413                 return ret;
2414         }
2415         rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2416
2417         return 0;
2418 }
2419 #else
2420 #define rt5640_suspend NULL
2421 #define rt5640_resume NULL
2422 #endif
2423
2424 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2425 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2426                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2427
2428 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2429         .hw_params = rt5640_hw_params,
2430         .prepare = rt5640_prepare,
2431         .set_fmt = rt5640_set_dai_fmt,
2432         .set_sysclk = rt5640_set_dai_sysclk,
2433         .set_pll = rt5640_set_dai_pll,
2434 };
2435
2436 struct snd_soc_dai_driver rt5640_dai[] = {
2437         {
2438                 .name = "rt5640-aif1",
2439                 .id = RT5640_AIF1,
2440                 .playback = {
2441                         .stream_name = "AIF1 Playback",
2442                         .channels_min = 1,
2443                         .channels_max = 2,
2444                         .rates = RT5640_STEREO_RATES,
2445                         .formats = RT5640_FORMATS,
2446                 },
2447                 .capture = {
2448                         .stream_name = "AIF1 Capture",
2449                         .channels_min = 1,
2450                         .channels_max = 2,
2451                         .rates = RT5640_STEREO_RATES,
2452                         .formats = RT5640_FORMATS,
2453                 },
2454                 .ops = &rt5640_aif_dai_ops,
2455         },
2456         {
2457                 .name = "rt5640-aif2",
2458                 .id = RT5640_AIF2,
2459                 .playback = {
2460                         .stream_name = "AIF2 Playback",
2461                         .channels_min = 1,
2462                         .channels_max = 2,
2463                         .rates = RT5640_STEREO_RATES,
2464                         .formats = RT5640_FORMATS,
2465                 },
2466                 .capture = {
2467                         .stream_name = "AIF2 Capture",
2468                         .channels_min = 1,
2469                         .channels_max = 2,
2470                         .rates = RT5640_STEREO_RATES,
2471                         .formats = RT5640_FORMATS,
2472                 },
2473                 .ops = &rt5640_aif_dai_ops,
2474         },
2475 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2476         defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2477         {
2478                 .name = "rt5640-aif3",
2479                 .id = RT5640_AIF3,
2480                 .playback = {
2481                         .stream_name = "AIF3 Playback",
2482                         .channels_min = 1,
2483                         .channels_max = 2,
2484                         .rates = RT5640_STEREO_RATES,
2485                         .formats = RT5640_FORMATS,
2486                 },
2487                 .capture = {
2488                         .stream_name = "AIF3 Capture",
2489                         .channels_min = 1,
2490                         .channels_max = 2,
2491                         .rates = RT5640_STEREO_RATES,
2492                         .formats = RT5640_FORMATS,
2493                 },
2494                 .ops = &rt5640_aif_dai_ops,
2495         },
2496 #endif
2497 };
2498
2499 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2500         .probe = rt5640_probe,
2501         .remove = rt5640_remove,
2502         .suspend = rt5640_suspend,
2503         .resume = rt5640_resume,
2504         .set_bias_level = rt5640_set_bias_level,
2505         .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2506         .reg_word_size = sizeof(u16),
2507         .reg_cache_default = rt5640_reg,
2508         .volatile_register = rt5640_volatile_register,
2509         .readable_register = rt5640_readable_register,
2510         .reg_cache_step = 1,
2511         .dapm_widgets = rt5640_dapm_widgets,
2512         .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2513         .dapm_routes = rt5640_dapm_routes,
2514         .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2515 };
2516
2517 static const struct i2c_device_id rt5640_i2c_id[] = {
2518         { "rt5640", 0 },
2519         { }
2520 };
2521 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2522
2523 static int rt5640_i2c_probe(struct i2c_client *i2c,
2524                     const struct i2c_device_id *id)
2525 {
2526         struct rt5640_priv *rt5640;
2527         int ret;
2528
2529         rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2530         if (NULL == rt5640)
2531                 return -ENOMEM;
2532
2533         i2c_set_clientdata(i2c, rt5640);
2534
2535         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2536                         rt5640_dai, ARRAY_SIZE(rt5640_dai));
2537         if (ret < 0)
2538                 kfree(rt5640);
2539
2540         return ret;
2541 }
2542
2543 static __devexit int rt5640_i2c_remove(struct i2c_client *i2c)
2544 {
2545         snd_soc_unregister_codec(&i2c->dev);
2546         kfree(i2c_get_clientdata(i2c));
2547         return 0;
2548 }
2549
2550 struct i2c_driver rt5640_i2c_driver = {
2551         .driver = {
2552                 .name = "rt5640",
2553                 .owner = THIS_MODULE,
2554         },
2555         .probe = rt5640_i2c_probe,
2556         .remove   = __devexit_p(rt5640_i2c_remove),
2557         .id_table = rt5640_i2c_id,
2558 };
2559
2560 static int __init rt5640_modinit(void)
2561 {
2562         return i2c_add_driver(&rt5640_i2c_driver);
2563 }
2564 module_init(rt5640_modinit);
2565
2566 static void __exit rt5640_modexit(void)
2567 {
2568         i2c_del_driver(&rt5640_i2c_driver);
2569 }
2570 module_exit(rt5640_modexit);
2571
2572 MODULE_DESCRIPTION("ASoC RT5640 driver");
2573 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2574 MODULE_LICENSE("GPL");