ALSA: hda - Convert from takslet_hi_schedule() to tasklet_schedule()
[linux-2.6.git] / sound / pci / pcxhr / pcxhr.c
1 /*
2  * Driver for Digigram pcxhr compatible soundcards
3  *
4  * main file with alsa callbacks
5  *
6  * Copyright (c) 2004 by Digigram <alsa@digigram.com>
7  *
8  *   This program is free software; you can redistribute it and/or modify
9  *   it under the terms of the GNU General Public License as published by
10  *   the Free Software Foundation; either version 2 of the License, or
11  *   (at your option) any later version.
12  *
13  *   This program is distributed in the hope that it will be useful,
14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *   GNU General Public License for more details.
17  *
18  *   You should have received a copy of the GNU General Public License
19  *   along with this program; if not, write to the Free Software
20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
21  */
22
23
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/slab.h>
27 #include <linux/pci.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/moduleparam.h>
31 #include <linux/mutex.h>
32
33 #include <sound/core.h>
34 #include <sound/initval.h>
35 #include <sound/info.h>
36 #include <sound/control.h>
37 #include <sound/pcm.h>
38 #include <sound/pcm_params.h>
39 #include "pcxhr.h"
40 #include "pcxhr_mixer.h"
41 #include "pcxhr_hwdep.h"
42 #include "pcxhr_core.h"
43
44 #define DRIVER_NAME "pcxhr"
45
46 MODULE_AUTHOR("Markus Bollinger <bollinger@digigram.com>");
47 MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING);
48 MODULE_LICENSE("GPL");
49 MODULE_SUPPORTED_DEVICE("{{Digigram," DRIVER_NAME "}}");
50
51 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;              /* Index 0-MAX */
52 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;               /* ID for this card */
53 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
54 static int mono[SNDRV_CARDS];                                   /* capture in mono only */
55
56 module_param_array(index, int, NULL, 0444);
57 MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard");
58 module_param_array(id, charp, NULL, 0444);
59 MODULE_PARM_DESC(id, "ID string for Digigram " DRIVER_NAME " soundcard");
60 module_param_array(enable, bool, NULL, 0444);
61 MODULE_PARM_DESC(enable, "Enable Digigram " DRIVER_NAME " soundcard");
62 module_param_array(mono, bool, NULL, 0444);
63 MODULE_PARM_DESC(mono, "Mono capture mode (default is stereo)");
64
65 enum {
66         PCI_ID_VX882HR,
67         PCI_ID_PCX882HR,
68         PCI_ID_VX881HR,
69         PCI_ID_PCX881HR,
70         PCI_ID_PCX1222HR,
71         PCI_ID_PCX1221HR,
72         PCI_ID_LAST
73 };
74
75 static struct pci_device_id pcxhr_ids[] = {
76         { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, },   /* VX882HR */
77         { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, },  /* PCX882HR */
78         { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, },   /* VX881HR */
79         { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, },  /* PCX881HR */
80         { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, }, /* PCX1222HR */
81         { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, }, /* PCX1221HR */
82         { 0, }
83 };
84
85 MODULE_DEVICE_TABLE(pci, pcxhr_ids);
86
87 struct board_parameters {
88         char* board_name;
89         short playback_chips;
90         short capture_chips;
91         short firmware_num;
92 };
93 static struct board_parameters pcxhr_board_params[] = {
94 [PCI_ID_VX882HR] =      { "VX882HR",   4, 4, 41, },
95 [PCI_ID_PCX882HR] =     { "PCX882HR",  4, 4, 41, },
96 [PCI_ID_VX881HR] =      { "VX881HR",   4, 4, 41, },
97 [PCI_ID_PCX881HR] =     { "PCX881HR",  4, 4, 41, },
98 [PCI_ID_PCX1222HR] =    { "PCX1222HR", 6, 1, 42, },
99 [PCI_ID_PCX1221HR] =    { "PCX1221HR", 6, 1, 42, },
100 };
101
102
103 static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg,
104                                    unsigned int* realfreq)
105 {
106         unsigned int reg;
107
108         if (freq < 6900 || freq > 110250)
109                 return -EINVAL;
110         reg = (28224000 * 10) / freq;
111         reg = (reg + 5) / 10;
112         if (reg < 0x200)
113                 *pllreg = reg + 0x800;
114         else if (reg < 0x400)
115                 *pllreg = reg & 0x1ff;
116         else if (reg < 0x800) {
117                 *pllreg = ((reg >> 1) & 0x1ff) + 0x200;
118                 reg &= ~1;
119         } else {
120                 *pllreg = ((reg >> 2) & 0x1ff) + 0x400;
121                 reg &= ~3;
122         }
123         if (realfreq)
124                 *realfreq = ((28224000 * 10) / reg + 5) / 10;
125         return 0;
126 }
127
128
129 #define PCXHR_FREQ_REG_MASK             0x1f
130 #define PCXHR_FREQ_QUARTZ_48000         0x00
131 #define PCXHR_FREQ_QUARTZ_24000         0x01
132 #define PCXHR_FREQ_QUARTZ_12000         0x09
133 #define PCXHR_FREQ_QUARTZ_32000         0x08
134 #define PCXHR_FREQ_QUARTZ_16000         0x04
135 #define PCXHR_FREQ_QUARTZ_8000          0x0c
136 #define PCXHR_FREQ_QUARTZ_44100         0x02
137 #define PCXHR_FREQ_QUARTZ_22050         0x0a
138 #define PCXHR_FREQ_QUARTZ_11025         0x06
139 #define PCXHR_FREQ_PLL                  0x05
140 #define PCXHR_FREQ_QUARTZ_192000        0x10
141 #define PCXHR_FREQ_QUARTZ_96000         0x18
142 #define PCXHR_FREQ_QUARTZ_176400        0x14
143 #define PCXHR_FREQ_QUARTZ_88200         0x1c
144 #define PCXHR_FREQ_QUARTZ_128000        0x12
145 #define PCXHR_FREQ_QUARTZ_64000         0x1a
146
147 #define PCXHR_FREQ_WORD_CLOCK           0x0f
148 #define PCXHR_FREQ_SYNC_AES             0x0e
149 #define PCXHR_FREQ_AES_1                0x07
150 #define PCXHR_FREQ_AES_2                0x0b
151 #define PCXHR_FREQ_AES_3                0x03
152 #define PCXHR_FREQ_AES_4                0x0d
153
154 #define PCXHR_MODIFY_CLOCK_S_BIT        0x04
155
156 #define PCXHR_IRQ_TIMER_FREQ            92000
157 #define PCXHR_IRQ_TIMER_PERIOD          48
158
159 static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate,
160                                unsigned int *reg, unsigned int *freq)
161 {
162         unsigned int val, realfreq, pllreg;
163         struct pcxhr_rmh rmh;
164         int err;
165
166         realfreq = rate;
167         switch (mgr->use_clock_type) {
168         case PCXHR_CLOCK_TYPE_INTERNAL :        /* clock by quartz or pll */
169                 switch (rate) {
170                 case 48000 :    val = PCXHR_FREQ_QUARTZ_48000;  break;
171                 case 24000 :    val = PCXHR_FREQ_QUARTZ_24000;  break;
172                 case 12000 :    val = PCXHR_FREQ_QUARTZ_12000;  break;
173                 case 32000 :    val = PCXHR_FREQ_QUARTZ_32000;  break;
174                 case 16000 :    val = PCXHR_FREQ_QUARTZ_16000;  break;
175                 case 8000 :     val = PCXHR_FREQ_QUARTZ_8000;   break;
176                 case 44100 :    val = PCXHR_FREQ_QUARTZ_44100;  break;
177                 case 22050 :    val = PCXHR_FREQ_QUARTZ_22050;  break;
178                 case 11025 :    val = PCXHR_FREQ_QUARTZ_11025;  break;
179                 case 192000 :   val = PCXHR_FREQ_QUARTZ_192000; break;
180                 case 96000 :    val = PCXHR_FREQ_QUARTZ_96000;  break;
181                 case 176400 :   val = PCXHR_FREQ_QUARTZ_176400; break;
182                 case 88200 :    val = PCXHR_FREQ_QUARTZ_88200;  break;
183                 case 128000 :   val = PCXHR_FREQ_QUARTZ_128000; break;
184                 case 64000 :    val = PCXHR_FREQ_QUARTZ_64000;  break;
185                 default :
186                         val = PCXHR_FREQ_PLL;
187                         /* get the value for the pll register */
188                         err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq);
189                         if (err)
190                                 return err;
191                         pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);
192                         rmh.cmd[0] |= IO_NUM_REG_GENCLK;
193                         rmh.cmd[1]  = pllreg & MASK_DSP_WORD;
194                         rmh.cmd[2]  = pllreg >> 24;
195                         rmh.cmd_len = 3;
196                         err = pcxhr_send_msg(mgr, &rmh);
197                         if (err < 0) {
198                                 snd_printk(KERN_ERR
199                                            "error CMD_ACCESS_IO_WRITE for PLL register : %x!\n",
200                                            err );
201                                 return err;
202                         }
203                 }
204                 break;
205         case PCXHR_CLOCK_TYPE_WORD_CLOCK :      val = PCXHR_FREQ_WORD_CLOCK;    break;
206         case PCXHR_CLOCK_TYPE_AES_SYNC :        val = PCXHR_FREQ_SYNC_AES;      break;
207         case PCXHR_CLOCK_TYPE_AES_1 :           val = PCXHR_FREQ_AES_1;         break;
208         case PCXHR_CLOCK_TYPE_AES_2 :           val = PCXHR_FREQ_AES_2;         break;
209         case PCXHR_CLOCK_TYPE_AES_3 :           val = PCXHR_FREQ_AES_3;         break;
210         case PCXHR_CLOCK_TYPE_AES_4 :           val = PCXHR_FREQ_AES_4;         break;
211         default : return -EINVAL;
212         }
213         *reg = val;
214         *freq = realfreq;
215         return 0;
216 }
217
218
219 int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate)
220 {
221         unsigned int val, realfreq, speed;
222         struct pcxhr_rmh rmh;
223         int err, changed;
224
225         if (rate == 0)
226                 return 0; /* nothing to do */
227
228         err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq);
229         if (err)
230                 return err;
231
232         /* codec speed modes */
233         if (rate < 55000)
234                 speed = 0;      /* single speed */
235         else if (rate < 100000)
236                 speed = 1;      /* dual speed */
237         else
238                 speed = 2;      /* quad speed */
239         if (mgr->codec_speed != speed) {
240                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);      /* mute outputs */
241                 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
242                 err = pcxhr_send_msg(mgr, &rmh);
243                 if (err)
244                         return err;
245
246                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);      /* set speed ratio */
247                 rmh.cmd[0] |= IO_NUM_SPEED_RATIO;
248                 rmh.cmd[1] = speed;
249                 rmh.cmd_len = 2;
250                 err = pcxhr_send_msg(mgr, &rmh);
251                 if (err)
252                         return err;
253         }
254         /* set the new frequency */
255         snd_printdd("clock register : set %x\n", val);
256         err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK, val, &changed);
257         if (err)
258                 return err;
259         mgr->sample_rate_real = realfreq;
260         mgr->cur_clock_type = mgr->use_clock_type;
261
262         /* unmute after codec speed modes */
263         if (mgr->codec_speed != speed) {
264                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);       /* unmute outputs */
265                 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
266                 err = pcxhr_send_msg(mgr, &rmh);
267                 if (err)
268                         return err;
269                 mgr->codec_speed = speed;                       /* save new codec speed */
270         }
271
272         if (changed) {
273                 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK);
274                 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT;         /* resync fifos  */
275                 if (rate < PCXHR_IRQ_TIMER_FREQ)
276                         rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD;
277                 else
278                         rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2;
279                 rmh.cmd[2] = rate;
280                 rmh.cmd_len = 3;
281                 err = pcxhr_send_msg(mgr, &rmh);
282                 if (err)
283                         return err;
284         }
285         snd_printdd("pcxhr_set_clock to %dHz (realfreq=%d)\n", rate, realfreq);
286         return 0;
287 }
288
289
290 int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type,
291                              int *sample_rate)
292 {
293         struct pcxhr_rmh rmh;
294         unsigned char reg;
295         int err, rate;
296
297         switch (clock_type) {
298         case PCXHR_CLOCK_TYPE_WORD_CLOCK :      reg = REG_STATUS_WORD_CLOCK;    break;
299         case PCXHR_CLOCK_TYPE_AES_SYNC :        reg = REG_STATUS_AES_SYNC;      break;
300         case PCXHR_CLOCK_TYPE_AES_1 :           reg = REG_STATUS_AES_1;         break;
301         case PCXHR_CLOCK_TYPE_AES_2 :           reg = REG_STATUS_AES_2;         break;
302         case PCXHR_CLOCK_TYPE_AES_3 :           reg = REG_STATUS_AES_3;         break;
303         case PCXHR_CLOCK_TYPE_AES_4 :           reg = REG_STATUS_AES_4;         break;
304         default : return -EINVAL;
305         }
306         pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
307         rmh.cmd_len = 2;
308         rmh.cmd[0] |= IO_NUM_REG_STATUS;
309         if (mgr->last_reg_stat != reg) {
310                 rmh.cmd[1]  = reg;
311                 err = pcxhr_send_msg(mgr, &rmh);
312                 if (err)
313                         return err;
314                 udelay(100);            /* wait minimum 2 sample_frames at 32kHz ! */
315                 mgr->last_reg_stat = reg;
316         }
317         rmh.cmd[1]  = REG_STATUS_CURRENT;
318         err = pcxhr_send_msg(mgr, &rmh);
319         if (err)
320                 return err;
321         switch (rmh.stat[1] & 0x0f) {
322         case REG_STATUS_SYNC_32000 :    rate = 32000; break;
323         case REG_STATUS_SYNC_44100 :    rate = 44100; break;
324         case REG_STATUS_SYNC_48000 :    rate = 48000; break;
325         case REG_STATUS_SYNC_64000 :    rate = 64000; break;
326         case REG_STATUS_SYNC_88200 :    rate = 88200; break;
327         case REG_STATUS_SYNC_96000 :    rate = 96000; break;
328         case REG_STATUS_SYNC_128000 :   rate = 128000; break;
329         case REG_STATUS_SYNC_176400 :   rate = 176400; break;
330         case REG_STATUS_SYNC_192000 :   rate = 192000; break;
331         default: rate = 0;
332         }
333         snd_printdd("External clock is at %d Hz\n", rate);
334         *sample_rate = rate;
335         return 0;
336 }
337
338
339 /*
340  *  start or stop playback/capture substream
341  */
342 static int pcxhr_set_stream_state(struct pcxhr_stream *stream)
343 {
344         int err;
345         struct snd_pcxhr *chip;
346         struct pcxhr_rmh rmh;
347         int stream_mask, start;
348
349         if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN)
350                 start = 1;
351         else {
352                 if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) {
353                         snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state CANNOT be stopped\n");
354                         return -EINVAL;
355                 }
356                 start = 0;
357         }
358         if (!stream->substream)
359                 return -EINVAL;
360
361         stream->timer_abs_periods = 0;
362         stream->timer_period_frag = 0;            /* reset theoretical stream pos */
363         stream->timer_buf_periods = 0;
364         stream->timer_is_synced = 0;
365
366         stream_mask = stream->pipe->is_capture ? 1 : 1<<stream->substream->number;
367
368         pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM);
369         pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,
370                                   stream->pipe->first_audio, 0, stream_mask);
371
372         chip = snd_pcm_substream_chip(stream->substream);
373
374         err = pcxhr_send_msg(chip->mgr, &rmh);
375         if (err)
376                 snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state err=%x;\n", err);
377         stream->status = start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED;
378         return err;
379 }
380
381 #define HEADER_FMT_BASE_LIN             0xfed00000
382 #define HEADER_FMT_BASE_FLOAT           0xfad00000
383 #define HEADER_FMT_INTEL                0x00008000
384 #define HEADER_FMT_24BITS               0x00004000
385 #define HEADER_FMT_16BITS               0x00002000
386 #define HEADER_FMT_UPTO11               0x00000200
387 #define HEADER_FMT_UPTO32               0x00000100
388 #define HEADER_FMT_MONO                 0x00000080
389
390 static int pcxhr_set_format(struct pcxhr_stream *stream)
391 {
392         int err, is_capture, sample_rate, stream_num;
393         struct snd_pcxhr *chip;
394         struct pcxhr_rmh rmh;
395         unsigned int header;
396
397         switch (stream->format) {
398         case SNDRV_PCM_FORMAT_U8:
399                 header = HEADER_FMT_BASE_LIN;
400                 break;
401         case SNDRV_PCM_FORMAT_S16_LE:
402                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS | HEADER_FMT_INTEL;
403                 break;
404         case SNDRV_PCM_FORMAT_S16_BE:
405                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS;
406                 break;
407         case SNDRV_PCM_FORMAT_S24_3LE:
408                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS | HEADER_FMT_INTEL;
409                 break;
410         case SNDRV_PCM_FORMAT_S24_3BE:
411                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS;
412                 break;
413         case SNDRV_PCM_FORMAT_FLOAT_LE:
414                 header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL;
415                 break;
416         default:
417                 snd_printk(KERN_ERR "error pcxhr_set_format() : unknown format\n");
418                 return -EINVAL;
419         }
420         chip = snd_pcm_substream_chip(stream->substream);
421
422         sample_rate = chip->mgr->sample_rate;
423         if (sample_rate <= 32000 && sample_rate !=0) {
424                 if (sample_rate <= 11025)
425                         header |= HEADER_FMT_UPTO11;
426                 else
427                         header |= HEADER_FMT_UPTO32;
428         }
429         if (stream->channels == 1)
430                 header |= HEADER_FMT_MONO;
431
432         is_capture = stream->pipe->is_capture;
433         stream_num = is_capture ? 0 : stream->substream->number;
434
435         pcxhr_init_rmh(&rmh, is_capture ? CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT);
436         pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0);
437         if (is_capture)
438                 rmh.cmd[0] |= 1<<12;
439         rmh.cmd[1] = 0;
440         rmh.cmd[2] = header >> 8;
441         rmh.cmd[3] = (header & 0xff) << 16;
442         rmh.cmd_len = 4;
443         err = pcxhr_send_msg(chip->mgr, &rmh);
444         if (err)
445                 snd_printk(KERN_ERR "ERROR pcxhr_set_format err=%x;\n", err);
446         return err;
447 }
448
449 static int pcxhr_update_r_buffer(struct pcxhr_stream *stream)
450 {
451         int err, is_capture, stream_num;
452         struct pcxhr_rmh rmh;
453         struct snd_pcm_substream *subs = stream->substream;
454         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
455
456         is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE);
457         stream_num = is_capture ? 0 : subs->number;
458
459         snd_printdd("pcxhr_update_r_buffer(pcm%c%d) : addr(%p) bytes(%zx) subs(%d)\n",
460                     is_capture ? 'c' : 'p',
461                     chip->chip_idx, (void *)(long)subs->runtime->dma_addr,
462                     subs->runtime->dma_bytes, subs->number);
463
464         pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS);
465         pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0);
466
467         /* max buffer size is 2 MByte */
468         snd_BUG_ON(subs->runtime->dma_bytes >= 0x200000);
469         rmh.cmd[1] = subs->runtime->dma_bytes * 8;              /* size in bits */
470         rmh.cmd[2] = subs->runtime->dma_addr >> 24;             /* most significant byte */
471         rmh.cmd[2] |= 1<<19;                                    /* this is a circular buffer */
472         rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD;   /* least 3 significant bytes */
473         rmh.cmd_len = 4;
474         err = pcxhr_send_msg(chip->mgr, &rmh);
475         if (err)
476                 snd_printk(KERN_ERR "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err);
477         return err;
478 }
479
480
481 #if 0
482 static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream, snd_pcm_uframes_t *sample_count)
483 {
484         struct pcxhr_rmh rmh;
485         int err;
486         pcxhr_t *chip = snd_pcm_substream_chip(stream->substream);
487         pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT);
488         pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0,
489                                   1<<stream->pipe->first_audio);
490         err = pcxhr_send_msg(chip->mgr, &rmh);
491         if (err == 0) {
492                 *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24;
493                 *sample_count += (snd_pcm_uframes_t)rmh.stat[1];
494         }
495         snd_printdd("PIPE_SAMPLE_COUNT = %lx\n", *sample_count);
496         return err;
497 }
498 #endif
499
500 static inline int pcxhr_stream_scheduled_get_pipe(struct pcxhr_stream *stream,
501                                                   struct pcxhr_pipe **pipe)
502 {
503         if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) {
504                 *pipe = stream->pipe;
505                 return 1;
506         }
507         return 0;
508 }
509
510 static void pcxhr_trigger_tasklet(unsigned long arg)
511 {
512         unsigned long flags;
513         int i, j, err;
514         struct pcxhr_pipe *pipe;
515         struct snd_pcxhr *chip;
516         struct pcxhr_mgr *mgr = (struct pcxhr_mgr*)(arg);
517         int capture_mask = 0;
518         int playback_mask = 0;
519
520 #ifdef CONFIG_SND_DEBUG_VERBOSE
521         struct timeval my_tv1, my_tv2;
522         do_gettimeofday(&my_tv1);
523 #endif
524         mutex_lock(&mgr->setup_mutex);
525
526         /* check the pipes concerned and build pipe_array */
527         for (i = 0; i < mgr->num_cards; i++) {
528                 chip = mgr->chip[i];
529                 for (j = 0; j < chip->nb_streams_capt; j++) {
530                         if (pcxhr_stream_scheduled_get_pipe(&chip->capture_stream[j], &pipe))
531                                 capture_mask |= (1 << pipe->first_audio);
532                 }
533                 for (j = 0; j < chip->nb_streams_play; j++) {
534                         if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) {
535                                 playback_mask |= (1 << pipe->first_audio);
536                                 break;  /* add only once, as all playback streams of
537                                          * one chip use the same pipe
538                                          */
539                         }
540                 }
541         }
542         if (capture_mask == 0 && playback_mask == 0) {
543                 mutex_unlock(&mgr->setup_mutex);
544                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : no pipes\n");
545                 return;
546         }
547
548         snd_printdd("pcxhr_trigger_tasklet : playback_mask=%x capture_mask=%x\n",
549                     playback_mask, capture_mask);
550
551         /* synchronous stop of all the pipes concerned */
552         err = pcxhr_set_pipe_state(mgr,  playback_mask, capture_mask, 0);
553         if (err) {
554                 mutex_unlock(&mgr->setup_mutex);
555                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error stop pipes (P%x C%x)\n",
556                            playback_mask, capture_mask);
557                 return;
558         }
559
560         /* unfortunately the dsp lost format and buffer info with the stop pipe */
561         for (i = 0; i < mgr->num_cards; i++) {
562                 struct pcxhr_stream *stream;
563                 chip = mgr->chip[i];
564                 for (j = 0; j < chip->nb_streams_capt; j++) {
565                         stream = &chip->capture_stream[j];
566                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {
567                                 err = pcxhr_set_format(stream);
568                                 err = pcxhr_update_r_buffer(stream);
569                         }
570                 }
571                 for (j = 0; j < chip->nb_streams_play; j++) {
572                         stream = &chip->playback_stream[j];
573                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {
574                                 err = pcxhr_set_format(stream);
575                                 err = pcxhr_update_r_buffer(stream);
576                         }
577                 }
578         }
579         /* start all the streams */
580         for (i = 0; i < mgr->num_cards; i++) {
581                 struct pcxhr_stream *stream;
582                 chip = mgr->chip[i];
583                 for (j = 0; j < chip->nb_streams_capt; j++) {
584                         stream = &chip->capture_stream[j];
585                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))
586                                 err = pcxhr_set_stream_state(stream);
587                 }
588                 for (j = 0; j < chip->nb_streams_play; j++) {
589                         stream = &chip->playback_stream[j];
590                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))
591                                 err = pcxhr_set_stream_state(stream);
592                 }
593         }
594
595         /* synchronous start of all the pipes concerned */
596         err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1);
597         if (err) {
598                 mutex_unlock(&mgr->setup_mutex);
599                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error start pipes (P%x C%x)\n",
600                            playback_mask, capture_mask);
601                 return;
602         }
603
604         /* put the streams into the running state now (increment pointer by interrupt) */
605         spin_lock_irqsave(&mgr->lock, flags);
606         for ( i =0; i < mgr->num_cards; i++) {
607                 struct pcxhr_stream *stream;
608                 chip = mgr->chip[i];
609                 for(j = 0; j < chip->nb_streams_capt; j++) {
610                         stream = &chip->capture_stream[j];
611                         if(stream->status == PCXHR_STREAM_STATUS_STARTED)
612                                 stream->status = PCXHR_STREAM_STATUS_RUNNING;
613                 }
614                 for (j = 0; j < chip->nb_streams_play; j++) {
615                         stream = &chip->playback_stream[j];
616                         if (stream->status == PCXHR_STREAM_STATUS_STARTED) {
617                                 /* playback will already have advanced ! */
618                                 stream->timer_period_frag += PCXHR_GRANULARITY;
619                                 stream->status = PCXHR_STREAM_STATUS_RUNNING;
620                         }
621                 }
622         }
623         spin_unlock_irqrestore(&mgr->lock, flags);
624
625         mutex_unlock(&mgr->setup_mutex);
626
627 #ifdef CONFIG_SND_DEBUG_VERBOSE
628         do_gettimeofday(&my_tv2);
629         snd_printdd("***TRIGGER TASKLET*** TIME = %ld (err = %x)\n",
630                     (long)(my_tv2.tv_usec - my_tv1.tv_usec), err);
631 #endif
632 }
633
634
635 /*
636  *  trigger callback
637  */
638 static int pcxhr_trigger(struct snd_pcm_substream *subs, int cmd)
639 {
640         struct pcxhr_stream *stream;
641         struct snd_pcm_substream *s;
642
643         switch (cmd) {
644         case SNDRV_PCM_TRIGGER_START:
645                 snd_printdd("SNDRV_PCM_TRIGGER_START\n");
646                 if (snd_pcm_stream_linked(subs)) {
647                         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
648                         snd_pcm_group_for_each_entry(s, subs) {
649                                 if (snd_pcm_substream_chip(s) != chip)
650                                         continue;
651                                 stream = s->runtime->private_data;
652                                 stream->status =
653                                         PCXHR_STREAM_STATUS_SCHEDULE_RUN;
654                                 snd_pcm_trigger_done(s, subs);
655                         }
656                         tasklet_schedule(&chip->mgr->trigger_taskq);
657                 } else {
658                         stream = subs->runtime->private_data;
659                         snd_printdd("Only one Substream %c %d\n",
660                                     stream->pipe->is_capture ? 'C' : 'P',
661                                     stream->pipe->first_audio);
662                         if (pcxhr_set_format(stream))
663                                 return -EINVAL;
664                         if (pcxhr_update_r_buffer(stream))
665                                 return -EINVAL;
666
667                         stream->status = PCXHR_STREAM_STATUS_SCHEDULE_RUN;
668                         if (pcxhr_set_stream_state(stream))
669                                 return -EINVAL;
670                         stream->status = PCXHR_STREAM_STATUS_RUNNING;
671                 }
672                 break;
673         case SNDRV_PCM_TRIGGER_STOP:
674                 snd_printdd("SNDRV_PCM_TRIGGER_STOP\n");
675                 snd_pcm_group_for_each_entry(s, subs) {
676                         stream = s->runtime->private_data;
677                         stream->status = PCXHR_STREAM_STATUS_SCHEDULE_STOP;
678                         if (pcxhr_set_stream_state(stream))
679                                 return -EINVAL;
680                         snd_pcm_trigger_done(s, subs);
681                 }
682                 break;
683         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
684         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
685                 /* TODO */
686         default:
687                 return -EINVAL;
688         }
689         return 0;
690 }
691
692
693 static int pcxhr_hardware_timer(struct pcxhr_mgr *mgr, int start)
694 {
695         struct pcxhr_rmh rmh;
696         int err;
697
698         pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT);
699         if (start) {
700                 mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID;    /* last dsp time invalid */
701                 rmh.cmd[0] |= PCXHR_GRANULARITY;
702         }
703         err = pcxhr_send_msg(mgr, &rmh);
704         if (err < 0)
705                 snd_printk(KERN_ERR "error pcxhr_hardware_timer err(%x)\n", err);
706         return err;
707 }
708
709 /*
710  *  prepare callback for all pcms
711  */
712 static int pcxhr_prepare(struct snd_pcm_substream *subs)
713 {
714         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
715         struct pcxhr_mgr *mgr = chip->mgr;
716         /*
717         struct pcxhr_stream *stream = (pcxhr_stream_t*)subs->runtime->private_data;
718         */
719         int err = 0;
720
721         snd_printdd("pcxhr_prepare : period_size(%lx) periods(%x) buffer_size(%lx)\n",
722                     subs->runtime->period_size, subs->runtime->periods,
723                     subs->runtime->buffer_size);
724
725         /*
726         if(subs->runtime->period_size <= PCXHR_GRANULARITY) {
727                 snd_printk(KERN_ERR "pcxhr_prepare : error period_size too small (%x)\n",
728                            (unsigned int)subs->runtime->period_size);
729                 return -EINVAL;
730         }
731         */
732
733         mutex_lock(&mgr->setup_mutex);
734
735         do {
736                 /* if the stream was stopped before, format and buffer were reset */
737                 /*
738                 if(stream->status == PCXHR_STREAM_STATUS_STOPPED) {
739                         err = pcxhr_set_format(stream);
740                         if(err) break;
741                         err = pcxhr_update_r_buffer(stream);
742                         if(err) break;
743                 }
744                 */
745
746                 /* only the first stream can choose the sample rate */
747                 /* the further opened streams will be limited to its frequency (see open) */
748                 /* set the clock only once (first stream) */
749                 if (mgr->sample_rate != subs->runtime->rate) {
750                         err = pcxhr_set_clock(mgr, subs->runtime->rate);
751                         if (err)
752                                 break;
753                         if (mgr->sample_rate == 0)
754                                 /* start the DSP-timer */
755                                 err = pcxhr_hardware_timer(mgr, 1);
756                         mgr->sample_rate = subs->runtime->rate;
757                 }
758         } while(0);     /* do only once (so we can use break instead of goto) */
759
760         mutex_unlock(&mgr->setup_mutex);
761
762         return err;
763 }
764
765
766 /*
767  *  HW_PARAMS callback for all pcms
768  */
769 static int pcxhr_hw_params(struct snd_pcm_substream *subs,
770                            struct snd_pcm_hw_params *hw)
771 {
772         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
773         struct pcxhr_mgr *mgr = chip->mgr;
774         struct pcxhr_stream *stream = subs->runtime->private_data;
775         snd_pcm_format_t format;
776         int err;
777         int channels;
778
779         /* set up channels */
780         channels = params_channels(hw);
781
782         /*  set up format for the stream */
783         format = params_format(hw);
784
785         mutex_lock(&mgr->setup_mutex);
786
787         stream->channels = channels;
788         stream->format = format;
789
790         /* set the format to the board */
791         /*
792         err = pcxhr_set_format(stream);
793         if(err) {
794                 mutex_unlock(&mgr->setup_mutex);
795                 return err;
796         }
797         */
798         /* allocate buffer */
799         err = snd_pcm_lib_malloc_pages(subs, params_buffer_bytes(hw));
800
801         /*
802         if (err > 0) {
803                 err = pcxhr_update_r_buffer(stream);
804         }
805         */
806         mutex_unlock(&mgr->setup_mutex);
807
808         return err;
809 }
810
811 static int pcxhr_hw_free(struct snd_pcm_substream *subs)
812 {
813         snd_pcm_lib_free_pages(subs);
814         return 0;
815 }
816
817
818 /*
819  *  CONFIGURATION SPACE for all pcms, mono pcm must update channels_max
820  */
821 static struct snd_pcm_hardware pcxhr_caps =
822 {
823         .info             = ( SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
824                               SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START |
825                               0 /*SNDRV_PCM_INFO_PAUSE*/),
826         .formats          = ( SNDRV_PCM_FMTBIT_U8 |
827                               SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |
828                               SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |
829                               SNDRV_PCM_FMTBIT_FLOAT_LE ),
830         .rates            = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_192000,
831         .rate_min         = 8000,
832         .rate_max         = 192000,
833         .channels_min     = 1,
834         .channels_max     = 2,
835         .buffer_bytes_max = (32*1024),
836         /* 1 byte == 1 frame U8 mono (PCXHR_GRANULARITY is frames!) */
837         .period_bytes_min = (2*PCXHR_GRANULARITY),
838         .period_bytes_max = (16*1024),
839         .periods_min      = 2,
840         .periods_max      = (32*1024/PCXHR_GRANULARITY),
841 };
842
843
844 static int pcxhr_open(struct snd_pcm_substream *subs)
845 {
846         struct snd_pcxhr       *chip = snd_pcm_substream_chip(subs);
847         struct pcxhr_mgr       *mgr = chip->mgr;
848         struct snd_pcm_runtime *runtime = subs->runtime;
849         struct pcxhr_stream    *stream;
850
851         mutex_lock(&mgr->setup_mutex);
852
853         /* copy the struct snd_pcm_hardware struct */
854         runtime->hw = pcxhr_caps;
855
856         if( subs->stream == SNDRV_PCM_STREAM_PLAYBACK ) {
857                 snd_printdd("pcxhr_open playback chip%d subs%d\n",
858                             chip->chip_idx, subs->number);
859                 stream = &chip->playback_stream[subs->number];
860         } else {
861                 snd_printdd("pcxhr_open capture chip%d subs%d\n",
862                             chip->chip_idx, subs->number);
863                 if (mgr->mono_capture)
864                         runtime->hw.channels_max = 1;
865                 else
866                         runtime->hw.channels_min = 2;
867                 stream = &chip->capture_stream[subs->number];
868         }
869         if (stream->status != PCXHR_STREAM_STATUS_FREE){
870                 /* streams in use */
871                 snd_printk(KERN_ERR "pcxhr_open chip%d subs%d in use\n",
872                            chip->chip_idx, subs->number);
873                 mutex_unlock(&mgr->setup_mutex);
874                 return -EBUSY;
875         }
876
877         /* if a sample rate is already used or fixed by external clock,
878          * the stream cannot change
879          */
880         if (mgr->sample_rate)
881                 runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate;
882         else {
883                 if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) {
884                         int external_rate;
885                         if (pcxhr_get_external_clock(mgr, mgr->use_clock_type,
886                                                      &external_rate) ||
887                             external_rate == 0) {
888                                 /* cannot detect the external clock rate */
889                                 mutex_unlock(&mgr->setup_mutex);
890                                 return -EBUSY;
891                         }
892                         runtime->hw.rate_min = runtime->hw.rate_max = external_rate;
893                 }
894         }
895
896         stream->status      = PCXHR_STREAM_STATUS_OPEN;
897         stream->substream   = subs;
898         stream->channels    = 0; /* not configured yet */
899
900         runtime->private_data = stream;
901
902         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 4);
903         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4);
904
905         snd_pcm_set_sync(subs);
906
907         mgr->ref_count_rate++;
908
909         mutex_unlock(&mgr->setup_mutex);
910         return 0;
911 }
912
913
914 static int pcxhr_close(struct snd_pcm_substream *subs)
915 {
916         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
917         struct pcxhr_mgr *mgr = chip->mgr;
918         struct pcxhr_stream *stream = subs->runtime->private_data;
919
920         mutex_lock(&mgr->setup_mutex);
921
922         snd_printdd("pcxhr_close chip%d subs%d\n", chip->chip_idx, subs->number);
923
924         /* sample rate released */
925         if (--mgr->ref_count_rate == 0) {
926                 mgr->sample_rate = 0;           /* the sample rate is no more locked */
927                 pcxhr_hardware_timer(mgr, 0);   /* stop the DSP-timer */
928         }
929
930         stream->status    = PCXHR_STREAM_STATUS_FREE;
931         stream->substream = NULL;
932
933         mutex_unlock(&mgr->setup_mutex);
934
935         return 0;
936 }
937
938
939 static snd_pcm_uframes_t pcxhr_stream_pointer(struct snd_pcm_substream *subs)
940 {
941         unsigned long flags;
942         u_int32_t timer_period_frag;
943         int timer_buf_periods;
944         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
945         struct snd_pcm_runtime *runtime = subs->runtime;
946         struct pcxhr_stream *stream  = runtime->private_data;
947
948         spin_lock_irqsave(&chip->mgr->lock, flags);
949
950         /* get the period fragment and the nb of periods in the buffer */
951         timer_period_frag = stream->timer_period_frag;
952         timer_buf_periods = stream->timer_buf_periods;
953
954         spin_unlock_irqrestore(&chip->mgr->lock, flags);
955
956         return (snd_pcm_uframes_t)((timer_buf_periods * runtime->period_size) +
957                                    timer_period_frag);
958 }
959
960
961 static struct snd_pcm_ops pcxhr_ops = {
962         .open      = pcxhr_open,
963         .close     = pcxhr_close,
964         .ioctl     = snd_pcm_lib_ioctl,
965         .prepare   = pcxhr_prepare,
966         .hw_params = pcxhr_hw_params,
967         .hw_free   = pcxhr_hw_free,
968         .trigger   = pcxhr_trigger,
969         .pointer   = pcxhr_stream_pointer,
970 };
971
972 /*
973  */
974 int pcxhr_create_pcm(struct snd_pcxhr *chip)
975 {
976         int err;
977         struct snd_pcm *pcm;
978         char name[32];
979
980         sprintf(name, "pcxhr %d", chip->chip_idx);
981         if ((err = snd_pcm_new(chip->card, name, 0,
982                                chip->nb_streams_play,
983                                chip->nb_streams_capt, &pcm)) < 0) {
984                 snd_printk(KERN_ERR "cannot create pcm %s\n", name);
985                 return err;
986         }
987         pcm->private_data = chip;
988
989         if (chip->nb_streams_play)
990                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &pcxhr_ops);
991         if (chip->nb_streams_capt)
992                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pcxhr_ops);
993
994         pcm->info_flags = 0;
995         strcpy(pcm->name, name);
996
997         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
998                                               snd_dma_pci_data(chip->mgr->pci),
999                                               32*1024, 32*1024);
1000         chip->pcm = pcm;
1001         return 0;
1002 }
1003
1004 static int pcxhr_chip_free(struct snd_pcxhr *chip)
1005 {
1006         kfree(chip);
1007         return 0;
1008 }
1009
1010 static int pcxhr_chip_dev_free(struct snd_device *device)
1011 {
1012         struct snd_pcxhr *chip = device->device_data;
1013         return pcxhr_chip_free(chip);
1014 }
1015
1016
1017 /*
1018  */
1019 static int __devinit pcxhr_create(struct pcxhr_mgr *mgr, struct snd_card *card, int idx)
1020 {
1021         int err;
1022         struct snd_pcxhr *chip;
1023         static struct snd_device_ops ops = {
1024                 .dev_free = pcxhr_chip_dev_free,
1025         };
1026
1027         mgr->chip[idx] = chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1028         if (! chip) {
1029                 snd_printk(KERN_ERR "cannot allocate chip\n");
1030                 return -ENOMEM;
1031         }
1032
1033         chip->card = card;
1034         chip->chip_idx = idx;
1035         chip->mgr = mgr;
1036
1037         if (idx < mgr->playback_chips)
1038                 /* stereo or mono streams */
1039                 chip->nb_streams_play = PCXHR_PLAYBACK_STREAMS;
1040
1041         if (idx < mgr->capture_chips) {
1042                 if (mgr->mono_capture)
1043                         chip->nb_streams_capt = 2;      /* 2 mono streams (left+right) */
1044                 else
1045                         chip->nb_streams_capt = 1;      /* or 1 stereo stream */
1046         }
1047
1048         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1049                 pcxhr_chip_free(chip);
1050                 return err;
1051         }
1052
1053         snd_card_set_dev(card, &mgr->pci->dev);
1054
1055         return 0;
1056 }
1057
1058 /* proc interface */
1059 static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1060 {
1061         struct snd_pcxhr *chip = entry->private_data;
1062         struct pcxhr_mgr *mgr = chip->mgr;
1063
1064         snd_iprintf(buffer, "\n%s\n", mgr->longname);
1065
1066         /* stats available when embedded DSP is running */
1067         if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1068                 struct pcxhr_rmh rmh;
1069                 short ver_maj = (mgr->dsp_version >> 16) & 0xff;
1070                 short ver_min = (mgr->dsp_version >> 8) & 0xff;
1071                 short ver_build = mgr->dsp_version & 0xff;
1072                 snd_iprintf(buffer, "module version %s\n", PCXHR_DRIVER_VERSION_STRING);
1073                 snd_iprintf(buffer, "dsp version %d.%d.%d\n", ver_maj, ver_min, ver_build);
1074                 if (mgr->board_has_analog)
1075                         snd_iprintf(buffer, "analog io available\n");
1076                 else
1077                         snd_iprintf(buffer, "digital only board\n");
1078
1079                 /* calc cpu load of the dsp */
1080                 pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES);
1081                 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1082                         int cur = rmh.stat[0];
1083                         int ref = rmh.stat[1];
1084                         if (ref > 0) {
1085                                 if (mgr->sample_rate_real != 0 &&
1086                                     mgr->sample_rate_real != 48000) {
1087                                         ref = (ref * 48000) / mgr->sample_rate_real;
1088                                         if (mgr->sample_rate_real >= PCXHR_IRQ_TIMER_FREQ)
1089                                                 ref *= 2;
1090                                 }
1091                                 cur = 100 - (100 * cur) / ref;
1092                                 snd_iprintf(buffer, "cpu load    %d%%\n", cur);
1093                                 snd_iprintf(buffer, "buffer pool %d/%d kWords\n",
1094                                             rmh.stat[2], rmh.stat[3]);
1095                         }
1096                 }
1097                 snd_iprintf(buffer, "dma granularity : %d\n", PCXHR_GRANULARITY);
1098                 snd_iprintf(buffer, "dsp time errors : %d\n", mgr->dsp_time_err);
1099                 snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n",
1100                             mgr->async_err_pipe_xrun);
1101                 snd_iprintf(buffer, "dsp async stream xrun errors : %d\n",
1102                             mgr->async_err_stream_xrun);
1103                 snd_iprintf(buffer, "dsp async last other error : %x\n",
1104                             mgr->async_err_other_last);
1105                 /* debug zone dsp */
1106                 rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS;
1107                 rmh.cmd_len = 1;
1108                 rmh.stat_len = PCXHR_SIZE_MAX_STATUS;
1109                 rmh.dsp_stat = 0;
1110                 rmh.cmd_idx = CMD_LAST_INDEX;
1111                 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1112                         int i;
1113                         for (i = 0; i < rmh.stat_len; i++)
1114                                 snd_iprintf(buffer, "debug[%02d] = %06x\n", i,  rmh.stat[i]);
1115                 }
1116         } else
1117                 snd_iprintf(buffer, "no firmware loaded\n");
1118         snd_iprintf(buffer, "\n");
1119 }
1120 static void pcxhr_proc_sync(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1121 {
1122         struct snd_pcxhr *chip = entry->private_data;
1123         struct pcxhr_mgr *mgr = chip->mgr;
1124         static char *texts[7] = {
1125                 "Internal", "Word", "AES Sync", "AES 1", "AES 2", "AES 3", "AES 4"
1126         };
1127
1128         snd_iprintf(buffer, "\n%s\n", mgr->longname);
1129         snd_iprintf(buffer, "Current Sample Clock\t: %s\n", texts[mgr->cur_clock_type]);
1130         snd_iprintf(buffer, "Current Sample Rate\t= %d\n", mgr->sample_rate_real);
1131
1132         /* commands available when embedded DSP is running */
1133         if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1134                 int i, err, sample_rate;
1135                 for (i = PCXHR_CLOCK_TYPE_WORD_CLOCK; i< (3 + mgr->capture_chips); i++) {
1136                         err = pcxhr_get_external_clock(mgr, i, &sample_rate);
1137                         if (err)
1138                                 break;
1139                         snd_iprintf(buffer, "%s Clock\t\t= %d\n", texts[i], sample_rate);
1140                 }
1141         } else
1142                 snd_iprintf(buffer, "no firmware loaded\n");
1143         snd_iprintf(buffer, "\n");
1144 }
1145
1146 static void __devinit pcxhr_proc_init(struct snd_pcxhr *chip)
1147 {
1148         struct snd_info_entry *entry;
1149
1150         if (! snd_card_proc_new(chip->card, "info", &entry))
1151                 snd_info_set_text_ops(entry, chip, pcxhr_proc_info);
1152         if (! snd_card_proc_new(chip->card, "sync", &entry))
1153                 snd_info_set_text_ops(entry, chip, pcxhr_proc_sync);
1154 }
1155 /* end of proc interface */
1156
1157 /*
1158  * release all the cards assigned to a manager instance
1159  */
1160 static int pcxhr_free(struct pcxhr_mgr *mgr)
1161 {
1162         unsigned int i;
1163
1164         for (i = 0; i < mgr->num_cards; i++) {
1165                 if (mgr->chip[i])
1166                         snd_card_free(mgr->chip[i]->card);
1167         }
1168
1169         /* reset board if some firmware was loaded */
1170         if(mgr->dsp_loaded) {
1171                 pcxhr_reset_board(mgr);
1172                 snd_printdd("reset pcxhr !\n");
1173         }
1174
1175         /* release irq  */
1176         if (mgr->irq >= 0)
1177                 free_irq(mgr->irq, mgr);
1178
1179         pci_release_regions(mgr->pci);
1180
1181         /* free hostport purgebuffer */
1182         if (mgr->hostport.area) {
1183                 snd_dma_free_pages(&mgr->hostport);
1184                 mgr->hostport.area = NULL;
1185         }
1186
1187         kfree(mgr->prmh);
1188
1189         pci_disable_device(mgr->pci);
1190         kfree(mgr);
1191         return 0;
1192 }
1193
1194 /*
1195  *    probe function - creates the card manager
1196  */
1197 static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1198 {
1199         static int dev;
1200         struct pcxhr_mgr *mgr;
1201         unsigned int i;
1202         int err;
1203         size_t size;
1204         char *card_name;
1205
1206         if (dev >= SNDRV_CARDS)
1207                 return -ENODEV;
1208         if (! enable[dev]) {
1209                 dev++;
1210                 return -ENOENT;
1211         }
1212
1213         /* enable PCI device */
1214         if ((err = pci_enable_device(pci)) < 0)
1215                 return err;
1216         pci_set_master(pci);
1217
1218         /* check if we can restrict PCI DMA transfers to 32 bits */
1219         if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0) {
1220                 snd_printk(KERN_ERR "architecture does not support 32bit PCI busmaster DMA\n");
1221                 pci_disable_device(pci);
1222                 return -ENXIO;
1223         }
1224
1225         /* alloc card manager */
1226         mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
1227         if (! mgr) {
1228                 pci_disable_device(pci);
1229                 return -ENOMEM;
1230         }
1231
1232         if (snd_BUG_ON(pci_id->driver_data >= PCI_ID_LAST)) {
1233                 kfree(mgr);
1234                 pci_disable_device(pci);
1235                 return -ENODEV;
1236         }
1237         card_name = pcxhr_board_params[pci_id->driver_data].board_name;
1238         mgr->playback_chips = pcxhr_board_params[pci_id->driver_data].playback_chips;
1239         mgr->capture_chips  = pcxhr_board_params[pci_id->driver_data].capture_chips;
1240         mgr->firmware_num  = pcxhr_board_params[pci_id->driver_data].firmware_num;
1241         mgr->mono_capture = mono[dev];
1242
1243         /* resource assignment */
1244         if ((err = pci_request_regions(pci, card_name)) < 0) {
1245                 kfree(mgr);
1246                 pci_disable_device(pci);
1247                 return err;
1248         }
1249         for (i = 0; i < 3; i++)
1250                 mgr->port[i] = pci_resource_start(pci, i);
1251
1252         mgr->pci = pci;
1253         mgr->irq = -1;
1254
1255         if (request_irq(pci->irq, pcxhr_interrupt, IRQF_SHARED,
1256                         card_name, mgr)) {
1257                 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1258                 pcxhr_free(mgr);
1259                 return -EBUSY;
1260         }
1261         mgr->irq = pci->irq;
1262
1263         sprintf(mgr->shortname, "Digigram %s", card_name);
1264         sprintf(mgr->longname, "%s at 0x%lx & 0x%lx, 0x%lx irq %i", mgr->shortname,
1265                 mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq);
1266
1267         /* ISR spinlock  */
1268         spin_lock_init(&mgr->lock);
1269         spin_lock_init(&mgr->msg_lock);
1270
1271         /* init setup mutex*/
1272         mutex_init(&mgr->setup_mutex);
1273
1274         /* init taslket */
1275         tasklet_init(&mgr->msg_taskq, pcxhr_msg_tasklet, (unsigned long) mgr);
1276         tasklet_init(&mgr->trigger_taskq, pcxhr_trigger_tasklet, (unsigned long) mgr);
1277         mgr->prmh = kmalloc(sizeof(*mgr->prmh) + 
1278                             sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS - PCXHR_SIZE_MAX_STATUS),
1279                             GFP_KERNEL);
1280         if (! mgr->prmh) {
1281                 pcxhr_free(mgr);
1282                 return -ENOMEM;
1283         }
1284
1285         for (i=0; i < PCXHR_MAX_CARDS; i++) {
1286                 struct snd_card *card;
1287                 char tmpid[16];
1288                 int idx;
1289
1290                 if (i >= max(mgr->playback_chips, mgr->capture_chips))
1291                         break;
1292                 mgr->num_cards++;
1293
1294                 if (index[dev] < 0)
1295                         idx = index[dev];
1296                 else
1297                         idx = index[dev] + i;
1298
1299                 snprintf(tmpid, sizeof(tmpid), "%s-%d", id[dev] ? id[dev] : card_name, i);
1300                 card = snd_card_new(idx, tmpid, THIS_MODULE, 0);
1301
1302                 if (! card) {
1303                         snd_printk(KERN_ERR "cannot allocate the card %d\n", i);
1304                         pcxhr_free(mgr);
1305                         return -ENOMEM;
1306                 }
1307
1308                 strcpy(card->driver, DRIVER_NAME);
1309                 sprintf(card->shortname, "%s [PCM #%d]", mgr->shortname, i);
1310                 sprintf(card->longname, "%s [PCM #%d]", mgr->longname, i);
1311
1312                 if ((err = pcxhr_create(mgr, card, i)) < 0) {
1313                         pcxhr_free(mgr);
1314                         return err;
1315                 }
1316
1317                 if (i == 0)
1318                         /* init proc interface only for chip0 */
1319                         pcxhr_proc_init(mgr->chip[i]);
1320
1321                 if ((err = snd_card_register(card)) < 0) {
1322                         pcxhr_free(mgr);
1323                         return err;
1324                 }
1325         }
1326
1327         /* create hostport purgebuffer */
1328         size = PAGE_ALIGN(sizeof(struct pcxhr_hostport));
1329         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1330                                 size, &mgr->hostport) < 0) {
1331                 pcxhr_free(mgr);
1332                 return -ENOMEM;
1333         }
1334         /* init purgebuffer */
1335         memset(mgr->hostport.area, 0, size);
1336
1337         /* create a DSP loader */
1338         err = pcxhr_setup_firmware(mgr);
1339         if (err < 0) {
1340                 pcxhr_free(mgr);
1341                 return err;
1342         }
1343
1344         pci_set_drvdata(pci, mgr);
1345         dev++;
1346         return 0;
1347 }
1348
1349 static void __devexit pcxhr_remove(struct pci_dev *pci)
1350 {
1351         pcxhr_free(pci_get_drvdata(pci));
1352         pci_set_drvdata(pci, NULL);
1353 }
1354
1355 static struct pci_driver driver = {
1356         .name = "Digigram pcxhr",
1357         .id_table = pcxhr_ids,
1358         .probe = pcxhr_probe,
1359         .remove = __devexit_p(pcxhr_remove),
1360 };
1361
1362 static int __init pcxhr_module_init(void)
1363 {
1364         return pci_register_driver(&driver);
1365 }
1366
1367 static void __exit pcxhr_module_exit(void)
1368 {
1369         pci_unregister_driver(&driver);
1370 }
1371
1372 module_init(pcxhr_module_init)
1373 module_exit(pcxhr_module_exit)