ALSA: hda: check validity of speaker allocation field
[linux-2.6.git] / sound / pci / hda / patch_hdmi.c
1 /*
2  *
3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  *  Copyright (c) 2006 ATI Technologies Inc.
7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9  *
10  *  Authors:
11  *                      Wu Fengguang <wfg@linux.intel.com>
12  *
13  *  Maintained by:
14  *                      Wu Fengguang <wfg@linux.intel.com>
15  *
16  *  This program is free software; you can redistribute it and/or modify it
17  *  under the terms of the GNU General Public License as published by the Free
18  *  Software Foundation; either version 2 of the License, or (at your option)
19  *  any later version.
20  *
21  *  This program is distributed in the hope that it will be useful, but
22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
24  *  for more details.
25  *
26  *  You should have received a copy of the GNU General Public License
27  *  along with this program; if not, write to the Free Software Foundation,
28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
29  */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37
38 #ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA
39 #include <mach/hdmi-audio.h>
40 #endif
41
42 #include "hda_codec.h"
43 #include "hda_local.h"
44 #include "hda_jack.h"
45
46 static bool static_hdmi_pcm;
47 module_param(static_hdmi_pcm, bool, 0644);
48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
49
50 /*
51  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
52  * could support N independent pipes, each of them can be connected to one or
53  * more ports (DVI, HDMI or DisplayPort).
54  *
55  * The HDA correspondence of pipes/ports are converter/pin nodes.
56  */
57 #define MAX_HDMI_CVTS   8
58 #define MAX_HDMI_PINS   8
59
60 struct hdmi_spec_per_cvt {
61         hda_nid_t cvt_nid;
62         int assigned;
63         unsigned int channels_min;
64         unsigned int channels_max;
65         u32 rates;
66         u64 formats;
67         unsigned int maxbps;
68 };
69
70 struct hdmi_spec_per_pin {
71         hda_nid_t pin_nid;
72         int num_mux_nids;
73         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
74
75         struct hda_codec *codec;
76         struct hdmi_eld sink_eld;
77         struct delayed_work work;
78         int repoll_count;
79 };
80
81 struct hdmi_spec {
82         int num_cvts;
83         struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
84
85         int num_pins;
86         struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
87         struct hda_pcm pcm_rec[MAX_HDMI_PINS];
88
89         /*
90          * Non-generic ATI/NVIDIA specific
91          */
92         struct hda_multi_out multiout;
93         const struct hda_pcm_stream *pcm_playback;
94 };
95
96
97 struct hdmi_audio_infoframe {
98         u8 type; /* 0x84 */
99         u8 ver;  /* 0x01 */
100         u8 len;  /* 0x0a */
101
102         u8 checksum;
103
104         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
105         u8 SS01_SF24;
106         u8 CXT04;
107         u8 CA;
108         u8 LFEPBL01_LSV36_DM_INH7;
109 };
110
111 struct dp_audio_infoframe {
112         u8 type; /* 0x84 */
113         u8 len;  /* 0x1b */
114         u8 ver;  /* 0x11 << 2 */
115
116         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
117         u8 SS01_SF24;
118         u8 CXT04;
119         u8 CA;
120         u8 LFEPBL01_LSV36_DM_INH7;
121 };
122
123 union audio_infoframe {
124         struct hdmi_audio_infoframe hdmi;
125         struct dp_audio_infoframe dp;
126         u8 bytes[0];
127 };
128
129 /*
130  * CEA speaker placement:
131  *
132  *        FLH       FCH        FRH
133  *  FLW    FL  FLC   FC   FRC   FR   FRW
134  *
135  *                                  LFE
136  *                     TC
137  *
138  *          RL  RLC   RC   RRC   RR
139  *
140  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
141  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
142  */
143 enum cea_speaker_placement {
144         FL  = (1 <<  0),        /* Front Left           */
145         FC  = (1 <<  1),        /* Front Center         */
146         FR  = (1 <<  2),        /* Front Right          */
147         FLC = (1 <<  3),        /* Front Left Center    */
148         FRC = (1 <<  4),        /* Front Right Center   */
149         RL  = (1 <<  5),        /* Rear Left            */
150         RC  = (1 <<  6),        /* Rear Center          */
151         RR  = (1 <<  7),        /* Rear Right           */
152         RLC = (1 <<  8),        /* Rear Left Center     */
153         RRC = (1 <<  9),        /* Rear Right Center    */
154         LFE = (1 << 10),        /* Low Frequency Effect */
155         FLW = (1 << 11),        /* Front Left Wide      */
156         FRW = (1 << 12),        /* Front Right Wide     */
157         FLH = (1 << 13),        /* Front Left High      */
158         FCH = (1 << 14),        /* Front Center High    */
159         FRH = (1 << 15),        /* Front Right High     */
160         TC  = (1 << 16),        /* Top Center           */
161 };
162
163 /*
164  * ELD SA bits in the CEA Speaker Allocation data block
165  */
166 static int eld_speaker_allocation_bits[] = {
167         [0] = FL | FR,
168         [1] = LFE,
169         [2] = FC,
170         [3] = RL | RR,
171         [4] = RC,
172         [5] = FLC | FRC,
173         [6] = RLC | RRC,
174         /* the following are not defined in ELD yet */
175         [7] = FLW | FRW,
176         [8] = FLH | FRH,
177         [9] = TC,
178         [10] = FCH,
179 };
180
181 struct cea_channel_speaker_allocation {
182         int ca_index;
183         int speakers[8];
184
185         /* derived values, just for convenience */
186         int channels;
187         int spk_mask;
188 };
189
190 /*
191  * ALSA sequence is:
192  *
193  *       surround40   surround41   surround50   surround51   surround71
194  * ch0   front left   =            =            =            =
195  * ch1   front right  =            =            =            =
196  * ch2   rear left    =            =            =            =
197  * ch3   rear right   =            =            =            =
198  * ch4                LFE          center       center       center
199  * ch5                                          LFE          LFE
200  * ch6                                                       side left
201  * ch7                                                       side right
202  *
203  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
204  */
205 static int hdmi_channel_mapping[0x32][8] = {
206         /* stereo */
207         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
208         /* 2.1 */
209         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
210         /* Dolby Surround */
211         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
212         /* surround40 */
213         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
214         /* 4ch */
215         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
216         /* surround41 */
217         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
218         /* surround50 */
219         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
220         /* surround51 */
221         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
222         /* 7.1 */
223         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
224 };
225
226 /*
227  * This is an ordered list!
228  *
229  * The preceding ones have better chances to be selected by
230  * hdmi_channel_allocation().
231  */
232 static struct cea_channel_speaker_allocation channel_allocations[] = {
233 /*                        channel:   7     6    5    4    3     2    1    0  */
234 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
235                                  /* 2.1 */
236 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
237                                  /* Dolby Surround */
238 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
239                                  /* surround40 */
240 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
241                                  /* surround41 */
242 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
243                                  /* surround50 */
244 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
245                                  /* surround51 */
246 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
247                                  /* 6.1 */
248 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
249                                  /* surround71 */
250 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
251
252 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
253 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
254 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
255 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
256 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
257 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
258 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
259 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
260 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
261 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
262 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
263 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
264 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
265 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
266 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
267 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
268 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
269 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
270 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
271 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
272 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
273 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
274 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
275 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
276 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
277 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
278 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
279 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
280 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
281 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
282 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
283 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
284 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
285 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
286 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
287 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
288 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
289 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
290 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
291 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
292 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
293 };
294
295
296 /*
297  * HDMI routines
298  */
299
300 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
301 {
302         int pin_idx;
303
304         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
305                 if (spec->pins[pin_idx].pin_nid == pin_nid)
306                         return pin_idx;
307
308         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
309         return -EINVAL;
310 }
311
312 static int hinfo_to_pin_index(struct hdmi_spec *spec,
313                               struct hda_pcm_stream *hinfo)
314 {
315         int pin_idx;
316
317         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
318                 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
319                         return pin_idx;
320
321         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
322         return -EINVAL;
323 }
324
325 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
326 {
327         int cvt_idx;
328
329         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
330                 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
331                         return cvt_idx;
332
333         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
334         return -EINVAL;
335 }
336
337 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
338                         struct snd_ctl_elem_info *uinfo)
339 {
340         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
341         struct hdmi_spec *spec;
342         int pin_idx;
343
344         spec = codec->spec;
345         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
346
347         pin_idx = kcontrol->private_value;
348         uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
349
350         return 0;
351 }
352
353 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
354                         struct snd_ctl_elem_value *ucontrol)
355 {
356         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
357         struct hdmi_spec *spec;
358         int pin_idx;
359
360         spec = codec->spec;
361         pin_idx = kcontrol->private_value;
362
363         memcpy(ucontrol->value.bytes.data,
364                 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
365
366         return 0;
367 }
368
369 static struct snd_kcontrol_new eld_bytes_ctl = {
370         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
371         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
372         .name = "ELD",
373         .info = hdmi_eld_ctl_info,
374         .get = hdmi_eld_ctl_get,
375 };
376
377 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
378                         int device)
379 {
380         struct snd_kcontrol *kctl;
381         struct hdmi_spec *spec = codec->spec;
382         int err;
383
384         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
385         if (!kctl)
386                 return -ENOMEM;
387         kctl->private_value = pin_idx;
388         kctl->id.device = device;
389
390         err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
391         if (err < 0)
392                 return err;
393
394         return 0;
395 }
396
397 #ifdef BE_PARANOID
398 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
399                                 int *packet_index, int *byte_index)
400 {
401         int val;
402
403         val = snd_hda_codec_read(codec, pin_nid, 0,
404                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
405
406         *packet_index = val >> 5;
407         *byte_index = val & 0x1f;
408 }
409 #endif
410
411 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
412                                 int packet_index, int byte_index)
413 {
414         int val;
415
416         val = (packet_index << 5) | (byte_index & 0x1f);
417
418         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
419 }
420
421 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
422                                 unsigned char val)
423 {
424         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
425 }
426
427 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
428 {
429         /* Unmute */
430         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
431                 snd_hda_codec_write(codec, pin_nid, 0,
432                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
433         /* Disable pin out until stream is active*/
434         snd_hda_codec_write(codec, pin_nid, 0,
435                             AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
436 }
437
438 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
439 {
440         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
441                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
442 }
443
444 static void hdmi_set_channel_count(struct hda_codec *codec,
445                                    hda_nid_t cvt_nid, int chs)
446 {
447         if (chs != hdmi_get_channel_count(codec, cvt_nid))
448                 snd_hda_codec_write(codec, cvt_nid, 0,
449                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
450 }
451
452
453 /*
454  * Channel mapping routines
455  */
456
457 /*
458  * Compute derived values in channel_allocations[].
459  */
460 static void init_channel_allocations(void)
461 {
462         int i, j;
463         struct cea_channel_speaker_allocation *p;
464
465         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
466                 p = channel_allocations + i;
467                 p->channels = 0;
468                 p->spk_mask = 0;
469                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
470                         if (p->speakers[j]) {
471                                 p->channels++;
472                                 p->spk_mask |= p->speakers[j];
473                         }
474         }
475 }
476
477 /*
478  * The transformation takes two steps:
479  *
480  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
481  *            spk_mask => (channel_allocations[])         => ai->CA
482  *
483  * TODO: it could select the wrong CA from multiple candidates.
484 */
485 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
486 {
487         int i;
488         int ca = 0;
489         int spk_mask = 0;
490         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
491
492         /*
493          * CA defaults to 0 for basic stereo audio
494          */
495         if (channels <= 2)
496                 return 0;
497
498         /*
499          * expand ELD's speaker allocation mask
500          *
501          * ELD tells the speaker mask in a compact(paired) form,
502          * expand ELD's notions to match the ones used by Audio InfoFrame.
503          */
504         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
505                 if (eld->spk_alloc & (1 << i))
506                         spk_mask |= eld_speaker_allocation_bits[i];
507         }
508
509         /* search for the first working match in the CA table */
510         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
511                 if (channels == channel_allocations[i].channels &&
512                     (spk_mask & channel_allocations[i].spk_mask) ==
513                                 channel_allocations[i].spk_mask) {
514                         ca = channel_allocations[i].ca_index;
515                         break;
516                 }
517         }
518
519         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
520         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
521                     ca, channels, buf);
522
523         return ca;
524 }
525
526 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
527                                        hda_nid_t pin_nid)
528 {
529 #ifdef CONFIG_SND_DEBUG_VERBOSE
530         int i;
531         int slot;
532
533         for (i = 0; i < 8; i++) {
534                 slot = snd_hda_codec_read(codec, pin_nid, 0,
535                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
536                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
537                                                 slot >> 4, slot & 0xf);
538         }
539 #endif
540 }
541
542
543 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
544                                        hda_nid_t pin_nid,
545                                        int ca)
546 {
547         int i;
548         int err;
549
550         if (hdmi_channel_mapping[ca][1] == 0) {
551                 for (i = 0; i < channel_allocations[ca].channels; i++)
552                         hdmi_channel_mapping[ca][i] = i | (i << 4);
553                 for (; i < 8; i++)
554                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
555         }
556
557         for (i = 0; i < 8; i++) {
558                 err = snd_hda_codec_write(codec, pin_nid, 0,
559                                           AC_VERB_SET_HDMI_CHAN_SLOT,
560                                           hdmi_channel_mapping[ca][i]);
561                 if (err) {
562                         snd_printdd(KERN_NOTICE
563                                     "HDMI: channel mapping failed\n");
564                         break;
565                 }
566         }
567
568         hdmi_debug_channel_mapping(codec, pin_nid);
569 }
570
571
572 /*
573  * Audio InfoFrame routines
574  */
575
576 /*
577  * Enable Audio InfoFrame Transmission
578  */
579 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
580                                        hda_nid_t pin_nid)
581 {
582         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
583         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
584                                                 AC_DIPXMIT_BEST);
585 }
586
587 /*
588  * Disable Audio InfoFrame Transmission
589  */
590 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
591                                       hda_nid_t pin_nid)
592 {
593         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
594         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
595                                                 AC_DIPXMIT_DISABLE);
596 }
597
598 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
599 {
600 #ifdef CONFIG_SND_DEBUG_VERBOSE
601         int i;
602         int size;
603
604         size = snd_hdmi_get_eld_size(codec, pin_nid);
605         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
606
607         for (i = 0; i < 8; i++) {
608                 size = snd_hda_codec_read(codec, pin_nid, 0,
609                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
610                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
611         }
612 #endif
613 }
614
615 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
616 {
617 #ifdef BE_PARANOID
618         int i, j;
619         int size;
620         int pi, bi;
621         for (i = 0; i < 8; i++) {
622                 size = snd_hda_codec_read(codec, pin_nid, 0,
623                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
624                 if (size == 0)
625                         continue;
626
627                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
628                 for (j = 1; j < 1000; j++) {
629                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
630                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
631                         if (pi != i)
632                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
633                                                 bi, pi, i);
634                         if (bi == 0) /* byte index wrapped around */
635                                 break;
636                 }
637                 snd_printd(KERN_INFO
638                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
639                         i, size, j);
640         }
641 #endif
642 }
643
644 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
645 {
646         u8 *bytes = (u8 *)hdmi_ai;
647         u8 sum = 0;
648         int i;
649
650         hdmi_ai->checksum = 0;
651
652         for (i = 0; i < sizeof(*hdmi_ai); i++)
653                 sum += bytes[i];
654
655         hdmi_ai->checksum = -sum;
656 }
657
658 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
659                                       hda_nid_t pin_nid,
660                                       u8 *dip, int size)
661 {
662         int i;
663
664         hdmi_debug_dip_size(codec, pin_nid);
665         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
666
667         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
668         for (i = 0; i < size; i++)
669                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
670 }
671
672 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
673                                     u8 *dip, int size)
674 {
675         u8 val;
676         int i;
677
678         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
679                                                             != AC_DIPXMIT_BEST)
680                 return false;
681
682         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
683         for (i = 0; i < size; i++) {
684                 val = snd_hda_codec_read(codec, pin_nid, 0,
685                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
686                 if (val != dip[i])
687                         return false;
688         }
689
690         return true;
691 }
692
693 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
694                                         struct snd_pcm_substream *substream)
695 {
696         struct hdmi_spec *spec = codec->spec;
697         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
698         hda_nid_t pin_nid = per_pin->pin_nid;
699         int channels = substream->runtime->channels;
700         struct hdmi_eld *eld;
701         int ca;
702         union audio_infoframe ai;
703
704         eld = &spec->pins[pin_idx].sink_eld;
705         if (!eld->monitor_present)
706                 return;
707
708         ca = hdmi_channel_allocation(eld, channels);
709
710         memset(&ai, 0, sizeof(ai));
711         if (eld->conn_type == 0) { /* HDMI */
712                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
713
714                 hdmi_ai->type           = 0x84;
715                 hdmi_ai->ver            = 0x01;
716                 hdmi_ai->len            = 0x0a;
717                 hdmi_ai->CC02_CT47      = channels - 1;
718                 hdmi_ai->CA             = ca;
719                 hdmi_checksum_audio_infoframe(hdmi_ai);
720         } else if (eld->conn_type == 1) { /* DisplayPort */
721                 struct dp_audio_infoframe *dp_ai = &ai.dp;
722
723                 dp_ai->type             = 0x84;
724                 dp_ai->len              = 0x1b;
725                 dp_ai->ver              = 0x11 << 2;
726                 dp_ai->CC02_CT47        = channels - 1;
727                 dp_ai->CA               = ca;
728         } else {
729                 snd_printd("HDMI: unknown connection type at pin %d\n",
730                             pin_nid);
731                 return;
732         }
733
734         /*
735          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
736          * sizeof(*dp_ai) to avoid partial match/update problems when
737          * the user switches between HDMI/DP monitors.
738          */
739         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
740                                         sizeof(ai))) {
741                 snd_printdd("hdmi_setup_audio_infoframe: "
742                             "pin=%d channels=%d\n",
743                             pin_nid,
744                             channels);
745                 hdmi_setup_channel_mapping(codec, pin_nid, ca);
746                 hdmi_stop_infoframe_trans(codec, pin_nid);
747                 hdmi_fill_audio_infoframe(codec, pin_nid,
748                                             ai.bytes, sizeof(ai));
749                 hdmi_start_infoframe_trans(codec, pin_nid);
750         }
751 }
752
753
754 /*
755  * Unsolicited events
756  */
757
758 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
759
760 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
761 {
762         struct hdmi_spec *spec = codec->spec;
763         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
764         int pin_nid;
765         int pin_idx;
766         struct hda_jack_tbl *jack;
767 #ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA
768         struct hdmi_eld *eld = &spec->pins[pin_idx].sink_eld;
769 #endif
770
771         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
772         if (!jack)
773                 return;
774         pin_nid = jack->nid;
775         jack->jack_dirty = 1;
776
777         _snd_printd(SND_PR_VERBOSE,
778                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
779                 codec->addr, pin_nid,
780                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
781
782         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
783         if (pin_idx < 0)
784                 return;
785
786         hdmi_present_sense(&spec->pins[pin_idx], 1);
787
788 #ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA
789         if (codec->preset->id == 0x10de0020) {
790                 /*
791                  * HDMI sink's ELD info cannot always be retrieved for now, e.g.
792                  * in console or for audio devices. Assume the highest speakers
793                  * configuration, to _not_ prohibit multi-channel audio playback
794                  */
795                 if (!eld->spk_alloc)
796                         eld->spk_alloc = 0xffff;
797         }
798 #endif
799
800         snd_hda_jack_report_sync(codec);
801 }
802
803 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
804 {
805         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
806         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
807         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
808         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
809
810         printk(KERN_INFO
811                 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
812                 codec->addr,
813                 tag,
814                 subtag,
815                 cp_state,
816                 cp_ready);
817
818         /* TODO */
819         if (cp_state)
820                 ;
821         if (cp_ready)
822                 ;
823 }
824
825
826 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
827 {
828         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
829         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
830
831         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
832                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
833                 return;
834         }
835
836         if (subtag == 0)
837                 hdmi_intrinsic_event(codec, res);
838         else
839                 hdmi_non_intrinsic_event(codec, res);
840 }
841
842 /*
843  * Callbacks
844  */
845
846 /* HBR should be Non-PCM, 8 channels */
847 #define is_hbr_format(format) \
848         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
849
850 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
851                               hda_nid_t pin_nid, u32 stream_tag, int format)
852 {
853         int pinctl;
854         int new_pinctl = 0;
855
856         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
857                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
858                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
859
860                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
861                 if (is_hbr_format(format))
862                         new_pinctl |= AC_PINCTL_EPT_HBR;
863                 else
864                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
865
866                 snd_printdd("hdmi_setup_stream: "
867                             "NID=0x%x, %spinctl=0x%x\n",
868                             pin_nid,
869                             pinctl == new_pinctl ? "" : "new-",
870                             new_pinctl);
871
872                 if (pinctl != new_pinctl)
873                         snd_hda_codec_write(codec, pin_nid, 0,
874                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
875                                             new_pinctl);
876
877         }
878         if (is_hbr_format(format) && !new_pinctl) {
879                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
880                 return -EINVAL;
881         }
882
883         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
884         return 0;
885 }
886
887 /*
888  * HDA PCM callbacks
889  */
890 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
891                          struct hda_codec *codec,
892                          struct snd_pcm_substream *substream)
893 {
894         struct hdmi_spec *spec = codec->spec;
895         struct snd_pcm_runtime *runtime = substream->runtime;
896         int pin_idx, cvt_idx, mux_idx = 0;
897         struct hdmi_spec_per_pin *per_pin;
898         struct hdmi_eld *eld;
899         struct hdmi_spec_per_cvt *per_cvt = NULL;
900
901         /* Validate hinfo */
902         pin_idx = hinfo_to_pin_index(spec, hinfo);
903         if (snd_BUG_ON(pin_idx < 0))
904                 return -EINVAL;
905         per_pin = &spec->pins[pin_idx];
906         eld = &per_pin->sink_eld;
907
908 #ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA
909         if ((codec->preset->id == 0x10de0020) &&
910             (!eld->monitor_present || !eld->lpcm_sad_ready)) {
911                 if (!eld->monitor_present) {
912                         if (tegra_hdmi_setup_hda_presence() < 0) {
913                                 snd_printk(KERN_WARNING
914                                            "HDMI: No HDMI device connected\n");
915                                 return -ENODEV;
916                         }
917                 }
918                 if (!eld->lpcm_sad_ready)
919                         return -ENODEV;
920         }
921 #endif
922
923         /* Dynamically assign converter to stream */
924         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
925                 per_cvt = &spec->cvts[cvt_idx];
926
927                 /* Must not already be assigned */
928                 if (per_cvt->assigned)
929                         continue;
930                 /* Must be in pin's mux's list of converters */
931                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
932                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
933                                 break;
934                 /* Not in mux list */
935                 if (mux_idx == per_pin->num_mux_nids)
936                         continue;
937                 break;
938         }
939         /* No free converters */
940         if (cvt_idx == spec->num_cvts)
941                 return -ENODEV;
942
943         /* Claim converter */
944         per_cvt->assigned = 1;
945         hinfo->nid = per_cvt->cvt_nid;
946
947         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
948                             AC_VERB_SET_CONNECT_SEL,
949                             mux_idx);
950         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
951
952         /* Initially set the converter's capabilities */
953         hinfo->channels_min = per_cvt->channels_min;
954         hinfo->channels_max = per_cvt->channels_max;
955         hinfo->rates = per_cvt->rates;
956         hinfo->formats = per_cvt->formats;
957         hinfo->maxbps = per_cvt->maxbps;
958
959         /* Restrict capabilities by ELD if this isn't disabled */
960         if (!static_hdmi_pcm && (eld->eld_valid || eld->lpcm_sad_ready)) {
961                 snd_hdmi_eld_update_pcm_info(eld, hinfo);
962                 if (hinfo->channels_min > hinfo->channels_max ||
963                     !hinfo->rates || !hinfo->formats)
964                         return -ENODEV;
965         }
966
967         /* Store the updated parameters */
968         runtime->hw.channels_min = hinfo->channels_min;
969         runtime->hw.channels_max = hinfo->channels_max;
970         runtime->hw.formats = hinfo->formats;
971         runtime->hw.rates = hinfo->rates;
972
973         snd_pcm_hw_constraint_step(substream->runtime, 0,
974                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
975         return 0;
976 }
977
978 /*
979  * HDA/HDMI auto parsing
980  */
981 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
982 {
983         struct hdmi_spec *spec = codec->spec;
984         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
985         hda_nid_t pin_nid = per_pin->pin_nid;
986
987         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
988                 snd_printk(KERN_WARNING
989                            "HDMI: pin %d wcaps %#x "
990                            "does not support connection list\n",
991                            pin_nid, get_wcaps(codec, pin_nid));
992                 return -EINVAL;
993         }
994
995         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
996                                                         per_pin->mux_nids,
997                                                         HDA_MAX_CONNECTIONS);
998
999         return 0;
1000 }
1001
1002 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1003 {
1004         struct hda_codec *codec = per_pin->codec;
1005         struct hdmi_eld *eld = &per_pin->sink_eld;
1006         hda_nid_t pin_nid = per_pin->pin_nid;
1007         /*
1008          * Always execute a GetPinSense verb here, even when called from
1009          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1010          * response's PD bit is not the real PD value, but indicates that
1011          * the real PD value changed. An older version of the HD-audio
1012          * specification worked this way. Hence, we just ignore the data in
1013          * the unsolicited response to avoid custom WARs.
1014          */
1015         int present = snd_hda_pin_sense(codec, pin_nid);
1016         bool eld_valid = false;
1017
1018         memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1019
1020         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
1021         if (eld->monitor_present)
1022                 eld_valid       = !!(present & AC_PINSENSE_ELDV);
1023
1024         _snd_printd(SND_PR_VERBOSE,
1025                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1026                 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1027
1028         if (eld_valid) {
1029                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1030                         snd_hdmi_show_eld(eld);
1031                 else if (repoll) {
1032                         queue_delayed_work(codec->bus->workq,
1033                                            &per_pin->work,
1034                                            msecs_to_jiffies(300));
1035                 }
1036         }
1037 }
1038
1039 static void hdmi_repoll_eld(struct work_struct *work)
1040 {
1041         struct hdmi_spec_per_pin *per_pin =
1042         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1043 #ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA
1044         struct hda_codec *codec = per_pin->codec;
1045         struct hdmi_eld *eld = &per_pin->sink_eld;
1046 #endif
1047
1048         if (per_pin->repoll_count++ > 6)
1049                 per_pin->repoll_count = 0;
1050
1051         hdmi_present_sense(per_pin, per_pin->repoll_count);
1052
1053 #ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA
1054         if (codec->preset->id == 0x10de0020) {
1055                 /*
1056                  * HDMI sink's ELD info cannot always be retrieved for now, e.g.
1057                  * in console or for audio devices. Assume the highest speakers
1058                  * configuration, to _not_ prohibit multi-channel audio playback
1059                  */
1060                 if (!eld->spk_alloc)
1061                         eld->spk_alloc = 0xffff;
1062         }
1063 #endif
1064 }
1065
1066 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1067 {
1068         struct hdmi_spec *spec = codec->spec;
1069         unsigned int caps, config;
1070         int pin_idx;
1071         struct hdmi_spec_per_pin *per_pin;
1072         int err;
1073
1074         caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1075         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1076                 return 0;
1077
1078         config = snd_hda_codec_read(codec, pin_nid, 0,
1079                                 AC_VERB_GET_CONFIG_DEFAULT, 0);
1080         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1081                 return 0;
1082
1083         if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1084                 return -E2BIG;
1085
1086         pin_idx = spec->num_pins;
1087         per_pin = &spec->pins[pin_idx];
1088
1089         per_pin->pin_nid = pin_nid;
1090
1091         err = hdmi_read_pin_conn(codec, pin_idx);
1092         if (err < 0)
1093                 return err;
1094
1095         spec->num_pins++;
1096
1097         return 0;
1098 }
1099
1100 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1101 {
1102         struct hdmi_spec *spec = codec->spec;
1103         int cvt_idx;
1104         struct hdmi_spec_per_cvt *per_cvt;
1105         unsigned int chans;
1106         int err;
1107
1108         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1109                 return -E2BIG;
1110
1111         chans = get_wcaps(codec, cvt_nid);
1112         chans = get_wcaps_channels(chans);
1113
1114         cvt_idx = spec->num_cvts;
1115         per_cvt = &spec->cvts[cvt_idx];
1116
1117         per_cvt->cvt_nid = cvt_nid;
1118         per_cvt->channels_min = 2;
1119         if (chans <= 16)
1120                 per_cvt->channels_max = chans;
1121
1122         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1123                                           &per_cvt->rates,
1124                                           &per_cvt->formats,
1125                                           &per_cvt->maxbps);
1126         if (err < 0)
1127                 return err;
1128
1129         spec->num_cvts++;
1130
1131         return 0;
1132 }
1133
1134 static int hdmi_parse_codec(struct hda_codec *codec)
1135 {
1136         hda_nid_t nid;
1137         int i, nodes;
1138
1139         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1140         if (!nid || nodes < 0) {
1141                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1142                 return -EINVAL;
1143         }
1144
1145         for (i = 0; i < nodes; i++, nid++) {
1146                 unsigned int caps;
1147                 unsigned int type;
1148
1149                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1150                 type = get_wcaps_type(caps);
1151
1152                 if (!(caps & AC_WCAP_DIGITAL))
1153                         continue;
1154
1155                 switch (type) {
1156                 case AC_WID_AUD_OUT:
1157                         hdmi_add_cvt(codec, nid);
1158                         break;
1159                 case AC_WID_PIN:
1160                         hdmi_add_pin(codec, nid);
1161                         break;
1162                 }
1163         }
1164
1165         /*
1166          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1167          * can be lost and presence sense verb will become inaccurate if the
1168          * HDA link is powered off at hot plug or hw initialization time.
1169          */
1170 #ifdef CONFIG_SND_HDA_POWER_SAVE
1171         if ((!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1172               AC_PWRST_EPSS)) && (codec->preset->id != 0x10de0020))
1173                 codec->bus->power_keep_link_on = 1;
1174 #endif
1175
1176         return 0;
1177 }
1178
1179 /*
1180  */
1181 static char *get_hdmi_pcm_name(int idx)
1182 {
1183         static char names[MAX_HDMI_PINS][8];
1184         sprintf(&names[idx][0], "HDMI %d", idx);
1185         return &names[idx][0];
1186 }
1187
1188 /*
1189  * HDMI callbacks
1190  */
1191
1192 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1193                                            struct hda_codec *codec,
1194                                            unsigned int stream_tag,
1195                                            unsigned int format,
1196                                            struct snd_pcm_substream *substream)
1197 {
1198         hda_nid_t cvt_nid = hinfo->nid;
1199         struct hdmi_spec *spec = codec->spec;
1200         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1201         hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1202         int pinctl;
1203
1204 #if defined(CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA) && defined(CONFIG_TEGRA_DC)
1205         if (codec->preset->id == 0x10de0020) {
1206                 int err = 0;
1207
1208                 if (substream->runtime->channels == 2)
1209                         tegra_hdmi_audio_null_sample_inject(true);
1210                 else
1211                         tegra_hdmi_audio_null_sample_inject(false);
1212
1213                 /* Set hdmi:audio freq and source selection*/
1214                 err = tegra_hdmi_setup_audio_freq_source(
1215                                         substream->runtime->rate, HDA);
1216                 if ( err < 0 ) {
1217                         snd_printk(KERN_ERR
1218                                 "Unable to set hdmi audio freq to %d \n",
1219                                                 substream->runtime->rate);
1220                         return err;
1221                 }
1222         }
1223 #endif
1224
1225         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1226
1227         hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1228
1229         pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1230                                     AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1231         snd_hda_codec_write(codec, pin_nid, 0,
1232                             AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl | PIN_OUT);
1233
1234         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1235 }
1236
1237 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1238                                              struct hda_codec *codec,
1239                                              struct snd_pcm_substream *substream)
1240 {
1241         struct hdmi_spec *spec = codec->spec;
1242         int cvt_idx, pin_idx;
1243         struct hdmi_spec_per_cvt *per_cvt;
1244         struct hdmi_spec_per_pin *per_pin;
1245         int pinctl;
1246
1247         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1248
1249         if (hinfo->nid) {
1250                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1251                 if (snd_BUG_ON(cvt_idx < 0))
1252                         return -EINVAL;
1253                 per_cvt = &spec->cvts[cvt_idx];
1254
1255                 snd_BUG_ON(!per_cvt->assigned);
1256                 per_cvt->assigned = 0;
1257                 hinfo->nid = 0;
1258
1259                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1260                 if (snd_BUG_ON(pin_idx < 0))
1261                         return -EINVAL;
1262                 per_pin = &spec->pins[pin_idx];
1263
1264                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1265                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1266                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1267                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1268                                     pinctl & ~PIN_OUT);
1269                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1270         }
1271
1272         return 0;
1273 }
1274
1275 static const struct hda_pcm_ops generic_ops = {
1276         .open = hdmi_pcm_open,
1277         .prepare = generic_hdmi_playback_pcm_prepare,
1278         .cleanup = generic_hdmi_playback_pcm_cleanup,
1279 };
1280
1281 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1282 {
1283         struct hdmi_spec *spec = codec->spec;
1284         int pin_idx;
1285
1286         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1287                 struct hda_pcm *info;
1288                 struct hda_pcm_stream *pstr;
1289
1290                 info = &spec->pcm_rec[pin_idx];
1291                 info->name = get_hdmi_pcm_name(pin_idx);
1292                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1293
1294                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1295                 pstr->substreams = 1;
1296                 pstr->ops = generic_ops;
1297                 /* other pstr fields are set in open */
1298         }
1299
1300         codec->num_pcms = spec->num_pins;
1301         codec->pcm_info = spec->pcm_rec;
1302
1303         return 0;
1304 }
1305
1306 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1307 {
1308         char hdmi_str[32] = "HDMI/DP";
1309         struct hdmi_spec *spec = codec->spec;
1310         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1311         int pcmdev = spec->pcm_rec[pin_idx].device;
1312
1313         if (pcmdev > 0)
1314                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1315
1316         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1317 }
1318
1319 static int generic_hdmi_build_controls(struct hda_codec *codec)
1320 {
1321         struct hdmi_spec *spec = codec->spec;
1322         int err;
1323         int pin_idx;
1324
1325         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1326                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1327
1328                 err = generic_hdmi_build_jack(codec, pin_idx);
1329                 if (err < 0)
1330                         return err;
1331
1332                 err = snd_hda_create_spdif_out_ctls(codec,
1333                                                     per_pin->pin_nid,
1334                                                     per_pin->mux_nids[0]);
1335                 if (err < 0)
1336                         return err;
1337                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1338
1339                 /* add control for ELD Bytes */
1340                 err = hdmi_create_eld_ctl(codec,
1341                                         pin_idx,
1342                                         spec->pcm_rec[pin_idx].device);
1343
1344                 if (err < 0)
1345                         return err;
1346
1347                 hdmi_present_sense(per_pin, 0);
1348         }
1349
1350         return 0;
1351 }
1352
1353 static int generic_hdmi_init(struct hda_codec *codec)
1354 {
1355         struct hdmi_spec *spec = codec->spec;
1356         int pin_idx;
1357
1358         switch (codec->preset->id) {
1359         case 0x10de0020:
1360                 snd_hda_codec_write(codec, 4, 0,
1361                                     AC_VERB_SET_DIGI_CONVERT_1, 0x11);
1362         default:
1363                 break;
1364         }
1365
1366         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1367                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1368                 hda_nid_t pin_nid = per_pin->pin_nid;
1369                 struct hdmi_eld *eld = &per_pin->sink_eld;
1370
1371                 hdmi_init_pin(codec, pin_nid);
1372                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1373
1374                 per_pin->codec = codec;
1375                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1376                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1377         }
1378         snd_hda_jack_report_sync(codec);
1379         return 0;
1380 }
1381
1382 static void generic_hdmi_free(struct hda_codec *codec)
1383 {
1384         struct hdmi_spec *spec = codec->spec;
1385         int pin_idx;
1386
1387         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1388                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1389                 struct hdmi_eld *eld = &per_pin->sink_eld;
1390
1391                 cancel_delayed_work(&per_pin->work);
1392                 snd_hda_eld_proc_free(codec, eld);
1393         }
1394
1395         flush_workqueue(codec->bus->workq);
1396         kfree(spec);
1397 }
1398
1399 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1400         .init                   = generic_hdmi_init,
1401         .free                   = generic_hdmi_free,
1402         .build_pcms             = generic_hdmi_build_pcms,
1403         .build_controls         = generic_hdmi_build_controls,
1404         .unsol_event            = hdmi_unsol_event,
1405 };
1406
1407 static int patch_generic_hdmi(struct hda_codec *codec)
1408 {
1409         struct hdmi_spec *spec;
1410
1411         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1412         if (spec == NULL)
1413                 return -ENOMEM;
1414
1415         codec->spec = spec;
1416         if (hdmi_parse_codec(codec) < 0) {
1417                 codec->spec = NULL;
1418                 kfree(spec);
1419                 return -EINVAL;
1420         }
1421         codec->patch_ops = generic_hdmi_patch_ops;
1422
1423         init_channel_allocations();
1424
1425         return 0;
1426 }
1427
1428 /*
1429  * Shared non-generic implementations
1430  */
1431
1432 static int simple_playback_build_pcms(struct hda_codec *codec)
1433 {
1434         struct hdmi_spec *spec = codec->spec;
1435         struct hda_pcm *info = spec->pcm_rec;
1436         int i;
1437
1438         codec->num_pcms = spec->num_cvts;
1439         codec->pcm_info = info;
1440
1441         for (i = 0; i < codec->num_pcms; i++, info++) {
1442                 unsigned int chans;
1443                 struct hda_pcm_stream *pstr;
1444
1445                 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1446                 chans = get_wcaps_channels(chans);
1447
1448                 info->name = get_hdmi_pcm_name(i);
1449                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1450                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1451                 snd_BUG_ON(!spec->pcm_playback);
1452                 *pstr = *spec->pcm_playback;
1453                 pstr->nid = spec->cvts[i].cvt_nid;
1454                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1455                         pstr->channels_max = chans;
1456         }
1457
1458         return 0;
1459 }
1460
1461 static int simple_playback_build_controls(struct hda_codec *codec)
1462 {
1463         struct hdmi_spec *spec = codec->spec;
1464         int err;
1465         int i;
1466
1467         for (i = 0; i < codec->num_pcms; i++) {
1468                 err = snd_hda_create_spdif_out_ctls(codec,
1469                                                     spec->cvts[i].cvt_nid,
1470                                                     spec->cvts[i].cvt_nid);
1471                 if (err < 0)
1472                         return err;
1473         }
1474
1475         return 0;
1476 }
1477
1478 static void simple_playback_free(struct hda_codec *codec)
1479 {
1480         struct hdmi_spec *spec = codec->spec;
1481
1482         kfree(spec);
1483 }
1484
1485 /*
1486  * Nvidia specific implementations
1487  */
1488
1489 #define Nv_VERB_SET_Channel_Allocation          0xF79
1490 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1491 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1492 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1493
1494 #define nvhdmi_master_con_nid_7x        0x04
1495 #define nvhdmi_master_pin_nid_7x        0x05
1496
1497 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1498         /*front, rear, clfe, rear_surr */
1499         0x6, 0x8, 0xa, 0xc,
1500 };
1501
1502 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1503         /* set audio protect on */
1504         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1505         /* enable digital output on pin widget */
1506         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1507         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1508         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1509         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1510         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1511         {} /* terminator */
1512 };
1513
1514 #ifdef LIMITED_RATE_FMT_SUPPORT
1515 /* support only the safe format and rate */
1516 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1517 #define SUPPORTED_MAXBPS        16
1518 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1519 #else
1520 /* support all rates and formats */
1521 #define SUPPORTED_RATES \
1522         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1523         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1524          SNDRV_PCM_RATE_192000)
1525 #define SUPPORTED_MAXBPS        24
1526 #define SUPPORTED_FORMATS \
1527         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1528 #endif
1529
1530 static int nvhdmi_7x_init(struct hda_codec *codec)
1531 {
1532         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1533         return 0;
1534 }
1535
1536 static unsigned int channels_2_6_8[] = {
1537         2, 6, 8
1538 };
1539
1540 static unsigned int channels_2_8[] = {
1541         2, 8
1542 };
1543
1544 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1545         .count = ARRAY_SIZE(channels_2_6_8),
1546         .list = channels_2_6_8,
1547         .mask = 0,
1548 };
1549
1550 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1551         .count = ARRAY_SIZE(channels_2_8),
1552         .list = channels_2_8,
1553         .mask = 0,
1554 };
1555
1556 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1557                                     struct hda_codec *codec,
1558                                     struct snd_pcm_substream *substream)
1559 {
1560         struct hdmi_spec *spec = codec->spec;
1561         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1562
1563         switch (codec->preset->id) {
1564         case 0x10de0002:
1565         case 0x10de0003:
1566         case 0x10de0005:
1567         case 0x10de0006:
1568                 hw_constraints_channels = &hw_constraints_2_8_channels;
1569                 break;
1570         case 0x10de0007:
1571                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1572                 break;
1573         default:
1574                 break;
1575         }
1576
1577         if (hw_constraints_channels != NULL) {
1578                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1579                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1580                                 hw_constraints_channels);
1581         } else {
1582                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1583                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1584         }
1585
1586         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1587 }
1588
1589 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1590                                      struct hda_codec *codec,
1591                                      struct snd_pcm_substream *substream)
1592 {
1593         struct hdmi_spec *spec = codec->spec;
1594         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1595 }
1596
1597 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1598                                        struct hda_codec *codec,
1599                                        unsigned int stream_tag,
1600                                        unsigned int format,
1601                                        struct snd_pcm_substream *substream)
1602 {
1603         struct hdmi_spec *spec = codec->spec;
1604         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1605                                              stream_tag, format, substream);
1606 }
1607
1608 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1609                                                     int channels)
1610 {
1611         unsigned int chanmask;
1612         int chan = channels ? (channels - 1) : 1;
1613
1614         switch (channels) {
1615         default:
1616         case 0:
1617         case 2:
1618                 chanmask = 0x00;
1619                 break;
1620         case 4:
1621                 chanmask = 0x08;
1622                 break;
1623         case 6:
1624                 chanmask = 0x0b;
1625                 break;
1626         case 8:
1627                 chanmask = 0x13;
1628                 break;
1629         }
1630
1631         /* Set the audio infoframe channel allocation and checksum fields.  The
1632          * channel count is computed implicitly by the hardware. */
1633         snd_hda_codec_write(codec, 0x1, 0,
1634                         Nv_VERB_SET_Channel_Allocation, chanmask);
1635
1636         snd_hda_codec_write(codec, 0x1, 0,
1637                         Nv_VERB_SET_Info_Frame_Checksum,
1638                         (0x71 - chan - chanmask));
1639 }
1640
1641 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1642                                    struct hda_codec *codec,
1643                                    struct snd_pcm_substream *substream)
1644 {
1645         struct hdmi_spec *spec = codec->spec;
1646         int i;
1647
1648         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1649                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1650         for (i = 0; i < 4; i++) {
1651                 /* set the stream id */
1652                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1653                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1654                 /* set the stream format */
1655                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1656                                 AC_VERB_SET_STREAM_FORMAT, 0);
1657         }
1658
1659         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1660          * streams are disabled. */
1661         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1662
1663         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1664 }
1665
1666 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1667                                      struct hda_codec *codec,
1668                                      unsigned int stream_tag,
1669                                      unsigned int format,
1670                                      struct snd_pcm_substream *substream)
1671 {
1672         int chs;
1673         unsigned int dataDCC2, channel_id;
1674         int i;
1675         struct hdmi_spec *spec = codec->spec;
1676         struct hda_spdif_out *spdif =
1677                 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1678
1679         mutex_lock(&codec->spdif_mutex);
1680
1681         chs = substream->runtime->channels;
1682
1683         dataDCC2 = 0x2;
1684
1685         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1686         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1687                 snd_hda_codec_write(codec,
1688                                 nvhdmi_master_con_nid_7x,
1689                                 0,
1690                                 AC_VERB_SET_DIGI_CONVERT_1,
1691                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1692
1693         /* set the stream id */
1694         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1695                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1696
1697         /* set the stream format */
1698         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1699                         AC_VERB_SET_STREAM_FORMAT, format);
1700
1701         /* turn on again (if needed) */
1702         /* enable and set the channel status audio/data flag */
1703         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1704                 snd_hda_codec_write(codec,
1705                                 nvhdmi_master_con_nid_7x,
1706                                 0,
1707                                 AC_VERB_SET_DIGI_CONVERT_1,
1708                                 spdif->ctls & 0xff);
1709                 snd_hda_codec_write(codec,
1710                                 nvhdmi_master_con_nid_7x,
1711                                 0,
1712                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1713         }
1714
1715         for (i = 0; i < 4; i++) {
1716                 if (chs == 2)
1717                         channel_id = 0;
1718                 else
1719                         channel_id = i * 2;
1720
1721                 /* turn off SPDIF once;
1722                  *otherwise the IEC958 bits won't be updated
1723                  */
1724                 if (codec->spdif_status_reset &&
1725                 (spdif->ctls & AC_DIG1_ENABLE))
1726                         snd_hda_codec_write(codec,
1727                                 nvhdmi_con_nids_7x[i],
1728                                 0,
1729                                 AC_VERB_SET_DIGI_CONVERT_1,
1730                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1731                 /* set the stream id */
1732                 snd_hda_codec_write(codec,
1733                                 nvhdmi_con_nids_7x[i],
1734                                 0,
1735                                 AC_VERB_SET_CHANNEL_STREAMID,
1736                                 (stream_tag << 4) | channel_id);
1737                 /* set the stream format */
1738                 snd_hda_codec_write(codec,
1739                                 nvhdmi_con_nids_7x[i],
1740                                 0,
1741                                 AC_VERB_SET_STREAM_FORMAT,
1742                                 format);
1743                 /* turn on again (if needed) */
1744                 /* enable and set the channel status audio/data flag */
1745                 if (codec->spdif_status_reset &&
1746                 (spdif->ctls & AC_DIG1_ENABLE)) {
1747                         snd_hda_codec_write(codec,
1748                                         nvhdmi_con_nids_7x[i],
1749                                         0,
1750                                         AC_VERB_SET_DIGI_CONVERT_1,
1751                                         spdif->ctls & 0xff);
1752                         snd_hda_codec_write(codec,
1753                                         nvhdmi_con_nids_7x[i],
1754                                         0,
1755                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1756                 }
1757         }
1758
1759         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1760
1761         mutex_unlock(&codec->spdif_mutex);
1762         return 0;
1763 }
1764
1765 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1766         .substreams = 1,
1767         .channels_min = 2,
1768         .channels_max = 8,
1769         .nid = nvhdmi_master_con_nid_7x,
1770         .rates = SUPPORTED_RATES,
1771         .maxbps = SUPPORTED_MAXBPS,
1772         .formats = SUPPORTED_FORMATS,
1773         .ops = {
1774                 .open = simple_playback_pcm_open,
1775                 .close = nvhdmi_8ch_7x_pcm_close,
1776                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1777         },
1778 };
1779
1780 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1781         .substreams = 1,
1782         .channels_min = 2,
1783         .channels_max = 2,
1784         .nid = nvhdmi_master_con_nid_7x,
1785         .rates = SUPPORTED_RATES,
1786         .maxbps = SUPPORTED_MAXBPS,
1787         .formats = SUPPORTED_FORMATS,
1788         .ops = {
1789                 .open = simple_playback_pcm_open,
1790                 .close = simple_playback_pcm_close,
1791                 .prepare = simple_playback_pcm_prepare
1792         },
1793 };
1794
1795 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1796         .build_controls = simple_playback_build_controls,
1797         .build_pcms = simple_playback_build_pcms,
1798         .init = nvhdmi_7x_init,
1799         .free = simple_playback_free,
1800 };
1801
1802 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1803         .build_controls = simple_playback_build_controls,
1804         .build_pcms = simple_playback_build_pcms,
1805         .init = nvhdmi_7x_init,
1806         .free = simple_playback_free,
1807 };
1808
1809 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1810 {
1811         struct hdmi_spec *spec;
1812
1813         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1814         if (spec == NULL)
1815                 return -ENOMEM;
1816
1817         codec->spec = spec;
1818
1819         spec->multiout.num_dacs = 0;  /* no analog */
1820         spec->multiout.max_channels = 2;
1821         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1822         spec->num_cvts = 1;
1823         spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1824         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1825
1826         codec->patch_ops = nvhdmi_patch_ops_2ch;
1827
1828         return 0;
1829 }
1830
1831 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1832 {
1833         struct hdmi_spec *spec;
1834         int err = patch_nvhdmi_2ch(codec);
1835
1836         if (err < 0)
1837                 return err;
1838         spec = codec->spec;
1839         spec->multiout.max_channels = 8;
1840         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1841         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1842
1843         /* Initialize the audio infoframe channel mask and checksum to something
1844          * valid */
1845         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1846
1847         return 0;
1848 }
1849
1850 /*
1851  * ATI-specific implementations
1852  *
1853  * FIXME: we may omit the whole this and use the generic code once after
1854  * it's confirmed to work.
1855  */
1856
1857 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1858 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1859
1860 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1861                                         struct hda_codec *codec,
1862                                         unsigned int stream_tag,
1863                                         unsigned int format,
1864                                         struct snd_pcm_substream *substream)
1865 {
1866         struct hdmi_spec *spec = codec->spec;
1867         int chans = substream->runtime->channels;
1868         int i, err;
1869
1870         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1871                                           substream);
1872         if (err < 0)
1873                 return err;
1874         snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1875                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1876         /* FIXME: XXX */
1877         for (i = 0; i < chans; i++) {
1878                 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1879                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1880                                     (i << 4) | i);
1881         }
1882         return 0;
1883 }
1884
1885 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1886         .substreams = 1,
1887         .channels_min = 2,
1888         .channels_max = 2,
1889         .nid = ATIHDMI_CVT_NID,
1890         .ops = {
1891                 .open = simple_playback_pcm_open,
1892                 .close = simple_playback_pcm_close,
1893                 .prepare = atihdmi_playback_pcm_prepare
1894         },
1895 };
1896
1897 static const struct hda_verb atihdmi_basic_init[] = {
1898         /* enable digital output on pin widget */
1899         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1900         {} /* terminator */
1901 };
1902
1903 static int atihdmi_init(struct hda_codec *codec)
1904 {
1905         struct hdmi_spec *spec = codec->spec;
1906
1907         snd_hda_sequence_write(codec, atihdmi_basic_init);
1908         /* SI codec requires to unmute the pin */
1909         if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1910                 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1911                                     AC_VERB_SET_AMP_GAIN_MUTE,
1912                                     AMP_OUT_UNMUTE);
1913         return 0;
1914 }
1915
1916 static const struct hda_codec_ops atihdmi_patch_ops = {
1917         .build_controls = simple_playback_build_controls,
1918         .build_pcms = simple_playback_build_pcms,
1919         .init = atihdmi_init,
1920         .free = simple_playback_free,
1921 };
1922
1923
1924 static int patch_atihdmi(struct hda_codec *codec)
1925 {
1926         struct hdmi_spec *spec;
1927
1928         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1929         if (spec == NULL)
1930                 return -ENOMEM;
1931
1932         codec->spec = spec;
1933
1934         spec->multiout.num_dacs = 0;      /* no analog */
1935         spec->multiout.max_channels = 2;
1936         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1937         spec->num_cvts = 1;
1938         spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1939         spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1940         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1941
1942         codec->patch_ops = atihdmi_patch_ops;
1943
1944         return 0;
1945 }
1946
1947
1948 /*
1949  * patch entries
1950  */
1951 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1952 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1953 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1954 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1955 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1956 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1957 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1958 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1959 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1960 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1961 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1962 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1963 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1964 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1965 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1966 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1967 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1968 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1969 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1970 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1971 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1972 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1973 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1974 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1975 /* 17 is known to be absent */
1976 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1977 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1978 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1979 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1980 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1981 { .id = 0x10de0020, .name = "Tegra30 HDMI",     .patch = patch_generic_hdmi },
1982 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1983 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1984 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1985 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1986 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1987 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1988 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1989 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1990 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1991 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1992 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1993 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1994 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1995 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1996 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
1997 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1998 {} /* terminator */
1999 };
2000
2001 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2002 MODULE_ALIAS("snd-hda-codec-id:10027919");
2003 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2004 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2005 MODULE_ALIAS("snd-hda-codec-id:10951390");
2006 MODULE_ALIAS("snd-hda-codec-id:10951392");
2007 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2008 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2009 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2010 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2011 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2012 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2013 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2014 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2015 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2016 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2017 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2018 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2019 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2020 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2021 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2022 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2023 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2024 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2025 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2026 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2027 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2028 MODULE_ALIAS("snd-hda-codec-id:10de0020");
2029 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2030 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2031 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2032 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2033 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2034 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2035 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2036 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2037 MODULE_ALIAS("snd-hda-codec-id:80860054");
2038 MODULE_ALIAS("snd-hda-codec-id:80862801");
2039 MODULE_ALIAS("snd-hda-codec-id:80862802");
2040 MODULE_ALIAS("snd-hda-codec-id:80862803");
2041 MODULE_ALIAS("snd-hda-codec-id:80862804");
2042 MODULE_ALIAS("snd-hda-codec-id:80862805");
2043 MODULE_ALIAS("snd-hda-codec-id:80862806");
2044 MODULE_ALIAS("snd-hda-codec-id:80862880");
2045 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2046
2047 MODULE_LICENSE("GPL");
2048 MODULE_DESCRIPTION("HDMI HD-audio codec");
2049 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2050 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2051 MODULE_ALIAS("snd-hda-codec-atihdmi");
2052
2053 static struct hda_codec_preset_list intel_list = {
2054         .preset = snd_hda_preset_hdmi,
2055         .owner = THIS_MODULE,
2056 };
2057
2058 static int __init patch_hdmi_init(void)
2059 {
2060         return snd_hda_add_codec_preset(&intel_list);
2061 }
2062
2063 static void __exit patch_hdmi_exit(void)
2064 {
2065         snd_hda_delete_codec_preset(&intel_list);
2066 }
2067
2068 module_init(patch_hdmi_init)
2069 module_exit(patch_hdmi_exit)