3e35734f1d7a7950275462dbd4b22b4bc7402847
[linux-2.6.git] / sound / pci / hda / patch_hdmi.c
1 /*
2  *
3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  *  Copyright (c) 2006 ATI Technologies Inc.
7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9  *
10  *  Authors:
11  *                      Wu Fengguang <wfg@linux.intel.com>
12  *
13  *  Maintained by:
14  *                      Wu Fengguang <wfg@linux.intel.com>
15  *
16  *  This program is free software; you can redistribute it and/or modify it
17  *  under the terms of the GNU General Public License as published by the Free
18  *  Software Foundation; either version 2 of the License, or (at your option)
19  *  any later version.
20  *
21  *  This program is distributed in the hope that it will be useful, but
22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
24  *  for more details.
25  *
26  *  You should have received a copy of the GNU General Public License
27  *  along with this program; if not, write to the Free Software Foundation,
28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
29  */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37
38 #ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA
39 #include <mach/hdmi-audio.h>
40 #endif
41
42 #include "hda_codec.h"
43 #include "hda_local.h"
44 #include "hda_jack.h"
45
46 static bool static_hdmi_pcm;
47 module_param(static_hdmi_pcm, bool, 0644);
48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
49
50 /*
51  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
52  * could support N independent pipes, each of them can be connected to one or
53  * more ports (DVI, HDMI or DisplayPort).
54  *
55  * The HDA correspondence of pipes/ports are converter/pin nodes.
56  */
57 #define MAX_HDMI_CVTS   8
58 #define MAX_HDMI_PINS   8
59
60 struct hdmi_spec_per_cvt {
61         hda_nid_t cvt_nid;
62         int assigned;
63         unsigned int channels_min;
64         unsigned int channels_max;
65         u32 rates;
66         u64 formats;
67         unsigned int maxbps;
68 };
69
70 struct hdmi_spec_per_pin {
71         hda_nid_t pin_nid;
72         int num_mux_nids;
73         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
74
75         struct hda_codec *codec;
76         struct hdmi_eld sink_eld;
77         struct delayed_work work;
78         int repoll_count;
79 };
80
81 struct hdmi_spec {
82         int num_cvts;
83         struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
84
85         int num_pins;
86         struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
87         struct hda_pcm pcm_rec[MAX_HDMI_PINS];
88
89         /*
90          * Non-generic ATI/NVIDIA specific
91          */
92         struct hda_multi_out multiout;
93         const struct hda_pcm_stream *pcm_playback;
94 };
95
96
97 struct hdmi_audio_infoframe {
98         u8 type; /* 0x84 */
99         u8 ver;  /* 0x01 */
100         u8 len;  /* 0x0a */
101
102         u8 checksum;
103
104         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
105         u8 SS01_SF24;
106         u8 CXT04;
107         u8 CA;
108         u8 LFEPBL01_LSV36_DM_INH7;
109 };
110
111 struct dp_audio_infoframe {
112         u8 type; /* 0x84 */
113         u8 len;  /* 0x1b */
114         u8 ver;  /* 0x11 << 2 */
115
116         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
117         u8 SS01_SF24;
118         u8 CXT04;
119         u8 CA;
120         u8 LFEPBL01_LSV36_DM_INH7;
121 };
122
123 union audio_infoframe {
124         struct hdmi_audio_infoframe hdmi;
125         struct dp_audio_infoframe dp;
126         u8 bytes[0];
127 };
128
129 /*
130  * CEA speaker placement:
131  *
132  *        FLH       FCH        FRH
133  *  FLW    FL  FLC   FC   FRC   FR   FRW
134  *
135  *                                  LFE
136  *                     TC
137  *
138  *          RL  RLC   RC   RRC   RR
139  *
140  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
141  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
142  */
143 enum cea_speaker_placement {
144         FL  = (1 <<  0),        /* Front Left           */
145         FC  = (1 <<  1),        /* Front Center         */
146         FR  = (1 <<  2),        /* Front Right          */
147         FLC = (1 <<  3),        /* Front Left Center    */
148         FRC = (1 <<  4),        /* Front Right Center   */
149         RL  = (1 <<  5),        /* Rear Left            */
150         RC  = (1 <<  6),        /* Rear Center          */
151         RR  = (1 <<  7),        /* Rear Right           */
152         RLC = (1 <<  8),        /* Rear Left Center     */
153         RRC = (1 <<  9),        /* Rear Right Center    */
154         LFE = (1 << 10),        /* Low Frequency Effect */
155         FLW = (1 << 11),        /* Front Left Wide      */
156         FRW = (1 << 12),        /* Front Right Wide     */
157         FLH = (1 << 13),        /* Front Left High      */
158         FCH = (1 << 14),        /* Front Center High    */
159         FRH = (1 << 15),        /* Front Right High     */
160         TC  = (1 << 16),        /* Top Center           */
161 };
162
163 /*
164  * ELD SA bits in the CEA Speaker Allocation data block
165  */
166 static int eld_speaker_allocation_bits[] = {
167         [0] = FL | FR,
168         [1] = LFE,
169         [2] = FC,
170         [3] = RL | RR,
171         [4] = RC,
172         [5] = FLC | FRC,
173         [6] = RLC | RRC,
174         /* the following are not defined in ELD yet */
175         [7] = FLW | FRW,
176         [8] = FLH | FRH,
177         [9] = TC,
178         [10] = FCH,
179 };
180
181 struct cea_channel_speaker_allocation {
182         int ca_index;
183         int speakers[8];
184
185         /* derived values, just for convenience */
186         int channels;
187         int spk_mask;
188 };
189
190 /*
191  * ALSA sequence is:
192  *
193  *       surround40   surround41   surround50   surround51   surround71
194  * ch0   front left   =            =            =            =
195  * ch1   front right  =            =            =            =
196  * ch2   rear left    =            =            =            =
197  * ch3   rear right   =            =            =            =
198  * ch4                LFE          center       center       center
199  * ch5                                          LFE          LFE
200  * ch6                                                       side left
201  * ch7                                                       side right
202  *
203  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
204  */
205 static int hdmi_channel_mapping[0x32][8] = {
206         /* stereo */
207         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
208         /* 2.1 */
209         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
210         /* Dolby Surround */
211         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
212         /* surround40 */
213         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
214         /* 4ch */
215         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
216         /* surround41 */
217         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
218         /* surround50 */
219         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
220         /* surround51 */
221         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
222         /* 7.1 */
223         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
224 };
225
226 /*
227  * This is an ordered list!
228  *
229  * The preceding ones have better chances to be selected by
230  * hdmi_channel_allocation().
231  */
232 static struct cea_channel_speaker_allocation channel_allocations[] = {
233 /*                        channel:   7     6    5    4    3     2    1    0  */
234 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
235                                  /* 2.1 */
236 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
237                                  /* Dolby Surround */
238 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
239                                  /* surround40 */
240 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
241                                  /* surround41 */
242 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
243                                  /* surround50 */
244 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
245                                  /* surround51 */
246 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
247                                  /* 6.1 */
248 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
249                                  /* surround71 */
250 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
251
252 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
253 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
254 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
255 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
256 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
257 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
258 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
259 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
260 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
261 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
262 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
263 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
264 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
265 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
266 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
267 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
268 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
269 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
270 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
271 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
272 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
273 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
274 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
275 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
276 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
277 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
278 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
279 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
280 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
281 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
282 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
283 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
284 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
285 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
286 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
287 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
288 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
289 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
290 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
291 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
292 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
293 };
294
295
296 /*
297  * HDMI routines
298  */
299
300 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
301 {
302         int pin_idx;
303
304         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
305                 if (spec->pins[pin_idx].pin_nid == pin_nid)
306                         return pin_idx;
307
308         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
309         return -EINVAL;
310 }
311
312 static int hinfo_to_pin_index(struct hdmi_spec *spec,
313                               struct hda_pcm_stream *hinfo)
314 {
315         int pin_idx;
316
317         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
318                 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
319                         return pin_idx;
320
321         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
322         return -EINVAL;
323 }
324
325 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
326 {
327         int cvt_idx;
328
329         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
330                 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
331                         return cvt_idx;
332
333         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
334         return -EINVAL;
335 }
336
337 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
338                         struct snd_ctl_elem_info *uinfo)
339 {
340         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
341         struct hdmi_spec *spec;
342         int pin_idx;
343
344         spec = codec->spec;
345         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
346
347         pin_idx = kcontrol->private_value;
348         uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
349
350         return 0;
351 }
352
353 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
354                         struct snd_ctl_elem_value *ucontrol)
355 {
356         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
357         struct hdmi_spec *spec;
358         int pin_idx;
359
360         spec = codec->spec;
361         pin_idx = kcontrol->private_value;
362
363         memcpy(ucontrol->value.bytes.data,
364                 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
365
366         return 0;
367 }
368
369 static struct snd_kcontrol_new eld_bytes_ctl = {
370         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
371         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
372         .name = "ELD",
373         .info = hdmi_eld_ctl_info,
374         .get = hdmi_eld_ctl_get,
375 };
376
377 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
378                         int device)
379 {
380         struct snd_kcontrol *kctl;
381         struct hdmi_spec *spec = codec->spec;
382         int err;
383
384         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
385         if (!kctl)
386                 return -ENOMEM;
387         kctl->private_value = pin_idx;
388         kctl->id.device = device;
389
390         err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
391         if (err < 0)
392                 return err;
393
394         return 0;
395 }
396
397 #ifdef BE_PARANOID
398 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
399                                 int *packet_index, int *byte_index)
400 {
401         int val;
402
403         val = snd_hda_codec_read(codec, pin_nid, 0,
404                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
405
406         *packet_index = val >> 5;
407         *byte_index = val & 0x1f;
408 }
409 #endif
410
411 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
412                                 int packet_index, int byte_index)
413 {
414         int val;
415
416         val = (packet_index << 5) | (byte_index & 0x1f);
417
418         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
419 }
420
421 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
422                                 unsigned char val)
423 {
424         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
425 }
426
427 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
428 {
429         /* Unmute */
430         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
431                 snd_hda_codec_write(codec, pin_nid, 0,
432                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
433         /* Disable pin out until stream is active*/
434         snd_hda_codec_write(codec, pin_nid, 0,
435                             AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
436 }
437
438 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
439 {
440         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
441                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
442 }
443
444 static void hdmi_set_channel_count(struct hda_codec *codec,
445                                    hda_nid_t cvt_nid, int chs)
446 {
447         if (chs != hdmi_get_channel_count(codec, cvt_nid))
448                 snd_hda_codec_write(codec, cvt_nid, 0,
449                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
450 }
451
452
453 /*
454  * Channel mapping routines
455  */
456
457 /*
458  * Compute derived values in channel_allocations[].
459  */
460 static void init_channel_allocations(void)
461 {
462         int i, j;
463         struct cea_channel_speaker_allocation *p;
464
465         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
466                 p = channel_allocations + i;
467                 p->channels = 0;
468                 p->spk_mask = 0;
469                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
470                         if (p->speakers[j]) {
471                                 p->channels++;
472                                 p->spk_mask |= p->speakers[j];
473                         }
474         }
475 }
476
477 /*
478  * The transformation takes two steps:
479  *
480  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
481  *            spk_mask => (channel_allocations[])         => ai->CA
482  *
483  * TODO: it could select the wrong CA from multiple candidates.
484 */
485 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
486 {
487         int i;
488         int ca = 0;
489         int spk_mask = 0;
490         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
491
492         /*
493          * CA defaults to 0 for basic stereo audio
494          */
495         if (channels <= 2)
496                 return 0;
497
498         /*
499          * expand ELD's speaker allocation mask
500          *
501          * ELD tells the speaker mask in a compact(paired) form,
502          * expand ELD's notions to match the ones used by Audio InfoFrame.
503          */
504         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
505                 if (eld->spk_alloc & (1 << i))
506                         spk_mask |= eld_speaker_allocation_bits[i];
507         }
508
509         /* search for the first working match in the CA table */
510         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
511                 if (channels == channel_allocations[i].channels &&
512                     (spk_mask & channel_allocations[i].spk_mask) ==
513                                 channel_allocations[i].spk_mask) {
514                         ca = channel_allocations[i].ca_index;
515                         break;
516                 }
517         }
518
519         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
520         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
521                     ca, channels, buf);
522
523         return ca;
524 }
525
526 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
527                                        hda_nid_t pin_nid)
528 {
529 #ifdef CONFIG_SND_DEBUG_VERBOSE
530         int i;
531         int slot;
532
533         for (i = 0; i < 8; i++) {
534                 slot = snd_hda_codec_read(codec, pin_nid, 0,
535                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
536                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
537                                                 slot >> 4, slot & 0xf);
538         }
539 #endif
540 }
541
542
543 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
544                                        hda_nid_t pin_nid,
545                                        int ca)
546 {
547         int i;
548         int err;
549
550         if (hdmi_channel_mapping[ca][1] == 0) {
551                 for (i = 0; i < channel_allocations[ca].channels; i++)
552                         hdmi_channel_mapping[ca][i] = i | (i << 4);
553                 for (; i < 8; i++)
554                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
555         }
556
557         for (i = 0; i < 8; i++) {
558                 err = snd_hda_codec_write(codec, pin_nid, 0,
559                                           AC_VERB_SET_HDMI_CHAN_SLOT,
560                                           hdmi_channel_mapping[ca][i]);
561                 if (err) {
562                         snd_printdd(KERN_NOTICE
563                                     "HDMI: channel mapping failed\n");
564                         break;
565                 }
566         }
567
568         hdmi_debug_channel_mapping(codec, pin_nid);
569 }
570
571
572 /*
573  * Audio InfoFrame routines
574  */
575
576 /*
577  * Enable Audio InfoFrame Transmission
578  */
579 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
580                                        hda_nid_t pin_nid)
581 {
582         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
583         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
584                                                 AC_DIPXMIT_BEST);
585 }
586
587 /*
588  * Disable Audio InfoFrame Transmission
589  */
590 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
591                                       hda_nid_t pin_nid)
592 {
593         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
594         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
595                                                 AC_DIPXMIT_DISABLE);
596 }
597
598 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
599 {
600 #ifdef CONFIG_SND_DEBUG_VERBOSE
601         int i;
602         int size;
603
604         size = snd_hdmi_get_eld_size(codec, pin_nid);
605         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
606
607         for (i = 0; i < 8; i++) {
608                 size = snd_hda_codec_read(codec, pin_nid, 0,
609                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
610                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
611         }
612 #endif
613 }
614
615 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
616 {
617 #ifdef BE_PARANOID
618         int i, j;
619         int size;
620         int pi, bi;
621         for (i = 0; i < 8; i++) {
622                 size = snd_hda_codec_read(codec, pin_nid, 0,
623                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
624                 if (size == 0)
625                         continue;
626
627                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
628                 for (j = 1; j < 1000; j++) {
629                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
630                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
631                         if (pi != i)
632                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
633                                                 bi, pi, i);
634                         if (bi == 0) /* byte index wrapped around */
635                                 break;
636                 }
637                 snd_printd(KERN_INFO
638                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
639                         i, size, j);
640         }
641 #endif
642 }
643
644 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
645 {
646         u8 *bytes = (u8 *)hdmi_ai;
647         u8 sum = 0;
648         int i;
649
650         hdmi_ai->checksum = 0;
651
652         for (i = 0; i < sizeof(*hdmi_ai); i++)
653                 sum += bytes[i];
654
655         hdmi_ai->checksum = -sum;
656 }
657
658 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
659                                       hda_nid_t pin_nid,
660                                       u8 *dip, int size)
661 {
662         int i;
663
664         hdmi_debug_dip_size(codec, pin_nid);
665         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
666
667         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
668         for (i = 0; i < size; i++)
669                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
670 }
671
672 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
673                                     u8 *dip, int size)
674 {
675         u8 val;
676         int i;
677
678         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
679                                                             != AC_DIPXMIT_BEST)
680                 return false;
681
682         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
683         for (i = 0; i < size; i++) {
684                 val = snd_hda_codec_read(codec, pin_nid, 0,
685                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
686                 if (val != dip[i])
687                         return false;
688         }
689
690         return true;
691 }
692
693 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
694                                         struct snd_pcm_substream *substream)
695 {
696         struct hdmi_spec *spec = codec->spec;
697         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
698         hda_nid_t pin_nid = per_pin->pin_nid;
699         int channels = substream->runtime->channels;
700         struct hdmi_eld *eld;
701         int ca;
702         union audio_infoframe ai;
703
704         eld = &spec->pins[pin_idx].sink_eld;
705         if (!eld->monitor_present)
706                 return;
707
708         ca = hdmi_channel_allocation(eld, channels);
709
710         memset(&ai, 0, sizeof(ai));
711         if (eld->conn_type == 0) { /* HDMI */
712                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
713
714                 hdmi_ai->type           = 0x84;
715                 hdmi_ai->ver            = 0x01;
716                 hdmi_ai->len            = 0x0a;
717                 hdmi_ai->CC02_CT47      = channels - 1;
718                 hdmi_ai->CA             = ca;
719                 hdmi_checksum_audio_infoframe(hdmi_ai);
720         } else if (eld->conn_type == 1) { /* DisplayPort */
721                 struct dp_audio_infoframe *dp_ai = &ai.dp;
722
723                 dp_ai->type             = 0x84;
724                 dp_ai->len              = 0x1b;
725                 dp_ai->ver              = 0x11 << 2;
726                 dp_ai->CC02_CT47        = channels - 1;
727                 dp_ai->CA               = ca;
728         } else {
729                 snd_printd("HDMI: unknown connection type at pin %d\n",
730                             pin_nid);
731                 return;
732         }
733
734         /*
735          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
736          * sizeof(*dp_ai) to avoid partial match/update problems when
737          * the user switches between HDMI/DP monitors.
738          */
739         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
740                                         sizeof(ai))) {
741                 snd_printdd("hdmi_setup_audio_infoframe: "
742                             "pin=%d channels=%d\n",
743                             pin_nid,
744                             channels);
745                 hdmi_setup_channel_mapping(codec, pin_nid, ca);
746                 hdmi_stop_infoframe_trans(codec, pin_nid);
747                 hdmi_fill_audio_infoframe(codec, pin_nid,
748                                             ai.bytes, sizeof(ai));
749                 hdmi_start_infoframe_trans(codec, pin_nid);
750         }
751 }
752
753
754 /*
755  * Unsolicited events
756  */
757
758 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
759
760 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
761 {
762         struct hdmi_spec *spec = codec->spec;
763         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
764         int pin_nid;
765         int pin_idx;
766         struct hda_jack_tbl *jack;
767
768         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
769         if (!jack)
770                 return;
771         pin_nid = jack->nid;
772         jack->jack_dirty = 1;
773
774         _snd_printd(SND_PR_VERBOSE,
775                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
776                 codec->addr, pin_nid,
777                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
778
779         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
780         if (pin_idx < 0)
781                 return;
782
783         hdmi_present_sense(&spec->pins[pin_idx], 1);
784         snd_hda_jack_report_sync(codec);
785 }
786
787 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
788 {
789         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
790         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
791         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
792         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
793
794         printk(KERN_INFO
795                 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
796                 codec->addr,
797                 tag,
798                 subtag,
799                 cp_state,
800                 cp_ready);
801
802         /* TODO */
803         if (cp_state)
804                 ;
805         if (cp_ready)
806                 ;
807 }
808
809
810 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
811 {
812         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
813         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
814
815         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
816                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
817                 return;
818         }
819
820         if (subtag == 0)
821                 hdmi_intrinsic_event(codec, res);
822         else
823                 hdmi_non_intrinsic_event(codec, res);
824 }
825
826 /*
827  * Callbacks
828  */
829
830 /* HBR should be Non-PCM, 8 channels */
831 #define is_hbr_format(format) \
832         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
833
834 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
835                               hda_nid_t pin_nid, u32 stream_tag, int format)
836 {
837         int pinctl;
838         int new_pinctl = 0;
839
840         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
841                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
842                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
843
844                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
845                 if (is_hbr_format(format))
846                         new_pinctl |= AC_PINCTL_EPT_HBR;
847                 else
848                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
849
850                 snd_printdd("hdmi_setup_stream: "
851                             "NID=0x%x, %spinctl=0x%x\n",
852                             pin_nid,
853                             pinctl == new_pinctl ? "" : "new-",
854                             new_pinctl);
855
856                 if (pinctl != new_pinctl)
857                         snd_hda_codec_write(codec, pin_nid, 0,
858                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
859                                             new_pinctl);
860
861         }
862         if (is_hbr_format(format) && !new_pinctl) {
863                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
864                 return -EINVAL;
865         }
866
867         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
868         return 0;
869 }
870
871 /*
872  * HDA PCM callbacks
873  */
874 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
875                          struct hda_codec *codec,
876                          struct snd_pcm_substream *substream)
877 {
878         struct hdmi_spec *spec = codec->spec;
879         struct snd_pcm_runtime *runtime = substream->runtime;
880         int pin_idx, cvt_idx, mux_idx = 0;
881         struct hdmi_spec_per_pin *per_pin;
882         struct hdmi_eld *eld;
883         struct hdmi_spec_per_cvt *per_cvt = NULL;
884         int pinctl;
885
886         /* Validate hinfo */
887         pin_idx = hinfo_to_pin_index(spec, hinfo);
888         if (snd_BUG_ON(pin_idx < 0))
889                 return -EINVAL;
890         per_pin = &spec->pins[pin_idx];
891         eld = &per_pin->sink_eld;
892
893 #ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA
894         if ((codec->preset->id == 0x10de0020) &&
895             (!eld->monitor_present || !eld->lpcm_sad_ready)) {
896                 if (!eld->monitor_present) {
897                         if (tegra_hdmi_setup_hda_presence() < 0) {
898                                 snd_printk(KERN_WARNING
899                                            "HDMI: No HDMI device connected\n");
900                                 return -ENODEV;
901                         }
902                 }
903                 if (!eld->lpcm_sad_ready)
904                         return -ENODEV;
905         }
906 #endif
907
908         /* Dynamically assign converter to stream */
909         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
910                 per_cvt = &spec->cvts[cvt_idx];
911
912                 /* Must not already be assigned */
913                 if (per_cvt->assigned)
914                         continue;
915                 /* Must be in pin's mux's list of converters */
916                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
917                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
918                                 break;
919                 /* Not in mux list */
920                 if (mux_idx == per_pin->num_mux_nids)
921                         continue;
922                 break;
923         }
924         /* No free converters */
925         if (cvt_idx == spec->num_cvts)
926                 return -ENODEV;
927
928         /* Claim converter */
929         per_cvt->assigned = 1;
930         hinfo->nid = per_cvt->cvt_nid;
931
932         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
933                             AC_VERB_SET_CONNECT_SEL,
934                             mux_idx);
935         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
936                                     AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
937         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
938                             AC_VERB_SET_PIN_WIDGET_CONTROL,
939                             pinctl | PIN_OUT);
940         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
941
942         /* Initially set the converter's capabilities */
943         hinfo->channels_min = per_cvt->channels_min;
944         hinfo->channels_max = per_cvt->channels_max;
945         hinfo->rates = per_cvt->rates;
946         hinfo->formats = per_cvt->formats;
947         hinfo->maxbps = per_cvt->maxbps;
948
949         /* Restrict capabilities by ELD if this isn't disabled */
950         if (!static_hdmi_pcm && (eld->eld_valid || eld->lpcm_sad_ready)) {
951                 snd_hdmi_eld_update_pcm_info(eld, hinfo);
952                 if (hinfo->channels_min > hinfo->channels_max ||
953                     !hinfo->rates || !hinfo->formats)
954                         return -ENODEV;
955         }
956
957         /* Store the updated parameters */
958         runtime->hw.channels_min = hinfo->channels_min;
959         runtime->hw.channels_max = hinfo->channels_max;
960         runtime->hw.formats = hinfo->formats;
961         runtime->hw.rates = hinfo->rates;
962
963         snd_pcm_hw_constraint_step(substream->runtime, 0,
964                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
965         return 0;
966 }
967
968 /*
969  * HDA/HDMI auto parsing
970  */
971 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
972 {
973         struct hdmi_spec *spec = codec->spec;
974         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
975         hda_nid_t pin_nid = per_pin->pin_nid;
976
977         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
978                 snd_printk(KERN_WARNING
979                            "HDMI: pin %d wcaps %#x "
980                            "does not support connection list\n",
981                            pin_nid, get_wcaps(codec, pin_nid));
982                 return -EINVAL;
983         }
984
985         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
986                                                         per_pin->mux_nids,
987                                                         HDA_MAX_CONNECTIONS);
988
989         return 0;
990 }
991
992 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
993 {
994         struct hda_codec *codec = per_pin->codec;
995         struct hdmi_eld *eld = &per_pin->sink_eld;
996         hda_nid_t pin_nid = per_pin->pin_nid;
997         /*
998          * Always execute a GetPinSense verb here, even when called from
999          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1000          * response's PD bit is not the real PD value, but indicates that
1001          * the real PD value changed. An older version of the HD-audio
1002          * specification worked this way. Hence, we just ignore the data in
1003          * the unsolicited response to avoid custom WARs.
1004          */
1005         int present = snd_hda_pin_sense(codec, pin_nid);
1006         bool eld_valid = false;
1007
1008         memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1009
1010         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
1011         if (eld->monitor_present)
1012                 eld_valid       = !!(present & AC_PINSENSE_ELDV);
1013
1014         _snd_printd(SND_PR_VERBOSE,
1015                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1016                 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1017
1018         if (eld_valid) {
1019                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1020                         snd_hdmi_show_eld(eld);
1021                 else if (repoll) {
1022                         queue_delayed_work(codec->bus->workq,
1023                                            &per_pin->work,
1024                                            msecs_to_jiffies(300));
1025                 }
1026         }
1027 }
1028
1029 static void hdmi_repoll_eld(struct work_struct *work)
1030 {
1031         struct hdmi_spec_per_pin *per_pin =
1032         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1033
1034         if (per_pin->repoll_count++ > 6)
1035                 per_pin->repoll_count = 0;
1036
1037         hdmi_present_sense(per_pin, per_pin->repoll_count);
1038 }
1039
1040 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1041 {
1042         struct hdmi_spec *spec = codec->spec;
1043         unsigned int caps, config;
1044         int pin_idx;
1045         struct hdmi_spec_per_pin *per_pin;
1046         int err;
1047
1048         caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1049         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1050                 return 0;
1051
1052         config = snd_hda_codec_read(codec, pin_nid, 0,
1053                                 AC_VERB_GET_CONFIG_DEFAULT, 0);
1054         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1055                 return 0;
1056
1057         if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1058                 return -E2BIG;
1059
1060         pin_idx = spec->num_pins;
1061         per_pin = &spec->pins[pin_idx];
1062
1063         per_pin->pin_nid = pin_nid;
1064
1065         err = hdmi_read_pin_conn(codec, pin_idx);
1066         if (err < 0)
1067                 return err;
1068
1069         spec->num_pins++;
1070
1071         return 0;
1072 }
1073
1074 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1075 {
1076         struct hdmi_spec *spec = codec->spec;
1077         int cvt_idx;
1078         struct hdmi_spec_per_cvt *per_cvt;
1079         unsigned int chans;
1080         int err;
1081
1082         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1083                 return -E2BIG;
1084
1085         chans = get_wcaps(codec, cvt_nid);
1086         chans = get_wcaps_channels(chans);
1087
1088         cvt_idx = spec->num_cvts;
1089         per_cvt = &spec->cvts[cvt_idx];
1090
1091         per_cvt->cvt_nid = cvt_nid;
1092         per_cvt->channels_min = 2;
1093         if (chans <= 16)
1094                 per_cvt->channels_max = chans;
1095
1096         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1097                                           &per_cvt->rates,
1098                                           &per_cvt->formats,
1099                                           &per_cvt->maxbps);
1100         if (err < 0)
1101                 return err;
1102
1103         spec->num_cvts++;
1104
1105         return 0;
1106 }
1107
1108 static int hdmi_parse_codec(struct hda_codec *codec)
1109 {
1110         hda_nid_t nid;
1111         int i, nodes;
1112
1113         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1114         if (!nid || nodes < 0) {
1115                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1116                 return -EINVAL;
1117         }
1118
1119         for (i = 0; i < nodes; i++, nid++) {
1120                 unsigned int caps;
1121                 unsigned int type;
1122
1123                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1124                 type = get_wcaps_type(caps);
1125
1126                 if (!(caps & AC_WCAP_DIGITAL))
1127                         continue;
1128
1129                 switch (type) {
1130                 case AC_WID_AUD_OUT:
1131                         hdmi_add_cvt(codec, nid);
1132                         break;
1133                 case AC_WID_PIN:
1134                         hdmi_add_pin(codec, nid);
1135                         break;
1136                 }
1137         }
1138
1139         /*
1140          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1141          * can be lost and presence sense verb will become inaccurate if the
1142          * HDA link is powered off at hot plug or hw initialization time.
1143          */
1144 #ifdef CONFIG_SND_HDA_POWER_SAVE
1145         if ((!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1146               AC_PWRST_EPSS)) && (codec->preset->id != 0x10de0020))
1147                 codec->bus->power_keep_link_on = 1;
1148 #endif
1149
1150         return 0;
1151 }
1152
1153 /*
1154  */
1155 static char *get_hdmi_pcm_name(int idx)
1156 {
1157         static char names[MAX_HDMI_PINS][8];
1158         sprintf(&names[idx][0], "HDMI %d", idx);
1159         return &names[idx][0];
1160 }
1161
1162 /*
1163  * HDMI callbacks
1164  */
1165
1166 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1167                                            struct hda_codec *codec,
1168                                            unsigned int stream_tag,
1169                                            unsigned int format,
1170                                            struct snd_pcm_substream *substream)
1171 {
1172         hda_nid_t cvt_nid = hinfo->nid;
1173         struct hdmi_spec *spec = codec->spec;
1174         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1175         hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1176
1177 #if defined(CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA) && defined(CONFIG_TEGRA_DC)
1178         if (codec->preset->id == 0x10de0020) {
1179                 int err = 0;
1180                 /* Set hdmi:audio freq and source selection*/
1181                 err = tegra_hdmi_setup_audio_freq_source(
1182                                         substream->runtime->rate, HDA);
1183                 if ( err < 0 ) {
1184                         snd_printk(KERN_ERR
1185                                 "Unable to set hdmi audio freq to %d \n",
1186                                                 substream->runtime->rate);
1187                         return err;
1188                 }
1189         }
1190 #endif
1191
1192         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1193
1194         hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1195
1196         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1197 }
1198
1199 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1200                                              struct hda_codec *codec,
1201                                              struct snd_pcm_substream *substream)
1202 {
1203         struct hdmi_spec *spec = codec->spec;
1204         int cvt_idx, pin_idx;
1205         struct hdmi_spec_per_cvt *per_cvt;
1206         struct hdmi_spec_per_pin *per_pin;
1207         int pinctl;
1208
1209         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1210
1211         if (hinfo->nid) {
1212                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1213                 if (snd_BUG_ON(cvt_idx < 0))
1214                         return -EINVAL;
1215                 per_cvt = &spec->cvts[cvt_idx];
1216
1217                 snd_BUG_ON(!per_cvt->assigned);
1218                 per_cvt->assigned = 0;
1219                 hinfo->nid = 0;
1220
1221                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1222                 if (snd_BUG_ON(pin_idx < 0))
1223                         return -EINVAL;
1224                 per_pin = &spec->pins[pin_idx];
1225
1226                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1227                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1228                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1229                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1230                                     pinctl & ~PIN_OUT);
1231                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1232         }
1233
1234         return 0;
1235 }
1236
1237 static const struct hda_pcm_ops generic_ops = {
1238         .open = hdmi_pcm_open,
1239         .prepare = generic_hdmi_playback_pcm_prepare,
1240         .cleanup = generic_hdmi_playback_pcm_cleanup,
1241 };
1242
1243 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1244 {
1245         struct hdmi_spec *spec = codec->spec;
1246         int pin_idx;
1247
1248         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1249                 struct hda_pcm *info;
1250                 struct hda_pcm_stream *pstr;
1251
1252                 info = &spec->pcm_rec[pin_idx];
1253                 info->name = get_hdmi_pcm_name(pin_idx);
1254                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1255
1256                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1257                 pstr->substreams = 1;
1258                 pstr->ops = generic_ops;
1259                 /* other pstr fields are set in open */
1260         }
1261
1262         codec->num_pcms = spec->num_pins;
1263         codec->pcm_info = spec->pcm_rec;
1264
1265         return 0;
1266 }
1267
1268 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1269 {
1270         char hdmi_str[32] = "HDMI/DP";
1271         struct hdmi_spec *spec = codec->spec;
1272         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1273         int pcmdev = spec->pcm_rec[pin_idx].device;
1274
1275         if (pcmdev > 0)
1276                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1277
1278         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1279 }
1280
1281 static int generic_hdmi_build_controls(struct hda_codec *codec)
1282 {
1283         struct hdmi_spec *spec = codec->spec;
1284         int err;
1285         int pin_idx;
1286
1287         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1288                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1289
1290                 err = generic_hdmi_build_jack(codec, pin_idx);
1291                 if (err < 0)
1292                         return err;
1293
1294                 err = snd_hda_create_spdif_out_ctls(codec,
1295                                                     per_pin->pin_nid,
1296                                                     per_pin->mux_nids[0]);
1297                 if (err < 0)
1298                         return err;
1299                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1300
1301                 /* add control for ELD Bytes */
1302                 err = hdmi_create_eld_ctl(codec,
1303                                         pin_idx,
1304                                         spec->pcm_rec[pin_idx].device);
1305
1306                 if (err < 0)
1307                         return err;
1308
1309                 hdmi_present_sense(per_pin, 0);
1310         }
1311
1312         return 0;
1313 }
1314
1315 static int generic_hdmi_init(struct hda_codec *codec)
1316 {
1317         struct hdmi_spec *spec = codec->spec;
1318         int pin_idx;
1319
1320         switch (codec->preset->id) {
1321         case 0x10de0020:
1322                 snd_hda_codec_write(codec, 4, 0,
1323                                     AC_VERB_SET_DIGI_CONVERT_1, 0x11);
1324         default:
1325                 break;
1326         }
1327
1328         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1329                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1330                 hda_nid_t pin_nid = per_pin->pin_nid;
1331                 struct hdmi_eld *eld = &per_pin->sink_eld;
1332
1333                 hdmi_init_pin(codec, pin_nid);
1334                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1335
1336                 per_pin->codec = codec;
1337                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1338                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1339         }
1340         snd_hda_jack_report_sync(codec);
1341         return 0;
1342 }
1343
1344 static void generic_hdmi_free(struct hda_codec *codec)
1345 {
1346         struct hdmi_spec *spec = codec->spec;
1347         int pin_idx;
1348
1349         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1350                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1351                 struct hdmi_eld *eld = &per_pin->sink_eld;
1352
1353                 cancel_delayed_work(&per_pin->work);
1354                 snd_hda_eld_proc_free(codec, eld);
1355         }
1356
1357         flush_workqueue(codec->bus->workq);
1358         kfree(spec);
1359 }
1360
1361 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1362         .init                   = generic_hdmi_init,
1363         .free                   = generic_hdmi_free,
1364         .build_pcms             = generic_hdmi_build_pcms,
1365         .build_controls         = generic_hdmi_build_controls,
1366         .unsol_event            = hdmi_unsol_event,
1367 };
1368
1369 static int patch_generic_hdmi(struct hda_codec *codec)
1370 {
1371         struct hdmi_spec *spec;
1372
1373         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1374         if (spec == NULL)
1375                 return -ENOMEM;
1376
1377         codec->spec = spec;
1378         if (hdmi_parse_codec(codec) < 0) {
1379                 codec->spec = NULL;
1380                 kfree(spec);
1381                 return -EINVAL;
1382         }
1383         codec->patch_ops = generic_hdmi_patch_ops;
1384
1385         init_channel_allocations();
1386
1387         return 0;
1388 }
1389
1390 /*
1391  * Shared non-generic implementations
1392  */
1393
1394 static int simple_playback_build_pcms(struct hda_codec *codec)
1395 {
1396         struct hdmi_spec *spec = codec->spec;
1397         struct hda_pcm *info = spec->pcm_rec;
1398         int i;
1399
1400         codec->num_pcms = spec->num_cvts;
1401         codec->pcm_info = info;
1402
1403         for (i = 0; i < codec->num_pcms; i++, info++) {
1404                 unsigned int chans;
1405                 struct hda_pcm_stream *pstr;
1406
1407                 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1408                 chans = get_wcaps_channels(chans);
1409
1410                 info->name = get_hdmi_pcm_name(i);
1411                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1412                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1413                 snd_BUG_ON(!spec->pcm_playback);
1414                 *pstr = *spec->pcm_playback;
1415                 pstr->nid = spec->cvts[i].cvt_nid;
1416                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1417                         pstr->channels_max = chans;
1418         }
1419
1420         return 0;
1421 }
1422
1423 static int simple_playback_build_controls(struct hda_codec *codec)
1424 {
1425         struct hdmi_spec *spec = codec->spec;
1426         int err;
1427         int i;
1428
1429         for (i = 0; i < codec->num_pcms; i++) {
1430                 err = snd_hda_create_spdif_out_ctls(codec,
1431                                                     spec->cvts[i].cvt_nid,
1432                                                     spec->cvts[i].cvt_nid);
1433                 if (err < 0)
1434                         return err;
1435         }
1436
1437         return 0;
1438 }
1439
1440 static void simple_playback_free(struct hda_codec *codec)
1441 {
1442         struct hdmi_spec *spec = codec->spec;
1443
1444         kfree(spec);
1445 }
1446
1447 /*
1448  * Nvidia specific implementations
1449  */
1450
1451 #define Nv_VERB_SET_Channel_Allocation          0xF79
1452 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1453 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1454 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1455
1456 #define nvhdmi_master_con_nid_7x        0x04
1457 #define nvhdmi_master_pin_nid_7x        0x05
1458
1459 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1460         /*front, rear, clfe, rear_surr */
1461         0x6, 0x8, 0xa, 0xc,
1462 };
1463
1464 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1465         /* set audio protect on */
1466         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1467         /* enable digital output on pin widget */
1468         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1469         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1470         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1471         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1472         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1473         {} /* terminator */
1474 };
1475
1476 #ifdef LIMITED_RATE_FMT_SUPPORT
1477 /* support only the safe format and rate */
1478 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1479 #define SUPPORTED_MAXBPS        16
1480 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1481 #else
1482 /* support all rates and formats */
1483 #define SUPPORTED_RATES \
1484         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1485         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1486          SNDRV_PCM_RATE_192000)
1487 #define SUPPORTED_MAXBPS        24
1488 #define SUPPORTED_FORMATS \
1489         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1490 #endif
1491
1492 static int nvhdmi_7x_init(struct hda_codec *codec)
1493 {
1494         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1495         return 0;
1496 }
1497
1498 static unsigned int channels_2_6_8[] = {
1499         2, 6, 8
1500 };
1501
1502 static unsigned int channels_2_8[] = {
1503         2, 8
1504 };
1505
1506 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1507         .count = ARRAY_SIZE(channels_2_6_8),
1508         .list = channels_2_6_8,
1509         .mask = 0,
1510 };
1511
1512 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1513         .count = ARRAY_SIZE(channels_2_8),
1514         .list = channels_2_8,
1515         .mask = 0,
1516 };
1517
1518 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1519                                     struct hda_codec *codec,
1520                                     struct snd_pcm_substream *substream)
1521 {
1522         struct hdmi_spec *spec = codec->spec;
1523         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1524
1525         switch (codec->preset->id) {
1526         case 0x10de0002:
1527         case 0x10de0003:
1528         case 0x10de0005:
1529         case 0x10de0006:
1530                 hw_constraints_channels = &hw_constraints_2_8_channels;
1531                 break;
1532         case 0x10de0007:
1533                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1534                 break;
1535         default:
1536                 break;
1537         }
1538
1539         if (hw_constraints_channels != NULL) {
1540                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1541                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1542                                 hw_constraints_channels);
1543         } else {
1544                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1545                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1546         }
1547
1548         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1549 }
1550
1551 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1552                                      struct hda_codec *codec,
1553                                      struct snd_pcm_substream *substream)
1554 {
1555         struct hdmi_spec *spec = codec->spec;
1556         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1557 }
1558
1559 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1560                                        struct hda_codec *codec,
1561                                        unsigned int stream_tag,
1562                                        unsigned int format,
1563                                        struct snd_pcm_substream *substream)
1564 {
1565         struct hdmi_spec *spec = codec->spec;
1566         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1567                                              stream_tag, format, substream);
1568 }
1569
1570 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1571                                                     int channels)
1572 {
1573         unsigned int chanmask;
1574         int chan = channels ? (channels - 1) : 1;
1575
1576         switch (channels) {
1577         default:
1578         case 0:
1579         case 2:
1580                 chanmask = 0x00;
1581                 break;
1582         case 4:
1583                 chanmask = 0x08;
1584                 break;
1585         case 6:
1586                 chanmask = 0x0b;
1587                 break;
1588         case 8:
1589                 chanmask = 0x13;
1590                 break;
1591         }
1592
1593         /* Set the audio infoframe channel allocation and checksum fields.  The
1594          * channel count is computed implicitly by the hardware. */
1595         snd_hda_codec_write(codec, 0x1, 0,
1596                         Nv_VERB_SET_Channel_Allocation, chanmask);
1597
1598         snd_hda_codec_write(codec, 0x1, 0,
1599                         Nv_VERB_SET_Info_Frame_Checksum,
1600                         (0x71 - chan - chanmask));
1601 }
1602
1603 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1604                                    struct hda_codec *codec,
1605                                    struct snd_pcm_substream *substream)
1606 {
1607         struct hdmi_spec *spec = codec->spec;
1608         int i;
1609
1610         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1611                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1612         for (i = 0; i < 4; i++) {
1613                 /* set the stream id */
1614                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1615                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1616                 /* set the stream format */
1617                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1618                                 AC_VERB_SET_STREAM_FORMAT, 0);
1619         }
1620
1621         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1622          * streams are disabled. */
1623         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1624
1625         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1626 }
1627
1628 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1629                                      struct hda_codec *codec,
1630                                      unsigned int stream_tag,
1631                                      unsigned int format,
1632                                      struct snd_pcm_substream *substream)
1633 {
1634         int chs;
1635         unsigned int dataDCC2, channel_id;
1636         int i;
1637         struct hdmi_spec *spec = codec->spec;
1638         struct hda_spdif_out *spdif =
1639                 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1640
1641         mutex_lock(&codec->spdif_mutex);
1642
1643         chs = substream->runtime->channels;
1644
1645         dataDCC2 = 0x2;
1646
1647         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1648         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1649                 snd_hda_codec_write(codec,
1650                                 nvhdmi_master_con_nid_7x,
1651                                 0,
1652                                 AC_VERB_SET_DIGI_CONVERT_1,
1653                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1654
1655         /* set the stream id */
1656         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1657                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1658
1659         /* set the stream format */
1660         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1661                         AC_VERB_SET_STREAM_FORMAT, format);
1662
1663         /* turn on again (if needed) */
1664         /* enable and set the channel status audio/data flag */
1665         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1666                 snd_hda_codec_write(codec,
1667                                 nvhdmi_master_con_nid_7x,
1668                                 0,
1669                                 AC_VERB_SET_DIGI_CONVERT_1,
1670                                 spdif->ctls & 0xff);
1671                 snd_hda_codec_write(codec,
1672                                 nvhdmi_master_con_nid_7x,
1673                                 0,
1674                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1675         }
1676
1677         for (i = 0; i < 4; i++) {
1678                 if (chs == 2)
1679                         channel_id = 0;
1680                 else
1681                         channel_id = i * 2;
1682
1683                 /* turn off SPDIF once;
1684                  *otherwise the IEC958 bits won't be updated
1685                  */
1686                 if (codec->spdif_status_reset &&
1687                 (spdif->ctls & AC_DIG1_ENABLE))
1688                         snd_hda_codec_write(codec,
1689                                 nvhdmi_con_nids_7x[i],
1690                                 0,
1691                                 AC_VERB_SET_DIGI_CONVERT_1,
1692                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1693                 /* set the stream id */
1694                 snd_hda_codec_write(codec,
1695                                 nvhdmi_con_nids_7x[i],
1696                                 0,
1697                                 AC_VERB_SET_CHANNEL_STREAMID,
1698                                 (stream_tag << 4) | channel_id);
1699                 /* set the stream format */
1700                 snd_hda_codec_write(codec,
1701                                 nvhdmi_con_nids_7x[i],
1702                                 0,
1703                                 AC_VERB_SET_STREAM_FORMAT,
1704                                 format);
1705                 /* turn on again (if needed) */
1706                 /* enable and set the channel status audio/data flag */
1707                 if (codec->spdif_status_reset &&
1708                 (spdif->ctls & AC_DIG1_ENABLE)) {
1709                         snd_hda_codec_write(codec,
1710                                         nvhdmi_con_nids_7x[i],
1711                                         0,
1712                                         AC_VERB_SET_DIGI_CONVERT_1,
1713                                         spdif->ctls & 0xff);
1714                         snd_hda_codec_write(codec,
1715                                         nvhdmi_con_nids_7x[i],
1716                                         0,
1717                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1718                 }
1719         }
1720
1721         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1722
1723         mutex_unlock(&codec->spdif_mutex);
1724         return 0;
1725 }
1726
1727 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1728         .substreams = 1,
1729         .channels_min = 2,
1730         .channels_max = 8,
1731         .nid = nvhdmi_master_con_nid_7x,
1732         .rates = SUPPORTED_RATES,
1733         .maxbps = SUPPORTED_MAXBPS,
1734         .formats = SUPPORTED_FORMATS,
1735         .ops = {
1736                 .open = simple_playback_pcm_open,
1737                 .close = nvhdmi_8ch_7x_pcm_close,
1738                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1739         },
1740 };
1741
1742 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1743         .substreams = 1,
1744         .channels_min = 2,
1745         .channels_max = 2,
1746         .nid = nvhdmi_master_con_nid_7x,
1747         .rates = SUPPORTED_RATES,
1748         .maxbps = SUPPORTED_MAXBPS,
1749         .formats = SUPPORTED_FORMATS,
1750         .ops = {
1751                 .open = simple_playback_pcm_open,
1752                 .close = simple_playback_pcm_close,
1753                 .prepare = simple_playback_pcm_prepare
1754         },
1755 };
1756
1757 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1758         .build_controls = simple_playback_build_controls,
1759         .build_pcms = simple_playback_build_pcms,
1760         .init = nvhdmi_7x_init,
1761         .free = simple_playback_free,
1762 };
1763
1764 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1765         .build_controls = simple_playback_build_controls,
1766         .build_pcms = simple_playback_build_pcms,
1767         .init = nvhdmi_7x_init,
1768         .free = simple_playback_free,
1769 };
1770
1771 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1772 {
1773         struct hdmi_spec *spec;
1774
1775         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1776         if (spec == NULL)
1777                 return -ENOMEM;
1778
1779         codec->spec = spec;
1780
1781         spec->multiout.num_dacs = 0;  /* no analog */
1782         spec->multiout.max_channels = 2;
1783         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1784         spec->num_cvts = 1;
1785         spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1786         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1787
1788         codec->patch_ops = nvhdmi_patch_ops_2ch;
1789
1790         return 0;
1791 }
1792
1793 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1794 {
1795         struct hdmi_spec *spec;
1796         int err = patch_nvhdmi_2ch(codec);
1797
1798         if (err < 0)
1799                 return err;
1800         spec = codec->spec;
1801         spec->multiout.max_channels = 8;
1802         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1803         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1804
1805         /* Initialize the audio infoframe channel mask and checksum to something
1806          * valid */
1807         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1808
1809         return 0;
1810 }
1811
1812 /*
1813  * ATI-specific implementations
1814  *
1815  * FIXME: we may omit the whole this and use the generic code once after
1816  * it's confirmed to work.
1817  */
1818
1819 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1820 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1821
1822 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1823                                         struct hda_codec *codec,
1824                                         unsigned int stream_tag,
1825                                         unsigned int format,
1826                                         struct snd_pcm_substream *substream)
1827 {
1828         struct hdmi_spec *spec = codec->spec;
1829         int chans = substream->runtime->channels;
1830         int i, err;
1831
1832         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1833                                           substream);
1834         if (err < 0)
1835                 return err;
1836         snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1837                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1838         /* FIXME: XXX */
1839         for (i = 0; i < chans; i++) {
1840                 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1841                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1842                                     (i << 4) | i);
1843         }
1844         return 0;
1845 }
1846
1847 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1848         .substreams = 1,
1849         .channels_min = 2,
1850         .channels_max = 2,
1851         .nid = ATIHDMI_CVT_NID,
1852         .ops = {
1853                 .open = simple_playback_pcm_open,
1854                 .close = simple_playback_pcm_close,
1855                 .prepare = atihdmi_playback_pcm_prepare
1856         },
1857 };
1858
1859 static const struct hda_verb atihdmi_basic_init[] = {
1860         /* enable digital output on pin widget */
1861         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1862         {} /* terminator */
1863 };
1864
1865 static int atihdmi_init(struct hda_codec *codec)
1866 {
1867         struct hdmi_spec *spec = codec->spec;
1868
1869         snd_hda_sequence_write(codec, atihdmi_basic_init);
1870         /* SI codec requires to unmute the pin */
1871         if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1872                 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1873                                     AC_VERB_SET_AMP_GAIN_MUTE,
1874                                     AMP_OUT_UNMUTE);
1875         return 0;
1876 }
1877
1878 static const struct hda_codec_ops atihdmi_patch_ops = {
1879         .build_controls = simple_playback_build_controls,
1880         .build_pcms = simple_playback_build_pcms,
1881         .init = atihdmi_init,
1882         .free = simple_playback_free,
1883 };
1884
1885
1886 static int patch_atihdmi(struct hda_codec *codec)
1887 {
1888         struct hdmi_spec *spec;
1889
1890         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1891         if (spec == NULL)
1892                 return -ENOMEM;
1893
1894         codec->spec = spec;
1895
1896         spec->multiout.num_dacs = 0;      /* no analog */
1897         spec->multiout.max_channels = 2;
1898         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1899         spec->num_cvts = 1;
1900         spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1901         spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1902         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1903
1904         codec->patch_ops = atihdmi_patch_ops;
1905
1906         return 0;
1907 }
1908
1909
1910 /*
1911  * patch entries
1912  */
1913 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1914 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1915 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1916 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1917 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1918 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1919 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1920 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1921 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1922 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1923 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1924 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1925 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1926 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1927 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1928 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1929 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1930 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1931 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1932 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1933 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1934 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1935 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1936 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1937 /* 17 is known to be absent */
1938 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1939 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1940 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1941 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1942 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1943 { .id = 0x10de0020, .name = "Tegra30 HDMI",     .patch = patch_generic_hdmi },
1944 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1945 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1946 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1947 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1948 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1949 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1950 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1951 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1952 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1953 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1954 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1955 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1956 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1957 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1958 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
1959 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1960 {} /* terminator */
1961 };
1962
1963 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1964 MODULE_ALIAS("snd-hda-codec-id:10027919");
1965 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1966 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1967 MODULE_ALIAS("snd-hda-codec-id:10951390");
1968 MODULE_ALIAS("snd-hda-codec-id:10951392");
1969 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1970 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1971 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1972 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1973 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1974 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1975 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1976 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1977 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1978 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1979 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1980 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1981 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1982 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1983 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1984 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1985 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1986 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1987 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1988 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1989 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1990 MODULE_ALIAS("snd-hda-codec-id:10de0020");
1991 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1992 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1993 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1994 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1995 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1996 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1997 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1998 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1999 MODULE_ALIAS("snd-hda-codec-id:80860054");
2000 MODULE_ALIAS("snd-hda-codec-id:80862801");
2001 MODULE_ALIAS("snd-hda-codec-id:80862802");
2002 MODULE_ALIAS("snd-hda-codec-id:80862803");
2003 MODULE_ALIAS("snd-hda-codec-id:80862804");
2004 MODULE_ALIAS("snd-hda-codec-id:80862805");
2005 MODULE_ALIAS("snd-hda-codec-id:80862806");
2006 MODULE_ALIAS("snd-hda-codec-id:80862880");
2007 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2008
2009 MODULE_LICENSE("GPL");
2010 MODULE_DESCRIPTION("HDMI HD-audio codec");
2011 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2012 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2013 MODULE_ALIAS("snd-hda-codec-atihdmi");
2014
2015 static struct hda_codec_preset_list intel_list = {
2016         .preset = snd_hda_preset_hdmi,
2017         .owner = THIS_MODULE,
2018 };
2019
2020 static int __init patch_hdmi_init(void)
2021 {
2022         return snd_hda_add_codec_preset(&intel_list);
2023 }
2024
2025 static void __exit patch_hdmi_exit(void)
2026 {
2027         snd_hda_delete_codec_preset(&intel_list);
2028 }
2029
2030 module_init(patch_hdmi_init)
2031 module_exit(patch_hdmi_exit)