[ALSA] Remove xxx_t typedefs: PCI CS46xx
[linux-2.6.git] / sound / pci / cs46xx / dsp_spos.c
1 /*
2  *   This program is free software; you can redistribute it and/or modify
3  *   it under the terms of the GNU General Public License as published by
4  *   the Free Software Foundation; either version 2 of the License, or
5  *   (at your option) any later version.
6  *
7  *   This program is distributed in the hope that it will be useful,
8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  *   GNU General Public License for more details.
11  *
12  *   You should have received a copy of the GNU General Public License
13  *   along with this program; if not, write to the Free Software
14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
15  *
16  */
17
18 /*
19  * 2002-07 Benny Sjostrand benny@hostmobility.com
20  */
21
22
23 #include <sound/driver.h>
24 #include <asm/io.h>
25 #include <linux/delay.h>
26 #include <linux/pci.h>
27 #include <linux/pm.h>
28 #include <linux/init.h>
29 #include <linux/slab.h>
30 #include <linux/vmalloc.h>
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/info.h>
34 #include <sound/asoundef.h>
35 #include <sound/cs46xx.h>
36
37 #include "cs46xx_lib.h"
38 #include "dsp_spos.h"
39
40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
41                                   struct dsp_scb_descriptor * fg_entry);
42
43 static enum wide_opcode wide_opcodes[] = { 
44         WIDE_FOR_BEGIN_LOOP,
45         WIDE_FOR_BEGIN_LOOP2,
46         WIDE_COND_GOTO_ADDR,
47         WIDE_COND_GOTO_CALL,
48         WIDE_TBEQ_COND_GOTO_ADDR,
49         WIDE_TBEQ_COND_CALL_ADDR,
50         WIDE_TBEQ_NCOND_GOTO_ADDR,
51         WIDE_TBEQ_NCOND_CALL_ADDR,
52         WIDE_TBEQ_COND_GOTO1_ADDR,
53         WIDE_TBEQ_COND_CALL1_ADDR,
54         WIDE_TBEQ_NCOND_GOTOI_ADDR,
55         WIDE_TBEQ_NCOND_CALL1_ADDR
56 };
57
58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
59                                        u32 overlay_begin_address)
60 {
61         unsigned int i = 0, j, nreallocated = 0;
62         u32 hival,loval,address;
63         u32 mop_operands,mop_type,wide_op;
64         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
65
66         snd_assert( ((size % 2) == 0), return -EINVAL);
67   
68         while (i < size) {
69                 loval = data[i++];
70                 hival = data[i++];
71
72                 if (ins->code.offset > 0) {
73                         mop_operands = (hival >> 6) & 0x03fff;
74                         mop_type = mop_operands >> 10;
75       
76                         /* check for wide type instruction */
77                         if (mop_type == 0 &&
78                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
79                             (mop_operands & WIDE_INSTR_MASK) != 0) {
80                                 wide_op = loval & 0x7f;
81                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
82                                         if (wide_opcodes[j] == wide_op) {
83                                                 /* need to reallocate instruction */
84                                                 address  = (hival & 0x00FFF) << 5;
85                                                 address |=  loval >> 15;
86             
87                                                 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
88             
89                                                 if ( !(address & 0x8000) ) {
90                                                         address += (ins->code.offset / 2) - overlay_begin_address;
91                                                 } else {
92                                                         snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
93                                                 }
94             
95                                                 hival &= 0xFF000;
96                                                 loval &= 0x07FFF;
97             
98                                                 hival |= ( (address >> 5)  & 0x00FFF);
99                                                 loval |= ( (address << 15) & 0xF8000);
100             
101                                                 address  = (hival & 0x00FFF) << 5;
102                                                 address |=  loval >> 15;
103             
104                                                 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);            
105                                                 nreallocated ++;
106                                         } /* wide_opcodes[j] == wide_op */
107                                 } /* for */
108                         } /* mod_type == 0 ... */
109                 } /* ins->code.offset > 0 */
110
111                 ins->code.data[ins->code.size++] = loval;
112                 ins->code.data[ins->code.size++] = hival;
113         }
114
115         snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
116         return nreallocated;
117 }
118
119 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
120 {
121         int i;
122         for (i = 0;i < module->nsegments; ++i) {
123                 if (module->segments[i].segment_type == seg_type) {
124                         return (module->segments + i);
125                 }
126         }
127
128         return NULL;
129 };
130
131 static int find_free_symbol_index (struct dsp_spos_instance * ins)
132 {
133         int index = ins->symbol_table.nsymbols,i;
134
135         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
136                 if (ins->symbol_table.symbols[i].deleted) {
137                         index = i;
138                         break;
139                 }
140         }
141
142         return index;
143 }
144
145 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
146 {
147         int i;
148         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
149
150         if (module->symbol_table.nsymbols > 0) {
151                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
152                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
153                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
154                 }
155         }
156
157         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
158                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
159                         snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
160                         return -ENOMEM;
161                 }
162
163
164                 if (cs46xx_dsp_lookup_symbol(chip,
165                                              module->symbol_table.symbols[i].symbol_name,
166                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
167
168                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
169                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
170                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
171                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
172
173                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index) 
174                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
175
176                         ins->symbol_table.nsymbols++;
177                 } else {
178           /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
179                              module->symbol_table.symbols[i].symbol_name); */
180                 }
181         }
182
183         return 0;
184 }
185
186 static struct dsp_symbol_entry *
187 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
188 {
189         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
190         struct dsp_symbol_entry * symbol = NULL;
191         int index;
192
193         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
194                 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
195                 return NULL;
196         }
197   
198         if (cs46xx_dsp_lookup_symbol(chip,
199                                      symbol_name,
200                                      type) != NULL) {
201                 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
202                 return NULL;
203         }
204
205         index = find_free_symbol_index (ins);
206
207         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
208         ins->symbol_table.symbols[index].address = address;
209         ins->symbol_table.symbols[index].symbol_type = type;
210         ins->symbol_table.symbols[index].module = NULL;
211         ins->symbol_table.symbols[index].deleted = 0;
212         symbol = (ins->symbol_table.symbols + index);
213
214         if (index > ins->symbol_table.highest_frag_index) 
215                 ins->symbol_table.highest_frag_index = index;
216
217         if (index == ins->symbol_table.nsymbols)
218                 ins->symbol_table.nsymbols++; /* no frag. in list */
219
220         return symbol;
221 }
222
223 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
224 {
225         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
226
227         if (ins == NULL) 
228                 return NULL;
229
230         /* better to use vmalloc for this big table */
231         ins->symbol_table.nsymbols = 0;
232         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
233                                             DSP_MAX_SYMBOLS);
234         ins->symbol_table.highest_frag_index = 0;
235
236         if (ins->symbol_table.symbols == NULL) {
237                 cs46xx_dsp_spos_destroy(chip);
238                 return NULL;
239         }
240
241         ins->code.offset = 0;
242         ins->code.size = 0;
243         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
244
245         if (ins->code.data == NULL) {
246                 cs46xx_dsp_spos_destroy(chip);
247                 return NULL;
248         }
249
250         ins->nscb = 0;
251         ins->ntask = 0;
252
253         ins->nmodules = 0;
254         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
255
256         if (ins->modules == NULL) {
257                 cs46xx_dsp_spos_destroy(chip);
258                 return NULL;
259         }
260
261         /* default SPDIF input sample rate
262            to 48000 khz */
263         ins->spdif_in_sample_rate = 48000;
264
265         /* maximize volume */
266         ins->dac_volume_right = 0x8000;
267         ins->dac_volume_left = 0x8000;
268         ins->spdif_input_volume_right = 0x8000;
269         ins->spdif_input_volume_left = 0x8000;
270
271         /* set left and right validity bits and
272            default channel status */
273         ins->spdif_csuv_default = 
274                 ins->spdif_csuv_stream =  
275          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
276          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
277          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
278          /* left and right validity bits */ (1 << 13) | (1 << 12);
279
280         return ins;
281 }
282
283 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
284 {
285         int i;
286         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
287
288         snd_assert(ins != NULL, return);
289
290         down(&chip->spos_mutex);
291         for (i = 0; i < ins->nscb; ++i) {
292                 if (ins->scbs[i].deleted) continue;
293
294                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
295         }
296
297         kfree(ins->code.data);
298         vfree(ins->symbol_table.symbols);
299         kfree(ins->modules);
300         kfree(ins);
301         up(&chip->spos_mutex);
302 }
303
304 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
305 {
306         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
307         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
308         struct dsp_segment_desc * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER);
309         struct dsp_segment_desc * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE);
310         u32 doffset, dsize;
311
312         if (ins->nmodules == DSP_MAX_MODULES - 1) {
313                 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
314                 return -ENOMEM;
315         }
316
317         snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
318   
319         if (ins->nmodules == 0) {
320                 snd_printdd("dsp_spos: clearing parameter area\n");
321                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
322         }
323   
324         if (parameter == NULL) {
325                 snd_printdd("dsp_spos: module got no parameter segment\n");
326         } else {
327                 if (ins->nmodules > 0) {
328                         snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n");
329                 }
330
331                 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
332                 dsize   = parameter->size * 4;
333
334                 snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
335                             doffset,doffset + dsize);
336
337                 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
338                         snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n");
339                         return -EINVAL;
340                 }
341         }
342
343         if (ins->nmodules == 0) {
344                 snd_printdd("dsp_spos: clearing sample area\n");
345                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
346         }
347
348         if (sample == NULL) {
349                 snd_printdd("dsp_spos: module got no sample segment\n");
350         } else {
351                 if (ins->nmodules > 0) {
352                         snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n");
353                 }
354
355                 doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
356                 dsize   =  sample->size * 4;
357
358                 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
359                             doffset,doffset + dsize);
360
361                 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
362                         snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
363                         return -EINVAL;
364                 }
365         }
366
367
368         if (ins->nmodules == 0) {
369                 snd_printdd("dsp_spos: clearing code area\n");
370                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
371         }
372
373         if (code == NULL) {
374                 snd_printdd("dsp_spos: module got no code segment\n");
375         } else {
376                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
377                         snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
378                         return -ENOMEM;
379                 }
380
381                 module->load_address = ins->code.offset;
382                 module->overlay_begin_address = 0x000;
383
384                 /* if module has a code segment it must have
385                    symbol table */
386                 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM);
387                 if (add_symbols(chip,module)) {
388                         snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
389                         return -ENOMEM;
390                 }
391     
392                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
393                 dsize   = code->size * 4;
394                 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
395                             doffset,doffset + dsize);   
396
397                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
398
399                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
400                         snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
401                         return -EINVAL;
402                 }
403
404                 ins->code.offset += code->size;
405         }
406
407         /* NOTE: module segments and symbol table must be
408            statically allocated. Case that module data is
409            not generated by the ospparser */
410         ins->modules[ins->nmodules] = *module;
411         ins->nmodules++;
412
413         return 0;
414 }
415
416 struct dsp_symbol_entry *
417 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
418 {
419         int i;
420         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
421
422         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
423
424                 if (ins->symbol_table.symbols[i].deleted)
425                         continue;
426
427                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
428                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
429                         return (ins->symbol_table.symbols + i);
430                 }
431         }
432
433 #if 0
434         printk ("dsp_spos: symbol <%s> type %02x not found\n",
435                 symbol_name,symbol_type);
436 #endif
437
438         return NULL;
439 }
440
441
442 static struct dsp_symbol_entry *
443 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
444 {
445         int i;
446         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
447
448         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
449
450                 if (ins->symbol_table.symbols[i].deleted)
451                         continue;
452
453                 if (ins->symbol_table.symbols[i].address == address &&
454                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
455                         return (ins->symbol_table.symbols + i);
456                 }
457         }
458
459
460         return NULL;
461 }
462
463
464 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
465                                                struct snd_info_buffer *buffer)
466 {
467         struct snd_cs46xx *chip = entry->private_data;
468         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
469         int i;
470
471         snd_iprintf(buffer, "SYMBOLS:\n");
472         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
473                 char *module_str = "system";
474
475                 if (ins->symbol_table.symbols[i].deleted)
476                         continue;
477
478                 if (ins->symbol_table.symbols[i].module != NULL) {
479                         module_str = ins->symbol_table.symbols[i].module->module_name;
480                 }
481
482     
483                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
484                             ins->symbol_table.symbols[i].address,
485                             ins->symbol_table.symbols[i].symbol_type,
486                             ins->symbol_table.symbols[i].symbol_name,
487                             module_str);    
488         }
489 }
490
491
492 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
493                                           struct snd_info_buffer *buffer)
494 {
495         struct snd_cs46xx *chip = entry->private_data;
496         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
497         int i,j;
498
499         down(&chip->spos_mutex);
500         snd_iprintf(buffer, "MODULES:\n");
501         for ( i = 0; i < ins->nmodules; ++i ) {
502                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
503                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
504                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
505
506                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
507                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
508                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
509                                     desc->segment_type,desc->offset, desc->size);
510                 }
511         }
512         up(&chip->spos_mutex);
513 }
514
515 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
516                                             struct snd_info_buffer *buffer)
517 {
518         struct snd_cs46xx *chip = entry->private_data;
519         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
520         int i, j, col;
521         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
522
523         down(&chip->spos_mutex);
524         snd_iprintf(buffer, "TASK TREES:\n");
525         for ( i = 0; i < ins->ntask; ++i) {
526                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
527
528                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
529                         u32 val;
530                         if (col == 4) {
531                                 snd_iprintf(buffer,"\n");
532                                 col = 0;
533                         }
534                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
535                         snd_iprintf(buffer,"%08x ",val);
536                 }
537         }
538
539         snd_iprintf(buffer,"\n");  
540         up(&chip->spos_mutex);
541 }
542
543 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
544                                       struct snd_info_buffer *buffer)
545 {
546         struct snd_cs46xx *chip = entry->private_data;
547         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
548         int i;
549
550         down(&chip->spos_mutex);
551         snd_iprintf(buffer, "SCB's:\n");
552         for ( i = 0; i < ins->nscb; ++i) {
553                 if (ins->scbs[i].deleted)
554                         continue;
555                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
556
557                 if (ins->scbs[i].parent_scb_ptr != NULL) {
558                         snd_iprintf(buffer,"parent [%s:%04x] ", 
559                                     ins->scbs[i].parent_scb_ptr->scb_name,
560                                     ins->scbs[i].parent_scb_ptr->address);
561                 } else snd_iprintf(buffer,"parent [none] ");
562
563                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
564                             ins->scbs[i].sub_list_ptr->scb_name,
565                             ins->scbs[i].sub_list_ptr->address,
566                             ins->scbs[i].next_scb_ptr->scb_name,
567                             ins->scbs[i].next_scb_ptr->address,
568                             ins->scbs[i].task_entry->symbol_name,
569                             ins->scbs[i].task_entry->address);
570         }
571
572         snd_iprintf(buffer,"\n");
573         up(&chip->spos_mutex);
574 }
575
576 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
577                                                  struct snd_info_buffer *buffer)
578 {
579         struct snd_cs46xx *chip = entry->private_data;
580         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
581         unsigned int i, col = 0;
582         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
583         struct dsp_symbol_entry * symbol; 
584
585         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
586                 if (col == 4) {
587                         snd_iprintf(buffer,"\n");
588                         col = 0;
589                 }
590
591                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
592                         col = 0;
593                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
594                 }
595
596                 if (col == 0) {
597                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
598                 }
599
600                 snd_iprintf(buffer,"%08X ",readl(dst + i));
601         }
602 }
603
604 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
605                                               struct snd_info_buffer *buffer)
606 {
607         struct snd_cs46xx *chip = entry->private_data;
608         int i,col = 0;
609         void __iomem *dst = chip->region.idx[2].remap_addr;
610
611         snd_iprintf(buffer,"PCMREADER:\n");
612         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
613                 if (col == 4) {
614                         snd_iprintf(buffer,"\n");
615                         col = 0;
616                 }
617
618                 if (col == 0) {
619                         snd_iprintf(buffer, "%04X ",i);
620                 }
621
622                 snd_iprintf(buffer,"%08X ",readl(dst + i));
623         }
624
625         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
626
627         col = 0;
628         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
629                 if (col == 4) {
630                         snd_iprintf(buffer,"\n");
631                         col = 0;
632                 }
633
634                 if (col == 0) {
635                         snd_iprintf(buffer, "%04X ",i);
636                 }
637
638                 snd_iprintf(buffer,"%08X ",readl(dst + i));
639         }
640
641         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
642         col = 0;
643         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
644                 if (col == 4) {
645                         snd_iprintf(buffer,"\n");
646                         col = 0;
647                 }
648                 
649                 if (col == 0) {
650                         snd_iprintf(buffer, "%04X ",i);
651                 }
652
653                 snd_iprintf(buffer,"%08X ",readl(dst + i));
654         }
655
656
657         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
658         col = 0;
659         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
660                 if (col == 4) {
661                         snd_iprintf(buffer,"\n");
662                         col = 0;
663                 }
664
665                 if (col == 0) {
666                         snd_iprintf(buffer, "%04X ",i);
667                 }
668
669                 snd_iprintf(buffer,"%08X ",readl(dst + i));
670         }
671
672         snd_iprintf(buffer,"\n...\n");
673         col = 0;
674
675         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
676                 if (col == 4) {
677                         snd_iprintf(buffer,"\n");
678                         col = 0;
679                 }
680
681                 if (col == 0) {
682                         snd_iprintf(buffer, "%04X ",i);
683                 }
684
685                 snd_iprintf(buffer,"%08X ",readl(dst + i));
686         }
687
688
689         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
690         col = 0;
691         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
692                 if (col == 4) {
693                         snd_iprintf(buffer,"\n");
694                         col = 0;
695                 }
696
697                 if (col == 0) {
698                         snd_iprintf(buffer, "%04X ",i);
699                 }
700
701                 snd_iprintf(buffer,"%08X ",readl(dst + i));
702         }
703
704         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
705         col = 0;
706         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
707                 if (col == 4) {
708                         snd_iprintf(buffer,"\n");
709                         col = 0;
710                 }
711
712                 if (col == 0) {
713                         snd_iprintf(buffer, "%04X ",i);
714                 }
715
716                 snd_iprintf(buffer,"%08X ",readl(dst + i));
717         }
718 #if 0
719         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
720         col = 0;
721         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
722                 if (col == 4) {
723                         snd_iprintf(buffer,"\n");
724                         col = 0;
725                 }
726
727                 if (col == 0) {
728                         snd_iprintf(buffer, "%04X ",i);
729                 }
730
731                 snd_iprintf(buffer,"%08X ",readl(dst + i));
732         }
733 #endif
734
735         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
736         col = 0;
737         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
738                 if (col == 4) {
739                         snd_iprintf(buffer,"\n");
740                         col = 0;
741                 }
742
743                 if (col == 0) {
744                         snd_iprintf(buffer, "%04X ",i);
745                 }
746                 
747                 snd_iprintf(buffer,"%08X ",readl(dst + i));
748         }
749         snd_iprintf(buffer,"\n");
750 }
751
752 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
753 {
754         struct snd_info_entry *entry;
755         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
756         int i;
757
758         ins->snd_card = card;
759
760         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
761                 entry->content = SNDRV_INFO_CONTENT_TEXT;
762                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
763                 entry->c.text.read_size = 512;
764       
765                 if (snd_info_register(entry) < 0) {
766                         snd_info_free_entry(entry);
767                         entry = NULL;
768                 }
769         }
770
771         ins->proc_dsp_dir = entry;
772
773         if (!ins->proc_dsp_dir)
774                 return -ENOMEM;
775
776         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
777                 entry->content = SNDRV_INFO_CONTENT_TEXT;
778                 entry->private_data = chip;
779                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
780                 entry->c.text.read_size = 512;
781                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
782                 if (snd_info_register(entry) < 0) {
783                         snd_info_free_entry(entry);
784                         entry = NULL;
785                 }
786         }
787         ins->proc_sym_info_entry = entry;
788     
789         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
790                 entry->content = SNDRV_INFO_CONTENT_TEXT;
791                 entry->private_data = chip;
792                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
793                 entry->c.text.read_size = 512;
794                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
795                 if (snd_info_register(entry) < 0) {
796                         snd_info_free_entry(entry);
797                         entry = NULL;
798                 }
799         }
800         ins->proc_modules_info_entry = entry;
801
802         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
803                 entry->content = SNDRV_INFO_CONTENT_TEXT;
804                 entry->private_data = chip;
805                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
806                 entry->c.text.read_size = 512;
807                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
808                 if (snd_info_register(entry) < 0) {
809                         snd_info_free_entry(entry);
810                         entry = NULL;
811                 }
812         }
813         ins->proc_parameter_dump_info_entry = entry;
814
815         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
816                 entry->content = SNDRV_INFO_CONTENT_TEXT;
817                 entry->private_data = chip;
818                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
819                 entry->c.text.read_size = 512;
820                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
821                 if (snd_info_register(entry) < 0) {
822                         snd_info_free_entry(entry);
823                         entry = NULL;
824                 }
825         }
826         ins->proc_sample_dump_info_entry = entry;
827
828         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
829                 entry->content = SNDRV_INFO_CONTENT_TEXT;
830                 entry->private_data = chip;
831                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
832                 entry->c.text.read_size = 512;
833                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
834                 if (snd_info_register(entry) < 0) {
835                         snd_info_free_entry(entry);
836                         entry = NULL;
837                 }
838         }
839         ins->proc_task_info_entry = entry;
840
841         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
842                 entry->content = SNDRV_INFO_CONTENT_TEXT;
843                 entry->private_data = chip;
844                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
845                 entry->c.text.read_size = 1024;
846                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
847                 if (snd_info_register(entry) < 0) {
848                         snd_info_free_entry(entry);
849                         entry = NULL;
850                 }
851         }
852         ins->proc_scb_info_entry = entry;
853
854         down(&chip->spos_mutex);
855         /* register/update SCB's entries on proc */
856         for (i = 0; i < ins->nscb; ++i) {
857                 if (ins->scbs[i].deleted) continue;
858
859                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
860         }
861         up(&chip->spos_mutex);
862
863         return 0;
864 }
865
866 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
867 {
868         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
869         int i;
870
871         if (ins->proc_sym_info_entry) {
872                 snd_info_unregister(ins->proc_sym_info_entry);
873                 ins->proc_sym_info_entry = NULL;
874         }
875   
876         if (ins->proc_modules_info_entry) {
877                 snd_info_unregister(ins->proc_modules_info_entry);
878                 ins->proc_modules_info_entry = NULL;
879         }
880  
881         if (ins->proc_parameter_dump_info_entry) {
882                 snd_info_unregister(ins->proc_parameter_dump_info_entry);
883                 ins->proc_parameter_dump_info_entry = NULL;
884         }
885   
886         if (ins->proc_sample_dump_info_entry) {
887                 snd_info_unregister(ins->proc_sample_dump_info_entry);
888                 ins->proc_sample_dump_info_entry = NULL;
889         }
890   
891         if (ins->proc_scb_info_entry) {
892                 snd_info_unregister(ins->proc_scb_info_entry);
893                 ins->proc_scb_info_entry = NULL;
894         }
895   
896         if (ins->proc_task_info_entry) {
897                 snd_info_unregister(ins->proc_task_info_entry);
898                 ins->proc_task_info_entry = NULL;
899         }
900
901         down(&chip->spos_mutex);
902         for (i = 0; i < ins->nscb; ++i) {
903                 if (ins->scbs[i].deleted) continue;
904                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
905         }
906         up(&chip->spos_mutex);
907
908         if (ins->proc_dsp_dir) {
909                 snd_info_unregister (ins->proc_dsp_dir);
910                 ins->proc_dsp_dir = NULL;
911         }
912
913         return 0;
914 }
915
916 static int debug_tree;
917 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
918                                    u32  dest, int size)
919 {
920         void __iomem *spdst = chip->region.idx[1].remap_addr + 
921                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
922         int i;
923
924         for (i = 0; i < size; ++i) {
925                 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
926                 writel(task_data[i],spdst);
927                 spdst += sizeof(u32);
928         }
929 }
930
931 static int debug_scb;
932 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
933 {
934         void __iomem *spdst = chip->region.idx[1].remap_addr + 
935                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
936         int i;
937
938         for (i = 0; i < 0x10; ++i) {
939                 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
940                 writel(scb_data[i],spdst);
941                 spdst += sizeof(u32);
942         }
943 }
944
945 static int find_free_scb_index (struct dsp_spos_instance * ins)
946 {
947         int index = ins->nscb, i;
948
949         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
950                 if (ins->scbs[i].deleted) {
951                         index = i;
952                         break;
953                 }
954         }
955
956         return index;
957 }
958
959 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
960 {
961         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
962         struct dsp_scb_descriptor * desc = NULL;
963         int index;
964
965         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
966                 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
967                 return NULL;
968         }
969
970         index = find_free_scb_index (ins);
971
972         strcpy(ins->scbs[index].scb_name, name);
973         ins->scbs[index].address = dest;
974         ins->scbs[index].index = index;
975         ins->scbs[index].proc_info = NULL;
976         ins->scbs[index].ref_count = 1;
977         ins->scbs[index].deleted = 0;
978         spin_lock_init(&ins->scbs[index].lock);
979
980         desc = (ins->scbs + index);
981         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
982
983         if (index > ins->scb_highest_frag_index)
984                 ins->scb_highest_frag_index = index;
985
986         if (index == ins->nscb)
987                 ins->nscb++;
988
989         return desc;
990 }
991
992 static struct dsp_task_descriptor *
993 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
994 {
995         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
996         struct dsp_task_descriptor * desc = NULL;
997
998         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
999                 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
1000                 return NULL;
1001         }
1002
1003         strcpy(ins->tasks[ins->ntask].task_name,name);
1004         ins->tasks[ins->ntask].address = dest;
1005         ins->tasks[ins->ntask].size = size;
1006
1007         /* quick find in list */
1008         ins->tasks[ins->ntask].index = ins->ntask;
1009         desc = (ins->tasks + ins->ntask);
1010         ins->ntask++;
1011
1012         add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1013         return desc;
1014 }
1015
1016 struct dsp_scb_descriptor *
1017 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1018 {
1019         struct dsp_scb_descriptor * desc;
1020
1021         desc = _map_scb (chip,name,dest);
1022         if (desc) {
1023                 _dsp_create_scb(chip,scb_data,dest);
1024         } else {
1025                 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1026         }
1027
1028         return desc;
1029 }
1030
1031
1032 static struct dsp_task_descriptor *
1033 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1034                              u32 dest, int size)
1035 {
1036         struct dsp_task_descriptor * desc;
1037
1038         desc = _map_task_tree (chip,name,dest,size);
1039         if (desc) {
1040                 _dsp_create_task_tree(chip,task_data,dest,size);
1041         } else {
1042                 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1043         }
1044
1045         return desc;
1046 }
1047
1048 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1049 {
1050         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1051         struct dsp_symbol_entry * fg_task_tree_header_code;
1052         struct dsp_symbol_entry * task_tree_header_code;
1053         struct dsp_symbol_entry * task_tree_thread;
1054         struct dsp_symbol_entry * null_algorithm;
1055         struct dsp_symbol_entry * magic_snoop_task;
1056
1057         struct dsp_scb_descriptor * timing_master_scb;
1058         struct dsp_scb_descriptor * codec_out_scb;
1059         struct dsp_scb_descriptor * codec_in_scb;
1060         struct dsp_scb_descriptor * src_task_scb;
1061         struct dsp_scb_descriptor * master_mix_scb;
1062         struct dsp_scb_descriptor * rear_mix_scb;
1063         struct dsp_scb_descriptor * record_mix_scb;
1064         struct dsp_scb_descriptor * write_back_scb;
1065         struct dsp_scb_descriptor * vari_decimate_scb;
1066         struct dsp_scb_descriptor * rear_codec_out_scb;
1067         struct dsp_scb_descriptor * clfe_codec_out_scb;
1068         struct dsp_scb_descriptor * magic_snoop_scb;
1069         
1070         int fifo_addr, fifo_span, valid_slots;
1071
1072         static struct dsp_spos_control_block sposcb = {
1073                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1074                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1075                 /* 2 */ DSP_SPOS_DC,0,
1076                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1077                 /* 4 */ 0,0,
1078                 /* 5 */ DSP_SPOS_UU,0,
1079                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1080                 /* 7 */ 0,0,
1081                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1082                 /* 9 */ 0,
1083                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1084                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1085                 /* C */ DSP_SPOS_DC_DC,
1086                 /* D */ DSP_SPOS_DC_DC,
1087                 /* E */ DSP_SPOS_DC_DC,
1088                 /* F */ DSP_SPOS_DC_DC
1089         };
1090
1091         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1092
1093         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1094         if (null_algorithm == NULL) {
1095                 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1096                 return -EIO;
1097         }
1098
1099         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);  
1100         if (fg_task_tree_header_code == NULL) {
1101                 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1102                 return -EIO;
1103         }
1104
1105         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);  
1106         if (task_tree_header_code == NULL) {
1107                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1108                 return -EIO;
1109         }
1110   
1111         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1112         if (task_tree_thread == NULL) {
1113                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1114                 return -EIO;
1115         }
1116
1117         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1118         if (magic_snoop_task == NULL) {
1119                 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1120                 return -EIO;
1121         }
1122   
1123         {
1124                 /* create the null SCB */
1125                 static struct dsp_generic_scb null_scb = {
1126                         { 0, 0, 0, 0 },
1127                         { 0, 0, 0, 0, 0 },
1128                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1129                         0, 0, 0, 0, 0,
1130                         {
1131                                 0,0,
1132                                 0,0,
1133                         }
1134                 };
1135
1136                 null_scb.entry_point = null_algorithm->address;
1137                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1138                 ins->the_null_scb->task_entry = null_algorithm;
1139                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1140                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1141                 ins->the_null_scb->parent_scb_ptr = NULL;
1142                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1143         }
1144
1145         {
1146                 /* setup foreground task tree */
1147                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1148                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1149                           DSP_SPOS_DC_DC,
1150                           DSP_SPOS_DC_DC,
1151                           0x0000,DSP_SPOS_DC,
1152                           DSP_SPOS_DC, DSP_SPOS_DC,
1153                           DSP_SPOS_DC_DC,
1154                           DSP_SPOS_DC_DC,
1155                           DSP_SPOS_DC_DC,
1156                           DSP_SPOS_DC,DSP_SPOS_DC },
1157     
1158                         {
1159                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR, 
1160                                 0,
1161                                 FG_TASK_HEADER_ADDR + TCBData,                  
1162                         },
1163
1164                         {    
1165                                 4,0,
1166                                 1,0,
1167                                 2,SPOSCB_ADDR + HFGFlags,
1168                                 0,0,
1169                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1170                         },
1171
1172                         {
1173                                 DSP_SPOS_DC,0,
1174                                 DSP_SPOS_DC,DSP_SPOS_DC,
1175                                 DSP_SPOS_DC,DSP_SPOS_DC,
1176                                 DSP_SPOS_DC,DSP_SPOS_DC,
1177                                 DSP_SPOS_DC,DSP_SPOS_DC,
1178                                 DSP_SPOS_DCDC,
1179                                 DSP_SPOS_UU,1,
1180                                 DSP_SPOS_DCDC,
1181                                 DSP_SPOS_DCDC,
1182                                 DSP_SPOS_DCDC,
1183                                 DSP_SPOS_DCDC,
1184                                 DSP_SPOS_DCDC,
1185                                 DSP_SPOS_DCDC,
1186                                 DSP_SPOS_DCDC,
1187                                 DSP_SPOS_DCDC,
1188                                 DSP_SPOS_DCDC,
1189                                 DSP_SPOS_DCDC,
1190                                 DSP_SPOS_DCDC,
1191                                 DSP_SPOS_DCDC,
1192                                 DSP_SPOS_DCDC,
1193                                 DSP_SPOS_DCDC,
1194                                 DSP_SPOS_DCDC,
1195                                 DSP_SPOS_DCDC,
1196                                 DSP_SPOS_DCDC,
1197                                 DSP_SPOS_DCDC,
1198                                 DSP_SPOS_DCDC,
1199                                 DSP_SPOS_DCDC,
1200                                 DSP_SPOS_DCDC,
1201                                 DSP_SPOS_DCDC,
1202                                 DSP_SPOS_DCDC,
1203                                 DSP_SPOS_DCDC,
1204                                 DSP_SPOS_DCDC,
1205                                 DSP_SPOS_DCDC,
1206                                 DSP_SPOS_DCDC,
1207                                 DSP_SPOS_DCDC 
1208                         },                                               
1209                         { 
1210                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1211                                 0,0
1212                         }
1213                 };
1214
1215                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1216                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1217                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1218         }
1219
1220
1221         {
1222                 /* setup foreground task tree */
1223                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1224                         { DSP_SPOS_DC_DC,
1225                           DSP_SPOS_DC_DC,
1226                           DSP_SPOS_DC_DC,
1227                           DSP_SPOS_DC, DSP_SPOS_DC,
1228                           DSP_SPOS_DC, DSP_SPOS_DC,
1229                           DSP_SPOS_DC_DC,
1230                           DSP_SPOS_DC_DC,
1231                           DSP_SPOS_DC_DC,
1232                           DSP_SPOS_DC,DSP_SPOS_DC },
1233     
1234                         {
1235                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1236                                 0,
1237                                 BG_TREE_SCB_ADDR + TCBData,
1238                         },
1239
1240                         {    
1241                                 9999,0,
1242                                 0,1,
1243                                 0,SPOSCB_ADDR + HFGFlags,
1244                                 0,0,
1245                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1246                         },
1247
1248                         {
1249                                 DSP_SPOS_DC,0,
1250                                 DSP_SPOS_DC,DSP_SPOS_DC,
1251                                 DSP_SPOS_DC,DSP_SPOS_DC,
1252                                 DSP_SPOS_DC,DSP_SPOS_DC,
1253                                 DSP_SPOS_DC,DSP_SPOS_DC,
1254                                 DSP_SPOS_DCDC,
1255                                 DSP_SPOS_UU,1,
1256                                 DSP_SPOS_DCDC,
1257                                 DSP_SPOS_DCDC,
1258                                 DSP_SPOS_DCDC,
1259                                 DSP_SPOS_DCDC,
1260                                 DSP_SPOS_DCDC,
1261                                 DSP_SPOS_DCDC,
1262                                 DSP_SPOS_DCDC,
1263                                 DSP_SPOS_DCDC,
1264                                 DSP_SPOS_DCDC,
1265                                 DSP_SPOS_DCDC,
1266                                 DSP_SPOS_DCDC,
1267                                 DSP_SPOS_DCDC,
1268                                 DSP_SPOS_DCDC,
1269                                 DSP_SPOS_DCDC,
1270                                 DSP_SPOS_DCDC,
1271                                 DSP_SPOS_DCDC,
1272                                 DSP_SPOS_DCDC,
1273                                 DSP_SPOS_DCDC,
1274                                 DSP_SPOS_DCDC,
1275                                 DSP_SPOS_DCDC,
1276                                 DSP_SPOS_DCDC,
1277                                 DSP_SPOS_DCDC,
1278                                 DSP_SPOS_DCDC,
1279                                 DSP_SPOS_DCDC,
1280                                 DSP_SPOS_DCDC,
1281                                 DSP_SPOS_DCDC,
1282                                 DSP_SPOS_DCDC,
1283                                 DSP_SPOS_DCDC 
1284                         },                                               
1285                         { 
1286                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1287                                 0,0
1288                         }
1289                 };
1290
1291                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1292                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1293                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1294         }
1295
1296         /* create timing master SCB */
1297         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1298
1299         /* create the CODEC output task */
1300         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1301                                                         MASTERMIX_SCB_ADDR,
1302                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1303                                                         SCB_ON_PARENT_SUBLIST_SCB);
1304
1305         if (!codec_out_scb) goto _fail_end;
1306         /* create the master mix SCB */
1307         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1308                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1309                                                         codec_out_scb,
1310                                                         SCB_ON_PARENT_SUBLIST_SCB);
1311         ins->master_mix_scb = master_mix_scb;
1312
1313         if (!master_mix_scb) goto _fail_end;
1314
1315         /* create codec in */
1316         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1317                                                       CODEC_INPUT_BUF1,
1318                                                       CODECIN_SCB_ADDR,codec_out_scb,
1319                                                       SCB_ON_PARENT_NEXT_SCB);
1320         if (!codec_in_scb) goto _fail_end;
1321         ins->codec_in_scb = codec_in_scb;
1322
1323         /* create write back scb */
1324         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1325                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1326                                                               WRITEBACK_SCB_ADDR,
1327                                                               timing_master_scb,
1328                                                               SCB_ON_PARENT_NEXT_SCB);
1329         if (!write_back_scb) goto _fail_end;
1330
1331         {
1332                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1333                         0x00020000,
1334                         0x0000ffff
1335                 };
1336     
1337                 /* dirty hack ... */
1338                 _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2);
1339         }
1340
1341         /* input sample converter */
1342         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1343                                                                 VARI_DECIMATE_BUF0,
1344                                                                 VARI_DECIMATE_BUF1,
1345                                                                 VARIDECIMATE_SCB_ADDR,
1346                                                                 write_back_scb,
1347                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1348         if (!vari_decimate_scb) goto _fail_end;
1349
1350         /* create the record mixer SCB */
1351         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1352                                                         MIX_SAMPLE_BUF2,
1353                                                         RECORD_MIXER_SCB_ADDR,
1354                                                         vari_decimate_scb,
1355                                                         SCB_ON_PARENT_SUBLIST_SCB);
1356         ins->record_mixer_scb = record_mix_scb;
1357
1358         if (!record_mix_scb) goto _fail_end;
1359
1360         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1361
1362         snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2);
1363
1364         if (chip->nr_ac97_codecs == 1) {
1365                 /* output on slot 5 and 11 
1366                    on primary CODEC */
1367                 fifo_addr = 0x20;
1368                 fifo_span = 0x60;
1369
1370                 /* enable slot 5 and 11 */
1371                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1372         } else {
1373                 /* output on slot 7 and 8 
1374                    on secondary CODEC */
1375                 fifo_addr = 0x40;
1376                 fifo_span = 0x10;
1377
1378                 /* enable slot 7 and 8 */
1379                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1380         }
1381         /* create CODEC tasklet for rear speakers output*/
1382         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1383                                                              REAR_MIXER_SCB_ADDR,
1384                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1385                                                              SCB_ON_PARENT_NEXT_SCB);
1386         if (!rear_codec_out_scb) goto _fail_end;
1387         
1388         
1389         /* create the rear PCM channel  mixer SCB */
1390         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1391                                                       MIX_SAMPLE_BUF3,
1392                                                       REAR_MIXER_SCB_ADDR,
1393                                                       rear_codec_out_scb,
1394                                                       SCB_ON_PARENT_SUBLIST_SCB);
1395         ins->rear_mix_scb = rear_mix_scb;
1396         if (!rear_mix_scb) goto _fail_end;
1397         
1398         if (chip->nr_ac97_codecs == 2) {
1399                 /* create CODEC tasklet for rear Center/LFE output 
1400                    slot 6 and 9 on seconadry CODEC */
1401                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1402                                                                      CLFE_MIXER_SCB_ADDR,
1403                                                                      CLFE_CODEC_SCB_ADDR,
1404                                                                      rear_codec_out_scb,
1405                                                                      SCB_ON_PARENT_NEXT_SCB);
1406                 if (!clfe_codec_out_scb) goto _fail_end;
1407                 
1408                 
1409                 /* create the rear PCM channel  mixer SCB */
1410                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1411                                                                          MIX_SAMPLE_BUF4,
1412                                                                          CLFE_MIXER_SCB_ADDR,
1413                                                                          clfe_codec_out_scb,
1414                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1415                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1416
1417                 /* enable slot 6 and 9 */
1418                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1419         } else {
1420                 clfe_codec_out_scb = rear_codec_out_scb;
1421                 ins->center_lfe_mix_scb = rear_mix_scb;
1422         }
1423
1424         /* enable slots depending on CODEC configuration */
1425         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1426
1427         /* the magic snooper */
1428         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1429                                                              OUTPUT_SNOOP_BUFFER,
1430                                                              codec_out_scb,
1431                                                              clfe_codec_out_scb,
1432                                                              SCB_ON_PARENT_NEXT_SCB);
1433
1434     
1435         if (!magic_snoop_scb) goto _fail_end;
1436         ins->ref_snoop_scb = magic_snoop_scb;
1437
1438         /* SP IO access */
1439         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1440                                               magic_snoop_scb,
1441                                               SCB_ON_PARENT_NEXT_SCB))
1442                 goto _fail_end;
1443
1444         /* SPDIF input sampel rate converter */
1445         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1446                                                       ins->spdif_in_sample_rate,
1447                                                       SRC_OUTPUT_BUF1,
1448                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1449                                                       master_mix_scb,
1450                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1451
1452         if (!src_task_scb) goto _fail_end;
1453         cs46xx_src_unlink(chip,src_task_scb);
1454
1455         /* NOTE: when we now how to detect the SPDIF input
1456            sample rate we will use this SRC to adjust it */
1457         ins->spdif_in_src = src_task_scb;
1458
1459         cs46xx_dsp_async_init(chip,timing_master_scb);
1460         return 0;
1461
1462  _fail_end:
1463         snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1464         return -EINVAL;
1465 }
1466
1467 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1468                                   struct dsp_scb_descriptor * fg_entry)
1469 {
1470         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1471         struct dsp_symbol_entry * s16_async_codec_input_task;
1472         struct dsp_symbol_entry * spdifo_task;
1473         struct dsp_symbol_entry * spdifi_task;
1474         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1475
1476         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1477         if (s16_async_codec_input_task == NULL) {
1478                 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1479                 return -EIO;
1480         }
1481         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1482         if (spdifo_task == NULL) {
1483                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1484                 return -EIO;
1485         }
1486
1487         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1488         if (spdifi_task == NULL) {
1489                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1490                 return -EIO;
1491         }
1492
1493         {
1494                 /* 0xBC0 */
1495                 struct dsp_spdifoscb spdifo_scb = {
1496                         /* 0 */ DSP_SPOS_UUUU,
1497                         {
1498                                 /* 1 */ 0xb0, 
1499                                 /* 2 */ 0, 
1500                                 /* 3 */ 0, 
1501                                 /* 4 */ 0, 
1502                         },
1503                         /* NOTE: the SPDIF output task read samples in mono
1504                            format, the AsynchFGTxSCB task writes to buffer
1505                            in stereo format
1506                         */
1507                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1508                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1509                         /* 7 */ 0,0, 
1510                         /* 8 */ 0, 
1511                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR, 
1512                         /* A */ spdifo_task->address,
1513                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1514                         {
1515                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1516                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1517                         },
1518                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1519                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1520                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1521                 };
1522
1523                 /* 0xBB0 */
1524                 struct dsp_spdifiscb spdifi_scb = {
1525                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1526                         /* 1 */ 0,
1527                         /* 2 */ 0,
1528                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */ 
1529                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1530                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1531                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1532                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1533                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1534                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1535                         /* A */ spdifi_task->address,
1536                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1537                         /* NOTE: The SPDIF input task write the sample in mono
1538                            format from the HW FIFO, the AsynchFGRxSCB task  reads 
1539                            them in stereo 
1540                         */
1541                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1542                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1543                         /* D */ 0x8048,0,
1544                         /* E */ 0x01f0,0x0001,
1545                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1546                 };
1547
1548                 /* 0xBA0 */
1549                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1550                         /* 0 */ DSP_SPOS_UUUU,
1551                         /* 1 */ 0,
1552                         /* 2 */ 0,
1553                         /* 3 */ 1,4000,
1554                         /* 4 */ 0x0118,0x0001,
1555                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1556                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1557                         /* 7 */ DSP_SPOS_UU,0x3,
1558                         /* 8 */ DSP_SPOS_UUUU,
1559                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1560                         /* A */ s16_async_codec_input_task->address,
1561                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1562               
1563                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1564                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1565       
1566 #ifdef UseASER1Input
1567                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;        
1568                            Init. 0000:8042: for ASER1
1569                            0000:8044: for ASER2 */
1570                         /* D */ 0x8042,0,
1571       
1572                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1573                            Init 1 stero:8050 ASER1
1574                            Init 0  mono:8070 ASER2
1575                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1576                         /* E */ 0x0100,0x0001,
1577       
1578 #endif
1579       
1580 #ifdef UseASER2Input
1581                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1582                            Init. 0000:8042: for ASER1
1583                            0000:8044: for ASER2 */
1584                         /* D */ 0x8044,0,
1585       
1586                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1587                            Init 1 stero:8050 ASER1
1588                            Init 0  mono:8070 ASER2
1589                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1590                         /* E */ 0x0110,0x0001,
1591       
1592 #endif
1593       
1594                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1595                            AsyncCIOutputBufModulo: The modulo size for   
1596                            the output buffer of this task */
1597                         /* F */ 0, /* DSP_SPOS_UUUU */
1598                 };
1599
1600                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1601
1602                 snd_assert(spdifo_scb_desc, return -EIO);
1603                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1604                 snd_assert(spdifi_scb_desc, return -EIO);
1605                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1606                 snd_assert(async_codec_scb_desc, return -EIO);
1607
1608                 async_codec_scb_desc->parent_scb_ptr = NULL;
1609                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1610                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1611                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1612
1613                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1614                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1615                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1616                 spdifi_scb_desc->task_entry = spdifi_task;
1617
1618                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1619                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1620                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1621                 spdifo_scb_desc->task_entry = spdifo_task;
1622
1623                 /* this one is faked, as the parnet of SPDIFO task
1624                    is the FG task tree */
1625                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1626
1627                 /* for proc fs */
1628                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1629                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1630                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1631
1632                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1633                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1634         }
1635
1636         return 0;
1637 }
1638
1639
1640 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1641 {
1642         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1643
1644         /* set SPDIF output FIFO slot */
1645         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1646
1647         /* SPDIF output MASTER ENABLE */
1648         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1649
1650         /* right and left validate bit */
1651         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1652         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1653
1654         /* clear fifo pointer */
1655         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1656
1657         /* monitor state */
1658         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1659 }
1660
1661 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1662 {
1663         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1664
1665         /* if hw-ctrl already enabled, turn off to reset logic ... */
1666         cs46xx_dsp_disable_spdif_hw (chip);
1667         udelay(50);
1668
1669         /* set SPDIF output FIFO slot */
1670         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1671
1672         /* SPDIF output MASTER ENABLE */
1673         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1674
1675         /* right and left validate bit */
1676         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1677
1678         /* monitor state */
1679         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1680
1681         return 0;
1682 }
1683
1684 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1685 {
1686         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1687
1688         /* turn on amplifier */
1689         chip->active_ctrl(chip, 1);
1690         chip->amplifier_ctrl(chip, 1);
1691
1692         snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL);
1693         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1694
1695         down(&chip->spos_mutex);
1696
1697         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1698                 /* time countdown enable */
1699                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1700                 /* NOTE: 80000005 value is just magic. With all values
1701                    that I've tested this one seem to give the best result.
1702                    Got no explication why. (Benny) */
1703
1704                 /* SPDIF input MASTER ENABLE */
1705                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1706
1707                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1708         }
1709
1710         /* create and start the asynchronous receiver SCB */
1711         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1712                                                                 ASYNCRX_SCB_ADDR,
1713                                                                 SPDIFI_SCB_INST,
1714                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1715                                                                 ins->spdif_in_src,
1716                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1717
1718         spin_lock_irq(&chip->reg_lock);
1719
1720         /* reset SPDIF input sample buffer pointer */
1721         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1722           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1723
1724         /* reset FIFO ptr */
1725         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1726         cs46xx_src_link(chip,ins->spdif_in_src);
1727
1728         /* unmute SRC volume */
1729         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1730
1731         spin_unlock_irq(&chip->reg_lock);
1732
1733         /* set SPDIF input sample rate and unmute
1734            NOTE: only 48khz support for SPDIF input this time */
1735         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1736
1737         /* monitor state */
1738         ins->spdif_status_in = 1;
1739         up(&chip->spos_mutex);
1740
1741         return 0;
1742 }
1743
1744 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1745 {
1746         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1747
1748         snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL);
1749         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);  
1750
1751         down(&chip->spos_mutex);
1752
1753         /* Remove the asynchronous receiver SCB */
1754         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1755         ins->asynch_rx_scb = NULL;
1756
1757         cs46xx_src_unlink(chip,ins->spdif_in_src);
1758
1759         /* monitor state */
1760         ins->spdif_status_in = 0;
1761         up(&chip->spos_mutex);
1762
1763         /* restore amplifier */
1764         chip->active_ctrl(chip, -1);
1765         chip->amplifier_ctrl(chip, -1);
1766
1767         return 0;
1768 }
1769
1770 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1771 {
1772         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1773
1774         snd_assert (ins->pcm_input == NULL,return -EINVAL);
1775         snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL);
1776
1777         down(&chip->spos_mutex);
1778         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1779                                                   "PCMSerialInput_Wave");
1780         up(&chip->spos_mutex);
1781
1782         return 0;
1783 }
1784
1785 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1786 {
1787         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1788
1789         snd_assert (ins->pcm_input != NULL,return -EINVAL);
1790
1791         down(&chip->spos_mutex);
1792         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1793         ins->pcm_input = NULL;
1794         up(&chip->spos_mutex);
1795
1796         return 0;
1797 }
1798
1799 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1800 {
1801         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1802
1803         snd_assert (ins->adc_input == NULL,return -EINVAL);
1804         snd_assert (ins->codec_in_scb != NULL,return -EINVAL);
1805
1806         down(&chip->spos_mutex);
1807         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1808                                                   "PCMSerialInput_ADC");
1809         up(&chip->spos_mutex);
1810
1811         return 0;
1812 }
1813
1814 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1815 {
1816         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1817
1818         snd_assert (ins->adc_input != NULL,return -EINVAL);
1819
1820         down(&chip->spos_mutex);
1821         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1822         ins->adc_input = NULL;
1823         up(&chip->spos_mutex);
1824
1825         return 0;
1826 }
1827
1828 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1829 {
1830         u32 temp;
1831         int  i;
1832
1833         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1834            a rough guess from looking at the controller spec.) */
1835         if (address < 0x8000 || address >= 0x9000)
1836                 return -EINVAL;
1837         
1838         /* initialize the SP_IO_WRITE SCB with the data. */
1839         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1840
1841         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1842         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1843         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1844     
1845         /* Poke this location to tell the task to start */
1846         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1847
1848         /* Verify that the task ran */
1849         for (i=0; i<25; i++) {
1850                 udelay(125);
1851
1852                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1853                 if (temp == 0x00000000)
1854                         break;
1855         }
1856
1857         if (i == 25) {
1858                 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1859                 return -EBUSY;
1860         }
1861
1862         return 0;
1863 }
1864
1865 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1866 {
1867         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1868         struct dsp_scb_descriptor * scb; 
1869
1870         down(&chip->spos_mutex);
1871         
1872         /* main output */
1873         scb = ins->master_mix_scb->sub_list_ptr;
1874         while (scb != ins->the_null_scb) {
1875                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1876                 scb = scb->next_scb_ptr;
1877         }
1878
1879         /* rear output */
1880         scb = ins->rear_mix_scb->sub_list_ptr;
1881         while (scb != ins->the_null_scb) {
1882                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1883                 scb = scb->next_scb_ptr;
1884         }
1885
1886         ins->dac_volume_left = left;
1887         ins->dac_volume_right = right;
1888
1889         up(&chip->spos_mutex);
1890
1891         return 0;
1892 }
1893
1894 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1895 {
1896         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1897
1898         down(&chip->spos_mutex);
1899
1900         if (ins->asynch_rx_scb != NULL)
1901                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1902                                            left,right);
1903
1904         ins->spdif_input_volume_left = left;
1905         ins->spdif_input_volume_right = right;
1906
1907         up(&chip->spos_mutex);
1908
1909         return 0;
1910 }