[PATCH] PCI: removed unneeded .owner field from struct pci_driver
[linux-2.6.git] / sound / pci / azt3328.c
1 /*
2  *  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
3  *  Copyright (C) 2002, 2005 by Andreas Mohr <andi AT lisas.de>
4  *
5  *  Framework borrowed from Bart Hartgers's als4000.c.
6  *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
7  *  found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
8  *  Other versions are:
9  *  PCI168 A(W), sub ID 1800
10  *  PCI168 A/AP, sub ID 8000
11  *  Please give me feedback in case you try my driver with one of these!!
12  *
13  * GPL LICENSE
14  *  This program is free software; you can redistribute it and/or modify
15  *  it under the terms of the GNU General Public License as published by
16  *  the Free Software Foundation; either version 2 of the License, or
17  *  (at your option) any later version.
18  *
19  *  This program is distributed in the hope that it will be useful,
20  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22  *  GNU General Public License for more details.
23
24  *  You should have received a copy of the GNU General Public License
25  *  along with this program; if not, write to the Free Software
26  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
27  *
28  * NOTES
29  *  Since Aztech does not provide any chipset documentation,
30  *  even on repeated request to various addresses,
31  *  and the answer that was finally given was negative
32  *  (and I was stupid enough to manage to get hold of a PCI168 soundcard
33  *  in the first place >:-P}),
34  *  I was forced to base this driver on reverse engineering
35  *  (3 weeks' worth of evenings filled with driver work).
36  *  (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
37  *
38  *  The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
39  *  for compatibility reasons) has the following features:
40  *
41  *  - builtin AC97 conformant codec (SNR over 80dB)
42  *    (really AC97 compliant?? I really doubt it when looking
43  *    at the mixer register layout)
44  *  - builtin genuine OPL3
45  *  - full duplex 16bit playback/record at independent sampling rate
46  *  - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
47  *  - game port (legacy address support)
48  *  - built-in General DirectX timer having a 20 bits counter
49  *    with 1us resolution (see below!)
50  *  - I2S serial port for external DAC
51  *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
52  *  - supports hardware volume control
53  *  - single chip low cost solution (128 pin QFP)
54  *  - supports programmable Sub-vendor and Sub-system ID
55  *    required for Microsoft's logo compliance (FIXME: where?)
56  *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
57  *
58  *  Note that this driver now is actually *better* than the Windows driver,
59  *  since it additionally supports the card's 1MHz DirectX timer - just try
60  *  the following snd-seq module parameters etc.:
61  *  - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0
62  *    seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0
63  *    seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000
64  *  - "timidity -iAv -B2,8 -Os -EFreverb=0"
65  *  - "pmidi -p 128:0 jazz.mid"
66  *
67  *  Certain PCI versions of this card are susceptible to DMA traffic underruns
68  *  in some systems (resulting in sound crackling/clicking/popping),
69  *  probably because they don't have a DMA FIFO buffer or so.
70  *  Overview (PCI ID/PCI subID/PCI rev.):
71  *  - no DMA crackling on SiS735: 0x50DC/0x1801/16
72  *  - unknown performance: 0x50DC/0x1801/10
73  *    (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler)
74  *
75  *  Crackling happens with VIA chipsets or, in my case, an SiS735, which is
76  *  supposed to be very fast and supposed to get rid of crackling much
77  *  better than a VIA, yet ironically I still get crackling, like many other
78  *  people with the same chipset.
79  *  Possible remedies:
80  *  - plug card into a different PCI slot, preferrably one that isn't shared
81  *    too much (this helps a lot, but not completely!)
82  *  - get rid of PCI VGA card, use AGP instead
83  *  - upgrade or downgrade BIOS
84  *  - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
85  *    Not too helpful.
86  *  - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
87  * 
88  * BUGS
89  *  - full-duplex might *still* be problematic, not fully tested recently
90  * 
91  * TODO
92  *  - test MPU401 MIDI playback etc.
93  *  - power management. See e.g. intel8x0 or cs4281.
94  *    This would be nice since the chip runs a bit hot, and it's *required*
95  *    anyway for proper ACPI power management.
96  *  - figure out what all unknown port bits are responsible for
97  */
98
99 #include <sound/driver.h>
100 #include <asm/io.h>
101 #include <linux/init.h>
102 #include <linux/pci.h>
103 #include <linux/delay.h>
104 #include <linux/slab.h>
105 #include <linux/gameport.h>
106 #include <linux/moduleparam.h>
107 #include <sound/core.h>
108 #include <sound/control.h>
109 #include <sound/pcm.h>
110 #include <sound/rawmidi.h>
111 #include <sound/mpu401.h>
112 #include <sound/opl3.h>
113 #include <sound/initval.h>
114 #include "azt3328.h"
115
116 MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>");
117 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
118 MODULE_LICENSE("GPL");
119 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
120
121 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
122 #define SUPPORT_JOYSTICK 1
123 #endif
124
125 #define DEBUG_MISC      0
126 #define DEBUG_CALLS     0
127 #define DEBUG_MIXER     0
128 #define DEBUG_PLAY_REC  0
129 #define DEBUG_IO        0
130 #define DEBUG_TIMER     0
131 #define MIXER_TESTING   0
132
133 #if DEBUG_MISC
134 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
135 #else
136 #define snd_azf3328_dbgmisc(format, args...)
137 #endif          
138
139 #if DEBUG_CALLS
140 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
141 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __FUNCTION__)
142 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __FUNCTION__)
143 #else
144 #define snd_azf3328_dbgcalls(format, args...)
145 #define snd_azf3328_dbgcallenter()
146 #define snd_azf3328_dbgcallleave()
147 #endif          
148
149 #if DEBUG_MIXER
150 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
151 #else
152 #define snd_azf3328_dbgmixer(format, args...)
153 #endif          
154
155 #if DEBUG_PLAY_REC
156 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
157 #else
158 #define snd_azf3328_dbgplay(format, args...)
159 #endif          
160
161 #if DEBUG_MISC
162 #define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args)
163 #else
164 #define snd_azf3328_dbgtimer(format, args...)
165 #endif          
166
167 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
168 module_param_array(index, int, NULL, 0444);
169 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
170
171 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
172 module_param_array(id, charp, NULL, 0444);
173 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
174
175 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
176 module_param_array(enable, bool, NULL, 0444);
177 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
178
179 #ifdef SUPPORT_JOYSTICK
180 static int joystick[SNDRV_CARDS];
181 module_param_array(joystick, bool, NULL, 0444);
182 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
183 #endif
184
185 static int seqtimer_scaling = 128;
186 module_param(seqtimer_scaling, int, 0444);
187 MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128.");
188
189 typedef struct _snd_azf3328 {
190         /* often-used fields towards beginning, then grouped */
191         unsigned long codec_port;
192         unsigned long io2_port;
193         unsigned long mpu_port;
194         unsigned long synth_port;
195         unsigned long mixer_port;
196
197         spinlock_t reg_lock;
198
199         snd_timer_t *timer;
200         
201         snd_pcm_t *pcm;
202         snd_pcm_substream_t *playback_substream;
203         snd_pcm_substream_t *capture_substream;
204         unsigned int is_playing;
205         unsigned int is_recording;
206
207         snd_card_t *card;
208         snd_rawmidi_t *rmidi;
209
210 #ifdef SUPPORT_JOYSTICK
211         struct gameport *gameport;
212 #endif
213
214         struct pci_dev *pci;
215         int irq;
216 } azf3328_t;
217
218 static const struct pci_device_id snd_azf3328_ids[] = {
219         { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* PCI168/3328 */
220         { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* 3328 */
221         { 0, }
222 };
223
224 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
225
226 static inline void
227 snd_azf3328_codec_outb(const azf3328_t *chip, int reg, u8 value)
228 {
229         outb(value, chip->codec_port + reg);
230 }
231
232 static inline u8
233 snd_azf3328_codec_inb(const azf3328_t *chip, int reg)
234 {
235         return inb(chip->codec_port + reg);
236 }
237
238 static inline void
239 snd_azf3328_codec_outw(const azf3328_t *chip, int reg, u16 value)
240 {
241         outw(value, chip->codec_port + reg);
242 }
243
244 static inline u16
245 snd_azf3328_codec_inw(const azf3328_t *chip, int reg)
246 {
247         return inw(chip->codec_port + reg);
248 }
249
250 static inline void
251 snd_azf3328_codec_outl(const azf3328_t *chip, int reg, u32 value)
252 {
253         outl(value, chip->codec_port + reg);
254 }
255
256 static inline void
257 snd_azf3328_io2_outb(const azf3328_t *chip, int reg, u8 value)
258 {
259         outb(value, chip->io2_port + reg);
260 }
261
262 static inline u8
263 snd_azf3328_io2_inb(const azf3328_t *chip, int reg)
264 {
265         return inb(chip->io2_port + reg);
266 }
267
268 static inline void
269 snd_azf3328_mixer_outw(const azf3328_t *chip, int reg, u16 value)
270 {
271         outw(value, chip->mixer_port + reg);
272 }
273
274 static inline u16
275 snd_azf3328_mixer_inw(const azf3328_t *chip, int reg)
276 {
277         return inw(chip->mixer_port + reg);
278 }
279
280 static void
281 snd_azf3328_mixer_set_mute(const azf3328_t *chip, int reg, int do_mute)
282 {
283         unsigned long portbase = chip->mixer_port + reg + 1;
284         unsigned char oldval;
285
286         /* the mute bit is on the *second* (i.e. right) register of a
287          * left/right channel setting */
288         oldval = inb(portbase);
289         if (do_mute)
290                 oldval |= 0x80;
291         else
292                 oldval &= ~0x80;
293         outb(oldval, portbase);
294 }
295
296 static void
297 snd_azf3328_mixer_write_volume_gradually(const azf3328_t *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
298 {
299         unsigned long portbase = chip->mixer_port + reg;
300         unsigned char curr_vol_left = 0, curr_vol_right = 0;
301         int left_done = 0, right_done = 0;
302         
303         snd_azf3328_dbgcallenter();
304         if (chan_sel & SET_CHAN_LEFT)
305                 curr_vol_left  = inb(portbase + 1);
306         else
307                 left_done = 1;
308         if (chan_sel & SET_CHAN_RIGHT)
309                 curr_vol_right = inb(portbase + 0);
310         else
311                 right_done = 1;
312         
313         /* take care of muting flag (0x80) contained in left channel */
314         if (curr_vol_left & 0x80)
315                 dst_vol_left |= 0x80;
316         else
317                 dst_vol_left &= ~0x80;
318
319         do
320         {
321                 if (!left_done)
322                 {
323                         if (curr_vol_left > dst_vol_left)
324                                 curr_vol_left--;
325                         else
326                         if (curr_vol_left < dst_vol_left)
327                                 curr_vol_left++;
328                         else
329                             left_done = 1;
330                         outb(curr_vol_left, portbase + 1);
331                 }
332                 if (!right_done)
333                 {
334                         if (curr_vol_right > dst_vol_right)
335                                 curr_vol_right--;
336                         else
337                         if (curr_vol_right < dst_vol_right)
338                                 curr_vol_right++;
339                         else
340                             right_done = 1;
341                         /* during volume change, the right channel is crackling
342                          * somewhat more than the left channel, unfortunately.
343                          * This seems to be a hardware issue. */
344                         outb(curr_vol_right, portbase + 0);
345                 }
346                 if (delay)
347                         mdelay(delay);
348         }
349         while ((!left_done) || (!right_done));
350         snd_azf3328_dbgcallleave();
351 }
352
353 /*
354  * general mixer element
355  */
356 typedef struct azf3328_mixer_reg {
357         unsigned int reg;
358         unsigned int lchan_shift, rchan_shift;
359         unsigned int mask;
360         unsigned int invert: 1;
361         unsigned int stereo: 1;
362         unsigned int enum_c: 4;
363 } azf3328_mixer_reg_t;
364
365 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
366  ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \
367   (mask << 16) | \
368   (invert << 24) | \
369   (stereo << 25) | \
370   (enum_c << 26))
371
372 static void snd_azf3328_mixer_reg_decode(azf3328_mixer_reg_t *r, unsigned long val)
373 {
374         r->reg = val & 0xff;
375         r->lchan_shift = (val >> 8) & 0x0f;
376         r->rchan_shift = (val >> 12) & 0x0f;
377         r->mask = (val >> 16) & 0xff;
378         r->invert = (val >> 24) & 1;
379         r->stereo = (val >> 25) & 1;
380         r->enum_c = (val >> 26) & 0x0f;
381 }
382
383 /*
384  * mixer switches/volumes
385  */
386
387 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
388 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
389   .info = snd_azf3328_info_mixer, \
390   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
391   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
392 }
393
394 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
395 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
396   .info = snd_azf3328_info_mixer, \
397   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
398   .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
399 }
400
401 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
402 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
403   .info = snd_azf3328_info_mixer, \
404   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
405   .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
406 }
407
408 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
409 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
410   .info = snd_azf3328_info_mixer, \
411   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
412   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
413 }
414
415 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
416 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
417   .info = snd_azf3328_info_mixer_enum, \
418   .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
419   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
420 }
421
422 static int
423 snd_azf3328_info_mixer(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
424 {
425         azf3328_mixer_reg_t reg;
426
427         snd_azf3328_dbgcallenter();
428         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
429         uinfo->type = reg.mask == 1 ?
430                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
431         uinfo->count = reg.stereo + 1;
432         uinfo->value.integer.min = 0;
433         uinfo->value.integer.max = reg.mask;
434         snd_azf3328_dbgcallleave();
435         return 0;
436 }
437
438 static int
439 snd_azf3328_get_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
440 {
441         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
442         azf3328_mixer_reg_t reg;
443         unsigned int oreg, val;
444
445         snd_azf3328_dbgcallenter();
446         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
447
448         oreg = snd_azf3328_mixer_inw(chip, reg.reg);
449         val = (oreg >> reg.lchan_shift) & reg.mask;
450         if (reg.invert)
451                 val = reg.mask - val;
452         ucontrol->value.integer.value[0] = val;
453         if (reg.stereo) {
454                 val = (oreg >> reg.rchan_shift) & reg.mask;
455                 if (reg.invert)
456                         val = reg.mask - val;
457                 ucontrol->value.integer.value[1] = val;
458         }
459         snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx "
460                              "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n",
461                 reg.reg, oreg,
462                 ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
463                 reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
464         snd_azf3328_dbgcallleave();
465         return 0;
466 }
467
468 static int
469 snd_azf3328_put_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
470 {
471         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
472         azf3328_mixer_reg_t reg;
473         unsigned int oreg, nreg, val;
474
475         snd_azf3328_dbgcallenter();
476         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
477         oreg = snd_azf3328_mixer_inw(chip, reg.reg);
478         val = ucontrol->value.integer.value[0] & reg.mask;
479         if (reg.invert)
480                 val = reg.mask - val;
481         nreg = oreg & ~(reg.mask << reg.lchan_shift);
482         nreg |= (val << reg.lchan_shift);
483         if (reg.stereo) {
484                 val = ucontrol->value.integer.value[1] & reg.mask;
485                 if (reg.invert)
486                         val = reg.mask - val;
487                 nreg &= ~(reg.mask << reg.rchan_shift);
488                 nreg |= (val << reg.rchan_shift);
489         }
490         if (reg.mask >= 0x07) /* it's a volume control, so better take care */
491                 snd_azf3328_mixer_write_volume_gradually(
492                         chip, reg.reg, nreg >> 8, nreg & 0xff,
493                         /* just set both channels, doesn't matter */
494                         SET_CHAN_LEFT|SET_CHAN_RIGHT,
495                         0);
496         else
497                 snd_azf3328_mixer_outw(chip, reg.reg, nreg);
498
499         snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, "
500                              "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n",
501                 reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
502                 oreg, reg.lchan_shift, reg.rchan_shift,
503                 nreg, snd_azf3328_mixer_inw(chip, reg.reg));
504         snd_azf3328_dbgcallleave();
505         return (nreg != oreg);
506 }
507
508 static int
509 snd_azf3328_info_mixer_enum(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
510 {
511         static const char * const texts1[] = {
512                 "ModemOut1", "ModemOut2"
513         };
514         static const char * const texts2[] = {
515                 "MonoSelectSource1", "MonoSelectSource2"
516         };
517         static const char * const texts3[] = {
518                 "Mic", "CD", "Video", "Aux",
519                 "Line", "Mix", "Mix Mono", "Phone"
520         };
521         azf3328_mixer_reg_t reg;
522
523         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
524         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
525         uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
526         uinfo->value.enumerated.items = reg.enum_c;
527         if (uinfo->value.enumerated.item > reg.enum_c - 1U)
528                 uinfo->value.enumerated.item = reg.enum_c - 1U;
529         if (reg.reg == IDX_MIXER_ADVCTL2)
530         {
531                 if (reg.lchan_shift == 8) /* modem out sel */
532                         strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
533                 else /* mono sel source */
534                         strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
535         }
536         else
537                 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
538 );
539         return 0;
540 }
541
542 static int
543 snd_azf3328_get_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
544 {
545         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
546         azf3328_mixer_reg_t reg;
547         unsigned short val;
548         
549         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
550         val = snd_azf3328_mixer_inw(chip, reg.reg);
551         if (reg.reg == IDX_MIXER_REC_SELECT)
552         {
553                 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
554                 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
555         }
556         else
557                 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
558
559         snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n",
560                 reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1],
561                 reg.lchan_shift, reg.enum_c);
562         return 0;
563 }
564
565 static int
566 snd_azf3328_put_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
567 {
568         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
569         azf3328_mixer_reg_t reg;
570         unsigned int oreg, nreg, val;
571         
572         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
573         oreg = snd_azf3328_mixer_inw(chip, reg.reg);
574         val = oreg;
575         if (reg.reg == IDX_MIXER_REC_SELECT)
576         {
577                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
578                 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
579                         return -EINVAL;
580                 val = (ucontrol->value.enumerated.item[0] << 8) |
581                       (ucontrol->value.enumerated.item[1] << 0);
582         }
583         else
584         {
585                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
586                         return -EINVAL;
587                 val &= ~((reg.enum_c - 1) << reg.lchan_shift);
588                 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
589         }
590         snd_azf3328_mixer_outw(chip, reg.reg, val);
591         nreg = val;
592
593         snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
594         return (nreg != oreg);
595 }
596
597 static const snd_kcontrol_new_t snd_azf3328_mixer_controls[] __devinitdata = {
598         AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
599         AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
600         AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
601         AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
602         AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1),
603         AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
604         AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
605         AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
606         AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
607         AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
608         AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
609         AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
610         AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
611         AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
612         AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
613         AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
614         AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
615         AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
616         AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
617         AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
618         AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
619         AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
620         AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
621         AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
622         AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
623         AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
624         AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
625         AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8),
626         AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9),
627         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
628         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
629         AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0),
630         AZF3328_MIXER_VOL_SPECIAL("3D Control - Wide", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
631         AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
632 #if MIXER_TESTING
633         AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
634         AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
635         AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
636         AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
637         AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
638         AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
639         AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
640         AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
641         AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
642         AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
643         AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
644         AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
645         AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
646         AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
647         AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
648         AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
649 #endif
650 };
651
652 static const u16 __devinitdata snd_azf3328_init_values[][2] = {
653         { IDX_MIXER_PLAY_MASTER,        MIXER_MUTE_MASK|0x1f1f },
654         { IDX_MIXER_MODEMOUT,           MIXER_MUTE_MASK|0x1f1f },
655         { IDX_MIXER_BASSTREBLE,         0x0000 },
656         { IDX_MIXER_PCBEEP,             MIXER_MUTE_MASK|0x1f1f },
657         { IDX_MIXER_MODEMIN,            MIXER_MUTE_MASK|0x1f1f },
658         { IDX_MIXER_MIC,                MIXER_MUTE_MASK|0x001f },
659         { IDX_MIXER_LINEIN,             MIXER_MUTE_MASK|0x1f1f },
660         { IDX_MIXER_CDAUDIO,            MIXER_MUTE_MASK|0x1f1f },
661         { IDX_MIXER_VIDEO,              MIXER_MUTE_MASK|0x1f1f },
662         { IDX_MIXER_AUX,                MIXER_MUTE_MASK|0x1f1f },
663         { IDX_MIXER_WAVEOUT,            MIXER_MUTE_MASK|0x1f1f },
664         { IDX_MIXER_FMSYNTH,            MIXER_MUTE_MASK|0x1f1f },
665         { IDX_MIXER_REC_VOLUME,         MIXER_MUTE_MASK|0x0707 },
666 };
667
668 static int __devinit
669 snd_azf3328_mixer_new(azf3328_t *chip)
670 {
671         snd_card_t *card;
672         const snd_kcontrol_new_t *sw;
673         unsigned int idx;
674         int err;
675
676         snd_azf3328_dbgcallenter();
677         snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
678
679         card = chip->card;
680
681         /* mixer reset */
682         snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
683
684         /* mute and zero volume channels */
685         for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) {
686                 snd_azf3328_mixer_outw(chip,
687                         snd_azf3328_init_values[idx][0],
688                         snd_azf3328_init_values[idx][1]);
689         }
690         
691         /* add mixer controls */
692         sw = snd_azf3328_mixer_controls;
693         for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
694                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
695                         return err;
696         }
697         snd_component_add(card, "AZF3328 mixer");
698         strcpy(card->mixername, "AZF3328 mixer");
699
700         snd_azf3328_dbgcallleave();
701         return 0;
702 }
703
704 static int
705 snd_azf3328_hw_params(snd_pcm_substream_t * substream,
706                                  snd_pcm_hw_params_t * hw_params)
707 {
708         int res;
709         snd_azf3328_dbgcallenter();
710         res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
711         snd_azf3328_dbgcallleave();
712         return res;
713 }
714
715 static int
716 snd_azf3328_hw_free(snd_pcm_substream_t * substream)
717 {
718         snd_azf3328_dbgcallenter();
719         snd_pcm_lib_free_pages(substream);
720         snd_azf3328_dbgcallleave();
721         return 0;
722 }
723
724 static void
725 snd_azf3328_setfmt(azf3328_t *chip,
726                                unsigned int reg,
727                                unsigned int bitrate,
728                                unsigned int format_width,
729                                unsigned int channels
730 )
731 {
732         u16 val = 0xff00;
733         unsigned long flags;
734
735         snd_azf3328_dbgcallenter();
736         switch (bitrate) {
737         case  4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break;
738         case  4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break;
739         case  5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */
740         case  6620: val |= SOUNDFORMAT_FREQ_6620; break;
741         case  8000: val |= SOUNDFORMAT_FREQ_8000; break;
742         case  9600: val |= SOUNDFORMAT_FREQ_9600; break;
743         case 11025: val |= SOUNDFORMAT_FREQ_11025; break;
744         case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break;
745         case 16000: val |= SOUNDFORMAT_FREQ_16000; break;
746         case 22050: val |= SOUNDFORMAT_FREQ_22050; break;
747         case 32000: val |= SOUNDFORMAT_FREQ_32000; break;
748         case 44100: val |= SOUNDFORMAT_FREQ_44100; break;
749         case 48000: val |= SOUNDFORMAT_FREQ_48000; break;
750         case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break;
751         default:
752                 snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
753                 val |= SOUNDFORMAT_FREQ_44100;
754                 break;
755         }
756         /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */
757         /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */
758         /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */
759         /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */
760         /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
761         /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
762         /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
763         /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
764         /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
765
766         if (channels == 2)
767                 val |= SOUNDFORMAT_FLAG_2CHANNELS;
768
769         if (format_width == 16)
770                 val |= SOUNDFORMAT_FLAG_16BIT;
771
772         spin_lock_irqsave(&chip->reg_lock, flags);
773         
774         /* set bitrate/format */
775         snd_azf3328_codec_outw(chip, reg, val);
776         
777         /* changing the bitrate/format settings switches off the
778          * audio output with an annoying click in case of 8/16bit format change
779          * (maybe shutting down DAC/ADC?), thus immediately
780          * do some tweaking to reenable it and get rid of the clicking
781          * (FIXME: yes, it works, but what exactly am I doing here?? :)
782          * FIXME: does this have some side effects for full-duplex
783          * or other dramatic side effects? */
784         if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
785                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
786                         snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) |
787                         DMA_PLAY_SOMETHING1 |
788                         DMA_PLAY_SOMETHING2 |
789                         SOMETHING_ALMOST_ALWAYS_SET |
790                         DMA_EPILOGUE_SOMETHING |
791                         DMA_SOMETHING_ELSE
792                 );
793
794         spin_unlock_irqrestore(&chip->reg_lock, flags);
795         snd_azf3328_dbgcallleave();
796 }
797
798 static void
799 snd_azf3328_setdmaa(azf3328_t *chip,
800                                 long unsigned int addr,
801                                 unsigned int count,
802                                 unsigned int size,
803                                 int do_recording)
804 {
805         unsigned long flags, portbase;
806         unsigned int is_running;
807
808         snd_azf3328_dbgcallenter();
809         if (do_recording)
810         {
811                 /* access capture registers, i.e. skip playback reg section */
812                 portbase = chip->codec_port + 0x20;
813                 is_running = chip->is_recording;
814         }
815         else
816         {
817                 /* access the playback register section */
818                 portbase = chip->codec_port + 0x00;
819                 is_running = chip->is_playing;
820         }
821
822         /* AZF3328 uses a two buffer pointer DMA playback approach */
823         if (!is_running)
824         {
825                 unsigned long addr_area2;
826                 unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */
827                 count_areas = size/2;
828                 addr_area2 = addr+count_areas;
829                 count_areas--; /* max. index */
830                 snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas);
831
832                 /* build combined I/O buffer length word */
833                 count_tmp = count_areas;
834                 count_areas |= (count_tmp << 16);
835                 spin_lock_irqsave(&chip->reg_lock, flags);
836                 outl(addr, portbase + IDX_IO_PLAY_DMA_START_1);
837                 outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2);
838                 outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1);
839                 spin_unlock_irqrestore(&chip->reg_lock, flags);
840         }
841         snd_azf3328_dbgcallleave();
842 }
843
844 static int
845 snd_azf3328_playback_prepare(snd_pcm_substream_t *substream)
846 {
847 #if 0
848         azf3328_t *chip = snd_pcm_substream_chip(substream);
849         snd_pcm_runtime_t *runtime = substream->runtime;
850         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
851         unsigned int count = snd_pcm_lib_period_bytes(substream);
852 #endif
853
854         snd_azf3328_dbgcallenter();
855 #if 0
856         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
857                 runtime->rate,
858                 snd_pcm_format_width(runtime->format),
859                 runtime->channels);
860         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
861 #endif
862         snd_azf3328_dbgcallleave();
863         return 0;
864 }
865
866 static int
867 snd_azf3328_capture_prepare(snd_pcm_substream_t * substream)
868 {
869 #if 0
870         azf3328_t *chip = snd_pcm_substream_chip(substream);
871         snd_pcm_runtime_t *runtime = substream->runtime;
872         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
873         unsigned int count = snd_pcm_lib_period_bytes(substream);
874 #endif
875
876         snd_azf3328_dbgcallenter();
877 #if 0
878         snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
879                 runtime->rate,
880                 snd_pcm_format_width(runtime->format),
881                 runtime->channels);
882         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
883 #endif
884         snd_azf3328_dbgcallleave();
885         return 0;
886 }
887
888 static int
889 snd_azf3328_playback_trigger(snd_pcm_substream_t * substream, int cmd)
890 {
891         azf3328_t *chip = snd_pcm_substream_chip(substream);
892         snd_pcm_runtime_t *runtime = substream->runtime;
893         int result = 0;
894         unsigned int status1;
895
896         snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
897
898         switch (cmd) {
899         case SNDRV_PCM_TRIGGER_START:
900                 snd_azf3328_dbgplay("START PLAYBACK\n");
901
902                 /* mute WaveOut */
903                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
904
905                 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
906                         runtime->rate,
907                         snd_pcm_format_width(runtime->format),
908                         runtime->channels);
909
910                 spin_lock(&chip->reg_lock);
911                 /* stop playback */
912                 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
913                 status1 &= ~DMA_RESUME;
914                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
915             
916                 /* FIXME: clear interrupts or what??? */
917                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff);
918                 spin_unlock(&chip->reg_lock);
919
920                 snd_azf3328_setdmaa(chip, runtime->dma_addr,
921                         snd_pcm_lib_period_bytes(substream),
922                         snd_pcm_lib_buffer_bytes(substream),
923                         0);
924
925                 spin_lock(&chip->reg_lock);
926 #ifdef WIN9X
927                 /* FIXME: enable playback/recording??? */
928                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
929                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
930
931                 /* start playback again */
932                 /* FIXME: what is this value (0x0010)??? */
933                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
934                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
935 #else /* NT4 */
936                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
937                         0x0000);
938                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
939                         DMA_PLAY_SOMETHING1);
940                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
941                         DMA_PLAY_SOMETHING1 |
942                         DMA_PLAY_SOMETHING2);
943                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
944                         DMA_RESUME |
945                         SOMETHING_ALMOST_ALWAYS_SET |
946                         DMA_EPILOGUE_SOMETHING |
947                         DMA_SOMETHING_ELSE);
948 #endif
949                 spin_unlock(&chip->reg_lock);
950
951                 /* now unmute WaveOut */
952                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
953
954                 chip->is_playing = 1;
955                 snd_azf3328_dbgplay("STARTED PLAYBACK\n");
956                 break;
957         case SNDRV_PCM_TRIGGER_STOP:
958                 snd_azf3328_dbgplay("STOP PLAYBACK\n");
959
960                 /* mute WaveOut */
961                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
962
963                 spin_lock(&chip->reg_lock);
964                 /* stop playback */
965                 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
966
967                 status1 &= ~DMA_RESUME;
968                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
969
970                 /* hmm, is this really required? we're resetting the same bit
971                  * immediately thereafter... */
972                 status1 |= DMA_PLAY_SOMETHING1;
973                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
974
975                 status1 &= ~DMA_PLAY_SOMETHING1;
976                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
977                 spin_unlock(&chip->reg_lock);
978             
979                 /* now unmute WaveOut */
980                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
981                 chip->is_playing = 0;
982                 snd_azf3328_dbgplay("STOPPED PLAYBACK\n");
983                 break;
984         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
985                 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
986                 break;
987         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
988                 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
989                 break;
990         default:
991                 return -EINVAL;
992         }
993         
994         snd_azf3328_dbgcallleave();
995         return result;
996 }
997
998 /* this is just analogous to playback; I'm not quite sure whether recording
999  * should actually be triggered like that */
1000 static int
1001 snd_azf3328_capture_trigger(snd_pcm_substream_t * substream, int cmd)
1002 {
1003         azf3328_t *chip = snd_pcm_substream_chip(substream);
1004         snd_pcm_runtime_t *runtime = substream->runtime;
1005         int result = 0;
1006         unsigned int status1;
1007
1008         snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
1009
1010         switch (cmd) {
1011         case SNDRV_PCM_TRIGGER_START:
1012
1013                 snd_azf3328_dbgplay("START CAPTURE\n");
1014
1015                 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
1016                         runtime->rate,
1017                         snd_pcm_format_width(runtime->format),
1018                         runtime->channels);
1019
1020                 spin_lock(&chip->reg_lock);
1021                 /* stop recording */
1022                 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
1023                 status1 &= ~DMA_RESUME;
1024                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1025             
1026                 /* FIXME: clear interrupts or what??? */
1027                 snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff);
1028                 spin_unlock(&chip->reg_lock);
1029
1030                 snd_azf3328_setdmaa(chip, runtime->dma_addr,
1031                         snd_pcm_lib_period_bytes(substream),
1032                         snd_pcm_lib_buffer_bytes(substream),
1033                         1);
1034
1035                 spin_lock(&chip->reg_lock);
1036 #ifdef WIN9X
1037                 /* FIXME: enable playback/recording??? */
1038                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
1039                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1040
1041                 /* start capture again */
1042                 /* FIXME: what is this value (0x0010)??? */
1043                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
1044                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1045 #else
1046                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1047                         0x0000);
1048                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1049                         DMA_PLAY_SOMETHING1);
1050                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1051                         DMA_PLAY_SOMETHING1 |
1052                         DMA_PLAY_SOMETHING2);
1053                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1054                         DMA_RESUME |
1055                         SOMETHING_ALMOST_ALWAYS_SET |
1056                         DMA_EPILOGUE_SOMETHING |
1057                         DMA_SOMETHING_ELSE);
1058 #endif
1059                 spin_unlock(&chip->reg_lock);
1060
1061                 chip->is_recording = 1;
1062                 snd_azf3328_dbgplay("STARTED CAPTURE\n");
1063                 break;
1064         case SNDRV_PCM_TRIGGER_STOP:
1065                 snd_azf3328_dbgplay("STOP CAPTURE\n");
1066
1067                 spin_lock(&chip->reg_lock);
1068                 /* stop recording */
1069                 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
1070
1071                 status1 &= ~DMA_RESUME;
1072                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1073
1074                 status1 |= DMA_PLAY_SOMETHING1;
1075                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1076
1077                 status1 &= ~DMA_PLAY_SOMETHING1;
1078                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1079                 spin_unlock(&chip->reg_lock);
1080             
1081                 chip->is_recording = 0;
1082                 snd_azf3328_dbgplay("STOPPED CAPTURE\n");
1083                 break;
1084         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1085                 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
1086                 break;
1087         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1088                 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
1089                 break;
1090         default:
1091                 return -EINVAL;
1092         }
1093         
1094         snd_azf3328_dbgcallleave();
1095         return result;
1096 }
1097
1098 static snd_pcm_uframes_t
1099 snd_azf3328_playback_pointer(snd_pcm_substream_t * substream)
1100 {
1101         azf3328_t *chip = snd_pcm_substream_chip(substream);
1102         unsigned long bufptr, result;
1103         snd_pcm_uframes_t frmres;
1104
1105 #ifdef QUERY_HARDWARE
1106         bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
1107 #else
1108         bufptr = substream->runtime->dma_addr;
1109 #endif
1110         result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
1111
1112         /* calculate offset */
1113         result -= bufptr;
1114         frmres = bytes_to_frames( substream->runtime, result);
1115         snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres);
1116         return frmres;
1117 }
1118
1119 static snd_pcm_uframes_t
1120 snd_azf3328_capture_pointer(snd_pcm_substream_t * substream)
1121 {
1122         azf3328_t *chip = snd_pcm_substream_chip(substream);
1123         unsigned long bufptr, result;
1124         snd_pcm_uframes_t frmres;
1125
1126 #ifdef QUERY_HARDWARE
1127         bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
1128 #else
1129         bufptr = substream->runtime->dma_addr;
1130 #endif
1131         result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
1132
1133         /* calculate offset */
1134         result -= bufptr;
1135         frmres = bytes_to_frames( substream->runtime, result);
1136         snd_azf3328_dbgplay("REC  @ 0x%8lx, frames %8ld\n", result, frmres);
1137         return frmres;
1138 }
1139
1140 static irqreturn_t
1141 snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1142 {
1143         azf3328_t *chip = dev_id;
1144         u8 status, which;
1145         static unsigned long irq_count;
1146
1147         status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS);
1148
1149         /* fast path out, to ease interrupt sharing */
1150         if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER)))
1151                 return IRQ_NONE; /* must be interrupt for another device */
1152
1153         snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n",
1154                 irq_count,
1155                 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS),
1156                 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE),
1157                 status);
1158                 
1159         if (status & IRQ_TIMER)
1160         {
1161                 /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */
1162                 if (chip->timer)
1163                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1164                 /* ACK timer */
1165                 spin_lock(&chip->reg_lock);
1166                 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
1167                 spin_unlock(&chip->reg_lock);
1168                 snd_azf3328_dbgplay("azt3328: timer IRQ\n");
1169         }
1170         if (status & IRQ_PLAYBACK)
1171         {
1172                 spin_lock(&chip->reg_lock);
1173                 which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE);
1174                 /* ack all IRQ types immediately */
1175                 snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which);
1176                 spin_unlock(&chip->reg_lock);
1177
1178                 if (chip->pcm && chip->playback_substream)
1179                 {
1180                         snd_pcm_period_elapsed(chip->playback_substream);
1181                         snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n",
1182                                 which,
1183                                 inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1184                 }
1185                 else
1186                         snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1187                 if (which & IRQ_PLAY_SOMETHING)
1188                         snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
1189         }
1190         if (status & IRQ_RECORDING)
1191         {
1192                 spin_lock(&chip->reg_lock);
1193                 which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE);
1194                 /* ack all IRQ types immediately */
1195                 snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which);
1196                 spin_unlock(&chip->reg_lock);
1197
1198                 if (chip->pcm && chip->capture_substream)
1199                 {
1200                         snd_pcm_period_elapsed(chip->capture_substream);
1201                         snd_azf3328_dbgplay("REC  period done (#%x), @ %x\n",
1202                                 which,
1203                                 inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1204                 }
1205                 else
1206                         snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1207                 if (which & IRQ_REC_SOMETHING)
1208                         snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
1209         }
1210         /* MPU401 has less critical IRQ requirements
1211          * than timer and playback/recording, right? */
1212         if (status & IRQ_MPU401)
1213         {
1214                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
1215
1216                 /* hmm, do we have to ack the IRQ here somehow?
1217                  * If so, then I don't know how... */
1218                 snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n");
1219         }
1220         irq_count++;
1221         return IRQ_HANDLED;
1222 }
1223
1224 /*****************************************************************/
1225
1226 static const snd_pcm_hardware_t snd_azf3328_playback =
1227 {
1228         /* FIXME!! Correct? */
1229         .info =                 SNDRV_PCM_INFO_MMAP |
1230                                 SNDRV_PCM_INFO_INTERLEAVED |
1231                                 SNDRV_PCM_INFO_MMAP_VALID,
1232         .formats =              SNDRV_PCM_FMTBIT_S8 |
1233                                 SNDRV_PCM_FMTBIT_U8 |
1234                                 SNDRV_PCM_FMTBIT_S16_LE |
1235                                 SNDRV_PCM_FMTBIT_U16_LE,
1236         .rates =                SNDRV_PCM_RATE_5512 |
1237                                 SNDRV_PCM_RATE_8000_48000 |
1238                                 SNDRV_PCM_RATE_KNOT,
1239         .rate_min =             4000,
1240         .rate_max =             66200,
1241         .channels_min =         1,
1242         .channels_max =         2,
1243         .buffer_bytes_max =     65536,
1244         .period_bytes_min =     64,
1245         .period_bytes_max =     65536,
1246         .periods_min =          1,
1247         .periods_max =          1024,
1248         /* FIXME: maybe that card actually has a FIFO?
1249          * Hmm, it seems newer revisions do have one, but we still don't know
1250          * its size... */
1251         .fifo_size =            0,
1252 };
1253
1254 static const snd_pcm_hardware_t snd_azf3328_capture =
1255 {
1256         /* FIXME */
1257         .info =                 SNDRV_PCM_INFO_MMAP |
1258                                 SNDRV_PCM_INFO_INTERLEAVED |
1259                                 SNDRV_PCM_INFO_MMAP_VALID,
1260         .formats =              SNDRV_PCM_FMTBIT_S8 |
1261                                 SNDRV_PCM_FMTBIT_U8 |
1262                                 SNDRV_PCM_FMTBIT_S16_LE |
1263                                 SNDRV_PCM_FMTBIT_U16_LE,
1264         .rates =                SNDRV_PCM_RATE_5512 |
1265                                 SNDRV_PCM_RATE_8000_48000 |
1266                                 SNDRV_PCM_RATE_KNOT,
1267         .rate_min =             4000,
1268         .rate_max =             66200,
1269         .channels_min =         1,
1270         .channels_max =         2,
1271         .buffer_bytes_max =     65536,
1272         .period_bytes_min =     64,
1273         .period_bytes_max =     65536,
1274         .periods_min =          1,
1275         .periods_max =          1024,
1276         .fifo_size =            0,
1277 };
1278
1279
1280 static unsigned int snd_azf3328_fixed_rates[] = {
1281         4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000,
1282         44100, 48000, 66200 };
1283 static snd_pcm_hw_constraint_list_t snd_azf3328_hw_constraints_rates = {
1284         .count = ARRAY_SIZE(snd_azf3328_fixed_rates), 
1285         .list = snd_azf3328_fixed_rates,
1286         .mask = 0,
1287 };
1288
1289 /*****************************************************************/
1290
1291 static int
1292 snd_azf3328_playback_open(snd_pcm_substream_t * substream)
1293 {
1294         azf3328_t *chip = snd_pcm_substream_chip(substream);
1295         snd_pcm_runtime_t *runtime = substream->runtime;
1296
1297         snd_azf3328_dbgcallenter();
1298         chip->playback_substream = substream;
1299         runtime->hw = snd_azf3328_playback;
1300         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1301                                    &snd_azf3328_hw_constraints_rates);
1302         snd_azf3328_dbgcallleave();
1303         return 0;
1304 }
1305
1306 static int
1307 snd_azf3328_capture_open(snd_pcm_substream_t * substream)
1308 {
1309         azf3328_t *chip = snd_pcm_substream_chip(substream);
1310         snd_pcm_runtime_t *runtime = substream->runtime;
1311
1312         snd_azf3328_dbgcallenter();
1313         chip->capture_substream = substream;
1314         runtime->hw = snd_azf3328_capture;
1315         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1316                                    &snd_azf3328_hw_constraints_rates);
1317         snd_azf3328_dbgcallleave();
1318         return 0;
1319 }
1320
1321 static int
1322 snd_azf3328_playback_close(snd_pcm_substream_t * substream)
1323 {
1324         azf3328_t *chip = snd_pcm_substream_chip(substream);
1325
1326         snd_azf3328_dbgcallenter();
1327
1328         chip->playback_substream = NULL;
1329         snd_azf3328_dbgcallleave();
1330         return 0;
1331 }
1332
1333 static int
1334 snd_azf3328_capture_close(snd_pcm_substream_t * substream)
1335 {
1336         azf3328_t *chip = snd_pcm_substream_chip(substream);
1337
1338         snd_azf3328_dbgcallenter();
1339         chip->capture_substream = NULL;
1340         snd_azf3328_dbgcallleave();
1341         return 0;
1342 }
1343
1344 /******************************************************************/
1345
1346 static snd_pcm_ops_t snd_azf3328_playback_ops = {
1347         .open =         snd_azf3328_playback_open,
1348         .close =        snd_azf3328_playback_close,
1349         .ioctl =        snd_pcm_lib_ioctl,
1350         .hw_params =    snd_azf3328_hw_params,
1351         .hw_free =      snd_azf3328_hw_free,
1352         .prepare =      snd_azf3328_playback_prepare,
1353         .trigger =      snd_azf3328_playback_trigger,
1354         .pointer =      snd_azf3328_playback_pointer
1355 };
1356
1357 static snd_pcm_ops_t snd_azf3328_capture_ops = {
1358         .open =         snd_azf3328_capture_open,
1359         .close =        snd_azf3328_capture_close,
1360         .ioctl =        snd_pcm_lib_ioctl,
1361         .hw_params =    snd_azf3328_hw_params,
1362         .hw_free =      snd_azf3328_hw_free,
1363         .prepare =      snd_azf3328_capture_prepare,
1364         .trigger =      snd_azf3328_capture_trigger,
1365         .pointer =      snd_azf3328_capture_pointer
1366 };
1367
1368 static void
1369 snd_azf3328_pcm_free(snd_pcm_t *pcm)
1370 {
1371         azf3328_t *chip = pcm->private_data;
1372         chip->pcm = NULL;
1373         snd_pcm_lib_preallocate_free_for_all(pcm);
1374 }
1375
1376 static int __devinit
1377 snd_azf3328_pcm(azf3328_t *chip, int device)
1378 {
1379         snd_pcm_t *pcm;
1380         int err;
1381
1382         snd_azf3328_dbgcallenter();
1383         if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
1384                 return err;
1385         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
1386         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
1387
1388         pcm->private_data = chip;
1389         pcm->private_free = snd_azf3328_pcm_free;
1390         pcm->info_flags = 0;
1391         strcpy(pcm->name, chip->card->shortname);
1392         chip->pcm = pcm;
1393
1394         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1395                                               snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1396
1397         snd_azf3328_dbgcallleave();
1398         return 0;
1399 }
1400
1401 /******************************************************************/
1402
1403 #ifdef SUPPORT_JOYSTICK
1404 static int __devinit
1405 snd_azf3328_config_joystick(azf3328_t *chip, int dev)
1406 {
1407         struct gameport *gp;
1408         struct resource *r;
1409
1410         if (!joystick[dev])
1411                 return -ENODEV;
1412
1413         if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) {
1414                 printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n");
1415                 return -EBUSY;
1416         }
1417
1418         chip->gameport = gp = gameport_allocate_port();
1419         if (!gp) {
1420                 printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n");
1421                 release_and_free_resource(r);
1422                 return -ENOMEM;
1423         }
1424
1425         gameport_set_name(gp, "AZF3328 Gameport");
1426         gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1427         gameport_set_dev_parent(gp, &chip->pci->dev);
1428         gp->io = 0x200;
1429         gameport_set_port_data(gp, r);
1430
1431         snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1432                               snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY);
1433
1434         gameport_register_port(chip->gameport);
1435
1436         return 0;
1437 }
1438
1439 static void
1440 snd_azf3328_free_joystick(azf3328_t *chip)
1441 {
1442         if (chip->gameport) {
1443                 struct resource *r = gameport_get_port_data(chip->gameport);
1444
1445                 gameport_unregister_port(chip->gameport);
1446                 chip->gameport = NULL;
1447                 /* disable gameport */
1448                 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1449                                       snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1450                 release_and_free_resource(r);
1451         }
1452 }
1453 #else
1454 static inline int
1455 snd_azf3328_config_joystick(azf3328_t *chip, int dev) { return -ENOSYS; }
1456 static inline void
1457 snd_azf3328_free_joystick(azf3328_t *chip) { }
1458 #endif
1459
1460 /******************************************************************/
1461
1462 static int
1463 snd_azf3328_free(azf3328_t *chip)
1464 {
1465         if (chip->irq < 0)
1466                 goto __end_hw;
1467
1468         /* reset (close) mixer */
1469         snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
1470         snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
1471
1472         /* interrupt setup - mask everything (FIXME!) */
1473         /* well, at least we know how to disable the timer IRQ */
1474         snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00);
1475
1476         synchronize_irq(chip->irq);
1477 __end_hw:
1478         snd_azf3328_free_joystick(chip);
1479         if (chip->irq >= 0)
1480                 free_irq(chip->irq, (void *)chip);
1481         pci_release_regions(chip->pci);
1482         pci_disable_device(chip->pci);
1483
1484         kfree(chip);
1485         return 0;
1486 }
1487
1488 static int
1489 snd_azf3328_dev_free(snd_device_t *device)
1490 {
1491         azf3328_t *chip = device->device_data;
1492         return snd_azf3328_free(chip);
1493 }
1494
1495 /******************************************************************/
1496
1497 /*** NOTE: the physical timer resolution actually is 1024000 ticks per second,
1498  *** but announcing those attributes to user-space would make programs
1499  *** configure the timer to a 1 tick value, resulting in an absolutely fatal
1500  *** timer IRQ storm.
1501  *** Thus I chose to announce a down-scaled virtual timer to the outside and
1502  *** calculate real timer countdown values internally.
1503  *** (the scale factor can be set via module parameter "seqtimer_scaling").
1504  ***/
1505
1506 static int
1507 snd_azf3328_timer_start(snd_timer_t *timer)
1508 {
1509         azf3328_t *chip;
1510         unsigned long flags;
1511         unsigned int delay;
1512
1513         snd_azf3328_dbgcallenter();
1514         chip = snd_timer_chip(timer);
1515         delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK;
1516         if (delay < 49)
1517         {
1518                 /* uhoh, that's not good, since user-space won't know about
1519                  * this timing tweak
1520                  * (we need to do it to avoid a lockup, though) */
1521
1522                 snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay);
1523                 delay = 49; /* minimum time is 49 ticks */
1524         }
1525         snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay);
1526         delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ;
1527         spin_lock_irqsave(&chip->reg_lock, flags);
1528         snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay);
1529         spin_unlock_irqrestore(&chip->reg_lock, flags);
1530         snd_azf3328_dbgcallleave();
1531         return 0;
1532 }
1533
1534 static int
1535 snd_azf3328_timer_stop(snd_timer_t *timer)
1536 {
1537         azf3328_t *chip;
1538         unsigned long flags;
1539
1540         snd_azf3328_dbgcallenter();
1541         chip = snd_timer_chip(timer);
1542         spin_lock_irqsave(&chip->reg_lock, flags);
1543         /* disable timer countdown and interrupt */
1544         /* FIXME: should we write TIMER_ACK_IRQ here? */
1545         snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0);
1546         spin_unlock_irqrestore(&chip->reg_lock, flags);
1547         snd_azf3328_dbgcallleave();
1548         return 0;
1549 }
1550
1551
1552 static int
1553 snd_azf3328_timer_precise_resolution(snd_timer_t *timer,
1554                                                unsigned long *num, unsigned long *den)
1555 {
1556         snd_azf3328_dbgcallenter();
1557         *num = 1;
1558         *den = 1024000 / seqtimer_scaling;
1559         snd_azf3328_dbgcallleave();
1560         return 0;
1561 }
1562
1563 static struct _snd_timer_hardware snd_azf3328_timer_hw = {
1564         .flags = SNDRV_TIMER_HW_AUTO,
1565         .resolution = 977, /* 1000000/1024000 = 0.9765625us */
1566         .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */
1567         .start = snd_azf3328_timer_start,
1568         .stop = snd_azf3328_timer_stop,
1569         .precise_resolution = snd_azf3328_timer_precise_resolution,
1570 };
1571
1572 static int __devinit
1573 snd_azf3328_timer(azf3328_t *chip, int device)
1574 {
1575         snd_timer_t *timer = NULL;
1576         snd_timer_id_t tid;
1577         int err;
1578
1579         snd_azf3328_dbgcallenter();
1580         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1581         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1582         tid.card = chip->card->number;
1583         tid.device = device;
1584         tid.subdevice = 0;
1585
1586         snd_azf3328_timer_hw.resolution *= seqtimer_scaling;
1587         snd_azf3328_timer_hw.ticks /= seqtimer_scaling;
1588         if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) {
1589                 goto out;
1590         }
1591
1592         strcpy(timer->name, "AZF3328 timer");
1593         timer->private_data = chip;
1594         timer->hw = snd_azf3328_timer_hw;
1595
1596         chip->timer = timer;
1597
1598         err = 0;
1599
1600 out:
1601         snd_azf3328_dbgcallleave();
1602         return err;
1603 }
1604
1605 /******************************************************************/
1606
1607 #if 0
1608 /* check whether a bit can be modified */
1609 static void
1610 snd_azf3328_test_bit(unsigned int reg, int bit)
1611 {
1612         unsigned char val, valoff, valon;
1613
1614         val = inb(reg);
1615
1616         outb(val & ~(1 << bit), reg);
1617         valoff = inb(reg);
1618
1619         outb(val|(1 << bit), reg);
1620         valon = inb(reg);
1621         
1622         outb(val, reg);
1623
1624         printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
1625 }
1626 #endif
1627
1628 static void
1629 snd_azf3328_debug_show_ports(const azf3328_t *chip)
1630 {
1631 #if DEBUG_MISC
1632         u16 tmp;
1633
1634         snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
1635
1636         snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5));
1637
1638         for (tmp=0; tmp <= 0x01; tmp += 1)
1639                 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
1640
1641         for (tmp = 0; tmp <= 0x6E; tmp += 2)
1642                 snd_azf3328_dbgmisc("0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inb(chip, tmp));
1643 #endif
1644 }
1645
1646 static int __devinit
1647 snd_azf3328_create(snd_card_t * card,
1648                                          struct pci_dev *pci,
1649                                          unsigned long device_type,
1650                                          azf3328_t ** rchip)
1651 {
1652         azf3328_t *chip;
1653         int err;
1654         static snd_device_ops_t ops = {
1655                 .dev_free =     snd_azf3328_dev_free,
1656         };
1657         u16 tmp;
1658
1659         *rchip = NULL;
1660
1661         if ((err = pci_enable_device(pci)) < 0)
1662                 return err;
1663
1664         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1665         if (chip == NULL) {
1666                 err = -ENOMEM;
1667                 goto out_err;
1668         }
1669         spin_lock_init(&chip->reg_lock);
1670         chip->card = card;
1671         chip->pci = pci;
1672         chip->irq = -1;
1673
1674         /* check if we can restrict PCI DMA transfers to 24 bits */
1675         if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
1676             pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
1677                 snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
1678                 err = -ENXIO;
1679                 goto out_err;
1680         }
1681
1682         if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
1683                 goto out_err;
1684         }
1685
1686         chip->codec_port = pci_resource_start(pci, 0);
1687         chip->io2_port   = pci_resource_start(pci, 1);
1688         chip->mpu_port   = pci_resource_start(pci, 2);
1689         chip->synth_port = pci_resource_start(pci, 3);
1690         chip->mixer_port = pci_resource_start(pci, 4);
1691
1692         if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1693                 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1694                 err = -EBUSY;
1695                 goto out_err;
1696         }
1697         chip->irq = pci->irq;
1698         pci_set_master(pci);
1699         synchronize_irq(chip->irq);
1700
1701         snd_azf3328_debug_show_ports(chip);
1702         
1703         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1704                 goto out_err;
1705         }
1706
1707         /* create mixer interface & switches */
1708         if ((err = snd_azf3328_mixer_new(chip)) < 0)
1709                 goto out_err;
1710
1711 #if 0
1712         /* set very low bitrate to reduce noise and power consumption? */
1713         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
1714 #endif
1715
1716         /* standard chip init stuff */
1717         /* default IRQ init value */
1718         tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE;
1719
1720         spin_lock_irq(&chip->reg_lock);
1721         snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp);
1722         snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp);
1723         snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp);
1724         snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */
1725         spin_unlock_irq(&chip->reg_lock);
1726
1727         snd_card_set_dev(card, &pci->dev);
1728
1729         *rchip = chip;
1730
1731         err = 0;
1732         goto out;
1733
1734 out_err:
1735         if (chip)
1736                 snd_azf3328_free(chip);
1737         pci_disable_device(pci);
1738
1739 out:
1740         return err;
1741 }
1742
1743 static int __devinit
1744 snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1745 {
1746         static int dev;
1747         snd_card_t *card;
1748         azf3328_t *chip;
1749         opl3_t *opl3;
1750         int err;
1751
1752         snd_azf3328_dbgcallenter();
1753         if (dev >= SNDRV_CARDS)
1754                 return -ENODEV;
1755         if (!enable[dev]) {
1756                 dev++;
1757                 return -ENOENT;
1758         }
1759
1760         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
1761         if (card == NULL)
1762                 return -ENOMEM;
1763
1764         strcpy(card->driver, "AZF3328");
1765         strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
1766
1767         if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
1768                 goto out_err;
1769         }
1770
1771         if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
1772                                         chip->mpu_port, 1, pci->irq, 0,
1773                                         &chip->rmidi)) < 0) {
1774                 snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
1775                 goto out_err;
1776         }
1777
1778         if ((err = snd_azf3328_timer(chip, 0)) < 0) {
1779                 goto out_err;
1780         }
1781
1782         if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
1783                 goto out_err;
1784         }
1785
1786         if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
1787                             OPL3_HW_AUTO, 1, &opl3) < 0) {
1788                 snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
1789                            chip->synth_port, chip->synth_port+2 );
1790         } else {
1791                 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1792                         goto out_err;
1793                 }
1794         }
1795
1796         sprintf(card->longname, "%s at 0x%lx, irq %i",
1797                 card->shortname, chip->codec_port, chip->irq);
1798
1799         if ((err = snd_card_register(card)) < 0) {
1800                 goto out_err;
1801         }
1802
1803 #ifdef MODULE
1804         printk(
1805 "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168\n"
1806 "azt3328: (hardware was completely undocumented - ZERO support from Aztech).\n"
1807 "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n"
1808 "azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n",
1809         1024000 / seqtimer_scaling, seqtimer_scaling);
1810 #endif
1811
1812         if (snd_azf3328_config_joystick(chip, dev) < 0)
1813                 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1814                               snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1815
1816         pci_set_drvdata(pci, card);
1817         dev++;
1818
1819         err = 0;
1820         goto out;
1821         
1822 out_err:
1823         snd_card_free(card);
1824         
1825 out:
1826         snd_azf3328_dbgcallleave();
1827         return err;
1828 }
1829
1830 static void __devexit
1831 snd_azf3328_remove(struct pci_dev *pci)
1832 {
1833         snd_azf3328_dbgcallenter();
1834         snd_card_free(pci_get_drvdata(pci));
1835         pci_set_drvdata(pci, NULL);
1836         snd_azf3328_dbgcallleave();
1837 }
1838
1839 static struct pci_driver driver = {
1840         .name = "AZF3328",
1841         .id_table = snd_azf3328_ids,
1842         .probe = snd_azf3328_probe,
1843         .remove = __devexit_p(snd_azf3328_remove),
1844 };
1845
1846 static int __init
1847 alsa_card_azf3328_init(void)
1848 {
1849         int err;
1850         snd_azf3328_dbgcallenter();
1851         err = pci_register_driver(&driver);
1852         snd_azf3328_dbgcallleave();
1853         return err;
1854 }
1855
1856 static void __exit
1857 alsa_card_azf3328_exit(void)
1858 {
1859         snd_azf3328_dbgcallenter();
1860         pci_unregister_driver(&driver);
1861         snd_azf3328_dbgcallleave();
1862 }
1863
1864 module_init(alsa_card_azf3328_init)
1865 module_exit(alsa_card_azf3328_exit)