ALSA: wss_lib: use wss pcm code instead of ad1848 one
[linux-2.6.git] / sound / isa / wss / wss_lib.c
1 /*
2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3  *  Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
4  *
5  *  Bugs:
6  *     - sometimes record brokes playback with WSS portion of
7  *       Yamaha OPL3-SA3 chip
8  *     - CS4231 (GUS MAX) - still trouble with occasional noises
9  *                        - broken initialization?
10  *
11  *   This program is free software; you can redistribute it and/or modify
12  *   it under the terms of the GNU General Public License as published by
13  *   the Free Software Foundation; either version 2 of the License, or
14  *   (at your option) any later version.
15  *
16  *   This program is distributed in the hope that it will be useful,
17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  *   GNU General Public License for more details.
20  *
21  *   You should have received a copy of the GNU General Public License
22  *   along with this program; if not, write to the Free Software
23  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
24  *
25  */
26
27 #include <linux/delay.h>
28 #include <linux/pm.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/slab.h>
32 #include <linux/ioport.h>
33 #include <sound/core.h>
34 #include <sound/wss.h>
35 #include <sound/pcm_params.h>
36 #include <sound/tlv.h>
37
38 #include <asm/io.h>
39 #include <asm/dma.h>
40 #include <asm/irq.h>
41
42 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
43 MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
44 MODULE_LICENSE("GPL");
45
46 #if 0
47 #define SNDRV_DEBUG_MCE
48 #endif
49
50 /*
51  *  Some variables
52  */
53
54 static unsigned char freq_bits[14] = {
55         /* 5510 */      0x00 | CS4231_XTAL2,
56         /* 6620 */      0x0E | CS4231_XTAL2,
57         /* 8000 */      0x00 | CS4231_XTAL1,
58         /* 9600 */      0x0E | CS4231_XTAL1,
59         /* 11025 */     0x02 | CS4231_XTAL2,
60         /* 16000 */     0x02 | CS4231_XTAL1,
61         /* 18900 */     0x04 | CS4231_XTAL2,
62         /* 22050 */     0x06 | CS4231_XTAL2,
63         /* 27042 */     0x04 | CS4231_XTAL1,
64         /* 32000 */     0x06 | CS4231_XTAL1,
65         /* 33075 */     0x0C | CS4231_XTAL2,
66         /* 37800 */     0x08 | CS4231_XTAL2,
67         /* 44100 */     0x0A | CS4231_XTAL2,
68         /* 48000 */     0x0C | CS4231_XTAL1
69 };
70
71 static unsigned int rates[14] = {
72         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
73         27042, 32000, 33075, 37800, 44100, 48000
74 };
75
76 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
77         .count = ARRAY_SIZE(rates),
78         .list = rates,
79         .mask = 0,
80 };
81
82 static int snd_wss_xrate(struct snd_pcm_runtime *runtime)
83 {
84         return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
85                                           &hw_constraints_rates);
86 }
87
88 static unsigned char snd_wss_original_image[32] =
89 {
90         0x00,                   /* 00/00 - lic */
91         0x00,                   /* 01/01 - ric */
92         0x9f,                   /* 02/02 - la1ic */
93         0x9f,                   /* 03/03 - ra1ic */
94         0x9f,                   /* 04/04 - la2ic */
95         0x9f,                   /* 05/05 - ra2ic */
96         0xbf,                   /* 06/06 - loc */
97         0xbf,                   /* 07/07 - roc */
98         0x20,                   /* 08/08 - pdfr */
99         CS4231_AUTOCALIB,       /* 09/09 - ic */
100         0x00,                   /* 0a/10 - pc */
101         0x00,                   /* 0b/11 - ti */
102         CS4231_MODE2,           /* 0c/12 - mi */
103         0xfc,                   /* 0d/13 - lbc */
104         0x00,                   /* 0e/14 - pbru */
105         0x00,                   /* 0f/15 - pbrl */
106         0x80,                   /* 10/16 - afei */
107         0x01,                   /* 11/17 - afeii */
108         0x9f,                   /* 12/18 - llic */
109         0x9f,                   /* 13/19 - rlic */
110         0x00,                   /* 14/20 - tlb */
111         0x00,                   /* 15/21 - thb */
112         0x00,                   /* 16/22 - la3mic/reserved */
113         0x00,                   /* 17/23 - ra3mic/reserved */
114         0x00,                   /* 18/24 - afs */
115         0x00,                   /* 19/25 - lamoc/version */
116         0xcf,                   /* 1a/26 - mioc */
117         0x00,                   /* 1b/27 - ramoc/reserved */
118         0x20,                   /* 1c/28 - cdfr */
119         0x00,                   /* 1d/29 - res4 */
120         0x00,                   /* 1e/30 - cbru */
121         0x00,                   /* 1f/31 - cbrl */
122 };
123
124 static unsigned char snd_opti93x_original_image[32] =
125 {
126         0x00,           /* 00/00 - l_mixout_outctrl */
127         0x00,           /* 01/01 - r_mixout_outctrl */
128         0x88,           /* 02/02 - l_cd_inctrl */
129         0x88,           /* 03/03 - r_cd_inctrl */
130         0x88,           /* 04/04 - l_a1/fm_inctrl */
131         0x88,           /* 05/05 - r_a1/fm_inctrl */
132         0x80,           /* 06/06 - l_dac_inctrl */
133         0x80,           /* 07/07 - r_dac_inctrl */
134         0x00,           /* 08/08 - ply_dataform_reg */
135         0x00,           /* 09/09 - if_conf */
136         0x00,           /* 0a/10 - pin_ctrl */
137         0x00,           /* 0b/11 - err_init_reg */
138         0x0a,           /* 0c/12 - id_reg */
139         0x00,           /* 0d/13 - reserved */
140         0x00,           /* 0e/14 - ply_upcount_reg */
141         0x00,           /* 0f/15 - ply_lowcount_reg */
142         0x88,           /* 10/16 - reserved/l_a1_inctrl */
143         0x88,           /* 11/17 - reserved/r_a1_inctrl */
144         0x88,           /* 12/18 - l_line_inctrl */
145         0x88,           /* 13/19 - r_line_inctrl */
146         0x88,           /* 14/20 - l_mic_inctrl */
147         0x88,           /* 15/21 - r_mic_inctrl */
148         0x80,           /* 16/22 - l_out_outctrl */
149         0x80,           /* 17/23 - r_out_outctrl */
150         0x00,           /* 18/24 - reserved */
151         0x00,           /* 19/25 - reserved */
152         0x00,           /* 1a/26 - reserved */
153         0x00,           /* 1b/27 - reserved */
154         0x00,           /* 1c/28 - cap_dataform_reg */
155         0x00,           /* 1d/29 - reserved */
156         0x00,           /* 1e/30 - cap_upcount_reg */
157         0x00            /* 1f/31 - cap_lowcount_reg */
158 };
159
160 /*
161  *  Basic I/O functions
162  */
163
164 static inline void wss_outb(struct snd_wss *chip, u8 offset, u8 val)
165 {
166         outb(val, chip->port + offset);
167 }
168
169 static inline u8 wss_inb(struct snd_wss *chip, u8 offset)
170 {
171         return inb(chip->port + offset);
172 }
173
174 static void snd_wss_wait(struct snd_wss *chip)
175 {
176         int timeout;
177
178         for (timeout = 250;
179              timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
180              timeout--)
181                 udelay(100);
182 }
183
184 static void snd_wss_outm(struct snd_wss *chip, unsigned char reg,
185                             unsigned char mask, unsigned char value)
186 {
187         unsigned char tmp = (chip->image[reg] & mask) | value;
188
189         snd_wss_wait(chip);
190 #ifdef CONFIG_SND_DEBUG
191         if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
192                 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
193 #endif
194         chip->image[reg] = tmp;
195         if (!chip->calibrate_mute) {
196                 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
197                 wmb();
198                 wss_outb(chip, CS4231P(REG), tmp);
199                 mb();
200         }
201 }
202
203 static void snd_wss_dout(struct snd_wss *chip, unsigned char reg,
204                          unsigned char value)
205 {
206         int timeout;
207
208         for (timeout = 250;
209              timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
210              timeout--)
211                 udelay(10);
212         wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
213         wss_outb(chip, CS4231P(REG), value);
214         mb();
215 }
216
217 void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char value)
218 {
219         snd_wss_wait(chip);
220 #ifdef CONFIG_SND_DEBUG
221         if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
222                 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
223 #endif
224         wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
225         wss_outb(chip, CS4231P(REG), value);
226         chip->image[reg] = value;
227         mb();
228         snd_printdd("codec out - reg 0x%x = 0x%x\n",
229                         chip->mce_bit | reg, value);
230 }
231 EXPORT_SYMBOL(snd_wss_out);
232
233 unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg)
234 {
235         snd_wss_wait(chip);
236 #ifdef CONFIG_SND_DEBUG
237         if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
238                 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
239 #endif
240         wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
241         mb();
242         return wss_inb(chip, CS4231P(REG));
243 }
244 EXPORT_SYMBOL(snd_wss_in);
245
246 void snd_cs4236_ext_out(struct snd_wss *chip, unsigned char reg,
247                         unsigned char val)
248 {
249         wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
250         wss_outb(chip, CS4231P(REG),
251                  reg | (chip->image[CS4236_EXT_REG] & 0x01));
252         wss_outb(chip, CS4231P(REG), val);
253         chip->eimage[CS4236_REG(reg)] = val;
254 #if 0
255         printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
256 #endif
257 }
258 EXPORT_SYMBOL(snd_cs4236_ext_out);
259
260 unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg)
261 {
262         wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
263         wss_outb(chip, CS4231P(REG),
264                  reg | (chip->image[CS4236_EXT_REG] & 0x01));
265 #if 1
266         return wss_inb(chip, CS4231P(REG));
267 #else
268         {
269                 unsigned char res;
270                 res = wss_inb(chip, CS4231P(REG));
271                 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
272                 return res;
273         }
274 #endif
275 }
276 EXPORT_SYMBOL(snd_cs4236_ext_in);
277
278 #if 0
279
280 static void snd_wss_debug(struct snd_wss *chip)
281 {
282         printk(KERN_DEBUG
283                 "CS4231 REGS:      INDEX = 0x%02x  "
284                 "                 STATUS = 0x%02x\n",
285                                         wss_inb(chip, CS4231P(REGSEL),
286                                         wss_inb(chip, CS4231P(STATUS)));
287         printk(KERN_DEBUG
288                 "  0x00: left input      = 0x%02x  "
289                 "  0x10: alt 1 (CFIG 2)  = 0x%02x\n",
290                                         snd_wss_in(chip, 0x00),
291                                         snd_wss_in(chip, 0x10));
292         printk(KERN_DEBUG
293                 "  0x01: right input     = 0x%02x  "
294                 "  0x11: alt 2 (CFIG 3)  = 0x%02x\n",
295                                         snd_wss_in(chip, 0x01),
296                                         snd_wss_in(chip, 0x11));
297         printk(KERN_DEBUG
298                 "  0x02: GF1 left input  = 0x%02x  "
299                 "  0x12: left line in    = 0x%02x\n",
300                                         snd_wss_in(chip, 0x02),
301                                         snd_wss_in(chip, 0x12));
302         printk(KERN_DEBUG
303                 "  0x03: GF1 right input = 0x%02x  "
304                 "  0x13: right line in   = 0x%02x\n",
305                                         snd_wss_in(chip, 0x03),
306                                         snd_wss_in(chip, 0x13));
307         printk(KERN_DEBUG
308                 "  0x04: CD left input   = 0x%02x  "
309                 "  0x14: timer low       = 0x%02x\n",
310                                         snd_wss_in(chip, 0x04),
311                                         snd_wss_in(chip, 0x14));
312         printk(KERN_DEBUG
313                 "  0x05: CD right input  = 0x%02x  "
314                 "  0x15: timer high      = 0x%02x\n",
315                                         snd_wss_in(chip, 0x05),
316                                         snd_wss_in(chip, 0x15));
317         printk(KERN_DEBUG
318                 "  0x06: left output     = 0x%02x  "
319                 "  0x16: left MIC (PnP)  = 0x%02x\n",
320                                         snd_wss_in(chip, 0x06),
321                                         snd_wss_in(chip, 0x16));
322         printk(KERN_DEBUG
323                 "  0x07: right output    = 0x%02x  "
324                 "  0x17: right MIC (PnP) = 0x%02x\n",
325                                         snd_wss_in(chip, 0x07),
326                                         snd_wss_in(chip, 0x17));
327         printk(KERN_DEBUG
328                 "  0x08: playback format = 0x%02x  "
329                 "  0x18: IRQ status      = 0x%02x\n",
330                                         snd_wss_in(chip, 0x08),
331                                         snd_wss_in(chip, 0x18));
332         printk(KERN_DEBUG
333                 "  0x09: iface (CFIG 1)  = 0x%02x  "
334                 "  0x19: left line out   = 0x%02x\n",
335                                         snd_wss_in(chip, 0x09),
336                                         snd_wss_in(chip, 0x19));
337         printk(KERN_DEBUG
338                 "  0x0a: pin control     = 0x%02x  "
339                 "  0x1a: mono control    = 0x%02x\n",
340                                         snd_wss_in(chip, 0x0a),
341                                         snd_wss_in(chip, 0x1a));
342         printk(KERN_DEBUG
343                 "  0x0b: init & status   = 0x%02x  "
344                 "  0x1b: right line out  = 0x%02x\n",
345                                         snd_wss_in(chip, 0x0b),
346                                         snd_wss_in(chip, 0x1b));
347         printk(KERN_DEBUG
348                 "  0x0c: revision & mode = 0x%02x  "
349                 "  0x1c: record format   = 0x%02x\n",
350                                         snd_wss_in(chip, 0x0c),
351                                         snd_wss_in(chip, 0x1c));
352         printk(KERN_DEBUG
353                 "  0x0d: loopback        = 0x%02x  "
354                 "  0x1d: var freq (PnP)  = 0x%02x\n",
355                                         snd_wss_in(chip, 0x0d),
356                                         snd_wss_in(chip, 0x1d));
357         printk(KERN_DEBUG
358                 "  0x0e: ply upr count   = 0x%02x  "
359                 "  0x1e: ply lwr count   = 0x%02x\n",
360                                         snd_wss_in(chip, 0x0e),
361                                         snd_wss_in(chip, 0x1e));
362         printk(KERN_DEBUG
363                 "  0x0f: rec upr count   = 0x%02x  "
364                 "  0x1f: rec lwr count   = 0x%02x\n",
365                                         snd_wss_in(chip, 0x0f),
366                                         snd_wss_in(chip, 0x1f));
367 }
368
369 #endif
370
371 /*
372  *  CS4231 detection / MCE routines
373  */
374
375 static void snd_wss_busy_wait(struct snd_wss *chip)
376 {
377         int timeout;
378
379         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
380         for (timeout = 5; timeout > 0; timeout--)
381                 wss_inb(chip, CS4231P(REGSEL));
382         /* end of cleanup sequence */
383         for (timeout = 25000;
384              timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
385              timeout--)
386                 udelay(10);
387 }
388
389 void snd_wss_mce_up(struct snd_wss *chip)
390 {
391         unsigned long flags;
392         int timeout;
393
394         snd_wss_wait(chip);
395 #ifdef CONFIG_SND_DEBUG
396         if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
397                 snd_printk("mce_up - auto calibration time out (0)\n");
398 #endif
399         spin_lock_irqsave(&chip->reg_lock, flags);
400         chip->mce_bit |= CS4231_MCE;
401         timeout = wss_inb(chip, CS4231P(REGSEL));
402         if (timeout == 0x80)
403                 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
404         if (!(timeout & CS4231_MCE))
405                 wss_outb(chip, CS4231P(REGSEL),
406                          chip->mce_bit | (timeout & 0x1f));
407         spin_unlock_irqrestore(&chip->reg_lock, flags);
408 }
409 EXPORT_SYMBOL(snd_wss_mce_up);
410
411 void snd_wss_mce_down(struct snd_wss *chip)
412 {
413         unsigned long flags;
414         unsigned long end_time;
415         int timeout;
416         int hw_mask = WSS_HW_CS4231_MASK | WSS_HW_CS4232_MASK | WSS_HW_AD1848;
417
418         snd_wss_busy_wait(chip);
419
420 #ifdef CONFIG_SND_DEBUG
421         if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
422                 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
423 #endif
424         spin_lock_irqsave(&chip->reg_lock, flags);
425         chip->mce_bit &= ~CS4231_MCE;
426         timeout = wss_inb(chip, CS4231P(REGSEL));
427         wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
428         spin_unlock_irqrestore(&chip->reg_lock, flags);
429         if (timeout == 0x80)
430                 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
431         if ((timeout & CS4231_MCE) == 0 || !(chip->hardware & hw_mask))
432                 return;
433
434         /*
435          * Wait for (possible -- during init auto-calibration may not be set)
436          * calibration process to start. Needs upto 5 sample periods on AD1848
437          * which at the slowest possible rate of 5.5125 kHz means 907 us.
438          */
439         msleep(1);
440
441         snd_printdd("(1) jiffies = %lu\n", jiffies);
442
443         /* check condition up to 250 ms */
444         end_time = jiffies + msecs_to_jiffies(250);
445         while (snd_wss_in(chip, CS4231_TEST_INIT) &
446                 CS4231_CALIB_IN_PROGRESS) {
447
448                 if (time_after(jiffies, end_time)) {
449                         snd_printk(KERN_ERR "mce_down - "
450                                         "auto calibration time out (2)\n");
451                         return;
452                 }
453                 msleep(1);
454         }
455
456         snd_printdd("(2) jiffies = %lu\n", jiffies);
457
458         /* check condition up to 100 ms */
459         end_time = jiffies + msecs_to_jiffies(100);
460         while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
461                 if (time_after(jiffies, end_time)) {
462                         snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
463                         return;
464                 }
465                 msleep(1);
466         }
467
468         snd_printdd("(3) jiffies = %lu\n", jiffies);
469         snd_printd("mce_down - exit = 0x%x\n", wss_inb(chip, CS4231P(REGSEL)));
470 }
471 EXPORT_SYMBOL(snd_wss_mce_down);
472
473 static unsigned int snd_wss_get_count(unsigned char format, unsigned int size)
474 {
475         switch (format & 0xe0) {
476         case CS4231_LINEAR_16:
477         case CS4231_LINEAR_16_BIG:
478                 size >>= 1;
479                 break;
480         case CS4231_ADPCM_16:
481                 return size >> 2;
482         }
483         if (format & CS4231_STEREO)
484                 size >>= 1;
485         return size;
486 }
487
488 static int snd_wss_trigger(struct snd_pcm_substream *substream,
489                            int cmd)
490 {
491         struct snd_wss *chip = snd_pcm_substream_chip(substream);
492         int result = 0;
493         unsigned int what;
494         struct snd_pcm_substream *s;
495         int do_start;
496
497         switch (cmd) {
498         case SNDRV_PCM_TRIGGER_START:
499         case SNDRV_PCM_TRIGGER_RESUME:
500                 do_start = 1; break;
501         case SNDRV_PCM_TRIGGER_STOP:
502         case SNDRV_PCM_TRIGGER_SUSPEND:
503                 do_start = 0; break;
504         default:
505                 return -EINVAL;
506         }
507
508         what = 0;
509         snd_pcm_group_for_each_entry(s, substream) {
510                 if (s == chip->playback_substream) {
511                         what |= CS4231_PLAYBACK_ENABLE;
512                         snd_pcm_trigger_done(s, substream);
513                 } else if (s == chip->capture_substream) {
514                         what |= CS4231_RECORD_ENABLE;
515                         snd_pcm_trigger_done(s, substream);
516                 }
517         }
518         spin_lock(&chip->reg_lock);
519         if (do_start) {
520                 chip->image[CS4231_IFACE_CTRL] |= what;
521                 if (chip->trigger)
522                         chip->trigger(chip, what, 1);
523         } else {
524                 chip->image[CS4231_IFACE_CTRL] &= ~what;
525                 if (chip->trigger)
526                         chip->trigger(chip, what, 0);
527         }
528         snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
529         spin_unlock(&chip->reg_lock);
530 #if 0
531         snd_wss_debug(chip);
532 #endif
533         return result;
534 }
535
536 /*
537  *  CODEC I/O
538  */
539
540 static unsigned char snd_wss_get_rate(unsigned int rate)
541 {
542         int i;
543
544         for (i = 0; i < ARRAY_SIZE(rates); i++)
545                 if (rate == rates[i])
546                         return freq_bits[i];
547         // snd_BUG();
548         return freq_bits[ARRAY_SIZE(rates) - 1];
549 }
550
551 static unsigned char snd_wss_get_format(struct snd_wss *chip,
552                                         int format,
553                                         int channels)
554 {
555         unsigned char rformat;
556
557         rformat = CS4231_LINEAR_8;
558         switch (format) {
559         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
560         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
561         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
562         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
563         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
564         }
565         if (channels > 1)
566                 rformat |= CS4231_STEREO;
567 #if 0
568         snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
569 #endif
570         return rformat;
571 }
572
573 static void snd_wss_calibrate_mute(struct snd_wss *chip, int mute)
574 {
575         unsigned long flags;
576
577         mute = mute ? 1 : 0;
578         spin_lock_irqsave(&chip->reg_lock, flags);
579         if (chip->calibrate_mute == mute) {
580                 spin_unlock_irqrestore(&chip->reg_lock, flags);
581                 return;
582         }
583         if (!mute) {
584                 snd_wss_dout(chip, CS4231_LEFT_INPUT,
585                              chip->image[CS4231_LEFT_INPUT]);
586                 snd_wss_dout(chip, CS4231_RIGHT_INPUT,
587                              chip->image[CS4231_RIGHT_INPUT]);
588                 snd_wss_dout(chip, CS4231_LOOPBACK,
589                              chip->image[CS4231_LOOPBACK]);
590         }
591         snd_wss_dout(chip, CS4231_AUX1_LEFT_INPUT,
592                      mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
593         snd_wss_dout(chip, CS4231_AUX1_RIGHT_INPUT,
594                      mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
595         snd_wss_dout(chip, CS4231_AUX2_LEFT_INPUT,
596                      mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
597         snd_wss_dout(chip, CS4231_AUX2_RIGHT_INPUT,
598                      mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
599         snd_wss_dout(chip, CS4231_LEFT_OUTPUT,
600                      mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
601         snd_wss_dout(chip, CS4231_RIGHT_OUTPUT,
602                      mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
603         if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
604                 snd_wss_dout(chip, CS4231_LEFT_LINE_IN,
605                              mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
606                 snd_wss_dout(chip, CS4231_RIGHT_LINE_IN,
607                              mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
608                 snd_wss_dout(chip, CS4231_MONO_CTRL,
609                              mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
610         }
611         if (chip->hardware == WSS_HW_INTERWAVE) {
612                 snd_wss_dout(chip, CS4231_LEFT_MIC_INPUT,
613                              mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
614                 snd_wss_dout(chip, CS4231_RIGHT_MIC_INPUT,
615                              mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);
616                 snd_wss_dout(chip, CS4231_LINE_LEFT_OUTPUT,
617                         mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
618                 snd_wss_dout(chip, CS4231_LINE_RIGHT_OUTPUT,
619                         mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
620         }
621         chip->calibrate_mute = mute;
622         spin_unlock_irqrestore(&chip->reg_lock, flags);
623 }
624
625 static void snd_wss_playback_format(struct snd_wss *chip,
626                                        struct snd_pcm_hw_params *params,
627                                        unsigned char pdfr)
628 {
629         unsigned long flags;
630         int full_calib = 1;
631
632         mutex_lock(&chip->mce_mutex);
633         snd_wss_calibrate_mute(chip, 1);
634         if (chip->hardware == WSS_HW_CS4231A ||
635             (chip->hardware & WSS_HW_CS4232_MASK)) {
636                 spin_lock_irqsave(&chip->reg_lock, flags);
637                 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) {      /* rate is same? */
638                         snd_wss_out(chip, CS4231_ALT_FEATURE_1,
639                                     chip->image[CS4231_ALT_FEATURE_1] | 0x10);
640                         chip->image[CS4231_PLAYBK_FORMAT] = pdfr;
641                         snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
642                                     chip->image[CS4231_PLAYBK_FORMAT]);
643                         snd_wss_out(chip, CS4231_ALT_FEATURE_1,
644                                     chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
645                         udelay(100); /* Fixes audible clicks at least on GUS MAX */
646                         full_calib = 0;
647                 }
648                 spin_unlock_irqrestore(&chip->reg_lock, flags);
649         }
650         if (full_calib) {
651                 snd_wss_mce_up(chip);
652                 spin_lock_irqsave(&chip->reg_lock, flags);
653                 if (chip->hardware != WSS_HW_INTERWAVE && !chip->single_dma) {
654                         if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)
655                                 pdfr = (pdfr & 0xf0) |
656                                        (chip->image[CS4231_REC_FORMAT] & 0x0f);
657                 } else {
658                         chip->image[CS4231_PLAYBK_FORMAT] = pdfr;
659                 }
660                 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, pdfr);
661                 spin_unlock_irqrestore(&chip->reg_lock, flags);
662                 if (chip->hardware == WSS_HW_OPL3SA2)
663                         udelay(100);    /* this seems to help */
664                 snd_wss_mce_down(chip);
665         }
666         snd_wss_calibrate_mute(chip, 0);
667         mutex_unlock(&chip->mce_mutex);
668 }
669
670 static void snd_wss_capture_format(struct snd_wss *chip,
671                                    struct snd_pcm_hw_params *params,
672                                    unsigned char cdfr)
673 {
674         unsigned long flags;
675         int full_calib = 1;
676
677         mutex_lock(&chip->mce_mutex);
678         snd_wss_calibrate_mute(chip, 1);
679         if (chip->hardware == WSS_HW_CS4231A ||
680             (chip->hardware & WSS_HW_CS4232_MASK)) {
681                 spin_lock_irqsave(&chip->reg_lock, flags);
682                 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) ||      /* rate is same? */
683                     (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
684                         snd_wss_out(chip, CS4231_ALT_FEATURE_1,
685                                 chip->image[CS4231_ALT_FEATURE_1] | 0x20);
686                         snd_wss_out(chip, CS4231_REC_FORMAT,
687                                 chip->image[CS4231_REC_FORMAT] = cdfr);
688                         snd_wss_out(chip, CS4231_ALT_FEATURE_1,
689                                 chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
690                         full_calib = 0;
691                 }
692                 spin_unlock_irqrestore(&chip->reg_lock, flags);
693         }
694         if (full_calib) {
695                 snd_wss_mce_up(chip);
696                 spin_lock_irqsave(&chip->reg_lock, flags);
697                 if (chip->hardware != WSS_HW_INTERWAVE &&
698                     !(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
699                         if (chip->single_dma)
700                                 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, cdfr);
701                         else
702                                 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
703                                    (chip->image[CS4231_PLAYBK_FORMAT] & 0xf0) |
704                                    (cdfr & 0x0f));
705                         spin_unlock_irqrestore(&chip->reg_lock, flags);
706                         snd_wss_mce_down(chip);
707                         snd_wss_mce_up(chip);
708                         spin_lock_irqsave(&chip->reg_lock, flags);
709                 }
710                 if (chip->hardware & WSS_HW_AD1848_MASK)
711                         snd_wss_out(chip, CS4231_PLAYBK_FORMAT, cdfr);
712                 else
713                         snd_wss_out(chip, CS4231_REC_FORMAT, cdfr);
714                 spin_unlock_irqrestore(&chip->reg_lock, flags);
715                 snd_wss_mce_down(chip);
716         }
717         snd_wss_calibrate_mute(chip, 0);
718         mutex_unlock(&chip->mce_mutex);
719 }
720
721 /*
722  *  Timer interface
723  */
724
725 static unsigned long snd_wss_timer_resolution(struct snd_timer *timer)
726 {
727         struct snd_wss *chip = snd_timer_chip(timer);
728         if (chip->hardware & WSS_HW_CS4236B_MASK)
729                 return 14467;
730         else
731                 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
732 }
733
734 static int snd_wss_timer_start(struct snd_timer *timer)
735 {
736         unsigned long flags;
737         unsigned int ticks;
738         struct snd_wss *chip = snd_timer_chip(timer);
739         spin_lock_irqsave(&chip->reg_lock, flags);
740         ticks = timer->sticks;
741         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
742             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
743             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
744                 chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8);
745                 snd_wss_out(chip, CS4231_TIMER_HIGH,
746                             chip->image[CS4231_TIMER_HIGH]);
747                 chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks;
748                 snd_wss_out(chip, CS4231_TIMER_LOW,
749                             chip->image[CS4231_TIMER_LOW]);
750                 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
751                             chip->image[CS4231_ALT_FEATURE_1] |
752                             CS4231_TIMER_ENABLE);
753         }
754         spin_unlock_irqrestore(&chip->reg_lock, flags);
755         return 0;
756 }
757
758 static int snd_wss_timer_stop(struct snd_timer *timer)
759 {
760         unsigned long flags;
761         struct snd_wss *chip = snd_timer_chip(timer);
762         spin_lock_irqsave(&chip->reg_lock, flags);
763         chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
764         snd_wss_out(chip, CS4231_ALT_FEATURE_1,
765                     chip->image[CS4231_ALT_FEATURE_1]);
766         spin_unlock_irqrestore(&chip->reg_lock, flags);
767         return 0;
768 }
769
770 static void snd_wss_init(struct snd_wss *chip)
771 {
772         unsigned long flags;
773
774         snd_wss_mce_down(chip);
775
776 #ifdef SNDRV_DEBUG_MCE
777         snd_printk("init: (1)\n");
778 #endif
779         snd_wss_mce_up(chip);
780         spin_lock_irqsave(&chip->reg_lock, flags);
781         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
782                                             CS4231_PLAYBACK_PIO |
783                                             CS4231_RECORD_ENABLE |
784                                             CS4231_RECORD_PIO |
785                                             CS4231_CALIB_MODE);
786         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
787         snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
788         spin_unlock_irqrestore(&chip->reg_lock, flags);
789         snd_wss_mce_down(chip);
790
791 #ifdef SNDRV_DEBUG_MCE
792         snd_printk("init: (2)\n");
793 #endif
794
795         snd_wss_mce_up(chip);
796         spin_lock_irqsave(&chip->reg_lock, flags);
797         snd_wss_out(chip,
798                     CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
799         spin_unlock_irqrestore(&chip->reg_lock, flags);
800         snd_wss_mce_down(chip);
801
802 #ifdef SNDRV_DEBUG_MCE
803         snd_printk("init: (3) - afei = 0x%x\n",
804                    chip->image[CS4231_ALT_FEATURE_1]);
805 #endif
806
807         spin_lock_irqsave(&chip->reg_lock, flags);
808         snd_wss_out(chip, CS4231_ALT_FEATURE_2,
809                     chip->image[CS4231_ALT_FEATURE_2]);
810         spin_unlock_irqrestore(&chip->reg_lock, flags);
811
812         snd_wss_mce_up(chip);
813         spin_lock_irqsave(&chip->reg_lock, flags);
814         snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
815                     chip->image[CS4231_PLAYBK_FORMAT]);
816         spin_unlock_irqrestore(&chip->reg_lock, flags);
817         snd_wss_mce_down(chip);
818
819 #ifdef SNDRV_DEBUG_MCE
820         snd_printk("init: (4)\n");
821 #endif
822
823         snd_wss_mce_up(chip);
824         spin_lock_irqsave(&chip->reg_lock, flags);
825         if (!(chip->hardware & WSS_HW_AD1848_MASK))
826                 snd_wss_out(chip, CS4231_REC_FORMAT,
827                             chip->image[CS4231_REC_FORMAT]);
828         spin_unlock_irqrestore(&chip->reg_lock, flags);
829         snd_wss_mce_down(chip);
830
831 #ifdef SNDRV_DEBUG_MCE
832         snd_printk("init: (5)\n");
833 #endif
834 }
835
836 static int snd_wss_open(struct snd_wss *chip, unsigned int mode)
837 {
838         unsigned long flags;
839
840         mutex_lock(&chip->open_mutex);
841         if ((chip->mode & mode) ||
842             ((chip->mode & WSS_MODE_OPEN) && chip->single_dma)) {
843                 mutex_unlock(&chip->open_mutex);
844                 return -EAGAIN;
845         }
846         if (chip->mode & WSS_MODE_OPEN) {
847                 chip->mode |= mode;
848                 mutex_unlock(&chip->open_mutex);
849                 return 0;
850         }
851         /* ok. now enable and ack CODEC IRQ */
852         spin_lock_irqsave(&chip->reg_lock, flags);
853         if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
854                 snd_wss_out(chip, CS4231_IRQ_STATUS,
855                             CS4231_PLAYBACK_IRQ |
856                             CS4231_RECORD_IRQ |
857                             CS4231_TIMER_IRQ);
858                 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
859         }
860         wss_outb(chip, CS4231P(STATUS), 0);     /* clear IRQ */
861         wss_outb(chip, CS4231P(STATUS), 0);     /* clear IRQ */
862         chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
863         snd_wss_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
864         if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
865                 snd_wss_out(chip, CS4231_IRQ_STATUS,
866                             CS4231_PLAYBACK_IRQ |
867                             CS4231_RECORD_IRQ |
868                             CS4231_TIMER_IRQ);
869                 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
870         }
871         spin_unlock_irqrestore(&chip->reg_lock, flags);
872
873         chip->mode = mode;
874         mutex_unlock(&chip->open_mutex);
875         return 0;
876 }
877
878 static void snd_wss_close(struct snd_wss *chip, unsigned int mode)
879 {
880         unsigned long flags;
881
882         mutex_lock(&chip->open_mutex);
883         chip->mode &= ~mode;
884         if (chip->mode & WSS_MODE_OPEN) {
885                 mutex_unlock(&chip->open_mutex);
886                 return;
887         }
888         snd_wss_calibrate_mute(chip, 1);
889
890         /* disable IRQ */
891         spin_lock_irqsave(&chip->reg_lock, flags);
892         if (!(chip->hardware & WSS_HW_AD1848_MASK))
893                 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
894         wss_outb(chip, CS4231P(STATUS), 0);     /* clear IRQ */
895         wss_outb(chip, CS4231P(STATUS), 0);     /* clear IRQ */
896         chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
897         snd_wss_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
898
899         /* now disable record & playback */
900
901         if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
902                                                CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
903                 spin_unlock_irqrestore(&chip->reg_lock, flags);
904                 snd_wss_mce_up(chip);
905                 spin_lock_irqsave(&chip->reg_lock, flags);
906                 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
907                                                      CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
908                 snd_wss_out(chip, CS4231_IFACE_CTRL,
909                             chip->image[CS4231_IFACE_CTRL]);
910                 spin_unlock_irqrestore(&chip->reg_lock, flags);
911                 snd_wss_mce_down(chip);
912                 spin_lock_irqsave(&chip->reg_lock, flags);
913         }
914
915         /* clear IRQ again */
916         if (!(chip->hardware & WSS_HW_AD1848_MASK))
917                 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
918         wss_outb(chip, CS4231P(STATUS), 0);     /* clear IRQ */
919         wss_outb(chip, CS4231P(STATUS), 0);     /* clear IRQ */
920         spin_unlock_irqrestore(&chip->reg_lock, flags);
921
922         snd_wss_calibrate_mute(chip, 0);
923
924         chip->mode = 0;
925         mutex_unlock(&chip->open_mutex);
926 }
927
928 /*
929  *  timer open/close
930  */
931
932 static int snd_wss_timer_open(struct snd_timer *timer)
933 {
934         struct snd_wss *chip = snd_timer_chip(timer);
935         snd_wss_open(chip, WSS_MODE_TIMER);
936         return 0;
937 }
938
939 static int snd_wss_timer_close(struct snd_timer *timer)
940 {
941         struct snd_wss *chip = snd_timer_chip(timer);
942         snd_wss_close(chip, WSS_MODE_TIMER);
943         return 0;
944 }
945
946 static struct snd_timer_hardware snd_wss_timer_table =
947 {
948         .flags =        SNDRV_TIMER_HW_AUTO,
949         .resolution =   9945,
950         .ticks =        65535,
951         .open =         snd_wss_timer_open,
952         .close =        snd_wss_timer_close,
953         .c_resolution = snd_wss_timer_resolution,
954         .start =        snd_wss_timer_start,
955         .stop =         snd_wss_timer_stop,
956 };
957
958 /*
959  *  ok.. exported functions..
960  */
961
962 static int snd_wss_playback_hw_params(struct snd_pcm_substream *substream,
963                                          struct snd_pcm_hw_params *hw_params)
964 {
965         struct snd_wss *chip = snd_pcm_substream_chip(substream);
966         unsigned char new_pdfr;
967         int err;
968
969         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
970                 return err;
971         new_pdfr = snd_wss_get_format(chip, params_format(hw_params),
972                                 params_channels(hw_params)) |
973                                 snd_wss_get_rate(params_rate(hw_params));
974         chip->set_playback_format(chip, hw_params, new_pdfr);
975         return 0;
976 }
977
978 static int snd_wss_playback_hw_free(struct snd_pcm_substream *substream)
979 {
980         return snd_pcm_lib_free_pages(substream);
981 }
982
983 static int snd_wss_playback_prepare(struct snd_pcm_substream *substream)
984 {
985         struct snd_wss *chip = snd_pcm_substream_chip(substream);
986         struct snd_pcm_runtime *runtime = substream->runtime;
987         unsigned long flags;
988         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
989         unsigned int count = snd_pcm_lib_period_bytes(substream);
990
991         spin_lock_irqsave(&chip->reg_lock, flags);
992         chip->p_dma_size = size;
993         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
994         snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
995         count = snd_wss_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
996         snd_wss_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
997         snd_wss_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
998         spin_unlock_irqrestore(&chip->reg_lock, flags);
999 #if 0
1000         snd_wss_debug(chip);
1001 #endif
1002         return 0;
1003 }
1004
1005 static int snd_wss_capture_hw_params(struct snd_pcm_substream *substream,
1006                                         struct snd_pcm_hw_params *hw_params)
1007 {
1008         struct snd_wss *chip = snd_pcm_substream_chip(substream);
1009         unsigned char new_cdfr;
1010         int err;
1011
1012         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
1013                 return err;
1014         new_cdfr = snd_wss_get_format(chip, params_format(hw_params),
1015                            params_channels(hw_params)) |
1016                            snd_wss_get_rate(params_rate(hw_params));
1017         chip->set_capture_format(chip, hw_params, new_cdfr);
1018         return 0;
1019 }
1020
1021 static int snd_wss_capture_hw_free(struct snd_pcm_substream *substream)
1022 {
1023         return snd_pcm_lib_free_pages(substream);
1024 }
1025
1026 static int snd_wss_capture_prepare(struct snd_pcm_substream *substream)
1027 {
1028         struct snd_wss *chip = snd_pcm_substream_chip(substream);
1029         struct snd_pcm_runtime *runtime = substream->runtime;
1030         unsigned long flags;
1031         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
1032         unsigned int count = snd_pcm_lib_period_bytes(substream);
1033
1034         spin_lock_irqsave(&chip->reg_lock, flags);
1035         chip->c_dma_size = size;
1036         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
1037         snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
1038         if (chip->hardware & WSS_HW_AD1848_MASK)
1039                 count = snd_wss_get_count(chip->image[CS4231_PLAYBK_FORMAT],
1040                                           count);
1041         else
1042                 count = snd_wss_get_count(chip->image[CS4231_REC_FORMAT],
1043                                           count);
1044         count--;
1045         if (chip->single_dma && chip->hardware != WSS_HW_INTERWAVE) {
1046                 snd_wss_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
1047                 snd_wss_out(chip, CS4231_PLY_UPR_CNT,
1048                             (unsigned char) (count >> 8));
1049         } else {
1050                 snd_wss_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
1051                 snd_wss_out(chip, CS4231_REC_UPR_CNT,
1052                             (unsigned char) (count >> 8));
1053         }
1054         spin_unlock_irqrestore(&chip->reg_lock, flags);
1055         return 0;
1056 }
1057
1058 void snd_wss_overrange(struct snd_wss *chip)
1059 {
1060         unsigned long flags;
1061         unsigned char res;
1062
1063         spin_lock_irqsave(&chip->reg_lock, flags);
1064         res = snd_wss_in(chip, CS4231_TEST_INIT);
1065         spin_unlock_irqrestore(&chip->reg_lock, flags);
1066         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
1067                 chip->capture_substream->runtime->overrange++;
1068 }
1069 EXPORT_SYMBOL(snd_wss_overrange);
1070
1071 irqreturn_t snd_wss_interrupt(int irq, void *dev_id)
1072 {
1073         struct snd_wss *chip = dev_id;
1074         unsigned char status;
1075
1076         status = snd_wss_in(chip, CS4231_IRQ_STATUS);
1077         if (status & CS4231_TIMER_IRQ) {
1078                 if (chip->timer)
1079                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1080         }
1081         if (chip->single_dma && chip->hardware != WSS_HW_INTERWAVE) {
1082                 if (status & CS4231_PLAYBACK_IRQ) {
1083                         if (chip->mode & WSS_MODE_PLAY) {
1084                                 if (chip->playback_substream)
1085                                         snd_pcm_period_elapsed(chip->playback_substream);
1086                         }
1087                         if (chip->mode & WSS_MODE_RECORD) {
1088                                 if (chip->capture_substream) {
1089                                         snd_wss_overrange(chip);
1090                                         snd_pcm_period_elapsed(chip->capture_substream);
1091                                 }
1092                         }
1093                 }
1094         } else {
1095                 if (status & CS4231_PLAYBACK_IRQ) {
1096                         if (chip->playback_substream)
1097                                 snd_pcm_period_elapsed(chip->playback_substream);
1098                 }
1099                 if (status & CS4231_RECORD_IRQ) {
1100                         if (chip->capture_substream) {
1101                                 snd_wss_overrange(chip);
1102                                 snd_pcm_period_elapsed(chip->capture_substream);
1103                         }
1104                 }
1105         }
1106
1107         spin_lock(&chip->reg_lock);
1108         snd_wss_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1109         spin_unlock(&chip->reg_lock);
1110         return IRQ_HANDLED;
1111 }
1112 EXPORT_SYMBOL(snd_wss_interrupt);
1113
1114 static snd_pcm_uframes_t snd_wss_playback_pointer(struct snd_pcm_substream *substream)
1115 {
1116         struct snd_wss *chip = snd_pcm_substream_chip(substream);
1117         size_t ptr;
1118
1119         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1120                 return 0;
1121         ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
1122         return bytes_to_frames(substream->runtime, ptr);
1123 }
1124
1125 static snd_pcm_uframes_t snd_wss_capture_pointer(struct snd_pcm_substream *substream)
1126 {
1127         struct snd_wss *chip = snd_pcm_substream_chip(substream);
1128         size_t ptr;
1129
1130         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1131                 return 0;
1132         ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
1133         return bytes_to_frames(substream->runtime, ptr);
1134 }
1135
1136 /*
1137
1138  */
1139
1140 static int snd_wss_probe(struct snd_wss *chip)
1141 {
1142         unsigned long flags;
1143         int i, id, rev;
1144         unsigned char *ptr;
1145         unsigned int hw;
1146
1147 #if 0
1148         snd_wss_debug(chip);
1149 #endif
1150         id = 0;
1151         for (i = 0; i < 50; i++) {
1152                 mb();
1153                 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1154                         udelay(2000);
1155                 else {
1156                         spin_lock_irqsave(&chip->reg_lock, flags);
1157                         snd_wss_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1158                         id = snd_wss_in(chip, CS4231_MISC_INFO) & 0x0f;
1159                         spin_unlock_irqrestore(&chip->reg_lock, flags);
1160                         if (id == 0x0a)
1161                                 break;  /* this is valid value */
1162                 }
1163         }
1164         snd_printdd("wss: port = 0x%lx, id = 0x%x\n", chip->port, id);
1165         if (id != 0x0a)
1166                 return -ENODEV; /* no valid device found */
1167
1168         hw = chip->hardware;
1169         if ((hw & WSS_HW_TYPE_MASK) == WSS_HW_DETECT) {
1170                 rev = snd_wss_in(chip, CS4231_VERSION) & 0xe7;
1171                 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1172                 if (rev == 0x80) {
1173                         unsigned char tmp = snd_wss_in(chip, 23);
1174                         snd_wss_out(chip, 23, ~tmp);
1175                         if (snd_wss_in(chip, 23) != tmp)
1176                                 chip->hardware = WSS_HW_AD1845;
1177                         else
1178                                 chip->hardware = WSS_HW_CS4231;
1179                 } else if (rev == 0xa0) {
1180                         chip->hardware = WSS_HW_CS4231A;
1181                 } else if (rev == 0xa2) {
1182                         chip->hardware = WSS_HW_CS4232;
1183                 } else if (rev == 0xb2) {
1184                         chip->hardware = WSS_HW_CS4232A;
1185                 } else if (rev == 0x83) {
1186                         chip->hardware = WSS_HW_CS4236;
1187                 } else if (rev == 0x03) {
1188                         chip->hardware = WSS_HW_CS4236B;
1189                 } else {
1190                         snd_printk("unknown CS chip with version 0x%x\n", rev);
1191                         return -ENODEV;         /* unknown CS4231 chip? */
1192                 }
1193         }
1194         spin_lock_irqsave(&chip->reg_lock, flags);
1195         wss_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1196         wss_outb(chip, CS4231P(STATUS), 0);
1197         mb();
1198         spin_unlock_irqrestore(&chip->reg_lock, flags);
1199
1200         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1201         switch (chip->hardware) {
1202         case WSS_HW_INTERWAVE:
1203                 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1204                 break;
1205         case WSS_HW_CS4235:
1206         case WSS_HW_CS4236B:
1207         case WSS_HW_CS4237B:
1208         case WSS_HW_CS4238B:
1209         case WSS_HW_CS4239:
1210                 if (hw == WSS_HW_DETECT3)
1211                         chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1212                 else
1213                         chip->hardware = WSS_HW_CS4236;
1214                 break;
1215         }
1216
1217         chip->image[CS4231_IFACE_CTRL] =
1218             (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1219             (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1220         if (chip->hardware != WSS_HW_OPTI93X) {
1221                 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1222                 chip->image[CS4231_ALT_FEATURE_2] =
1223                         chip->hardware == WSS_HW_INTERWAVE ? 0xc2 : 0x01;
1224         }
1225         ptr = (unsigned char *) &chip->image;
1226         snd_wss_mce_down(chip);
1227         spin_lock_irqsave(&chip->reg_lock, flags);
1228         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1229                 snd_wss_out(chip, i, *ptr++);
1230         spin_unlock_irqrestore(&chip->reg_lock, flags);
1231         snd_wss_mce_up(chip);
1232         snd_wss_mce_down(chip);
1233
1234         mdelay(2);
1235
1236         /* ok.. try check hardware version for CS4236+ chips */
1237         if ((hw & WSS_HW_TYPE_MASK) == WSS_HW_DETECT) {
1238                 if (chip->hardware == WSS_HW_CS4236B) {
1239                         rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1240                         snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1241                         id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1242                         snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1243                         snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1244                         if ((id & 0x1f) == 0x1d) {      /* CS4235 */
1245                                 chip->hardware = WSS_HW_CS4235;
1246                                 switch (id >> 5) {
1247                                 case 4:
1248                                 case 5:
1249                                 case 6:
1250                                         break;
1251                                 default:
1252                                         snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1253                                 }
1254                         } else if ((id & 0x1f) == 0x0b) {       /* CS4236/B */
1255                                 switch (id >> 5) {
1256                                 case 4:
1257                                 case 5:
1258                                 case 6:
1259                                 case 7:
1260                                         chip->hardware = WSS_HW_CS4236B;
1261                                         break;
1262                                 default:
1263                                         snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1264                                 }
1265                         } else if ((id & 0x1f) == 0x08) {       /* CS4237B */
1266                                 chip->hardware = WSS_HW_CS4237B;
1267                                 switch (id >> 5) {
1268                                 case 4:
1269                                 case 5:
1270                                 case 6:
1271                                 case 7:
1272                                         break;
1273                                 default:
1274                                         snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1275                                 }
1276                         } else if ((id & 0x1f) == 0x09) {       /* CS4238B */
1277                                 chip->hardware = WSS_HW_CS4238B;
1278                                 switch (id >> 5) {
1279                                 case 5:
1280                                 case 6:
1281                                 case 7:
1282                                         break;
1283                                 default:
1284                                         snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1285                                 }
1286                         } else if ((id & 0x1f) == 0x1e) {       /* CS4239 */
1287                                 chip->hardware = WSS_HW_CS4239;
1288                                 switch (id >> 5) {
1289                                 case 4:
1290                                 case 5:
1291                                 case 6:
1292                                         break;
1293                                 default:
1294                                         snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1295                                 }
1296                         } else {
1297                                 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1298                         }
1299                 }
1300         }
1301         return 0;               /* all things are ok.. */
1302 }
1303
1304 /*
1305
1306  */
1307
1308 static struct snd_pcm_hardware snd_wss_playback =
1309 {
1310         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1311                                  SNDRV_PCM_INFO_MMAP_VALID |
1312                                  SNDRV_PCM_INFO_RESUME |
1313                                  SNDRV_PCM_INFO_SYNC_START),
1314         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1315                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1316         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1317         .rate_min =             5510,
1318         .rate_max =             48000,
1319         .channels_min =         1,
1320         .channels_max =         2,
1321         .buffer_bytes_max =     (128*1024),
1322         .period_bytes_min =     64,
1323         .period_bytes_max =     (128*1024),
1324         .periods_min =          1,
1325         .periods_max =          1024,
1326         .fifo_size =            0,
1327 };
1328
1329 static struct snd_pcm_hardware snd_wss_capture =
1330 {
1331         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1332                                  SNDRV_PCM_INFO_MMAP_VALID |
1333                                  SNDRV_PCM_INFO_RESUME |
1334                                  SNDRV_PCM_INFO_SYNC_START),
1335         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1336                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1337         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1338         .rate_min =             5510,
1339         .rate_max =             48000,
1340         .channels_min =         1,
1341         .channels_max =         2,
1342         .buffer_bytes_max =     (128*1024),
1343         .period_bytes_min =     64,
1344         .period_bytes_max =     (128*1024),
1345         .periods_min =          1,
1346         .periods_max =          1024,
1347         .fifo_size =            0,
1348 };
1349
1350 /*
1351
1352  */
1353
1354 static int snd_wss_playback_open(struct snd_pcm_substream *substream)
1355 {
1356         struct snd_wss *chip = snd_pcm_substream_chip(substream);
1357         struct snd_pcm_runtime *runtime = substream->runtime;
1358         int err;
1359
1360         runtime->hw = snd_wss_playback;
1361
1362         /* hardware limitation of older chipsets */
1363         if (chip->hardware & WSS_HW_AD1848_MASK)
1364                 runtime->hw.formats &= ~(SNDRV_PCM_FMTBIT_IMA_ADPCM |
1365                                          SNDRV_PCM_FMTBIT_S16_BE);
1366
1367         /* hardware bug in InterWave chipset */
1368         if (chip->hardware == WSS_HW_INTERWAVE && chip->dma1 > 3)
1369                 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1370
1371         /* hardware limitation of cheap chips */
1372         if (chip->hardware == WSS_HW_CS4235 ||
1373             chip->hardware == WSS_HW_CS4239)
1374                 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1375
1376         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1377         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1378
1379         if (chip->claim_dma) {
1380                 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1381                         return err;
1382         }
1383
1384         err = snd_wss_open(chip, WSS_MODE_PLAY);
1385         if (err < 0) {
1386                 if (chip->release_dma)
1387                         chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1388                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1389                 return err;
1390         }
1391         chip->playback_substream = substream;
1392         snd_pcm_set_sync(substream);
1393         chip->rate_constraint(runtime);
1394         return 0;
1395 }
1396
1397 static int snd_wss_capture_open(struct snd_pcm_substream *substream)
1398 {
1399         struct snd_wss *chip = snd_pcm_substream_chip(substream);
1400         struct snd_pcm_runtime *runtime = substream->runtime;
1401         int err;
1402
1403         runtime->hw = snd_wss_capture;
1404
1405         /* hardware limitation of older chipsets */
1406         if (chip->hardware & WSS_HW_AD1848_MASK)
1407                 runtime->hw.formats &= ~(SNDRV_PCM_FMTBIT_IMA_ADPCM |
1408                                          SNDRV_PCM_FMTBIT_S16_BE);
1409
1410         /* hardware limitation of cheap chips */
1411         if (chip->hardware == WSS_HW_CS4235 ||
1412             chip->hardware == WSS_HW_CS4239)
1413                 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1414
1415         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1416         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1417
1418         if (chip->claim_dma) {
1419                 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1420                         return err;
1421         }
1422
1423         err = snd_wss_open(chip, WSS_MODE_RECORD);
1424         if (err < 0) {
1425                 if (chip->release_dma)
1426                         chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1427                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1428                 return err;
1429         }
1430         chip->capture_substream = substream;
1431         snd_pcm_set_sync(substream);
1432         chip->rate_constraint(runtime);
1433         return 0;
1434 }
1435
1436 static int snd_wss_playback_close(struct snd_pcm_substream *substream)
1437 {
1438         struct snd_wss *chip = snd_pcm_substream_chip(substream);
1439
1440         chip->playback_substream = NULL;
1441         snd_wss_close(chip, WSS_MODE_PLAY);
1442         return 0;
1443 }
1444
1445 static int snd_wss_capture_close(struct snd_pcm_substream *substream)
1446 {
1447         struct snd_wss *chip = snd_pcm_substream_chip(substream);
1448
1449         chip->capture_substream = NULL;
1450         snd_wss_close(chip, WSS_MODE_RECORD);
1451         return 0;
1452 }
1453
1454 static void snd_wss_thinkpad_twiddle(struct snd_wss *chip, int on)
1455 {
1456         int tmp;
1457
1458         if (!chip->thinkpad_flag)
1459                 return;
1460
1461         outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
1462         tmp = inb(AD1848_THINKPAD_CTL_PORT2);
1463
1464         if (on)
1465                 /* turn it on */
1466                 tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
1467         else
1468                 /* turn it off */
1469                 tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
1470
1471         outb(tmp, AD1848_THINKPAD_CTL_PORT2);
1472 }
1473
1474 #ifdef CONFIG_PM
1475
1476 /* lowlevel suspend callback for CS4231 */
1477 static void snd_wss_suspend(struct snd_wss *chip)
1478 {
1479         int reg;
1480         unsigned long flags;
1481
1482         snd_pcm_suspend_all(chip->pcm);
1483         spin_lock_irqsave(&chip->reg_lock, flags);
1484         for (reg = 0; reg < 32; reg++)
1485                 chip->image[reg] = snd_wss_in(chip, reg);
1486         spin_unlock_irqrestore(&chip->reg_lock, flags);
1487         if (chip->thinkpad_flag)
1488                 snd_wss_thinkpad_twiddle(chip, 0);
1489 }
1490
1491 /* lowlevel resume callback for CS4231 */
1492 static void snd_wss_resume(struct snd_wss *chip)
1493 {
1494         int reg;
1495         unsigned long flags;
1496         /* int timeout; */
1497
1498         if (chip->thinkpad_flag)
1499                 snd_wss_thinkpad_twiddle(chip, 1);
1500         snd_wss_mce_up(chip);
1501         spin_lock_irqsave(&chip->reg_lock, flags);
1502         for (reg = 0; reg < 32; reg++) {
1503                 switch (reg) {
1504                 case CS4231_VERSION:
1505                         break;
1506                 default:
1507                         snd_wss_out(chip, reg, chip->image[reg]);
1508                         break;
1509                 }
1510         }
1511         spin_unlock_irqrestore(&chip->reg_lock, flags);
1512 #if 1
1513         snd_wss_mce_down(chip);
1514 #else
1515         /* The following is a workaround to avoid freeze after resume on TP600E.
1516            This is the first half of copy of snd_wss_mce_down(), but doesn't
1517            include rescheduling.  -- iwai
1518            */
1519         snd_wss_busy_wait(chip);
1520         spin_lock_irqsave(&chip->reg_lock, flags);
1521         chip->mce_bit &= ~CS4231_MCE;
1522         timeout = wss_inb(chip, CS4231P(REGSEL));
1523         wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1524         spin_unlock_irqrestore(&chip->reg_lock, flags);
1525         if (timeout == 0x80)
1526                 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1527         if ((timeout & CS4231_MCE) == 0 ||
1528             !(chip->hardware & (WSS_HW_CS4231_MASK | WSS_HW_CS4232_MASK))) {
1529                 return;
1530         }
1531         snd_wss_busy_wait(chip);
1532 #endif
1533 }
1534 #endif /* CONFIG_PM */
1535
1536 static int snd_wss_free(struct snd_wss *chip)
1537 {
1538         release_and_free_resource(chip->res_port);
1539         release_and_free_resource(chip->res_cport);
1540         if (chip->irq >= 0) {
1541                 disable_irq(chip->irq);
1542                 if (!(chip->hwshare & WSS_HWSHARE_IRQ))
1543                         free_irq(chip->irq, (void *) chip);
1544         }
1545         if (!(chip->hwshare & WSS_HWSHARE_DMA1) && chip->dma1 >= 0) {
1546                 snd_dma_disable(chip->dma1);
1547                 free_dma(chip->dma1);
1548         }
1549         if (!(chip->hwshare & WSS_HWSHARE_DMA2) &&
1550             chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1551                 snd_dma_disable(chip->dma2);
1552                 free_dma(chip->dma2);
1553         }
1554         if (chip->timer)
1555                 snd_device_free(chip->card, chip->timer);
1556         kfree(chip);
1557         return 0;
1558 }
1559
1560 static int snd_wss_dev_free(struct snd_device *device)
1561 {
1562         struct snd_wss *chip = device->device_data;
1563         return snd_wss_free(chip);
1564 }
1565
1566 const char *snd_wss_chip_id(struct snd_wss *chip)
1567 {
1568         switch (chip->hardware) {
1569         case WSS_HW_CS4231:
1570                 return "CS4231";
1571         case WSS_HW_CS4231A:
1572                 return "CS4231A";
1573         case WSS_HW_CS4232:
1574                 return "CS4232";
1575         case WSS_HW_CS4232A:
1576                 return "CS4232A";
1577         case WSS_HW_CS4235:
1578                 return "CS4235";
1579         case WSS_HW_CS4236:
1580                 return "CS4236";
1581         case WSS_HW_CS4236B:
1582                 return "CS4236B";
1583         case WSS_HW_CS4237B:
1584                 return "CS4237B";
1585         case WSS_HW_CS4238B:
1586                 return "CS4238B";
1587         case WSS_HW_CS4239:
1588                 return "CS4239";
1589         case WSS_HW_INTERWAVE:
1590                 return "AMD InterWave";
1591         case WSS_HW_OPL3SA2:
1592                 return chip->card->shortname;
1593         case WSS_HW_AD1845:
1594                 return "AD1845";
1595         case WSS_HW_OPTI93X:
1596                 return "OPTi 93x";
1597         case WSS_HW_AD1847:
1598                 return "AD1847";
1599         case WSS_HW_AD1848:
1600                 return "AD1848";
1601         case WSS_HW_CS4248:
1602                 return "CS4248";
1603         case WSS_HW_CMI8330:
1604                 return "CMI8330/C3D";
1605         default:
1606                 return "???";
1607         }
1608 }
1609 EXPORT_SYMBOL(snd_wss_chip_id);
1610
1611 static int snd_wss_new(struct snd_card *card,
1612                           unsigned short hardware,
1613                           unsigned short hwshare,
1614                           struct snd_wss **rchip)
1615 {
1616         struct snd_wss *chip;
1617
1618         *rchip = NULL;
1619         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1620         if (chip == NULL)
1621                 return -ENOMEM;
1622         chip->hardware = hardware;
1623         chip->hwshare = hwshare;
1624
1625         spin_lock_init(&chip->reg_lock);
1626         mutex_init(&chip->mce_mutex);
1627         mutex_init(&chip->open_mutex);
1628         chip->card = card;
1629         chip->rate_constraint = snd_wss_xrate;
1630         chip->set_playback_format = snd_wss_playback_format;
1631         chip->set_capture_format = snd_wss_capture_format;
1632         if (chip->hardware == WSS_HW_OPTI93X)
1633                 memcpy(&chip->image, &snd_opti93x_original_image,
1634                        sizeof(snd_opti93x_original_image));
1635         else
1636                 memcpy(&chip->image, &snd_wss_original_image,
1637                        sizeof(snd_wss_original_image));
1638
1639         *rchip = chip;
1640         return 0;
1641 }
1642
1643 int snd_wss_create(struct snd_card *card,
1644                       unsigned long port,
1645                       unsigned long cport,
1646                       int irq, int dma1, int dma2,
1647                       unsigned short hardware,
1648                       unsigned short hwshare,
1649                       struct snd_wss **rchip)
1650 {
1651         static struct snd_device_ops ops = {
1652                 .dev_free =     snd_wss_dev_free,
1653         };
1654         struct snd_wss *chip;
1655         int err;
1656
1657         err = snd_wss_new(card, hardware, hwshare, &chip);
1658         if (err < 0)
1659                 return err;
1660
1661         chip->irq = -1;
1662         chip->dma1 = -1;
1663         chip->dma2 = -1;
1664
1665         chip->res_port = request_region(port, 4, "CS4231");
1666         if (!chip->res_port) {
1667                 snd_printk(KERN_ERR "wss: can't grab port 0x%lx\n", port);
1668                 snd_wss_free(chip);
1669                 return -EBUSY;
1670         }
1671         chip->port = port;
1672         if ((long)cport >= 0) {
1673                 chip->res_cport = request_region(cport, 8, "CS4232 Control");
1674                 if (!chip->res_cport) {
1675                         snd_printk(KERN_ERR
1676                                 "wss: can't grab control port 0x%lx\n", cport);
1677                         snd_wss_free(chip);
1678                         return -ENODEV;
1679                 }
1680         }
1681         chip->cport = cport;
1682         if (!(hwshare & WSS_HWSHARE_IRQ))
1683                 if (request_irq(irq, snd_wss_interrupt, IRQF_DISABLED,
1684                                 "CS4231", (void *) chip)) {
1685                         snd_printk(KERN_ERR "wss: can't grab IRQ %d\n", irq);
1686                         snd_wss_free(chip);
1687                         return -EBUSY;
1688                 }
1689         chip->irq = irq;
1690         if (!(hwshare & WSS_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1691                 snd_printk(KERN_ERR "wss: can't grab DMA1 %d\n", dma1);
1692                 snd_wss_free(chip);
1693                 return -EBUSY;
1694         }
1695         chip->dma1 = dma1;
1696         if (!(hwshare & WSS_HWSHARE_DMA2) && dma1 != dma2 &&
1697               dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1698                 snd_printk(KERN_ERR "wss: can't grab DMA2 %d\n", dma2);
1699                 snd_wss_free(chip);
1700                 return -EBUSY;
1701         }
1702         if (dma1 == dma2 || dma2 < 0) {
1703                 chip->single_dma = 1;
1704                 chip->dma2 = chip->dma1;
1705         } else
1706                 chip->dma2 = dma2;
1707
1708         /* global setup */
1709         if (snd_wss_probe(chip) < 0) {
1710                 snd_wss_free(chip);
1711                 return -ENODEV;
1712         }
1713         snd_wss_init(chip);
1714
1715 #if 0
1716         if (chip->hardware & WSS_HW_CS4232_MASK) {
1717                 if (chip->res_cport == NULL)
1718                         snd_printk("CS4232 control port features are not accessible\n");
1719         }
1720 #endif
1721
1722         /* Register device */
1723         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1724         if (err < 0) {
1725                 snd_wss_free(chip);
1726                 return err;
1727         }
1728
1729 #ifdef CONFIG_PM
1730         /* Power Management */
1731         chip->suspend = snd_wss_suspend;
1732         chip->resume = snd_wss_resume;
1733 #endif
1734
1735         *rchip = chip;
1736         return 0;
1737 }
1738 EXPORT_SYMBOL(snd_wss_create);
1739
1740 static struct snd_pcm_ops snd_wss_playback_ops = {
1741         .open =         snd_wss_playback_open,
1742         .close =        snd_wss_playback_close,
1743         .ioctl =        snd_pcm_lib_ioctl,
1744         .hw_params =    snd_wss_playback_hw_params,
1745         .hw_free =      snd_wss_playback_hw_free,
1746         .prepare =      snd_wss_playback_prepare,
1747         .trigger =      snd_wss_trigger,
1748         .pointer =      snd_wss_playback_pointer,
1749 };
1750
1751 static struct snd_pcm_ops snd_wss_capture_ops = {
1752         .open =         snd_wss_capture_open,
1753         .close =        snd_wss_capture_close,
1754         .ioctl =        snd_pcm_lib_ioctl,
1755         .hw_params =    snd_wss_capture_hw_params,
1756         .hw_free =      snd_wss_capture_hw_free,
1757         .prepare =      snd_wss_capture_prepare,
1758         .trigger =      snd_wss_trigger,
1759         .pointer =      snd_wss_capture_pointer,
1760 };
1761
1762 int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm)
1763 {
1764         struct snd_pcm *pcm;
1765         int err;
1766
1767         err = snd_pcm_new(chip->card, "WSS", device, 1, 1, &pcm);
1768         if (err < 0)
1769                 return err;
1770
1771         spin_lock_init(&chip->reg_lock);
1772         mutex_init(&chip->mce_mutex);
1773         mutex_init(&chip->open_mutex);
1774
1775         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_wss_playback_ops);
1776         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_wss_capture_ops);
1777
1778         /* temporary */
1779         if (chip->hardware & WSS_HW_AD1848_MASK) {
1780                 chip->rate_constraint = snd_wss_xrate;
1781                 chip->set_playback_format = snd_wss_playback_format;
1782                 chip->set_capture_format = snd_wss_capture_format;
1783         }
1784         /* global setup */
1785         pcm->private_data = chip;
1786         pcm->info_flags = 0;
1787         if (chip->single_dma)
1788                 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1789         if (chip->hardware != WSS_HW_INTERWAVE)
1790                 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1791         strcpy(pcm->name, snd_wss_chip_id(chip));
1792
1793         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1794                                               snd_dma_isa_data(),
1795                                               64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1796
1797         chip->pcm = pcm;
1798         if (rpcm)
1799                 *rpcm = pcm;
1800         return 0;
1801 }
1802 EXPORT_SYMBOL(snd_wss_pcm);
1803
1804 static void snd_wss_timer_free(struct snd_timer *timer)
1805 {
1806         struct snd_wss *chip = timer->private_data;
1807         chip->timer = NULL;
1808 }
1809
1810 int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer)
1811 {
1812         struct snd_timer *timer;
1813         struct snd_timer_id tid;
1814         int err;
1815
1816         /* Timer initialization */
1817         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1818         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1819         tid.card = chip->card->number;
1820         tid.device = device;
1821         tid.subdevice = 0;
1822         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1823                 return err;
1824         strcpy(timer->name, snd_wss_chip_id(chip));
1825         timer->private_data = chip;
1826         timer->private_free = snd_wss_timer_free;
1827         timer->hw = snd_wss_timer_table;
1828         chip->timer = timer;
1829         if (rtimer)
1830                 *rtimer = timer;
1831         return 0;
1832 }
1833 EXPORT_SYMBOL(snd_wss_timer);
1834
1835 /*
1836  *  MIXER part
1837  */
1838
1839 static int snd_wss_info_mux(struct snd_kcontrol *kcontrol,
1840                             struct snd_ctl_elem_info *uinfo)
1841 {
1842         static char *texts[4] = {
1843                 "Line", "Aux", "Mic", "Mix"
1844         };
1845         static char *opl3sa_texts[4] = {
1846                 "Line", "CD", "Mic", "Mix"
1847         };
1848         static char *gusmax_texts[4] = {
1849                 "Line", "Synth", "Mic", "Mix"
1850         };
1851         char **ptexts = texts;
1852         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1853
1854         snd_assert(chip->card != NULL, return -EINVAL);
1855         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1856         uinfo->count = 2;
1857         uinfo->value.enumerated.items = 4;
1858         if (uinfo->value.enumerated.item > 3)
1859                 uinfo->value.enumerated.item = 3;
1860         if (!strcmp(chip->card->driver, "GUS MAX"))
1861                 ptexts = gusmax_texts;
1862         switch (chip->hardware) {
1863         case WSS_HW_INTERWAVE:
1864                 ptexts = gusmax_texts;
1865                 break;
1866         case WSS_HW_OPL3SA2:
1867                 ptexts = opl3sa_texts;
1868                 break;
1869         }
1870         strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1871         return 0;
1872 }
1873
1874 static int snd_wss_get_mux(struct snd_kcontrol *kcontrol,
1875                            struct snd_ctl_elem_value *ucontrol)
1876 {
1877         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1878         unsigned long flags;
1879
1880         spin_lock_irqsave(&chip->reg_lock, flags);
1881         ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1882         ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1883         spin_unlock_irqrestore(&chip->reg_lock, flags);
1884         return 0;
1885 }
1886
1887 static int snd_wss_put_mux(struct snd_kcontrol *kcontrol,
1888                            struct snd_ctl_elem_value *ucontrol)
1889 {
1890         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1891         unsigned long flags;
1892         unsigned short left, right;
1893         int change;
1894
1895         if (ucontrol->value.enumerated.item[0] > 3 ||
1896             ucontrol->value.enumerated.item[1] > 3)
1897                 return -EINVAL;
1898         left = ucontrol->value.enumerated.item[0] << 6;
1899         right = ucontrol->value.enumerated.item[1] << 6;
1900         spin_lock_irqsave(&chip->reg_lock, flags);
1901         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1902         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1903         change = left != chip->image[CS4231_LEFT_INPUT] ||
1904                  right != chip->image[CS4231_RIGHT_INPUT];
1905         snd_wss_out(chip, CS4231_LEFT_INPUT, left);
1906         snd_wss_out(chip, CS4231_RIGHT_INPUT, right);
1907         spin_unlock_irqrestore(&chip->reg_lock, flags);
1908         return change;
1909 }
1910
1911 int snd_wss_info_single(struct snd_kcontrol *kcontrol,
1912                         struct snd_ctl_elem_info *uinfo)
1913 {
1914         int mask = (kcontrol->private_value >> 16) & 0xff;
1915
1916         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1917         uinfo->count = 1;
1918         uinfo->value.integer.min = 0;
1919         uinfo->value.integer.max = mask;
1920         return 0;
1921 }
1922 EXPORT_SYMBOL(snd_wss_info_single);
1923
1924 int snd_wss_get_single(struct snd_kcontrol *kcontrol,
1925                        struct snd_ctl_elem_value *ucontrol)
1926 {
1927         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1928         unsigned long flags;
1929         int reg = kcontrol->private_value & 0xff;
1930         int shift = (kcontrol->private_value >> 8) & 0xff;
1931         int mask = (kcontrol->private_value >> 16) & 0xff;
1932         int invert = (kcontrol->private_value >> 24) & 0xff;
1933
1934         spin_lock_irqsave(&chip->reg_lock, flags);
1935         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1936         spin_unlock_irqrestore(&chip->reg_lock, flags);
1937         if (invert)
1938                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1939         return 0;
1940 }
1941 EXPORT_SYMBOL(snd_wss_get_single);
1942
1943 int snd_wss_put_single(struct snd_kcontrol *kcontrol,
1944                        struct snd_ctl_elem_value *ucontrol)
1945 {
1946         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1947         unsigned long flags;
1948         int reg = kcontrol->private_value & 0xff;
1949         int shift = (kcontrol->private_value >> 8) & 0xff;
1950         int mask = (kcontrol->private_value >> 16) & 0xff;
1951         int invert = (kcontrol->private_value >> 24) & 0xff;
1952         int change;
1953         unsigned short val;
1954
1955         val = (ucontrol->value.integer.value[0] & mask);
1956         if (invert)
1957                 val = mask - val;
1958         val <<= shift;
1959         spin_lock_irqsave(&chip->reg_lock, flags);
1960         val = (chip->image[reg] & ~(mask << shift)) | val;
1961         change = val != chip->image[reg];
1962         snd_wss_out(chip, reg, val);
1963         spin_unlock_irqrestore(&chip->reg_lock, flags);
1964         return change;
1965 }
1966 EXPORT_SYMBOL(snd_wss_put_single);
1967
1968 int snd_wss_info_double(struct snd_kcontrol *kcontrol,
1969                         struct snd_ctl_elem_info *uinfo)
1970 {
1971         int mask = (kcontrol->private_value >> 24) & 0xff;
1972
1973         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1974         uinfo->count = 2;
1975         uinfo->value.integer.min = 0;
1976         uinfo->value.integer.max = mask;
1977         return 0;
1978 }
1979 EXPORT_SYMBOL(snd_wss_info_double);
1980
1981 int snd_wss_get_double(struct snd_kcontrol *kcontrol,
1982                        struct snd_ctl_elem_value *ucontrol)
1983 {
1984         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1985         unsigned long flags;
1986         int left_reg = kcontrol->private_value & 0xff;
1987         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1988         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1989         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1990         int mask = (kcontrol->private_value >> 24) & 0xff;
1991         int invert = (kcontrol->private_value >> 22) & 1;
1992
1993         spin_lock_irqsave(&chip->reg_lock, flags);
1994         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1995         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1996         spin_unlock_irqrestore(&chip->reg_lock, flags);
1997         if (invert) {
1998                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1999                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
2000         }
2001         return 0;
2002 }
2003 EXPORT_SYMBOL(snd_wss_get_double);
2004
2005 int snd_wss_put_double(struct snd_kcontrol *kcontrol,
2006                        struct snd_ctl_elem_value *ucontrol)
2007 {
2008         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2009         unsigned long flags;
2010         int left_reg = kcontrol->private_value & 0xff;
2011         int right_reg = (kcontrol->private_value >> 8) & 0xff;
2012         int shift_left = (kcontrol->private_value >> 16) & 0x07;
2013         int shift_right = (kcontrol->private_value >> 19) & 0x07;
2014         int mask = (kcontrol->private_value >> 24) & 0xff;
2015         int invert = (kcontrol->private_value >> 22) & 1;
2016         int change;
2017         unsigned short val1, val2;
2018
2019         val1 = ucontrol->value.integer.value[0] & mask;
2020         val2 = ucontrol->value.integer.value[1] & mask;
2021         if (invert) {
2022                 val1 = mask - val1;
2023                 val2 = mask - val2;
2024         }
2025         val1 <<= shift_left;
2026         val2 <<= shift_right;
2027         spin_lock_irqsave(&chip->reg_lock, flags);
2028         if (left_reg != right_reg) {
2029                 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
2030                 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
2031                 change = val1 != chip->image[left_reg] ||
2032                          val2 != chip->image[right_reg];
2033                 snd_wss_out(chip, left_reg, val1);
2034                 snd_wss_out(chip, right_reg, val2);
2035         } else {
2036                 mask = (mask << shift_left) | (mask << shift_right);
2037                 val1 = (chip->image[left_reg] & ~mask) | val1 | val2;
2038                 change = val1 != chip->image[left_reg];
2039                 snd_wss_out(chip, left_reg, val1);
2040         }
2041         spin_unlock_irqrestore(&chip->reg_lock, flags);
2042         return change;
2043 }
2044 EXPORT_SYMBOL(snd_wss_put_double);
2045
2046 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
2047 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
2048 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
2049
2050 static struct snd_kcontrol_new snd_ad1848_controls[] = {
2051 WSS_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT,
2052            7, 7, 1, 1),
2053 WSS_DOUBLE_TLV("PCM Playback Volume", 0,
2054                CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1,
2055                db_scale_6bit),
2056 WSS_DOUBLE("Aux Playback Switch", 0,
2057            CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
2058 WSS_DOUBLE_TLV("Aux Playback Volume", 0,
2059                CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
2060                db_scale_5bit_12db_max),
2061 WSS_DOUBLE("Aux Playback Switch", 1,
2062            CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
2063 WSS_DOUBLE_TLV("Aux Playback Volume", 1,
2064                CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
2065                db_scale_5bit_12db_max),
2066 WSS_DOUBLE_TLV("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT,
2067                 0, 0, 15, 0, db_scale_rec_gain),
2068 {
2069         .name = "Capture Source",
2070         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2071         .info = snd_wss_info_mux,
2072         .get = snd_wss_get_mux,
2073         .put = snd_wss_put_mux,
2074 },
2075 WSS_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
2076 WSS_SINGLE_TLV("Loopback Capture Volume", 0, CS4231_LOOPBACK, 1, 63, 0,
2077                db_scale_6bit),
2078 };
2079
2080 static struct snd_kcontrol_new snd_wss_controls[] = {
2081 WSS_DOUBLE("PCM Playback Switch", 0,
2082                 CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
2083 WSS_DOUBLE("PCM Playback Volume", 0,
2084                 CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
2085 WSS_DOUBLE("Line Playback Switch", 0,
2086                 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
2087 WSS_DOUBLE("Line Playback Volume", 0,
2088                 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
2089 WSS_DOUBLE("Aux Playback Switch", 0,
2090                 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
2091 WSS_DOUBLE("Aux Playback Volume", 0,
2092                 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
2093 WSS_DOUBLE("Aux Playback Switch", 1,
2094                 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
2095 WSS_DOUBLE("Aux Playback Volume", 1,
2096                 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
2097 WSS_SINGLE("Mono Playback Switch", 0,
2098                 CS4231_MONO_CTRL, 7, 1, 1),
2099 WSS_SINGLE("Mono Playback Volume", 0,
2100                 CS4231_MONO_CTRL, 0, 15, 1),
2101 WSS_SINGLE("Mono Output Playback Switch", 0,
2102                 CS4231_MONO_CTRL, 6, 1, 1),
2103 WSS_SINGLE("Mono Output Playback Bypass", 0,
2104                 CS4231_MONO_CTRL, 5, 1, 0),
2105 WSS_DOUBLE("Capture Volume", 0,
2106                 CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
2107 {
2108         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2109         .name = "Capture Source",
2110         .info = snd_wss_info_mux,
2111         .get = snd_wss_get_mux,
2112         .put = snd_wss_put_mux,
2113 },
2114 WSS_DOUBLE("Mic Boost", 0,
2115                 CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
2116 WSS_SINGLE("Loopback Capture Switch", 0,
2117                 CS4231_LOOPBACK, 0, 1, 0),
2118 WSS_SINGLE("Loopback Capture Volume", 0,
2119                 CS4231_LOOPBACK, 2, 63, 1)
2120 };
2121
2122 static struct snd_kcontrol_new snd_opti93x_controls[] = {
2123 WSS_DOUBLE("Master Playback Switch", 0,
2124                 OPTi93X_OUT_LEFT, OPTi93X_OUT_RIGHT, 7, 7, 1, 1),
2125 WSS_DOUBLE("Master Playback Volume", 0,
2126                 OPTi93X_OUT_LEFT, OPTi93X_OUT_RIGHT, 1, 1, 31, 1),
2127 WSS_DOUBLE("PCM Playback Switch", 0,
2128                 CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
2129 WSS_DOUBLE("PCM Playback Volume", 0,
2130                 CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 31, 1),
2131 WSS_DOUBLE("FM Playback Switch", 0,
2132                 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
2133 WSS_DOUBLE("FM Playback Volume", 0,
2134                 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 1, 1, 15, 1),
2135 WSS_DOUBLE("Line Playback Switch", 0,
2136                 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
2137 WSS_DOUBLE("Line Playback Volume", 0,
2138                 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 15, 1),
2139 WSS_DOUBLE("Mic Playback Switch", 0,
2140                 OPTi93X_MIC_LEFT_INPUT, OPTi93X_MIC_RIGHT_INPUT, 7, 7, 1, 1),
2141 WSS_DOUBLE("Mic Playback Volume", 0,
2142                 OPTi93X_MIC_LEFT_INPUT, OPTi93X_MIC_RIGHT_INPUT, 1, 1, 15, 1),
2143 WSS_DOUBLE("Mic Boost", 0,
2144                 CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
2145 WSS_DOUBLE("CD Playback Switch", 0,
2146                 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
2147 WSS_DOUBLE("CD Playback Volume", 0,
2148                 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 1, 1, 15, 1),
2149 WSS_DOUBLE("Aux Playback Switch", 0,
2150                 OPTi931_AUX_LEFT_INPUT, OPTi931_AUX_RIGHT_INPUT, 7, 7, 1, 1),
2151 WSS_DOUBLE("Aux Playback Volume", 0,
2152                 OPTi931_AUX_LEFT_INPUT, OPTi931_AUX_RIGHT_INPUT, 1, 1, 15, 1),
2153 WSS_DOUBLE("Capture Volume", 0,
2154                 CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
2155 {
2156         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2157         .name = "Capture Source",
2158         .info = snd_wss_info_mux,
2159         .get = snd_wss_get_mux,
2160         .put = snd_wss_put_mux,
2161 }
2162 };
2163
2164 int snd_wss_mixer(struct snd_wss *chip)
2165 {
2166         struct snd_card *card;
2167         unsigned int idx;
2168         int err;
2169
2170         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
2171
2172         card = chip->card;
2173
2174         strcpy(card->mixername, chip->pcm->name);
2175
2176         if (chip->hardware == WSS_HW_OPTI93X)
2177                 for (idx = 0; idx < ARRAY_SIZE(snd_opti93x_controls); idx++) {
2178                         err = snd_ctl_add(card,
2179                                         snd_ctl_new1(&snd_opti93x_controls[idx],
2180                                                      chip));
2181                         if (err < 0)
2182                                 return err;
2183                 }
2184         else if (chip->hardware & WSS_HW_AD1848_MASK)
2185                 for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++) {
2186                         err = snd_ctl_add(card,
2187                                         snd_ctl_new1(&snd_ad1848_controls[idx],
2188                                                      chip));
2189                         if (err < 0)
2190                                 return err;
2191                 }
2192         else
2193                 for (idx = 0; idx < ARRAY_SIZE(snd_wss_controls); idx++) {
2194                         err = snd_ctl_add(card,
2195                                         snd_ctl_new1(&snd_wss_controls[idx],
2196                                                      chip));
2197                         if (err < 0)
2198                                 return err;
2199                 }
2200         return 0;
2201 }
2202 EXPORT_SYMBOL(snd_wss_mixer);
2203
2204 const struct snd_pcm_ops *snd_wss_get_pcm_ops(int direction)
2205 {
2206         return direction == SNDRV_PCM_STREAM_PLAYBACK ?
2207                 &snd_wss_playback_ops : &snd_wss_capture_ops;
2208 }
2209 EXPORT_SYMBOL(snd_wss_get_pcm_ops);
2210
2211 /*
2212  *  INIT part
2213  */
2214
2215 static int __init alsa_wss_init(void)
2216 {
2217         return 0;
2218 }
2219
2220 static void __exit alsa_wss_exit(void)
2221 {
2222 }
2223
2224 module_init(alsa_wss_init);
2225 module_exit(alsa_wss_exit);