[ALSA] Stereo controls for M-Audio Revolution cards
[linux-2.6.git] / sound / i2c / other / ak4117.c
1 /*
2  *  Routines for control of the AK4117 via 4-wire serial interface
3  *  IEC958 (S/PDIF) receiver by Asahi Kasei
4  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
5  *
6  *
7  *   This program is free software; you can redistribute it and/or modify
8  *   it under the terms of the GNU General Public License as published by
9  *   the Free Software Foundation; either version 2 of the License, or
10  *   (at your option) any later version.
11  *
12  *   This program is distributed in the hope that it will be useful,
13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  *   GNU General Public License for more details.
16  *
17  *   You should have received a copy of the GNU General Public License
18  *   along with this program; if not, write to the Free Software
19  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
20  *
21  */
22
23 #include <sound/driver.h>
24 #include <linux/slab.h>
25 #include <linux/delay.h>
26 #include <sound/core.h>
27 #include <sound/control.h>
28 #include <sound/pcm.h>
29 #include <sound/ak4117.h>
30 #include <sound/asoundef.h>
31
32 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
33 MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
34 MODULE_LICENSE("GPL");
35
36 #define AK4117_ADDR                     0x00 /* fixed address */
37
38 static void snd_ak4117_timer(unsigned long data);
39
40 static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
41 {
42         ak4117->write(ak4117->private_data, reg, val);
43         if (reg < sizeof(ak4117->regmap))
44                 ak4117->regmap[reg] = val;
45 }
46
47 static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
48 {
49         return ak4117->read(ak4117->private_data, reg);
50 }
51
52 #if 0
53 static void reg_dump(struct ak4117 *ak4117)
54 {
55         int i;
56
57         printk(KERN_DEBUG "AK4117 REG DUMP:\n");
58         for (i = 0; i < 0x1b; i++)
59                 printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
60 }
61 #endif
62
63 static void snd_ak4117_free(struct ak4117 *chip)
64 {
65         del_timer(&chip->timer);
66         kfree(chip);
67 }
68
69 static int snd_ak4117_dev_free(struct snd_device *device)
70 {
71         struct ak4117 *chip = device->device_data;
72         snd_ak4117_free(chip);
73         return 0;
74 }
75
76 int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
77                       unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
78 {
79         struct ak4117 *chip;
80         int err = 0;
81         unsigned char reg;
82         static struct snd_device_ops ops = {
83                 .dev_free =     snd_ak4117_dev_free,
84         };
85
86         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
87         if (chip == NULL)
88                 return -ENOMEM;
89         spin_lock_init(&chip->lock);
90         chip->card = card;
91         chip->read = read;
92         chip->write = write;
93         chip->private_data = private_data;
94         init_timer(&chip->timer);
95         chip->timer.data = (unsigned long)chip;
96         chip->timer.function = snd_ak4117_timer;
97
98         for (reg = 0; reg < 5; reg++)
99                 chip->regmap[reg] = pgm[reg];
100         snd_ak4117_reinit(chip);
101
102         chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
103         chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
104         chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
105
106         if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
107                 goto __fail;
108
109         if (r_ak4117)
110                 *r_ak4117 = chip;
111         return 0;
112
113       __fail:
114         snd_ak4117_free(chip);
115         return err < 0 ? err : -EIO;
116 }
117
118 void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
119 {
120         if (reg >= 5)
121                 return;
122         reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
123 }
124
125 void snd_ak4117_reinit(struct ak4117 *chip)
126 {
127         unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
128
129         del_timer(&chip->timer);
130         chip->init = 1;
131         /* bring the chip to reset state and powerdown state */
132         reg_write(chip, AK4117_REG_PWRDN, 0);
133         udelay(200);
134         /* release reset, but leave powerdown */
135         reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
136         udelay(200);
137         for (reg = 1; reg < 5; reg++)
138                 reg_write(chip, reg, chip->regmap[reg]);
139         /* release powerdown, everything is initialized now */
140         reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
141         chip->init = 0;
142         chip->timer.expires = 1 + jiffies;
143         add_timer(&chip->timer);
144 }
145
146 static unsigned int external_rate(unsigned char rcs1)
147 {
148         switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
149         case AK4117_FS_32000HZ: return 32000;
150         case AK4117_FS_44100HZ: return 44100;
151         case AK4117_FS_48000HZ: return 48000;
152         case AK4117_FS_88200HZ: return 88200;
153         case AK4117_FS_96000HZ: return 96000;
154         case AK4117_FS_176400HZ: return 176400;
155         case AK4117_FS_192000HZ: return 192000;
156         default:                return 0;
157         }
158 }
159
160 static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
161                                     struct snd_ctl_elem_info *uinfo)
162 {
163         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
164         uinfo->count = 1;
165         uinfo->value.integer.min = 0;
166         uinfo->value.integer.max = LONG_MAX;
167         return 0;
168 }
169
170 static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
171                                    struct snd_ctl_elem_value *ucontrol)
172 {
173         struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
174         long *ptr;
175
176         spin_lock_irq(&chip->lock);
177         ptr = (long *)(((char *)chip) + kcontrol->private_value);
178         ucontrol->value.integer.value[0] = *ptr;
179         *ptr = 0;
180         spin_unlock_irq(&chip->lock);
181         return 0;
182 }
183
184 static int snd_ak4117_in_bit_info(struct snd_kcontrol *kcontrol,
185                                   struct snd_ctl_elem_info *uinfo)
186 {
187         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
188         uinfo->count = 1;
189         uinfo->value.integer.min = 0;
190         uinfo->value.integer.max = 1;
191         return 0;
192 }
193
194 static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
195                                  struct snd_ctl_elem_value *ucontrol)
196 {
197         struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
198         unsigned char reg = kcontrol->private_value & 0xff;
199         unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
200         unsigned char inv = (kcontrol->private_value >> 31) & 1;
201
202         ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
203         return 0;
204 }
205
206 static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
207                               struct snd_ctl_elem_info *uinfo)
208 {
209         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
210         uinfo->count = 1;
211         uinfo->value.integer.min = 0;
212         uinfo->value.integer.max = 1;
213         return 0;
214 }
215
216 static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
217                              struct snd_ctl_elem_value *ucontrol)
218 {
219         struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
220
221         ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
222         return 0;
223 }
224
225 static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
226                              struct snd_ctl_elem_value *ucontrol)
227 {
228         struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
229         int change;
230         u8 old_val;
231         
232         spin_lock_irq(&chip->lock);
233         old_val = chip->regmap[AK4117_REG_IO];
234         change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
235         if (change)
236                 reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
237         spin_unlock_irq(&chip->lock);
238         return change;
239 }
240
241 static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
242                                 struct snd_ctl_elem_info *uinfo)
243 {
244         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
245         uinfo->count = 1;
246         uinfo->value.integer.min = 0;
247         uinfo->value.integer.max = 192000;
248         return 0;
249 }
250
251 static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
252                                struct snd_ctl_elem_value *ucontrol)
253 {
254         struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
255
256         ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
257         return 0;
258 }
259
260 static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
261 {
262         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
263         uinfo->count = 1;
264         return 0;
265 }
266
267 static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
268                                 struct snd_ctl_elem_value *ucontrol)
269 {
270         struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
271         unsigned i;
272
273         for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
274                 ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
275         return 0;
276 }
277
278 static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
279 {
280         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
281         uinfo->count = 1;
282         return 0;
283 }
284
285 static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
286                                       struct snd_ctl_elem_value *ucontrol)
287 {
288         memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
289         return 0;
290 }
291
292 static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
293 {
294         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
295         uinfo->value.integer.min = 0;
296         uinfo->value.integer.max = 0xffff;
297         uinfo->count = 4;
298         return 0;
299 }
300
301 static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
302                                  struct snd_ctl_elem_value *ucontrol)
303 {
304         struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
305         unsigned short tmp;
306
307         ucontrol->value.integer.value[0] = 0xf8f2;
308         ucontrol->value.integer.value[1] = 0x4e1f;
309         tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
310         ucontrol->value.integer.value[2] = tmp;
311         tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
312         ucontrol->value.integer.value[3] = tmp;
313         return 0;
314 }
315
316 static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
317 {
318         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
319         uinfo->count = AK4117_REG_QSUB_SIZE;
320         return 0;
321 }
322
323 static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
324                                  struct snd_ctl_elem_value *ucontrol)
325 {
326         struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
327         unsigned i;
328
329         for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
330                 ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
331         return 0;
332 }
333
334 /* Don't forget to change AK4117_CONTROLS define!!! */
335 static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
336 {
337         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
338         .name =         "IEC958 Parity Errors",
339         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
340         .info =         snd_ak4117_in_error_info,
341         .get =          snd_ak4117_in_error_get,
342         .private_value = offsetof(struct ak4117, parity_errors),
343 },
344 {
345         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
346         .name =         "IEC958 V-Bit Errors",
347         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
348         .info =         snd_ak4117_in_error_info,
349         .get =          snd_ak4117_in_error_get,
350         .private_value = offsetof(struct ak4117, v_bit_errors),
351 },
352 {
353         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
354         .name =         "IEC958 C-CRC Errors",
355         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
356         .info =         snd_ak4117_in_error_info,
357         .get =          snd_ak4117_in_error_get,
358         .private_value = offsetof(struct ak4117, ccrc_errors),
359 },
360 {
361         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
362         .name =         "IEC958 Q-CRC Errors",
363         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
364         .info =         snd_ak4117_in_error_info,
365         .get =          snd_ak4117_in_error_get,
366         .private_value = offsetof(struct ak4117, qcrc_errors),
367 },
368 {
369         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
370         .name =         "IEC958 External Rate",
371         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
372         .info =         snd_ak4117_rate_info,
373         .get =          snd_ak4117_rate_get,
374 },
375 {
376         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
377         .name =         SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
378         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
379         .info =         snd_ak4117_spdif_mask_info,
380         .get =          snd_ak4117_spdif_mask_get,
381 },
382 {
383         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
384         .name =         SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
385         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
386         .info =         snd_ak4117_spdif_info,
387         .get =          snd_ak4117_spdif_get,
388 },
389 {
390         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
391         .name =         "IEC958 Preample Capture Default",
392         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
393         .info =         snd_ak4117_spdif_pinfo,
394         .get =          snd_ak4117_spdif_pget,
395 },
396 {
397         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
398         .name =         "IEC958 Q-subcode Capture Default",
399         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
400         .info =         snd_ak4117_spdif_qinfo,
401         .get =          snd_ak4117_spdif_qget,
402 },
403 {
404         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
405         .name =         "IEC958 Audio",
406         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
407         .info =         snd_ak4117_in_bit_info,
408         .get =          snd_ak4117_in_bit_get,
409         .private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
410 },
411 {
412         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
413         .name =         "IEC958 Non-PCM Bitstream",
414         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
415         .info =         snd_ak4117_in_bit_info,
416         .get =          snd_ak4117_in_bit_get,
417         .private_value = (5<<8) | AK4117_REG_RCS1,
418 },
419 {
420         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
421         .name =         "IEC958 DTS Bitstream",
422         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
423         .info =         snd_ak4117_in_bit_info,
424         .get =          snd_ak4117_in_bit_get,
425         .private_value = (6<<8) | AK4117_REG_RCS1,
426 },
427 {
428         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
429         .name =         "AK4117 Input Select",
430         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
431         .info =         snd_ak4117_rx_info,
432         .get =          snd_ak4117_rx_get,
433         .put =          snd_ak4117_rx_put,
434 }
435 };
436
437 int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
438 {
439         struct snd_kcontrol *kctl;
440         unsigned int idx;
441         int err;
442
443         snd_assert(cap_substream, return -EINVAL);
444         ak4117->substream = cap_substream;
445         for (idx = 0; idx < AK4117_CONTROLS; idx++) {
446                 kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
447                 if (kctl == NULL)
448                         return -ENOMEM;
449                 kctl->id.device = cap_substream->pcm->device;
450                 kctl->id.subdevice = cap_substream->number;
451                 err = snd_ctl_add(ak4117->card, kctl);
452                 if (err < 0)
453                         return err;
454                 ak4117->kctls[idx] = kctl;
455         }
456         return 0;
457 }
458
459 int snd_ak4117_external_rate(struct ak4117 *ak4117)
460 {
461         unsigned char rcs1;
462
463         rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
464         return external_rate(rcs1);
465 }
466
467 int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
468 {
469         struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
470         unsigned long _flags;
471         int res = 0;
472         unsigned char rcs0, rcs1, rcs2;
473         unsigned char c0, c1;
474
475         rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
476         if (flags & AK4117_CHECK_NO_STAT)
477                 goto __rate;
478         rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
479         rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
480         // printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
481         spin_lock_irqsave(&ak4117->lock, _flags);
482         if (rcs0 & AK4117_PAR)
483                 ak4117->parity_errors++;
484         if (rcs0 & AK4117_V)
485                 ak4117->v_bit_errors++;
486         if (rcs2 & AK4117_CCRC)
487                 ak4117->ccrc_errors++;
488         if (rcs2 & AK4117_QCRC)
489                 ak4117->qcrc_errors++;
490         c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
491                      (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
492         c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
493                      (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
494         ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
495         ak4117->rcs1 = rcs1;
496         ak4117->rcs2 = rcs2;
497         spin_unlock_irqrestore(&ak4117->lock, _flags);
498
499         if (rcs0 & AK4117_PAR)
500                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
501         if (rcs0 & AK4117_V)
502                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
503         if (rcs2 & AK4117_CCRC)
504                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
505         if (rcs2 & AK4117_QCRC)
506                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
507
508         /* rate change */
509         if (c1 & 0x0f)
510                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
511
512         if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
513                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
514         if (c0 & AK4117_QINT)
515                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
516
517         if (c0 & AK4117_AUDION)
518                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
519         if (c1 & AK4117_NPCM)
520                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
521         if (c1 & AK4117_DTSCD)
522                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
523                 
524         if (ak4117->change_callback && (c0 | c1) != 0)
525                 ak4117->change_callback(ak4117, c0, c1);
526
527       __rate:
528         /* compare rate */
529         res = external_rate(rcs1);
530         if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
531                 snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
532                 if (snd_pcm_running(ak4117->substream)) {
533                         // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
534                         snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
535                         wake_up(&runtime->sleep);
536                         res = 1;
537                 }
538                 snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
539         }
540         return res;
541 }
542
543 static void snd_ak4117_timer(unsigned long data)
544 {
545         struct ak4117 *chip = (struct ak4117 *)data;
546
547         if (chip->init)
548                 return;
549         snd_ak4117_check_rate_and_errors(chip, 0);
550         chip->timer.expires = 1 + jiffies;
551         add_timer(&chip->timer);
552 }
553
554 EXPORT_SYMBOL(snd_ak4117_create);
555 EXPORT_SYMBOL(snd_ak4117_reg_write);
556 EXPORT_SYMBOL(snd_ak4117_reinit);
557 EXPORT_SYMBOL(snd_ak4117_build);
558 EXPORT_SYMBOL(snd_ak4117_external_rate);
559 EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);