2 * Copyright (C) 2011, NVIDIA Corporation
4 * Author: Robert Morell <rmorell@nvidia.com>
5 * Some code based on fbdev extensions written by:
6 * Erik Gilling <konkers@android.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #ifndef __TEGRA_DC_EXT_H
20 #define __TEGRA_DC_EXT_H
22 #include <linux/types.h>
23 #include <linux/ioctl.h>
24 #if defined(__KERNEL__)
25 # include <linux/time.h>
31 #define TEGRA_DC_EXT_FMT_P1 0
32 #define TEGRA_DC_EXT_FMT_P2 1
33 #define TEGRA_DC_EXT_FMT_P4 2
34 #define TEGRA_DC_EXT_FMT_P8 3
35 #define TEGRA_DC_EXT_FMT_B4G4R4A4 4
36 #define TEGRA_DC_EXT_FMT_B5G5R5A 5
37 #define TEGRA_DC_EXT_FMT_B5G6R5 6
38 #define TEGRA_DC_EXT_FMT_AB5G5R5 7
39 #define TEGRA_DC_EXT_FMT_B8G8R8A8 12
40 #define TEGRA_DC_EXT_FMT_R8G8B8A8 13
41 #define TEGRA_DC_EXT_FMT_B6x2G6x2R6x2A8 14
42 #define TEGRA_DC_EXT_FMT_R6x2G6x2B6x2A8 15
43 #define TEGRA_DC_EXT_FMT_YCbCr422 16
44 #define TEGRA_DC_EXT_FMT_YUV422 17
45 #define TEGRA_DC_EXT_FMT_YCbCr420P 18
46 #define TEGRA_DC_EXT_FMT_YUV420P 19
47 #define TEGRA_DC_EXT_FMT_YCbCr422P 20
48 #define TEGRA_DC_EXT_FMT_YUV422P 21
49 #define TEGRA_DC_EXT_FMT_YCbCr422R 22
50 #define TEGRA_DC_EXT_FMT_YUV422R 23
51 #define TEGRA_DC_EXT_FMT_YCbCr422RA 24
52 #define TEGRA_DC_EXT_FMT_YUV422RA 25
54 #define TEGRA_DC_EXT_BLEND_NONE 0
55 #define TEGRA_DC_EXT_BLEND_PREMULT 1
56 #define TEGRA_DC_EXT_BLEND_COVERAGE 2
58 struct tegra_dc_ext_flip_windowattr {
69 * x, y, w, h are fixed-point: 20 bits of integer (MSB) and 12 bits of
82 struct timespec timestamp;
85 /* Leave some wiggle room for future expansion */
89 #define TEGRA_DC_EXT_FLIP_N_WINDOWS 3
91 struct tegra_dc_ext_flip {
92 struct tegra_dc_ext_flip_windowattr win[TEGRA_DC_EXT_FLIP_N_WINDOWS];
94 __u32 post_syncpt_val;
98 * Cursor image format:
99 * - Tegra hardware supports two colors: foreground and background, specified
100 * by the client in RGB8.
101 * - The image should be specified as two 1bpp bitmaps immediately following
102 * each other in memory. Each pixel in the final cursor will be constructed
103 * from the bitmaps with the following logic:
108 * 0 0 background color
109 * 0 1 foreground color
110 * - Exactly one of the SIZE flags must be specified.
112 #define TEGRA_DC_EXT_CURSOR_IMAGE_FLAGS_SIZE_32x32 1
113 #define TEGRA_DC_EXT_CURSOR_IMAGE_FLAGS_SIZE_64x64 2
114 struct tegra_dc_ext_cursor_image {
119 } foreground, background;
124 /* Possible flags for struct nvdc_cursor's flags field */
125 #define TEGRA_DC_EXT_CURSOR_FLAGS_VISIBLE 1
127 struct tegra_dc_ext_cursor {
134 * Color conversion is performed as follows:
136 * r = sat(kyrgb * sat(y + yof) + kur * u + kvr * v)
137 * g = sat(kyrgb * sat(y + yof) + kug * u + kvg * v)
138 * b = sat(kyrgb * sat(y + yof) + kub * u + kvb * v)
140 * Coefficients should be specified as fixed-point values; the exact format
141 * varies for each coefficient.
142 * The format for each coefficient is listed below with the syntax:
143 * - A "s." prefix means that the coefficient has a sign bit (twos complement).
144 * - The first number is the number of bits in the integer component (not
145 * including the optional sign bit).
146 * - The second number is the number of bits in the fractional component.
148 * All three fields should be tightly packed, justified to the LSB of the
149 * 16-bit value. For example, the "s.2.8" value should be packed as:
150 * (MSB) 5 bits of 0, 1 bit of sign, 2 bits of integer, 8 bits of frac (LSB)
152 struct tegra_dc_ext_csc {
154 __u16 yof; /* s.7.0 */
155 __u16 kyrgb; /* 2.8 */
156 __u16 kur; /* s.2.8 */
157 __u16 kvr; /* s.2.8 */
158 __u16 kug; /* s.1.8 */
159 __u16 kvg; /* s.1.8 */
160 __u16 kub; /* s.2.8 */
161 __u16 kvb; /* s.2.8 */
164 #define TEGRA_DC_EXT_SET_NVMAP_FD \
165 _IOW('D', 0x00, __s32)
167 #define TEGRA_DC_EXT_GET_WINDOW \
168 _IOW('D', 0x01, __u32)
169 #define TEGRA_DC_EXT_PUT_WINDOW \
170 _IOW('D', 0x02, __u32)
172 #define TEGRA_DC_EXT_FLIP \
173 _IOWR('D', 0x03, struct tegra_dc_ext_flip)
175 #define TEGRA_DC_EXT_GET_CURSOR \
177 #define TEGRA_DC_EXT_PUT_CURSOR \
179 #define TEGRA_DC_EXT_SET_CURSOR_IMAGE \
180 _IOW('D', 0x06, struct tegra_dc_ext_cursor_image)
181 #define TEGRA_DC_EXT_SET_CURSOR \
182 _IOW('D', 0x07, struct tegra_dc_ext_cursor)
184 #define TEGRA_DC_EXT_SET_CSC \
185 _IOW('D', 0x08, struct tegra_dc_ext_csc)
188 * Returns the auto-incrementing vblank syncpoint for the head associated with
191 #define TEGRA_DC_EXT_GET_VBLANK_SYNCPT \
192 _IOR('D', 0x09, __u32)
195 enum tegra_dc_ext_control_output_type {
204 * Get the properties for a given output.
206 * handle (in): Which output to query
207 * type (out): Describes the type of the output
208 * connected (out): Non-zero iff the output is currently connected
209 * associated_head (out): The head number that the output is currently
210 * bound to. -1 iff the output is not associated with any head.
211 * head_mask (out): Bitmask of which heads the output may be bound to (some
212 * outputs are permanently bound to a single head).
214 struct tegra_dc_ext_control_output_properties {
216 enum tegra_dc_ext_control_output_type type;
218 __s32 associated_head;
222 struct tegra_dc_ext_control_output_edid {
228 struct tegra_dc_ext_event {
234 #define TEGRA_DC_EXT_EVENT_HOTPLUG 0x1
235 struct tegra_dc_ext_control_event_hotplug {
239 #define TEGRA_DC_EXT_CONTROL_GET_NUM_OUTPUTS \
240 _IOR('C', 0x00, __u32)
241 #define TEGRA_DC_EXT_CONTROL_GET_OUTPUT_PROPERTIES \
242 _IOWR('C', 0x01, struct tegra_dc_ext_control_output_properties)
243 #define TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID \
244 _IOWR('C', 0x02, struct tegra_dc_ext_control_output_edid)
245 #define TEGRA_DC_EXT_CONTROL_SET_EVENT_MASK \
246 _IOW('C', 0x03, __u32)
248 #endif /* __TEGRA_DC_EXT_H */