mfd: tps80031: Support second level of charge_control interrupt
[linux-2.6.git] / include / linux / mfd / tps80031.h
1 /*
2  * include/linux/mfd/tps80031.c
3  *
4  * Core driver interface for TI TPS80031 PMIC
5  *
6  * Copyright (C) 2011 NVIDIA Corporation
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but WITHOUT
14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
16  * more details.
17  *
18  * You should have received a copy of the GNU General Public License along
19  * with this program; if not, write to the Free Software Foundation, Inc.,
20  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
21  *
22  */
23
24 #ifndef __LINUX_MFD_TPS80031_H
25 #define __LINUX_MFD_TPS80031_H
26
27 #include <linux/rtc.h>
28
29 #define tps80031_rails(_name) "tps80031_"#_name
30
31 enum {
32         TPS80031_ID_VIO,
33         TPS80031_ID_SMPS1,
34         TPS80031_ID_SMPS2,
35         TPS80031_ID_SMPS3,
36         TPS80031_ID_SMPS4,
37         TPS80031_ID_VANA,
38         TPS80031_ID_LDO1,
39         TPS80031_ID_LDO2,
40         TPS80031_ID_LDO3,
41         TPS80031_ID_LDO4,
42         TPS80031_ID_LDO5,
43         TPS80031_ID_LDO6,
44         TPS80031_ID_LDO7,
45         TPS80031_ID_LDOLN,
46         TPS80031_ID_LDOUSB,
47         TPS80031_ID_VBUS,
48 };
49
50 enum {
51         TPS80031_INT_PWRON,
52         TPS80031_INT_RPWRON,
53         TPS80031_INT_SYS_VLOW,
54         TPS80031_INT_RTC_ALARM,
55         TPS80031_INT_RTC_PERIOD,
56         TPS80031_INT_HOT_DIE,
57         TPS80031_INT_VXX_SHORT,
58         TPS80031_INT_SPDURATION,
59         TPS80031_INT_WATCHDOG,
60         TPS80031_INT_BAT,
61         TPS80031_INT_SIM,
62         TPS80031_INT_MMC,
63         TPS80031_INT_RES,
64         TPS80031_INT_GPADC_RT,
65         TPS80031_INT_GPADC_SW2_EOC,
66         TPS80031_INT_CC_AUTOCAL,
67         TPS80031_INT_ID_WKUP,
68         TPS80031_INT_VBUSS_WKUP,
69         TPS80031_INT_ID,
70         TPS80031_INT_VBUS,
71         TPS80031_INT_CHRG_CTRL,
72         TPS80031_INT_EXT_CHRG,
73         TPS80031_INT_INT_CHRG,
74         TPS80031_INT_RES2,
75         TPS80031_INT_BAT_TEMP_OVRANGE,
76         TPS80031_INT_BAT_REMOVED,
77         TPS80031_INT_VBUS_DET,
78         TPS80031_INT_VAC_DET,
79         TPS80031_INT_FAULT_WDG,
80         TPS80031_INT_LINCH_GATED,
81
82         /* Last interrupt id to get the end number */
83         TPS80031_INT_END,
84 };
85
86 enum {
87         SLAVE_ID0 = 0,
88         SLAVE_ID1 = 1,
89         SLAVE_ID2 = 2,
90         SLAVE_ID3 = 3,
91 };
92
93 enum {
94         I2C_ID0_ADDR = 0x12,
95         I2C_ID1_ADDR = 0x48,
96         I2C_ID2_ADDR = 0x49,
97         I2C_ID3_ADDR = 0x4A,
98 };
99
100 struct tps80031_subdev_info {
101         int             id;
102         const char      *name;
103         void            *platform_data;
104 };
105
106 struct tps80031_rtc_platform_data {
107         int irq;
108         struct rtc_time time;
109 };
110
111 struct tps80031_32kclock_plat_data {
112         unsigned en_clk32kao:1;
113         unsigned en_clk32kg:1;
114         unsigned en_clk32kaudio:1;
115 };
116
117 struct tps80031_platform_data {
118         int num_subdevs;
119         struct tps80031_subdev_info *subdevs;
120         int gpio_base;
121         int irq_base;
122         struct tps80031_32kclock_plat_data *clk32k_pdata;
123 };
124
125 /*
126  * NOTE: the functions below are not intended for use outside
127  * of the TPS80031 sub-device drivers
128  */
129 extern int tps80031_write(struct device *dev, int sid, int reg, uint8_t val);
130 extern int tps80031_writes(struct device *dev, int sid, int reg, int len,
131                                 uint8_t *val);
132 extern int tps80031_read(struct device *dev, int sid, int reg, uint8_t *val);
133 extern int tps80031_reads(struct device *dev, int sid, int reg, int len,
134                                 uint8_t *val);
135 extern int tps80031_set_bits(struct device *dev, int sid, int reg,
136                                 uint8_t bit_mask);
137 extern int tps80031_clr_bits(struct device *dev, int sid, int reg,
138                                 uint8_t bit_mask);
139 extern int tps80031_update(struct device *dev, int sid, int reg, uint8_t val,
140                            uint8_t mask);
141 extern int tps80031_force_update(struct device *dev, int sid, int reg,
142                                  uint8_t val, uint8_t mask);
143 extern int tps80031_power_off(void);
144
145 #endif /*__LINUX_MFD_TPS80031_H */